dmtbinfo.c revision 1.4
1 /****************************************************************************** 2 * 3 * Module Name: dmtbinfo - Table info for non-AML tables 4 * 5 *****************************************************************************/ 6 7 /* 8 * Copyright (C) 2000 - 2011, Intel Corp. 9 * All rights reserved. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions, and the following disclaimer, 16 * without modification. 17 * 2. Redistributions in binary form must reproduce at minimum a disclaimer 18 * substantially similar to the "NO WARRANTY" disclaimer below 19 * ("Disclaimer") and any redistribution must be conditioned upon 20 * including a substantially similar Disclaimer requirement for further 21 * binary redistribution. 22 * 3. Neither the names of the above-listed copyright holders nor the names 23 * of any contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * Alternatively, this software may be distributed under the terms of the 27 * GNU General Public License ("GPL") version 2 as published by the Free 28 * Software Foundation. 29 * 30 * NO WARRANTY 31 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 32 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 33 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR 34 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 35 * HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 36 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 37 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 38 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 39 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING 40 * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 41 * POSSIBILITY OF SUCH DAMAGES. 42 */ 43 44 #include "acpi.h" 45 #include "accommon.h" 46 #include "acdisasm.h" 47 48 /* This module used for application-level code only */ 49 50 #define _COMPONENT ACPI_CA_DISASSEMBLER 51 ACPI_MODULE_NAME ("dmtbinfo") 52 53 /* 54 * How to add a new table: 55 * 56 * - Add the C table definition to the actbl1.h or actbl2.h header. 57 * - Add ACPI_xxxx_OFFSET macro(s) for the table (and subtables) to list below. 58 * - Define the table in this file (for the disassembler). If any 59 * new data types are required (ACPI_DMT_*), see below. 60 * - Add an external declaration for the new table definition (AcpiDmTableInfo*) 61 * in acdisam.h 62 * - Add new table definition to the dispatch table in dmtable.c (AcpiDmTableData) 63 * If a simple table (with no subtables), no disassembly code is needed. 64 * Otherwise, create the AcpiDmDump* function for to disassemble the table 65 * and add it to the dmtbdump.c file. 66 * - Add an external declaration for the new AcpiDmDump* function in acdisasm.h 67 * - Add the new AcpiDmDump* function to the dispatch table in dmtable.c 68 * - Create a template for the new table 69 * - Add data table compiler support 70 * 71 * How to add a new data type (ACPI_DMT_*): 72 * 73 * - Add new type at the end of the ACPI_DMT list in acdisasm.h 74 * - Add length and implementation cases in dmtable.c (disassembler) 75 * - Add type and length cases in dtutils.c (DT compiler) 76 */ 77 78 /* 79 * Macros used to generate offsets to specific table fields 80 */ 81 #define ACPI_FACS_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_FACS,f) 82 #define ACPI_GAS_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_GENERIC_ADDRESS,f) 83 #define ACPI_HDR_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_HEADER,f) 84 #define ACPI_RSDP_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_RSDP,f) 85 #define ACPI_BOOT_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_BOOT,f) 86 #define ACPI_BERT_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_BERT,f) 87 #define ACPI_CPEP_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_CPEP,f) 88 #define ACPI_DBGP_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_DBGP,f) 89 #define ACPI_DMAR_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_DMAR,f) 90 #define ACPI_ECDT_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_ECDT,f) 91 #define ACPI_EINJ_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_EINJ,f) 92 #define ACPI_ERST_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_ERST,f) 93 #define ACPI_HEST_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_HEST,f) 94 #define ACPI_HPET_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_HPET,f) 95 #define ACPI_IVRS_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_IVRS,f) 96 #define ACPI_MADT_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_MADT,f) 97 #define ACPI_MCFG_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_MCFG,f) 98 #define ACPI_MCHI_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_MCHI,f) 99 #define ACPI_MSCT_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_MSCT,f) 100 #define ACPI_SBST_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_SBST,f) 101 #define ACPI_SLIT_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_SLIT,f) 102 #define ACPI_SPCR_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_SPCR,f) 103 #define ACPI_SPMI_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_SPMI,f) 104 #define ACPI_SRAT_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_SRAT,f) 105 #define ACPI_TCPA_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_TCPA,f) 106 #define ACPI_UEFI_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_UEFI,f) 107 #define ACPI_WAET_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_WAET,f) 108 #define ACPI_WDAT_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_WDAT,f) 109 #define ACPI_WDDT_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_WDDT,f) 110 #define ACPI_WDRT_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_WDRT,f) 111 112 /* Subtables */ 113 114 #define ACPI_ASF0_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_ASF_INFO,f) 115 #define ACPI_ASF1_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_ASF_ALERT,f) 116 #define ACPI_ASF1a_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_ASF_ALERT_DATA,f) 117 #define ACPI_ASF2_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_ASF_REMOTE,f) 118 #define ACPI_ASF2a_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_ASF_CONTROL_DATA,f) 119 #define ACPI_ASF3_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_ASF_RMCP,f) 120 #define ACPI_ASF4_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_ASF_ADDRESS,f) 121 #define ACPI_CPEP0_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_CPEP_POLLING,f) 122 #define ACPI_DMARS_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_DMAR_DEVICE_SCOPE,f) 123 #define ACPI_DMAR0_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_DMAR_HARDWARE_UNIT,f) 124 #define ACPI_DMAR1_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_DMAR_RESERVED_MEMORY,f) 125 #define ACPI_DMAR2_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_DMAR_ATSR,f) 126 #define ACPI_DMAR3_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_DMAR_RHSA,f) 127 #define ACPI_EINJ0_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_WHEA_HEADER,f) 128 #define ACPI_ERST0_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_WHEA_HEADER,f) 129 #define ACPI_HEST0_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_HEST_IA_MACHINE_CHECK,f) 130 #define ACPI_HEST1_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_HEST_IA_CORRECTED,f) 131 #define ACPI_HEST2_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_HEST_IA_NMI,f) 132 #define ACPI_HEST6_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_HEST_AER_ROOT,f) 133 #define ACPI_HEST7_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_HEST_AER,f) 134 #define ACPI_HEST8_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_HEST_AER_BRIDGE,f) 135 #define ACPI_HEST9_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_HEST_GENERIC,f) 136 #define ACPI_HESTN_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_HEST_NOTIFY,f) 137 #define ACPI_HESTB_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_HEST_IA_ERROR_BANK,f) 138 #define ACPI_IVRSH_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_IVRS_HEADER,f) 139 #define ACPI_IVRS0_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_IVRS_HARDWARE,f) 140 #define ACPI_IVRS1_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_IVRS_MEMORY,f) 141 #define ACPI_IVRSD_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_IVRS_DE_HEADER,f) 142 #define ACPI_IVRS8A_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_IVRS_DEVICE8A,f) 143 #define ACPI_IVRS8B_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_IVRS_DEVICE8B,f) 144 #define ACPI_IVRS8C_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_IVRS_DEVICE8C,f) 145 #define ACPI_MADT0_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_MADT_LOCAL_APIC,f) 146 #define ACPI_MADT1_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_MADT_IO_APIC,f) 147 #define ACPI_MADT2_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_MADT_INTERRUPT_OVERRIDE,f) 148 #define ACPI_MADT3_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_MADT_NMI_SOURCE,f) 149 #define ACPI_MADT4_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_MADT_LOCAL_APIC_NMI,f) 150 #define ACPI_MADT5_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_MADT_LOCAL_APIC_OVERRIDE,f) 151 #define ACPI_MADT6_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_MADT_IO_SAPIC,f) 152 #define ACPI_MADT7_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_MADT_LOCAL_SAPIC,f) 153 #define ACPI_MADT8_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_MADT_INTERRUPT_SOURCE,f) 154 #define ACPI_MADT9_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_MADT_LOCAL_X2APIC,f) 155 #define ACPI_MADT10_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_MADT_LOCAL_X2APIC_NMI,f) 156 #define ACPI_MADTH_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_SUBTABLE_HEADER,f) 157 #define ACPI_MCFG0_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_MCFG_ALLOCATION,f) 158 #define ACPI_MSCT0_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_MSCT_PROXIMITY,f) 159 #define ACPI_SLICH_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_SLIC_HEADER,f) 160 #define ACPI_SLIC0_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_SLIC_KEY,f) 161 #define ACPI_SLIC1_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_SLIC_MARKER,f) 162 #define ACPI_SRATH_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_SUBTABLE_HEADER,f) 163 #define ACPI_SRAT0_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_SRAT_CPU_AFFINITY,f) 164 #define ACPI_SRAT1_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_SRAT_MEM_AFFINITY,f) 165 #define ACPI_SRAT2_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_SRAT_X2APIC_CPU_AFFINITY,f) 166 #define ACPI_WDAT0_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_WDAT_ENTRY,f) 167 168 /* 169 * Simplify access to flag fields by breaking them up into bytes 170 */ 171 #define ACPI_FLAG_OFFSET(d,f,o) (UINT8) (ACPI_OFFSET (d,f) + o) 172 173 /* Flags */ 174 175 #define ACPI_FADT_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_TABLE_FADT,f,o) 176 #define ACPI_FACS_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_TABLE_FACS,f,o) 177 #define ACPI_HPET_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_TABLE_HPET,f,o) 178 #define ACPI_SRAT0_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_SRAT_CPU_AFFINITY,f,o) 179 #define ACPI_SRAT1_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_SRAT_MEM_AFFINITY,f,o) 180 #define ACPI_SRAT2_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_SRAT_X2APIC_CPU_AFFINITY,f,o) 181 #define ACPI_MADT_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_TABLE_MADT,f,o) 182 #define ACPI_MADT0_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_MADT_LOCAL_APIC,f,o) 183 #define ACPI_MADT2_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_MADT_INTERRUPT_OVERRIDE,f,o) 184 #define ACPI_MADT3_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_MADT_NMI_SOURCE,f,o) 185 #define ACPI_MADT4_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_MADT_LOCAL_APIC_NMI,f,o) 186 #define ACPI_MADT7_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_MADT_LOCAL_SAPIC,f,o) 187 #define ACPI_MADT8_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_MADT_INTERRUPT_SOURCE,f,o) 188 #define ACPI_MADT9_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_MADT_LOCAL_X2APIC,f,o) 189 #define ACPI_MADT10_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_MADT_LOCAL_X2APIC_NMI,f,o) 190 #define ACPI_WDDT_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_TABLE_WDDT,f,o) 191 #define ACPI_EINJ0_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_WHEA_HEADER,f,o) 192 #define ACPI_ERST0_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_WHEA_HEADER,f,o) 193 #define ACPI_HEST0_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_HEST_IA_MACHINE_CHECK,f,o) 194 #define ACPI_HEST1_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_HEST_IA_CORRECTED,f,o) 195 #define ACPI_HEST6_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_HEST_AER_ROOT,f,o) 196 197 /* 198 * Required terminator for all tables below 199 */ 200 #define ACPI_DMT_TERMINATOR {ACPI_DMT_EXIT, 0, NULL, 0} 201 202 203 /* 204 * ACPI Table Information, used to dump formatted ACPI tables 205 * 206 * Each entry is of the form: <Field Type, Field Offset, Field Name> 207 */ 208 209 /******************************************************************************* 210 * 211 * Common ACPI table header 212 * 213 ******************************************************************************/ 214 215 ACPI_DMTABLE_INFO AcpiDmTableInfoHeader[] = 216 { 217 {ACPI_DMT_SIG, ACPI_HDR_OFFSET (Signature[0]), "Signature", 0}, 218 {ACPI_DMT_UINT32, ACPI_HDR_OFFSET (Length), "Table Length", DT_LENGTH}, 219 {ACPI_DMT_UINT8, ACPI_HDR_OFFSET (Revision), "Revision", 0}, 220 {ACPI_DMT_CHKSUM, ACPI_HDR_OFFSET (Checksum), "Checksum", 0}, 221 {ACPI_DMT_NAME6, ACPI_HDR_OFFSET (OemId[0]), "Oem ID", 0}, 222 {ACPI_DMT_NAME8, ACPI_HDR_OFFSET (OemTableId[0]), "Oem Table ID", 0}, 223 {ACPI_DMT_UINT32, ACPI_HDR_OFFSET (OemRevision), "Oem Revision", 0}, 224 {ACPI_DMT_NAME4, ACPI_HDR_OFFSET (AslCompilerId[0]), "Asl Compiler ID", 0}, 225 {ACPI_DMT_UINT32, ACPI_HDR_OFFSET (AslCompilerRevision), "Asl Compiler Revision", 0}, 226 ACPI_DMT_TERMINATOR 227 }; 228 229 230 /******************************************************************************* 231 * 232 * GAS - Generic Address Structure 233 * 234 ******************************************************************************/ 235 236 ACPI_DMTABLE_INFO AcpiDmTableInfoGas[] = 237 { 238 {ACPI_DMT_SPACEID, ACPI_GAS_OFFSET (SpaceId), "Space ID", 0}, 239 {ACPI_DMT_UINT8, ACPI_GAS_OFFSET (BitWidth), "Bit Width", 0}, 240 {ACPI_DMT_UINT8, ACPI_GAS_OFFSET (BitOffset), "Bit Offset", 0}, 241 {ACPI_DMT_ACCWIDTH, ACPI_GAS_OFFSET (AccessWidth), "Encoded Access Width", 0}, 242 {ACPI_DMT_UINT64, ACPI_GAS_OFFSET (Address), "Address", 0}, 243 ACPI_DMT_TERMINATOR 244 }; 245 246 247 /******************************************************************************* 248 * 249 * RSDP - Root System Description Pointer (Signature is "RSD PTR ") 250 * 251 ******************************************************************************/ 252 253 ACPI_DMTABLE_INFO AcpiDmTableInfoRsdp1[] = 254 { 255 {ACPI_DMT_NAME8, ACPI_RSDP_OFFSET (Signature[0]), "Signature", 0}, 256 {ACPI_DMT_UINT8, ACPI_RSDP_OFFSET (Checksum), "Checksum", 0}, 257 {ACPI_DMT_NAME6, ACPI_RSDP_OFFSET (OemId[0]), "Oem ID", 0}, 258 {ACPI_DMT_UINT8, ACPI_RSDP_OFFSET (Revision), "Revision", 0}, 259 {ACPI_DMT_UINT32, ACPI_RSDP_OFFSET (RsdtPhysicalAddress), "RSDT Address", 0}, 260 ACPI_DMT_TERMINATOR 261 }; 262 263 /* ACPI 2.0+ Extensions */ 264 265 ACPI_DMTABLE_INFO AcpiDmTableInfoRsdp2[] = 266 { 267 {ACPI_DMT_UINT32, ACPI_RSDP_OFFSET (Length), "Length", DT_LENGTH}, 268 {ACPI_DMT_UINT64, ACPI_RSDP_OFFSET (XsdtPhysicalAddress), "XSDT Address", 0}, 269 {ACPI_DMT_UINT8, ACPI_RSDP_OFFSET (ExtendedChecksum), "Extended Checksum", 0}, 270 {ACPI_DMT_UINT24, ACPI_RSDP_OFFSET (Reserved[0]), "Reserved", 0}, 271 ACPI_DMT_TERMINATOR 272 }; 273 274 275 /******************************************************************************* 276 * 277 * FACS - Firmware ACPI Control Structure 278 * 279 ******************************************************************************/ 280 281 ACPI_DMTABLE_INFO AcpiDmTableInfoFacs[] = 282 { 283 {ACPI_DMT_NAME4, ACPI_FACS_OFFSET (Signature[0]), "Signature", 0}, 284 {ACPI_DMT_UINT32, ACPI_FACS_OFFSET (Length), "Length", DT_LENGTH}, 285 {ACPI_DMT_UINT32, ACPI_FACS_OFFSET (HardwareSignature), "Hardware Signature", 0}, 286 {ACPI_DMT_UINT32, ACPI_FACS_OFFSET (FirmwareWakingVector), "32 Firmware Waking Vector", 0}, 287 {ACPI_DMT_UINT32, ACPI_FACS_OFFSET (GlobalLock), "Global Lock", 0}, 288 {ACPI_DMT_UINT32, ACPI_FACS_OFFSET (Flags), "Flags (decoded below)", DT_FLAG}, 289 {ACPI_DMT_FLAG0, ACPI_FACS_FLAG_OFFSET (Flags,0), "S4BIOS Support Present", 0}, 290 {ACPI_DMT_FLAG1, ACPI_FACS_FLAG_OFFSET (Flags,0), "64-bit Wake Supported (V2)", 0}, 291 {ACPI_DMT_UINT64, ACPI_FACS_OFFSET (XFirmwareWakingVector), "64 Firmware Waking Vector", 0}, 292 {ACPI_DMT_UINT8, ACPI_FACS_OFFSET (Version), "Version", 0}, 293 {ACPI_DMT_UINT24, ACPI_FACS_OFFSET (Reserved[0]), "Reserved", 0}, 294 {ACPI_DMT_UINT32, ACPI_FACS_OFFSET (OspmFlags), "OspmFlags (decoded below)", DT_FLAG}, 295 {ACPI_DMT_FLAG0, ACPI_FACS_FLAG_OFFSET (OspmFlags,0), "64-bit Wake Env Required (V2)", 0}, 296 ACPI_DMT_TERMINATOR 297 }; 298 299 300 /******************************************************************************* 301 * 302 * FADT - Fixed ACPI Description Table (Signature is FACP) 303 * 304 ******************************************************************************/ 305 306 /* ACPI 1.0 FADT (Version 1) */ 307 308 ACPI_DMTABLE_INFO AcpiDmTableInfoFadt1[] = 309 { 310 {ACPI_DMT_UINT32, ACPI_FADT_OFFSET (Facs), "FACS Address", 0}, 311 {ACPI_DMT_UINT32, ACPI_FADT_OFFSET (Dsdt), "DSDT Address", DT_NON_ZERO}, 312 {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (Model), "Model", 0}, 313 {ACPI_DMT_FADTPM, ACPI_FADT_OFFSET (PreferredProfile), "PM Profile", 0}, 314 {ACPI_DMT_UINT16, ACPI_FADT_OFFSET (SciInterrupt), "SCI Interrupt", 0}, 315 {ACPI_DMT_UINT32, ACPI_FADT_OFFSET (SmiCommand), "SMI Command Port", 0}, 316 {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (AcpiEnable), "ACPI Enable Value", 0}, 317 {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (AcpiDisable), "ACPI Disable Value", 0}, 318 {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (S4BiosRequest), "S4BIOS Command", 0}, 319 {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (PstateControl), "P-State Control", 0}, 320 {ACPI_DMT_UINT32, ACPI_FADT_OFFSET (Pm1aEventBlock), "PM1A Event Block Address", 0}, 321 {ACPI_DMT_UINT32, ACPI_FADT_OFFSET (Pm1bEventBlock), "PM1B Event Block Address", 0}, 322 {ACPI_DMT_UINT32, ACPI_FADT_OFFSET (Pm1aControlBlock), "PM1A Control Block Address", 0}, 323 {ACPI_DMT_UINT32, ACPI_FADT_OFFSET (Pm1bControlBlock), "PM1B Control Block Address", 0}, 324 {ACPI_DMT_UINT32, ACPI_FADT_OFFSET (Pm2ControlBlock), "PM2 Control Block Address", 0}, 325 {ACPI_DMT_UINT32, ACPI_FADT_OFFSET (PmTimerBlock), "PM Timer Block Address", 0}, 326 {ACPI_DMT_UINT32, ACPI_FADT_OFFSET (Gpe0Block), "GPE0 Block Address", 0}, 327 {ACPI_DMT_UINT32, ACPI_FADT_OFFSET (Gpe1Block), "GPE1 Block Address", 0}, 328 {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (Pm1EventLength), "PM1 Event Block Length", 0}, 329 {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (Pm1ControlLength), "PM1 Control Block Length", 0}, 330 {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (Pm2ControlLength), "PM2 Control Block Length", 0}, 331 {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (PmTimerLength), "PM Timer Block Length", 0}, 332 {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (Gpe0BlockLength), "GPE0 Block Length", 0}, 333 {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (Gpe1BlockLength), "GPE1 Block Length", 0}, 334 {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (Gpe1Base), "GPE1 Base Offset", 0}, 335 {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (CstControl), "_CST Support", 0}, 336 {ACPI_DMT_UINT16, ACPI_FADT_OFFSET (C2Latency), "C2 Latency", 0}, 337 {ACPI_DMT_UINT16, ACPI_FADT_OFFSET (C3Latency), "C3 Latency", 0}, 338 {ACPI_DMT_UINT16, ACPI_FADT_OFFSET (FlushSize), "CPU Cache Size", 0}, 339 {ACPI_DMT_UINT16, ACPI_FADT_OFFSET (FlushStride), "Cache Flush Stride", 0}, 340 {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (DutyOffset), "Duty Cycle Offset", 0}, 341 {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (DutyWidth), "Duty Cycle Width", 0}, 342 {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (DayAlarm), "RTC Day Alarm Index", 0}, 343 {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (MonthAlarm), "RTC Month Alarm Index", 0}, 344 {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (Century), "RTC Century Index", 0}, 345 {ACPI_DMT_UINT16, ACPI_FADT_OFFSET (BootFlags), "Boot Flags (decoded below)", DT_FLAG}, 346 347 /* Boot Architecture Flags byte 0 */ 348 349 {ACPI_DMT_FLAG0, ACPI_FADT_FLAG_OFFSET (BootFlags,0), "Legacy Devices Supported (V2)", 0}, 350 {ACPI_DMT_FLAG1, ACPI_FADT_FLAG_OFFSET (BootFlags,0), "8042 Present on ports 60/64 (V2)", 0}, 351 {ACPI_DMT_FLAG2, ACPI_FADT_FLAG_OFFSET (BootFlags,0), "VGA Not Present (V4)", 0}, 352 {ACPI_DMT_FLAG3, ACPI_FADT_FLAG_OFFSET (BootFlags,0), "MSI Not Supported (V4)", 0}, 353 {ACPI_DMT_FLAG4, ACPI_FADT_FLAG_OFFSET (BootFlags,0), "PCIe ASPM Not Supported (V4)", 0}, 354 355 {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (Reserved), "Reserved", 0}, 356 {ACPI_DMT_UINT32, ACPI_FADT_OFFSET (Flags), "Flags (decoded below)", DT_FLAG}, 357 358 /* Flags byte 0 */ 359 360 {ACPI_DMT_FLAG0, ACPI_FADT_FLAG_OFFSET (Flags,0), "WBINVD instruction is operational (V1)", 0}, 361 {ACPI_DMT_FLAG1, ACPI_FADT_FLAG_OFFSET (Flags,0), "WBINVD flushes all caches (V1)", 0}, 362 {ACPI_DMT_FLAG2, ACPI_FADT_FLAG_OFFSET (Flags,0), "All CPUs support C1 (V1)", 0}, 363 {ACPI_DMT_FLAG3, ACPI_FADT_FLAG_OFFSET (Flags,0), "C2 works on MP system (V1)", 0}, 364 {ACPI_DMT_FLAG4, ACPI_FADT_FLAG_OFFSET (Flags,0), "Control Method Power Button (V1)", 0}, 365 {ACPI_DMT_FLAG5, ACPI_FADT_FLAG_OFFSET (Flags,0), "Control Method Sleep Button (V1)", 0}, 366 {ACPI_DMT_FLAG6, ACPI_FADT_FLAG_OFFSET (Flags,0), "RTC wake not in fixed reg space (V1)", 0}, 367 {ACPI_DMT_FLAG7, ACPI_FADT_FLAG_OFFSET (Flags,0), "RTC can wake system from S4 (V1)", 0}, 368 369 /* Flags byte 1 */ 370 371 {ACPI_DMT_FLAG0, ACPI_FADT_FLAG_OFFSET (Flags,1), "32-bit PM Timer (V1)", 0}, 372 {ACPI_DMT_FLAG1, ACPI_FADT_FLAG_OFFSET (Flags,1), "Docking Supported (V1)", 0}, 373 {ACPI_DMT_FLAG2, ACPI_FADT_FLAG_OFFSET (Flags,1), "Reset Register Supported (V2)", 0}, 374 {ACPI_DMT_FLAG3, ACPI_FADT_FLAG_OFFSET (Flags,1), "Sealed Case (V3)", 0}, 375 {ACPI_DMT_FLAG4, ACPI_FADT_FLAG_OFFSET (Flags,1), "Headless - No Video (V3)", 0}, 376 {ACPI_DMT_FLAG5, ACPI_FADT_FLAG_OFFSET (Flags,1), "Use native instr after SLP_TYPx (V3)", 0}, 377 {ACPI_DMT_FLAG6, ACPI_FADT_FLAG_OFFSET (Flags,1), "PCIEXP_WAK Bits Supported (V4)", 0}, 378 {ACPI_DMT_FLAG7, ACPI_FADT_FLAG_OFFSET (Flags,1), "Use Platform Timer (V4)", 0}, 379 380 /* Flags byte 2 */ 381 382 {ACPI_DMT_FLAG0, ACPI_FADT_FLAG_OFFSET (Flags,2), "RTC_STS valid on S4 wake (V4)", 0}, 383 {ACPI_DMT_FLAG1, ACPI_FADT_FLAG_OFFSET (Flags,2), "Remote Power-on capable (V4)", 0}, 384 {ACPI_DMT_FLAG2, ACPI_FADT_FLAG_OFFSET (Flags,2), "Use APIC Cluster Model (V4)", 0}, 385 {ACPI_DMT_FLAG3, ACPI_FADT_FLAG_OFFSET (Flags,2), "Use APIC Physical Destination Mode (V4)", 0}, 386 ACPI_DMT_TERMINATOR 387 }; 388 389 /* ACPI 1.0 MS Extensions (FADT version 2) */ 390 391 ACPI_DMTABLE_INFO AcpiDmTableInfoFadt2[] = 392 { 393 {ACPI_DMT_GAS, ACPI_FADT_OFFSET (ResetRegister), "Reset Register", 0}, 394 {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (ResetValue), "Value to cause reset", 0}, 395 {ACPI_DMT_UINT24, ACPI_FADT_OFFSET (Reserved4[0]), "Reserved", 0}, 396 ACPI_DMT_TERMINATOR 397 }; 398 399 /* ACPI 2.0+ Extensions (FADT version 3+) */ 400 401 ACPI_DMTABLE_INFO AcpiDmTableInfoFadt3[] = 402 { 403 {ACPI_DMT_GAS, ACPI_FADT_OFFSET (ResetRegister), "Reset Register", 0}, 404 {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (ResetValue), "Value to cause reset", 0}, 405 {ACPI_DMT_UINT24, ACPI_FADT_OFFSET (Reserved4[0]), "Reserved", 0}, 406 {ACPI_DMT_UINT64, ACPI_FADT_OFFSET (XFacs), "FACS Address", 0}, 407 {ACPI_DMT_UINT64, ACPI_FADT_OFFSET (XDsdt), "DSDT Address", 0}, 408 {ACPI_DMT_GAS, ACPI_FADT_OFFSET (XPm1aEventBlock), "PM1A Event Block", 0}, 409 {ACPI_DMT_GAS, ACPI_FADT_OFFSET (XPm1bEventBlock), "PM1B Event Block", 0}, 410 {ACPI_DMT_GAS, ACPI_FADT_OFFSET (XPm1aControlBlock), "PM1A Control Block", 0}, 411 {ACPI_DMT_GAS, ACPI_FADT_OFFSET (XPm1bControlBlock), "PM1B Control Block", 0}, 412 {ACPI_DMT_GAS, ACPI_FADT_OFFSET (XPm2ControlBlock), "PM2 Control Block", 0}, 413 {ACPI_DMT_GAS, ACPI_FADT_OFFSET (XPmTimerBlock), "PM Timer Block", 0}, 414 {ACPI_DMT_GAS, ACPI_FADT_OFFSET (XGpe0Block), "GPE0 Block", 0}, 415 {ACPI_DMT_GAS, ACPI_FADT_OFFSET (XGpe1Block), "GPE1 Block", 0}, 416 ACPI_DMT_TERMINATOR 417 }; 418 419 420 /* 421 * Remaining tables are not consumed directly by the ACPICA subsystem 422 */ 423 424 /******************************************************************************* 425 * 426 * ASF - Alert Standard Format table (Signature "ASF!") 427 * 428 ******************************************************************************/ 429 430 /* Common Subtable header (one per Subtable) */ 431 432 ACPI_DMTABLE_INFO AcpiDmTableInfoAsfHdr[] = 433 { 434 {ACPI_DMT_ASF, ACPI_ASF0_OFFSET (Header.Type), "Subtable Type", 0}, 435 {ACPI_DMT_UINT8, ACPI_ASF0_OFFSET (Header.Reserved), "Reserved", 0}, 436 {ACPI_DMT_UINT16, ACPI_ASF0_OFFSET (Header.Length), "Length", DT_LENGTH}, 437 ACPI_DMT_TERMINATOR 438 }; 439 440 /* 0: ASF Information */ 441 442 ACPI_DMTABLE_INFO AcpiDmTableInfoAsf0[] = 443 { 444 {ACPI_DMT_UINT8, ACPI_ASF0_OFFSET (MinResetValue), "Minimum Reset Value", 0}, 445 {ACPI_DMT_UINT8, ACPI_ASF0_OFFSET (MinPollInterval), "Minimum Polling Interval", 0}, 446 {ACPI_DMT_UINT16, ACPI_ASF0_OFFSET (SystemId), "System ID", 0}, 447 {ACPI_DMT_UINT32, ACPI_ASF0_OFFSET (MfgId), "Manufacturer ID", 0}, 448 {ACPI_DMT_UINT8, ACPI_ASF0_OFFSET (Flags), "Flags", 0}, 449 {ACPI_DMT_UINT24, ACPI_ASF0_OFFSET (Reserved2[0]), "Reserved", 0}, 450 ACPI_DMT_TERMINATOR 451 }; 452 453 /* 1: ASF Alerts */ 454 455 ACPI_DMTABLE_INFO AcpiDmTableInfoAsf1[] = 456 { 457 {ACPI_DMT_UINT8, ACPI_ASF1_OFFSET (AssertMask), "AssertMask", 0}, 458 {ACPI_DMT_UINT8, ACPI_ASF1_OFFSET (DeassertMask), "DeassertMask", 0}, 459 {ACPI_DMT_UINT8, ACPI_ASF1_OFFSET (Alerts), "Alert Count", 0}, 460 {ACPI_DMT_UINT8, ACPI_ASF1_OFFSET (DataLength), "Alert Data Length", 0}, 461 ACPI_DMT_TERMINATOR 462 }; 463 464 /* 1a: ASF Alert data */ 465 466 ACPI_DMTABLE_INFO AcpiDmTableInfoAsf1a[] = 467 { 468 {ACPI_DMT_UINT8, ACPI_ASF1a_OFFSET (Address), "Address", 0}, 469 {ACPI_DMT_UINT8, ACPI_ASF1a_OFFSET (Command), "Command", 0}, 470 {ACPI_DMT_UINT8, ACPI_ASF1a_OFFSET (Mask), "Mask", 0}, 471 {ACPI_DMT_UINT8, ACPI_ASF1a_OFFSET (Value), "Value", 0}, 472 {ACPI_DMT_UINT8, ACPI_ASF1a_OFFSET (SensorType), "SensorType", 0}, 473 {ACPI_DMT_UINT8, ACPI_ASF1a_OFFSET (Type), "Type", 0}, 474 {ACPI_DMT_UINT8, ACPI_ASF1a_OFFSET (Offset), "Offset", 0}, 475 {ACPI_DMT_UINT8, ACPI_ASF1a_OFFSET (SourceType), "SourceType", 0}, 476 {ACPI_DMT_UINT8, ACPI_ASF1a_OFFSET (Severity), "Severity", 0}, 477 {ACPI_DMT_UINT8, ACPI_ASF1a_OFFSET (SensorNumber), "SensorNumber", 0}, 478 {ACPI_DMT_UINT8, ACPI_ASF1a_OFFSET (Entity), "Entity", 0}, 479 {ACPI_DMT_UINT8, ACPI_ASF1a_OFFSET (Instance), "Instance", 0}, 480 ACPI_DMT_TERMINATOR 481 }; 482 483 /* 2: ASF Remote Control */ 484 485 ACPI_DMTABLE_INFO AcpiDmTableInfoAsf2[] = 486 { 487 {ACPI_DMT_UINT8, ACPI_ASF2_OFFSET (Controls), "Control Count", 0}, 488 {ACPI_DMT_UINT8, ACPI_ASF2_OFFSET (DataLength), "Control Data Length", 0}, 489 {ACPI_DMT_UINT16, ACPI_ASF2_OFFSET (Reserved2), "Reserved", 0}, 490 ACPI_DMT_TERMINATOR 491 }; 492 493 /* 2a: ASF Control data */ 494 495 ACPI_DMTABLE_INFO AcpiDmTableInfoAsf2a[] = 496 { 497 {ACPI_DMT_UINT8, ACPI_ASF2a_OFFSET (Function), "Function", 0}, 498 {ACPI_DMT_UINT8, ACPI_ASF2a_OFFSET (Address), "Address", 0}, 499 {ACPI_DMT_UINT8, ACPI_ASF2a_OFFSET (Command), "Command", 0}, 500 {ACPI_DMT_UINT8, ACPI_ASF2a_OFFSET (Value), "Value", 0}, 501 ACPI_DMT_TERMINATOR 502 }; 503 504 /* 3: ASF RMCP Boot Options */ 505 506 ACPI_DMTABLE_INFO AcpiDmTableInfoAsf3[] = 507 { 508 {ACPI_DMT_BUF7, ACPI_ASF3_OFFSET (Capabilities[0]), "Capabilities", 0}, 509 {ACPI_DMT_UINT8, ACPI_ASF3_OFFSET (CompletionCode), "Completion Code", 0}, 510 {ACPI_DMT_UINT32, ACPI_ASF3_OFFSET (EnterpriseId), "Enterprise ID", 0}, 511 {ACPI_DMT_UINT8, ACPI_ASF3_OFFSET (Command), "Command", 0}, 512 {ACPI_DMT_UINT16, ACPI_ASF3_OFFSET (Parameter), "Parameter", 0}, 513 {ACPI_DMT_UINT16, ACPI_ASF3_OFFSET (BootOptions), "Boot Options", 0}, 514 {ACPI_DMT_UINT16, ACPI_ASF3_OFFSET (OemParameters), "Oem Parameters", 0}, 515 ACPI_DMT_TERMINATOR 516 }; 517 518 /* 4: ASF Address */ 519 520 ACPI_DMTABLE_INFO AcpiDmTableInfoAsf4[] = 521 { 522 {ACPI_DMT_UINT8, ACPI_ASF4_OFFSET (EpromAddress), "Eprom Address", 0}, 523 {ACPI_DMT_UINT8, ACPI_ASF4_OFFSET (Devices), "Device Count", DT_COUNT}, 524 ACPI_DMT_TERMINATOR 525 }; 526 527 528 /******************************************************************************* 529 * 530 * BERT - Boot Error Record table 531 * 532 ******************************************************************************/ 533 534 ACPI_DMTABLE_INFO AcpiDmTableInfoBert[] = 535 { 536 {ACPI_DMT_UINT32, ACPI_BERT_OFFSET (RegionLength), "Boot Error Region Length", 0}, 537 {ACPI_DMT_UINT64, ACPI_BERT_OFFSET (Address), "Boot Error Region Address", 0}, 538 ACPI_DMT_TERMINATOR 539 }; 540 541 542 /******************************************************************************* 543 * 544 * BOOT - Simple Boot Flag Table 545 * 546 ******************************************************************************/ 547 548 ACPI_DMTABLE_INFO AcpiDmTableInfoBoot[] = 549 { 550 {ACPI_DMT_UINT8, ACPI_BOOT_OFFSET (CmosIndex), "Boot Register Index", 0}, 551 {ACPI_DMT_UINT24, ACPI_BOOT_OFFSET (Reserved[0]), "Reserved", 0}, 552 ACPI_DMT_TERMINATOR 553 }; 554 555 556 /******************************************************************************* 557 * 558 * CPEP - Corrected Platform Error Polling table 559 * 560 ******************************************************************************/ 561 562 ACPI_DMTABLE_INFO AcpiDmTableInfoCpep[] = 563 { 564 {ACPI_DMT_UINT64, ACPI_CPEP_OFFSET (Reserved), "Reserved", 0}, 565 ACPI_DMT_TERMINATOR 566 }; 567 568 ACPI_DMTABLE_INFO AcpiDmTableInfoCpep0[] = 569 { 570 {ACPI_DMT_UINT8, ACPI_CPEP0_OFFSET (Header.Type), "Subtable Type", 0}, 571 {ACPI_DMT_UINT8, ACPI_CPEP0_OFFSET (Header.Length), "Length", DT_LENGTH}, 572 {ACPI_DMT_UINT8, ACPI_CPEP0_OFFSET (Id), "Processor ID", 0}, 573 {ACPI_DMT_UINT8, ACPI_CPEP0_OFFSET (Eid), "Processor EID", 0}, 574 {ACPI_DMT_UINT32, ACPI_CPEP0_OFFSET (Interval), "Polling Interval", 0}, 575 ACPI_DMT_TERMINATOR 576 }; 577 578 579 /******************************************************************************* 580 * 581 * DBGP - Debug Port 582 * 583 ******************************************************************************/ 584 585 ACPI_DMTABLE_INFO AcpiDmTableInfoDbgp[] = 586 { 587 {ACPI_DMT_UINT8, ACPI_DBGP_OFFSET (Type), "Interface Type", 0}, 588 {ACPI_DMT_UINT24, ACPI_DBGP_OFFSET (Reserved[0]), "Reserved", 0}, 589 {ACPI_DMT_GAS, ACPI_DBGP_OFFSET (DebugPort), "Debug Port Register", 0}, 590 ACPI_DMT_TERMINATOR 591 }; 592 593 594 /******************************************************************************* 595 * 596 * DMAR - DMA Remapping table 597 * 598 ******************************************************************************/ 599 600 ACPI_DMTABLE_INFO AcpiDmTableInfoDmar[] = 601 { 602 {ACPI_DMT_UINT8, ACPI_DMAR_OFFSET (Width), "Host Address Width", 0}, 603 {ACPI_DMT_UINT8, ACPI_DMAR_OFFSET (Flags), "Flags", 0}, 604 ACPI_DMT_TERMINATOR 605 }; 606 607 /* Common Subtable header (one per Subtable) */ 608 609 ACPI_DMTABLE_INFO AcpiDmTableInfoDmarHdr[] = 610 { 611 {ACPI_DMT_DMAR, ACPI_DMAR0_OFFSET (Header.Type), "Subtable Type", 0}, 612 {ACPI_DMT_UINT16, ACPI_DMAR0_OFFSET (Header.Length), "Length", DT_LENGTH}, 613 ACPI_DMT_TERMINATOR 614 }; 615 616 /* Common device scope entry */ 617 618 ACPI_DMTABLE_INFO AcpiDmTableInfoDmarScope[] = 619 { 620 {ACPI_DMT_UINT8, ACPI_DMARS_OFFSET (EntryType), "Device Scope Entry Type", 0}, 621 {ACPI_DMT_UINT8, ACPI_DMARS_OFFSET (Length), "Entry Length", DT_LENGTH}, 622 {ACPI_DMT_UINT16, ACPI_DMARS_OFFSET (Reserved), "Reserved", 0}, 623 {ACPI_DMT_UINT8, ACPI_DMARS_OFFSET (EnumerationId), "Enumeration ID", 0}, 624 {ACPI_DMT_UINT8, ACPI_DMARS_OFFSET (Bus), "PCI Bus Number", 0}, 625 ACPI_DMT_TERMINATOR 626 }; 627 628 /* DMAR Subtables */ 629 630 /* 0: Hardware Unit Definition */ 631 632 ACPI_DMTABLE_INFO AcpiDmTableInfoDmar0[] = 633 { 634 {ACPI_DMT_UINT8, ACPI_DMAR0_OFFSET (Flags), "Flags", 0}, 635 {ACPI_DMT_UINT8, ACPI_DMAR0_OFFSET (Reserved), "Reserved", 0}, 636 {ACPI_DMT_UINT16, ACPI_DMAR0_OFFSET (Segment), "PCI Segment Number", 0}, 637 {ACPI_DMT_UINT64, ACPI_DMAR0_OFFSET (Address), "Register Base Address", 0}, 638 ACPI_DMT_TERMINATOR 639 }; 640 641 /* 1: Reserved Memory Definition */ 642 643 ACPI_DMTABLE_INFO AcpiDmTableInfoDmar1[] = 644 { 645 {ACPI_DMT_UINT16, ACPI_DMAR1_OFFSET (Reserved), "Reserved", 0}, 646 {ACPI_DMT_UINT16, ACPI_DMAR1_OFFSET (Segment), "PCI Segment Number", 0}, 647 {ACPI_DMT_UINT64, ACPI_DMAR1_OFFSET (BaseAddress), "Base Address", 0}, 648 {ACPI_DMT_UINT64, ACPI_DMAR1_OFFSET (EndAddress), "End Address (limit)", 0}, 649 ACPI_DMT_TERMINATOR 650 }; 651 652 /* 2: Root Port ATS Capability Definition */ 653 654 ACPI_DMTABLE_INFO AcpiDmTableInfoDmar2[] = 655 { 656 {ACPI_DMT_UINT8, ACPI_DMAR2_OFFSET (Flags), "Flags", 0}, 657 {ACPI_DMT_UINT8, ACPI_DMAR2_OFFSET (Reserved), "Reserved", 0}, 658 {ACPI_DMT_UINT16, ACPI_DMAR2_OFFSET (Segment), "PCI Segment Number", 0}, 659 ACPI_DMT_TERMINATOR 660 }; 661 662 /* 3: Remapping Hardware Static Affinity Structure */ 663 664 ACPI_DMTABLE_INFO AcpiDmTableInfoDmar3[] = 665 { 666 {ACPI_DMT_UINT32, ACPI_DMAR3_OFFSET (Reserved), "Reserved", 0}, 667 {ACPI_DMT_UINT64, ACPI_DMAR3_OFFSET (BaseAddress), "Base Address", 0}, 668 {ACPI_DMT_UINT32, ACPI_DMAR3_OFFSET (ProximityDomain), "Proximity Domain", 0}, 669 ACPI_DMT_TERMINATOR 670 }; 671 672 673 /******************************************************************************* 674 * 675 * ECDT - Embedded Controller Boot Resources Table 676 * 677 ******************************************************************************/ 678 679 ACPI_DMTABLE_INFO AcpiDmTableInfoEcdt[] = 680 { 681 {ACPI_DMT_GAS, ACPI_ECDT_OFFSET (Control), "Command/Status Register", 0}, 682 {ACPI_DMT_GAS, ACPI_ECDT_OFFSET (Data), "Data Register", 0}, 683 {ACPI_DMT_UINT32, ACPI_ECDT_OFFSET (Uid), "UID", 0}, 684 {ACPI_DMT_UINT8, ACPI_ECDT_OFFSET (Gpe), "GPE Number", 0}, 685 {ACPI_DMT_STRING, ACPI_ECDT_OFFSET (Id[0]), "Namepath", 0}, 686 ACPI_DMT_TERMINATOR 687 }; 688 689 690 /******************************************************************************* 691 * 692 * EINJ - Error Injection table 693 * 694 ******************************************************************************/ 695 696 ACPI_DMTABLE_INFO AcpiDmTableInfoEinj[] = 697 { 698 {ACPI_DMT_UINT32, ACPI_EINJ_OFFSET (HeaderLength), "Injection Header Length", 0}, 699 {ACPI_DMT_UINT8, ACPI_EINJ_OFFSET (Flags), "Flags", 0}, 700 {ACPI_DMT_UINT24, ACPI_EINJ_OFFSET (Reserved[0]), "Reserved", 0}, 701 {ACPI_DMT_UINT32, ACPI_EINJ_OFFSET (Entries), "Injection Entry Count", 0}, 702 ACPI_DMT_TERMINATOR 703 }; 704 705 ACPI_DMTABLE_INFO AcpiDmTableInfoEinj0[] = 706 { 707 {ACPI_DMT_EINJACT, ACPI_EINJ0_OFFSET (Action), "Action", 0}, 708 {ACPI_DMT_EINJINST, ACPI_EINJ0_OFFSET (Instruction), "Instruction", 0}, 709 {ACPI_DMT_UINT8, ACPI_EINJ0_OFFSET (Flags), "Flags (decoded below)", DT_FLAG}, 710 {ACPI_DMT_FLAG0, ACPI_EINJ0_FLAG_OFFSET (Flags,0), "Preserve Register Bits", 0}, 711 712 {ACPI_DMT_UINT8, ACPI_EINJ0_OFFSET (Reserved), "Reserved", 0}, 713 {ACPI_DMT_GAS, ACPI_EINJ0_OFFSET (RegisterRegion), "Register Region", 0}, 714 {ACPI_DMT_UINT64, ACPI_EINJ0_OFFSET (Value), "Value", 0}, 715 {ACPI_DMT_UINT64, ACPI_EINJ0_OFFSET (Mask), "Mask", 0}, 716 ACPI_DMT_TERMINATOR 717 }; 718 719 720 /******************************************************************************* 721 * 722 * ERST - Error Record Serialization table 723 * 724 ******************************************************************************/ 725 726 ACPI_DMTABLE_INFO AcpiDmTableInfoErst[] = 727 { 728 {ACPI_DMT_UINT32, ACPI_ERST_OFFSET (HeaderLength), "Serialization Header Length", 0}, 729 {ACPI_DMT_UINT32, ACPI_ERST_OFFSET (Reserved), "Reserved", 0}, 730 {ACPI_DMT_UINT32, ACPI_ERST_OFFSET (Entries), "Instruction Entry Count", 0}, 731 ACPI_DMT_TERMINATOR 732 }; 733 734 ACPI_DMTABLE_INFO AcpiDmTableInfoErst0[] = 735 { 736 {ACPI_DMT_ERSTACT, ACPI_ERST0_OFFSET (Action), "Action", 0}, 737 {ACPI_DMT_ERSTINST, ACPI_ERST0_OFFSET (Instruction), "Instruction", 0}, 738 {ACPI_DMT_UINT8, ACPI_ERST0_OFFSET (Flags), "Flags (decoded below)", DT_FLAG}, 739 {ACPI_DMT_FLAG0, ACPI_ERST0_FLAG_OFFSET (Flags,0), "Preserve Register Bits", 0}, 740 741 {ACPI_DMT_UINT8, ACPI_ERST0_OFFSET (Reserved), "Reserved", 0}, 742 {ACPI_DMT_GAS, ACPI_ERST0_OFFSET (RegisterRegion), "Register Region", 0}, 743 {ACPI_DMT_UINT64, ACPI_ERST0_OFFSET (Value), "Value", 0}, 744 {ACPI_DMT_UINT64, ACPI_ERST0_OFFSET (Mask), "Mask", 0}, 745 ACPI_DMT_TERMINATOR 746 }; 747 748 749 /******************************************************************************* 750 * 751 * HEST - Hardware Error Source table 752 * 753 ******************************************************************************/ 754 755 ACPI_DMTABLE_INFO AcpiDmTableInfoHest[] = 756 { 757 {ACPI_DMT_UINT32, ACPI_HEST_OFFSET (ErrorSourceCount), "Error Source Count", 0}, 758 ACPI_DMT_TERMINATOR 759 }; 760 761 /* Common HEST structures for subtables */ 762 763 #define ACPI_DM_HEST_HEADER \ 764 {ACPI_DMT_HEST, ACPI_HEST0_OFFSET (Header.Type), "Subtable Type", 0}, \ 765 {ACPI_DMT_UINT16, ACPI_HEST0_OFFSET (Header.SourceId), "Source Id", 0} 766 767 #define ACPI_DM_HEST_AER \ 768 {ACPI_DMT_UINT16, ACPI_HEST6_OFFSET (Aer.Reserved1), "Reserved", 0}, \ 769 {ACPI_DMT_UINT8, ACPI_HEST6_OFFSET (Aer.Flags), "Flags (decoded below)", DT_FLAG}, \ 770 {ACPI_DMT_FLAG0, ACPI_HEST6_FLAG_OFFSET (Aer.Flags,0), "Firmware First", 0}, \ 771 {ACPI_DMT_UINT8, ACPI_HEST6_OFFSET (Aer.Enabled), "Enabled", 0}, \ 772 {ACPI_DMT_UINT32, ACPI_HEST6_OFFSET (Aer.RecordsToPreallocate), "Records To Preallocate", 0}, \ 773 {ACPI_DMT_UINT32, ACPI_HEST6_OFFSET (Aer.MaxSectionsPerRecord), "Max Sections Per Record", 0}, \ 774 {ACPI_DMT_UINT32, ACPI_HEST6_OFFSET (Aer.Bus), "Bus", 0}, \ 775 {ACPI_DMT_UINT16, ACPI_HEST6_OFFSET (Aer.Device), "Device", 0}, \ 776 {ACPI_DMT_UINT16, ACPI_HEST6_OFFSET (Aer.Function), "Function", 0}, \ 777 {ACPI_DMT_UINT16, ACPI_HEST6_OFFSET (Aer.DeviceControl), "DeviceControl", 0}, \ 778 {ACPI_DMT_UINT16, ACPI_HEST6_OFFSET (Aer.Reserved2), "Reserved", 0}, \ 779 {ACPI_DMT_UINT32, ACPI_HEST6_OFFSET (Aer.UncorrectableMask), "Uncorrectable Mask", 0}, \ 780 {ACPI_DMT_UINT32, ACPI_HEST6_OFFSET (Aer.UncorrectableSeverity), "Uncorrectable Severity", 0}, \ 781 {ACPI_DMT_UINT32, ACPI_HEST6_OFFSET (Aer.CorrectableMask), "Correctable Mask", 0}, \ 782 {ACPI_DMT_UINT32, ACPI_HEST6_OFFSET (Aer.AdvancedCapabilities), "Advanced Capabilities", 0} 783 784 785 /* HEST Subtables */ 786 787 /* 0: IA32 Machine Check Exception */ 788 789 ACPI_DMTABLE_INFO AcpiDmTableInfoHest0[] = 790 { 791 ACPI_DM_HEST_HEADER, 792 {ACPI_DMT_UINT16, ACPI_HEST0_OFFSET (Reserved1), "Reserved1", 0}, 793 {ACPI_DMT_UINT8, ACPI_HEST0_OFFSET (Flags), "Flags (decoded below)", DT_FLAG}, 794 {ACPI_DMT_FLAG0, ACPI_HEST0_FLAG_OFFSET (Flags,0), "Firmware First", 0}, 795 796 {ACPI_DMT_UINT8, ACPI_HEST0_OFFSET (Enabled), "Enabled", 0}, 797 {ACPI_DMT_UINT32, ACPI_HEST0_OFFSET (RecordsToPreallocate), "Records To Preallocate", 0}, 798 {ACPI_DMT_UINT32, ACPI_HEST0_OFFSET (MaxSectionsPerRecord), "Max Sections Per Record", 0}, 799 {ACPI_DMT_UINT64, ACPI_HEST0_OFFSET (GlobalCapabilityData), "Global Capability Data", 0}, 800 {ACPI_DMT_UINT64, ACPI_HEST0_OFFSET (GlobalControlData), "Global Control Data", 0}, 801 {ACPI_DMT_UINT8, ACPI_HEST0_OFFSET (NumHardwareBanks), "Num Hardware Banks", 0}, 802 {ACPI_DMT_UINT56, ACPI_HEST0_OFFSET (Reserved3[0]), "Reserved2", 0}, 803 ACPI_DMT_TERMINATOR 804 }; 805 806 /* 1: IA32 Corrected Machine Check */ 807 808 ACPI_DMTABLE_INFO AcpiDmTableInfoHest1[] = 809 { 810 ACPI_DM_HEST_HEADER, 811 {ACPI_DMT_UINT16, ACPI_HEST1_OFFSET (Reserved1), "Reserved1", 0}, 812 {ACPI_DMT_UINT8, ACPI_HEST1_OFFSET (Flags), "Flags (decoded below)", DT_FLAG}, 813 {ACPI_DMT_FLAG0, ACPI_HEST1_FLAG_OFFSET (Flags,0), "Firmware First", 0}, 814 815 {ACPI_DMT_UINT8, ACPI_HEST1_OFFSET (Enabled), "Enabled", 0}, 816 {ACPI_DMT_UINT32, ACPI_HEST1_OFFSET (RecordsToPreallocate), "Records To Preallocate", 0}, 817 {ACPI_DMT_UINT32, ACPI_HEST1_OFFSET (MaxSectionsPerRecord), "Max Sections Per Record", 0}, 818 {ACPI_DMT_HESTNTFY, ACPI_HEST1_OFFSET (Notify), "Notify", 0}, 819 {ACPI_DMT_UINT8, ACPI_HEST1_OFFSET (NumHardwareBanks), "Num Hardware Banks", 0}, 820 {ACPI_DMT_UINT24, ACPI_HEST1_OFFSET (Reserved2[0]), "Reserved2", 0}, 821 ACPI_DMT_TERMINATOR 822 }; 823 824 /* 2: IA32 Non-Maskable Interrupt */ 825 826 ACPI_DMTABLE_INFO AcpiDmTableInfoHest2[] = 827 { 828 ACPI_DM_HEST_HEADER, 829 {ACPI_DMT_UINT32, ACPI_HEST2_OFFSET (Reserved), "Reserved", 0}, 830 {ACPI_DMT_UINT32, ACPI_HEST2_OFFSET (RecordsToPreallocate), "Records To Preallocate", 0}, 831 {ACPI_DMT_UINT32, ACPI_HEST2_OFFSET (MaxSectionsPerRecord), "Max Sections Per Record", 0}, 832 {ACPI_DMT_UINT32, ACPI_HEST2_OFFSET (MaxRawDataLength), "Max Raw Data Length", 0}, 833 ACPI_DMT_TERMINATOR 834 }; 835 836 /* 6: PCI Express Root Port AER */ 837 838 ACPI_DMTABLE_INFO AcpiDmTableInfoHest6[] = 839 { 840 ACPI_DM_HEST_HEADER, 841 ACPI_DM_HEST_AER, 842 {ACPI_DMT_UINT32, ACPI_HEST6_OFFSET (RootErrorCommand), "Root Error Command", 0}, 843 ACPI_DMT_TERMINATOR 844 }; 845 846 /* 7: PCI Express AER (AER Endpoint) */ 847 848 ACPI_DMTABLE_INFO AcpiDmTableInfoHest7[] = 849 { 850 ACPI_DM_HEST_HEADER, 851 ACPI_DM_HEST_AER, 852 ACPI_DMT_TERMINATOR 853 }; 854 855 /* 8: PCI Express/PCI-X Bridge AER */ 856 857 ACPI_DMTABLE_INFO AcpiDmTableInfoHest8[] = 858 { 859 ACPI_DM_HEST_HEADER, 860 ACPI_DM_HEST_AER, 861 {ACPI_DMT_UINT32, ACPI_HEST8_OFFSET (UncorrectableMask2), "2nd Uncorrectable Mask", 0}, 862 {ACPI_DMT_UINT32, ACPI_HEST8_OFFSET (UncorrectableSeverity2), "2nd Uncorrectable Severity", 0}, 863 {ACPI_DMT_UINT32, ACPI_HEST8_OFFSET (AdvancedCapabilities2), "2nd Advanced Capabilities", 0}, 864 ACPI_DMT_TERMINATOR 865 }; 866 867 /* 9: Generic Hardware Error Source */ 868 869 ACPI_DMTABLE_INFO AcpiDmTableInfoHest9[] = 870 { 871 ACPI_DM_HEST_HEADER, 872 {ACPI_DMT_UINT16, ACPI_HEST9_OFFSET (RelatedSourceId), "Related Source Id", 0}, 873 {ACPI_DMT_UINT8, ACPI_HEST9_OFFSET (Reserved), "Reserved", 0}, 874 {ACPI_DMT_UINT8, ACPI_HEST9_OFFSET (Enabled), "Enabled", 0}, 875 {ACPI_DMT_UINT32, ACPI_HEST9_OFFSET (RecordsToPreallocate), "Records To Preallocate", 0}, 876 {ACPI_DMT_UINT32, ACPI_HEST9_OFFSET (MaxSectionsPerRecord), "Max Sections Per Record", 0}, 877 {ACPI_DMT_UINT32, ACPI_HEST9_OFFSET (MaxRawDataLength), "Max Raw Data Length", 0}, 878 {ACPI_DMT_GAS, ACPI_HEST9_OFFSET (ErrorStatusAddress), "Error Status Address", 0}, 879 {ACPI_DMT_HESTNTFY, ACPI_HEST9_OFFSET (Notify), "Notify", 0}, 880 {ACPI_DMT_UINT32, ACPI_HEST9_OFFSET (ErrorBlockLength), "Error Status Block Length", 0}, 881 ACPI_DMT_TERMINATOR 882 }; 883 884 ACPI_DMTABLE_INFO AcpiDmTableInfoHestNotify[] = 885 { 886 {ACPI_DMT_HESTNTYP, ACPI_HESTN_OFFSET (Type), "Notify Type", 0}, 887 {ACPI_DMT_UINT8, ACPI_HESTN_OFFSET (Length), "Notify Length", DT_LENGTH}, 888 {ACPI_DMT_UINT16, ACPI_HESTN_OFFSET (ConfigWriteEnable), "Configuration Write Enable", 0}, 889 {ACPI_DMT_UINT32, ACPI_HESTN_OFFSET (PollInterval), "PollInterval", 0}, 890 {ACPI_DMT_UINT32, ACPI_HESTN_OFFSET (Vector), "Vector", 0}, 891 {ACPI_DMT_UINT32, ACPI_HESTN_OFFSET (PollingThresholdValue), "Polling Threshold Value", 0}, 892 {ACPI_DMT_UINT32, ACPI_HESTN_OFFSET (PollingThresholdWindow), "Polling Threshold Window", 0}, 893 {ACPI_DMT_UINT32, ACPI_HESTN_OFFSET (ErrorThresholdValue), "Error Threshold Value", 0}, 894 {ACPI_DMT_UINT32, ACPI_HESTN_OFFSET (ErrorThresholdWindow), "Error Threshold Window", 0}, 895 ACPI_DMT_TERMINATOR 896 }; 897 898 899 /* 900 * IA32 Error Bank(s) - Follows the ACPI_HEST_IA_MACHINE_CHECK and 901 * ACPI_HEST_IA_CORRECTED structures. 902 */ 903 ACPI_DMTABLE_INFO AcpiDmTableInfoHestBank[] = 904 { 905 {ACPI_DMT_UINT8, ACPI_HESTB_OFFSET (BankNumber), "Bank Number", 0}, 906 {ACPI_DMT_UINT8, ACPI_HESTB_OFFSET (ClearStatusOnInit), "Clear Status On Init", 0}, 907 {ACPI_DMT_UINT8, ACPI_HESTB_OFFSET (StatusFormat), "Status Format", 0}, 908 {ACPI_DMT_UINT8, ACPI_HESTB_OFFSET (Reserved), "Reserved", 0}, 909 {ACPI_DMT_UINT32, ACPI_HESTB_OFFSET (ControlRegister), "Control Register", 0}, 910 {ACPI_DMT_UINT64, ACPI_HESTB_OFFSET (ControlData), "Control Data", 0}, 911 {ACPI_DMT_UINT32, ACPI_HESTB_OFFSET (StatusRegister), "Status Register", 0}, 912 {ACPI_DMT_UINT32, ACPI_HESTB_OFFSET (AddressRegister), "Address Register", 0}, 913 {ACPI_DMT_UINT32, ACPI_HESTB_OFFSET (MiscRegister), "Misc Register", 0}, 914 ACPI_DMT_TERMINATOR 915 }; 916 917 918 /******************************************************************************* 919 * 920 * HPET - High Precision Event Timer table 921 * 922 ******************************************************************************/ 923 924 ACPI_DMTABLE_INFO AcpiDmTableInfoHpet[] = 925 { 926 {ACPI_DMT_UINT32, ACPI_HPET_OFFSET (Id), "Hardware Block ID", 0}, 927 {ACPI_DMT_GAS, ACPI_HPET_OFFSET (Address), "Timer Block Register", 0}, 928 {ACPI_DMT_UINT8, ACPI_HPET_OFFSET (Sequence), "Sequence Number", 0}, 929 {ACPI_DMT_UINT16, ACPI_HPET_OFFSET (MinimumTick), "Minimum Clock Ticks", 0}, 930 {ACPI_DMT_UINT8, ACPI_HPET_OFFSET (Flags), "Flags (decoded below)", DT_FLAG}, 931 {ACPI_DMT_FLAG0, ACPI_HPET_FLAG_OFFSET (Flags,0), "4K Page Protect", 0}, 932 {ACPI_DMT_FLAG1, ACPI_HPET_FLAG_OFFSET (Flags,0), "64K Page Protect", 0}, 933 ACPI_DMT_TERMINATOR 934 }; 935 936 937 /******************************************************************************* 938 * 939 * IVRS - I/O Virtualization Reporting Structure 940 * 941 ******************************************************************************/ 942 943 ACPI_DMTABLE_INFO AcpiDmTableInfoIvrs[] = 944 { 945 {ACPI_DMT_UINT32, ACPI_IVRS_OFFSET (Info), "Virtualization Info", 0}, 946 {ACPI_DMT_UINT64, ACPI_IVRS_OFFSET (Reserved), "Reserved", 0}, 947 ACPI_DMT_TERMINATOR 948 }; 949 950 /* Common Subtable header (one per Subtable) */ 951 952 ACPI_DMTABLE_INFO AcpiDmTableInfoIvrsHdr[] = 953 { 954 {ACPI_DMT_IVRS, ACPI_IVRSH_OFFSET (Type), "Subtable Type", 0}, 955 {ACPI_DMT_UINT8, ACPI_IVRSH_OFFSET (Flags), "Flags", 0}, 956 {ACPI_DMT_UINT16, ACPI_IVRSH_OFFSET (Length), "Length", DT_LENGTH}, 957 {ACPI_DMT_UINT16, ACPI_IVRSH_OFFSET (DeviceId), "DeviceId", 0}, 958 ACPI_DMT_TERMINATOR 959 }; 960 961 /* IVRS subtables */ 962 963 /* 0x10: I/O Virtualization Hardware Definition (IVHD) Block */ 964 965 ACPI_DMTABLE_INFO AcpiDmTableInfoIvrs0[] = 966 { 967 {ACPI_DMT_UINT16, ACPI_IVRS0_OFFSET (CapabilityOffset), "Capability Offset", 0}, 968 {ACPI_DMT_UINT64, ACPI_IVRS0_OFFSET (BaseAddress), "Base Address", 0}, 969 {ACPI_DMT_UINT16, ACPI_IVRS0_OFFSET (PciSegmentGroup), "PCI Segment Group", 0}, 970 {ACPI_DMT_UINT16, ACPI_IVRS0_OFFSET (Info), "Virtualization Info", 0}, 971 {ACPI_DMT_UINT32, ACPI_IVRS0_OFFSET (Reserved), "Reserved", 0}, 972 ACPI_DMT_TERMINATOR 973 }; 974 975 /* 0x20, 0x21, 0x22: I/O Virtualization Memory Definition (IVMD) Block */ 976 977 ACPI_DMTABLE_INFO AcpiDmTableInfoIvrs1[] = 978 { 979 {ACPI_DMT_UINT16, ACPI_IVRS1_OFFSET (AuxData), "Auxiliary Data", 0}, 980 {ACPI_DMT_UINT64, ACPI_IVRS1_OFFSET (Reserved), "Reserved", 0}, 981 {ACPI_DMT_UINT64, ACPI_IVRS1_OFFSET (StartAddress), "Start Address", 0}, 982 {ACPI_DMT_UINT64, ACPI_IVRS1_OFFSET (MemoryLength), "Memory Length", 0}, 983 ACPI_DMT_TERMINATOR 984 }; 985 986 /* Device entry header for IVHD block */ 987 988 #define ACPI_DMT_IVRS_DE_HEADER \ 989 {ACPI_DMT_UINT8, ACPI_IVRSD_OFFSET (Type), "Entry Type", 0}, \ 990 {ACPI_DMT_UINT16, ACPI_IVRSD_OFFSET (Id), "Device ID", 0}, \ 991 {ACPI_DMT_UINT8, ACPI_IVRSD_OFFSET (DataSetting), "Data Setting", 0} 992 993 /* 4-byte device entry */ 994 995 ACPI_DMTABLE_INFO AcpiDmTableInfoIvrs4[] = 996 { 997 ACPI_DMT_IVRS_DE_HEADER, 998 {ACPI_DMT_EXIT, 0, NULL, 0}, 999 }; 1000 1001 /* 8-byte device entry */ 1002 1003 ACPI_DMTABLE_INFO AcpiDmTableInfoIvrs8a[] = 1004 { 1005 ACPI_DMT_IVRS_DE_HEADER, 1006 {ACPI_DMT_UINT8, ACPI_IVRS8A_OFFSET (Reserved1), "Reserved", 0}, 1007 {ACPI_DMT_UINT16, ACPI_IVRS8A_OFFSET (UsedId), "Source Used Device ID", 0}, 1008 {ACPI_DMT_UINT8, ACPI_IVRS8A_OFFSET (Reserved2), "Reserved", 0}, 1009 ACPI_DMT_TERMINATOR 1010 }; 1011 1012 /* 8-byte device entry */ 1013 1014 ACPI_DMTABLE_INFO AcpiDmTableInfoIvrs8b[] = 1015 { 1016 ACPI_DMT_IVRS_DE_HEADER, 1017 {ACPI_DMT_UINT32, ACPI_IVRS8B_OFFSET (ExtendedData), "Extended Data", 0}, 1018 ACPI_DMT_TERMINATOR 1019 }; 1020 1021 /* 8-byte device entry */ 1022 1023 ACPI_DMTABLE_INFO AcpiDmTableInfoIvrs8c[] = 1024 { 1025 ACPI_DMT_IVRS_DE_HEADER, 1026 {ACPI_DMT_UINT8, ACPI_IVRS8C_OFFSET (Handle), "Handle", 0}, 1027 {ACPI_DMT_UINT16, ACPI_IVRS8C_OFFSET (UsedId), "Source Used Device ID", 0}, 1028 {ACPI_DMT_UINT8, ACPI_IVRS8C_OFFSET (Variety), "Variety", 0}, 1029 ACPI_DMT_TERMINATOR 1030 }; 1031 1032 1033 /******************************************************************************* 1034 * 1035 * MADT - Multiple APIC Description Table and subtables 1036 * 1037 ******************************************************************************/ 1038 1039 ACPI_DMTABLE_INFO AcpiDmTableInfoMadt[] = 1040 { 1041 {ACPI_DMT_UINT32, ACPI_MADT_OFFSET (Address), "Local Apic Address", 0}, 1042 {ACPI_DMT_UINT32, ACPI_MADT_OFFSET (Flags), "Flags (decoded below)", DT_FLAG}, 1043 {ACPI_DMT_FLAG0, ACPI_MADT_FLAG_OFFSET (Flags,0), "PC-AT Compatibility", 0}, 1044 ACPI_DMT_TERMINATOR 1045 }; 1046 1047 /* Common Subtable header (one per Subtable) */ 1048 1049 ACPI_DMTABLE_INFO AcpiDmTableInfoMadtHdr[] = 1050 { 1051 {ACPI_DMT_MADT, ACPI_MADTH_OFFSET (Type), "Subtable Type", 0}, 1052 {ACPI_DMT_UINT8, ACPI_MADTH_OFFSET (Length), "Length", DT_LENGTH}, 1053 ACPI_DMT_TERMINATOR 1054 }; 1055 1056 /* MADT Subtables */ 1057 1058 /* 0: processor APIC */ 1059 1060 ACPI_DMTABLE_INFO AcpiDmTableInfoMadt0[] = 1061 { 1062 {ACPI_DMT_UINT8, ACPI_MADT0_OFFSET (ProcessorId), "Processor ID", 0}, 1063 {ACPI_DMT_UINT8, ACPI_MADT0_OFFSET (Id), "Local Apic ID", 0}, 1064 {ACPI_DMT_UINT32, ACPI_MADT0_OFFSET (LapicFlags), "Flags (decoded below)", DT_FLAG}, 1065 {ACPI_DMT_FLAG0, ACPI_MADT0_FLAG_OFFSET (LapicFlags,0), "Processor Enabled", 0}, 1066 ACPI_DMT_TERMINATOR 1067 }; 1068 1069 /* 1: IO APIC */ 1070 1071 ACPI_DMTABLE_INFO AcpiDmTableInfoMadt1[] = 1072 { 1073 {ACPI_DMT_UINT8, ACPI_MADT1_OFFSET (Id), "I/O Apic ID", 0}, 1074 {ACPI_DMT_UINT8, ACPI_MADT1_OFFSET (Reserved), "Reserved", 0}, 1075 {ACPI_DMT_UINT32, ACPI_MADT1_OFFSET (Address), "Address", 0}, 1076 {ACPI_DMT_UINT32, ACPI_MADT1_OFFSET (GlobalIrqBase), "Interrupt", 0}, 1077 ACPI_DMT_TERMINATOR 1078 }; 1079 1080 /* 2: Interrupt Override */ 1081 1082 ACPI_DMTABLE_INFO AcpiDmTableInfoMadt2[] = 1083 { 1084 {ACPI_DMT_UINT8, ACPI_MADT2_OFFSET (Bus), "Bus", 0}, 1085 {ACPI_DMT_UINT8, ACPI_MADT2_OFFSET (SourceIrq), "Source", 0}, 1086 {ACPI_DMT_UINT32, ACPI_MADT2_OFFSET (GlobalIrq), "Interrupt", 0}, 1087 {ACPI_DMT_UINT16, ACPI_MADT2_OFFSET (IntiFlags), "Flags (decoded below)", DT_FLAG}, 1088 {ACPI_DMT_FLAGS0, ACPI_MADT2_FLAG_OFFSET (IntiFlags,0), "Polarity", 0}, 1089 {ACPI_DMT_FLAGS2, ACPI_MADT2_FLAG_OFFSET (IntiFlags,0), "Trigger Mode", 0}, 1090 ACPI_DMT_TERMINATOR 1091 }; 1092 1093 /* 3: NMI Sources */ 1094 1095 ACPI_DMTABLE_INFO AcpiDmTableInfoMadt3[] = 1096 { 1097 {ACPI_DMT_UINT16, ACPI_MADT3_OFFSET (IntiFlags), "Flags (decoded below)", DT_FLAG}, 1098 {ACPI_DMT_FLAGS0, ACPI_MADT3_FLAG_OFFSET (IntiFlags,0), "Polarity", 0}, 1099 {ACPI_DMT_FLAGS2, ACPI_MADT3_FLAG_OFFSET (IntiFlags,0), "Trigger Mode", 0}, 1100 {ACPI_DMT_UINT32, ACPI_MADT3_OFFSET (GlobalIrq), "Interrupt", 0}, 1101 ACPI_DMT_TERMINATOR 1102 }; 1103 1104 /* 4: Local APIC NMI */ 1105 1106 ACPI_DMTABLE_INFO AcpiDmTableInfoMadt4[] = 1107 { 1108 {ACPI_DMT_UINT8, ACPI_MADT4_OFFSET (ProcessorId), "Processor ID", 0}, 1109 {ACPI_DMT_UINT16, ACPI_MADT4_OFFSET (IntiFlags), "Flags (decoded below)", DT_FLAG}, 1110 {ACPI_DMT_FLAGS0, ACPI_MADT4_FLAG_OFFSET (IntiFlags,0), "Polarity", 0}, 1111 {ACPI_DMT_FLAGS2, ACPI_MADT4_FLAG_OFFSET (IntiFlags,0), "Trigger Mode", 0}, 1112 {ACPI_DMT_UINT8, ACPI_MADT4_OFFSET (Lint), "Interrupt Input LINT", 0}, 1113 ACPI_DMT_TERMINATOR 1114 }; 1115 1116 /* 5: Address Override */ 1117 1118 ACPI_DMTABLE_INFO AcpiDmTableInfoMadt5[] = 1119 { 1120 {ACPI_DMT_UINT16, ACPI_MADT5_OFFSET (Reserved), "Reserved", 0}, 1121 {ACPI_DMT_UINT64, ACPI_MADT5_OFFSET (Address), "APIC Address", 0}, 1122 ACPI_DMT_TERMINATOR 1123 }; 1124 1125 /* 6: I/O Sapic */ 1126 1127 ACPI_DMTABLE_INFO AcpiDmTableInfoMadt6[] = 1128 { 1129 {ACPI_DMT_UINT8, ACPI_MADT6_OFFSET (Id), "I/O Sapic ID", 0}, 1130 {ACPI_DMT_UINT8, ACPI_MADT6_OFFSET (Reserved), "Reserved", 0}, 1131 {ACPI_DMT_UINT32, ACPI_MADT6_OFFSET (GlobalIrqBase), "Interrupt Base", 0}, 1132 {ACPI_DMT_UINT64, ACPI_MADT6_OFFSET (Address), "Address", 0}, 1133 ACPI_DMT_TERMINATOR 1134 }; 1135 1136 /* 7: Local Sapic */ 1137 1138 ACPI_DMTABLE_INFO AcpiDmTableInfoMadt7[] = 1139 { 1140 {ACPI_DMT_UINT8, ACPI_MADT7_OFFSET (ProcessorId), "Processor ID", 0}, 1141 {ACPI_DMT_UINT8, ACPI_MADT7_OFFSET (Id), "Local Sapic ID", 0}, 1142 {ACPI_DMT_UINT8, ACPI_MADT7_OFFSET (Eid), "Local Sapic EID", 0}, 1143 {ACPI_DMT_UINT24, ACPI_MADT7_OFFSET (Reserved[0]), "Reserved", 0}, 1144 {ACPI_DMT_UINT32, ACPI_MADT7_OFFSET (LapicFlags), "Flags (decoded below)", DT_FLAG}, 1145 {ACPI_DMT_FLAG0, ACPI_MADT7_FLAG_OFFSET (LapicFlags,0), "Processor Enabled", 0}, 1146 {ACPI_DMT_UINT32, ACPI_MADT7_OFFSET (Uid), "Processor UID", 0}, 1147 {ACPI_DMT_STRING, ACPI_MADT7_OFFSET (UidString[0]), "Processor UID String", 0}, 1148 ACPI_DMT_TERMINATOR 1149 }; 1150 1151 /* 8: Platform Interrupt Source */ 1152 1153 ACPI_DMTABLE_INFO AcpiDmTableInfoMadt8[] = 1154 { 1155 {ACPI_DMT_UINT16, ACPI_MADT8_OFFSET (IntiFlags), "Flags (decoded below)", DT_FLAG}, 1156 {ACPI_DMT_FLAGS0, ACPI_MADT8_FLAG_OFFSET (IntiFlags,0), "Polarity", 0}, 1157 {ACPI_DMT_FLAGS2, ACPI_MADT8_FLAG_OFFSET (IntiFlags,0), "Trigger Mode", 0}, 1158 {ACPI_DMT_UINT8, ACPI_MADT8_OFFSET (Type), "InterruptType", 0}, 1159 {ACPI_DMT_UINT8, ACPI_MADT8_OFFSET (Id), "Processor ID", 0}, 1160 {ACPI_DMT_UINT8, ACPI_MADT8_OFFSET (Eid), "Processor EID", 0}, 1161 {ACPI_DMT_UINT8, ACPI_MADT8_OFFSET (IoSapicVector), "I/O Sapic Vector", 0}, 1162 {ACPI_DMT_UINT32, ACPI_MADT8_OFFSET (GlobalIrq), "Interrupt", 0}, 1163 {ACPI_DMT_UINT32, ACPI_MADT8_OFFSET (Flags), "Flags (decoded below)", DT_FLAG}, 1164 {ACPI_DMT_FLAG0, ACPI_MADT8_OFFSET (Flags), "CPEI Override", 0}, 1165 ACPI_DMT_TERMINATOR 1166 }; 1167 1168 /* 9: Processor Local X2_APIC (ACPI 4.0) */ 1169 1170 ACPI_DMTABLE_INFO AcpiDmTableInfoMadt9[] = 1171 { 1172 {ACPI_DMT_UINT16, ACPI_MADT9_OFFSET (Reserved), "Reserved", 0}, 1173 {ACPI_DMT_UINT32, ACPI_MADT9_OFFSET (LocalApicId), "Processor x2Apic ID", 0}, 1174 {ACPI_DMT_UINT32, ACPI_MADT9_OFFSET (LapicFlags), "Flags (decoded below)", DT_FLAG}, 1175 {ACPI_DMT_FLAG0, ACPI_MADT9_FLAG_OFFSET (LapicFlags,0), "Processor Enabled", 0}, 1176 {ACPI_DMT_UINT32, ACPI_MADT9_OFFSET (Uid), "Processor UID", 0}, 1177 ACPI_DMT_TERMINATOR 1178 }; 1179 1180 /* 10: Local X2_APIC NMI (ACPI 4.0) */ 1181 1182 ACPI_DMTABLE_INFO AcpiDmTableInfoMadt10[] = 1183 { 1184 {ACPI_DMT_UINT16, ACPI_MADT10_OFFSET (IntiFlags), "Flags (decoded below)", DT_FLAG}, 1185 {ACPI_DMT_FLAGS0, ACPI_MADT10_FLAG_OFFSET (IntiFlags,0), "Polarity", 0}, 1186 {ACPI_DMT_FLAGS2, ACPI_MADT10_FLAG_OFFSET (IntiFlags,0), "Trigger Mode", 0}, 1187 {ACPI_DMT_UINT32, ACPI_MADT10_OFFSET (Uid), "Processor UID", 0}, 1188 {ACPI_DMT_UINT8, ACPI_MADT10_OFFSET (Lint), "Interrupt Input LINT", 0}, 1189 {ACPI_DMT_UINT24, ACPI_MADT10_OFFSET (Reserved[0]), "Reserved", 0}, 1190 ACPI_DMT_TERMINATOR 1191 }; 1192 1193 1194 /******************************************************************************* 1195 * 1196 * MCFG - PCI Memory Mapped Configuration table and Subtable 1197 * 1198 ******************************************************************************/ 1199 1200 ACPI_DMTABLE_INFO AcpiDmTableInfoMcfg[] = 1201 { 1202 {ACPI_DMT_UINT64, ACPI_MCFG_OFFSET (Reserved[0]), "Reserved", 0}, 1203 ACPI_DMT_TERMINATOR 1204 }; 1205 1206 ACPI_DMTABLE_INFO AcpiDmTableInfoMcfg0[] = 1207 { 1208 {ACPI_DMT_UINT64, ACPI_MCFG0_OFFSET (Address), "Base Address", 0}, 1209 {ACPI_DMT_UINT16, ACPI_MCFG0_OFFSET (PciSegment), "Segment Group Number", 0}, 1210 {ACPI_DMT_UINT8, ACPI_MCFG0_OFFSET (StartBusNumber), "Start Bus Number", 0}, 1211 {ACPI_DMT_UINT8, ACPI_MCFG0_OFFSET (EndBusNumber), "End Bus Number", 0}, 1212 {ACPI_DMT_UINT32, ACPI_MCFG0_OFFSET (Reserved), "Reserved", 0}, 1213 ACPI_DMT_TERMINATOR 1214 }; 1215 1216 1217 /******************************************************************************* 1218 * 1219 * MCHI - Management Controller Host Interface table 1220 * 1221 ******************************************************************************/ 1222 1223 ACPI_DMTABLE_INFO AcpiDmTableInfoMchi[] = 1224 { 1225 {ACPI_DMT_UINT8, ACPI_MCHI_OFFSET (InterfaceType), "Interface Type", 0}, 1226 {ACPI_DMT_UINT8, ACPI_MCHI_OFFSET (Protocol), "Protocol", 0}, 1227 {ACPI_DMT_UINT64, ACPI_MCHI_OFFSET (ProtocolData), "Protocol Data", 0}, 1228 {ACPI_DMT_UINT8, ACPI_MCHI_OFFSET (InterruptType), "Interrupt Type", 0}, 1229 {ACPI_DMT_UINT8, ACPI_MCHI_OFFSET (Gpe), "Gpe", 0}, 1230 {ACPI_DMT_UINT8, ACPI_MCHI_OFFSET (PciDeviceFlag), "Pci Device Flag", 0}, 1231 {ACPI_DMT_UINT32, ACPI_MCHI_OFFSET (GlobalInterrupt), "Global Interrupt", 0}, 1232 {ACPI_DMT_GAS, ACPI_MCHI_OFFSET (ControlRegister), "Control Register", 0}, 1233 {ACPI_DMT_UINT8, ACPI_MCHI_OFFSET (PciSegment), "Pci Segment", 0}, 1234 {ACPI_DMT_UINT8, ACPI_MCHI_OFFSET (PciBus), "Pci Bus", 0}, 1235 {ACPI_DMT_UINT8, ACPI_MCHI_OFFSET (PciDevice), "Pci Device", 0}, 1236 {ACPI_DMT_UINT8, ACPI_MCHI_OFFSET (PciFunction), "Pci Function", 0}, 1237 ACPI_DMT_TERMINATOR 1238 }; 1239 1240 1241 /******************************************************************************* 1242 * 1243 * MSCT - Maximum System Characteristics Table (ACPI 4.0) 1244 * 1245 ******************************************************************************/ 1246 1247 ACPI_DMTABLE_INFO AcpiDmTableInfoMsct[] = 1248 { 1249 {ACPI_DMT_UINT32, ACPI_MSCT_OFFSET (ProximityOffset), "Proximity Offset", 0}, 1250 {ACPI_DMT_UINT32, ACPI_MSCT_OFFSET (MaxProximityDomains), "Max Proximity Domains", 0}, 1251 {ACPI_DMT_UINT32, ACPI_MSCT_OFFSET (MaxClockDomains), "Max Clock Domains", 0}, 1252 {ACPI_DMT_UINT64, ACPI_MSCT_OFFSET (MaxAddress), "Max Physical Address", 0}, 1253 ACPI_DMT_TERMINATOR 1254 }; 1255 1256 /* Subtable - Maximum Proximity Domain Information. Version 1 */ 1257 1258 ACPI_DMTABLE_INFO AcpiDmTableInfoMsct0[] = 1259 { 1260 {ACPI_DMT_UINT8, ACPI_MSCT0_OFFSET (Revision), "Revision", 0}, 1261 {ACPI_DMT_UINT8, ACPI_MSCT0_OFFSET (Length), "Length", DT_LENGTH}, 1262 {ACPI_DMT_UINT32, ACPI_MSCT0_OFFSET (RangeStart), "Domain Range Start", 0}, 1263 {ACPI_DMT_UINT32, ACPI_MSCT0_OFFSET (RangeEnd), "Domain Range End", 0}, 1264 {ACPI_DMT_UINT32, ACPI_MSCT0_OFFSET (ProcessorCapacity), "Processor Capacity", 0}, 1265 {ACPI_DMT_UINT64, ACPI_MSCT0_OFFSET (MemoryCapacity), "Memory Capacity", 0}, 1266 ACPI_DMT_TERMINATOR 1267 }; 1268 1269 1270 /******************************************************************************* 1271 * 1272 * SBST - Smart Battery Specification Table 1273 * 1274 ******************************************************************************/ 1275 1276 ACPI_DMTABLE_INFO AcpiDmTableInfoSbst[] = 1277 { 1278 {ACPI_DMT_UINT32, ACPI_SBST_OFFSET (WarningLevel), "Warning Level", 0}, 1279 {ACPI_DMT_UINT32, ACPI_SBST_OFFSET (LowLevel), "Low Level", 0}, 1280 {ACPI_DMT_UINT32, ACPI_SBST_OFFSET (CriticalLevel), "Critical Level", 0}, 1281 ACPI_DMT_TERMINATOR 1282 }; 1283 1284 1285 /******************************************************************************* 1286 * 1287 * SLIC - Software Licensing Description Table. There is no common table, just 1288 * the standard ACPI header and then subtables. 1289 * 1290 ******************************************************************************/ 1291 1292 /* Common Subtable header (one per Subtable) */ 1293 1294 ACPI_DMTABLE_INFO AcpiDmTableInfoSlicHdr[] = 1295 { 1296 {ACPI_DMT_SLIC, ACPI_SLICH_OFFSET (Type), "Subtable Type", 0}, 1297 {ACPI_DMT_UINT32, ACPI_SLICH_OFFSET (Length), "Length", DT_LENGTH}, 1298 ACPI_DMT_TERMINATOR 1299 }; 1300 1301 ACPI_DMTABLE_INFO AcpiDmTableInfoSlic0[] = 1302 { 1303 {ACPI_DMT_UINT8, ACPI_SLIC0_OFFSET (KeyType), "Key Type", 0}, 1304 {ACPI_DMT_UINT8, ACPI_SLIC0_OFFSET (Version), "Version", 0}, 1305 {ACPI_DMT_UINT16, ACPI_SLIC0_OFFSET (Reserved), "Reserved", 0}, 1306 {ACPI_DMT_UINT32, ACPI_SLIC0_OFFSET (Algorithm), "Algorithm", 0}, 1307 {ACPI_DMT_NAME4, ACPI_SLIC0_OFFSET (Magic), "Magic", 0}, 1308 {ACPI_DMT_UINT32, ACPI_SLIC0_OFFSET (BitLength), "BitLength", 0}, 1309 {ACPI_DMT_UINT32, ACPI_SLIC0_OFFSET (Exponent), "Exponent", 0}, 1310 {ACPI_DMT_BUF128, ACPI_SLIC0_OFFSET (Modulus[0]), "Modulus", 0}, 1311 ACPI_DMT_TERMINATOR 1312 }; 1313 1314 ACPI_DMTABLE_INFO AcpiDmTableInfoSlic1[] = 1315 { 1316 {ACPI_DMT_UINT32, ACPI_SLIC1_OFFSET (Version), "Version", 0}, 1317 {ACPI_DMT_NAME6, ACPI_SLIC1_OFFSET (OemId[0]), "Oem ID", 0}, 1318 {ACPI_DMT_NAME8, ACPI_SLIC1_OFFSET (OemTableId[0]), "Oem Table ID", 0}, 1319 {ACPI_DMT_NAME8, ACPI_SLIC1_OFFSET (WindowsFlag[0]), "Windows Flag", 0}, 1320 {ACPI_DMT_UINT32, ACPI_SLIC1_OFFSET (SlicVersion), "SLIC Version", 0}, 1321 {ACPI_DMT_BUF16, ACPI_SLIC1_OFFSET (Reserved[0]), "Reserved", 0}, 1322 {ACPI_DMT_BUF128, ACPI_SLIC1_OFFSET (Signature[0]), "Signature", 0}, 1323 ACPI_DMT_TERMINATOR 1324 }; 1325 1326 1327 /******************************************************************************* 1328 * 1329 * SLIT - System Locality Information Table 1330 * 1331 ******************************************************************************/ 1332 1333 ACPI_DMTABLE_INFO AcpiDmTableInfoSlit[] = 1334 { 1335 {ACPI_DMT_UINT64, ACPI_SLIT_OFFSET (LocalityCount), "Localities", 0}, 1336 ACPI_DMT_TERMINATOR 1337 }; 1338 1339 1340 /******************************************************************************* 1341 * 1342 * SPCR - Serial Port Console Redirection table 1343 * 1344 ******************************************************************************/ 1345 1346 ACPI_DMTABLE_INFO AcpiDmTableInfoSpcr[] = 1347 { 1348 {ACPI_DMT_UINT8, ACPI_SPCR_OFFSET (InterfaceType), "Interface Type", 0}, 1349 {ACPI_DMT_UINT24, ACPI_SPCR_OFFSET (Reserved[0]), "Reserved", 0}, 1350 {ACPI_DMT_GAS, ACPI_SPCR_OFFSET (SerialPort), "Serial Port Register", 0}, 1351 {ACPI_DMT_UINT8, ACPI_SPCR_OFFSET (InterruptType), "Interrupt Type", 0}, 1352 {ACPI_DMT_UINT8, ACPI_SPCR_OFFSET (PcInterrupt), "PCAT-compatible IRQ", 0}, 1353 {ACPI_DMT_UINT32, ACPI_SPCR_OFFSET (Interrupt), "Interrupt", 0}, 1354 {ACPI_DMT_UINT8, ACPI_SPCR_OFFSET (BaudRate), "Baud Rate", 0}, 1355 {ACPI_DMT_UINT8, ACPI_SPCR_OFFSET (Parity), "Parity", 0}, 1356 {ACPI_DMT_UINT8, ACPI_SPCR_OFFSET (StopBits), "Stop Bits", 0}, 1357 {ACPI_DMT_UINT8, ACPI_SPCR_OFFSET (FlowControl), "Flow Control", 0}, 1358 {ACPI_DMT_UINT8, ACPI_SPCR_OFFSET (TerminalType), "Terminal Type", 0}, 1359 {ACPI_DMT_UINT8, ACPI_SPCR_OFFSET (Reserved2), "Reserved", 0}, 1360 {ACPI_DMT_UINT16, ACPI_SPCR_OFFSET (PciDeviceId), "PCI Device ID", 0}, 1361 {ACPI_DMT_UINT16, ACPI_SPCR_OFFSET (PciVendorId), "PCI Vendor ID", 0}, 1362 {ACPI_DMT_UINT8, ACPI_SPCR_OFFSET (PciBus), "PCI Bus", 0}, 1363 {ACPI_DMT_UINT8, ACPI_SPCR_OFFSET (PciDevice), "PCI Device", 0}, 1364 {ACPI_DMT_UINT8, ACPI_SPCR_OFFSET (PciFunction), "PCI Function", 0}, 1365 {ACPI_DMT_UINT32, ACPI_SPCR_OFFSET (PciFlags), "PCI Flags", 0}, 1366 {ACPI_DMT_UINT8, ACPI_SPCR_OFFSET (PciSegment), "PCI Segment", 0}, 1367 {ACPI_DMT_UINT32, ACPI_SPCR_OFFSET (Reserved2), "Reserved", 0}, 1368 ACPI_DMT_TERMINATOR 1369 }; 1370 1371 1372 /******************************************************************************* 1373 * 1374 * SPMI - Server Platform Management Interface table 1375 * 1376 ******************************************************************************/ 1377 1378 ACPI_DMTABLE_INFO AcpiDmTableInfoSpmi[] = 1379 { 1380 {ACPI_DMT_UINT8, ACPI_SPMI_OFFSET (InterfaceType), "Interface Type", 0}, 1381 {ACPI_DMT_UINT8, ACPI_SPMI_OFFSET (Reserved), "Reserved", 0}, 1382 {ACPI_DMT_UINT16, ACPI_SPMI_OFFSET (SpecRevision), "IPMI Spec Version", 0}, 1383 {ACPI_DMT_UINT8, ACPI_SPMI_OFFSET (InterruptType), "Interrupt Type", 0}, 1384 {ACPI_DMT_UINT8, ACPI_SPMI_OFFSET (GpeNumber), "GPE Number", 0}, 1385 {ACPI_DMT_UINT8, ACPI_SPMI_OFFSET (Reserved1), "Reserved", 0}, 1386 {ACPI_DMT_UINT8, ACPI_SPMI_OFFSET (PciDeviceFlag), "PCI Device Flag", 0}, 1387 {ACPI_DMT_UINT32, ACPI_SPMI_OFFSET (Interrupt), "Interrupt", 0}, 1388 {ACPI_DMT_GAS, ACPI_SPMI_OFFSET (IpmiRegister), "IPMI Register", 0}, 1389 {ACPI_DMT_UINT8, ACPI_SPMI_OFFSET (PciSegment), "PCI Segment", 0}, 1390 {ACPI_DMT_UINT8, ACPI_SPMI_OFFSET (PciBus), "PCI Bus", 0}, 1391 {ACPI_DMT_UINT8, ACPI_SPMI_OFFSET (PciDevice), "PCI Device", 0}, 1392 {ACPI_DMT_UINT8, ACPI_SPMI_OFFSET (PciFunction), "PCI Function", 0}, 1393 {ACPI_DMT_UINT8, ACPI_SPMI_OFFSET (Reserved2), "Reserved", 0}, 1394 ACPI_DMT_TERMINATOR 1395 }; 1396 1397 1398 /******************************************************************************* 1399 * 1400 * SRAT - System Resource Affinity Table and Subtables 1401 * 1402 ******************************************************************************/ 1403 1404 ACPI_DMTABLE_INFO AcpiDmTableInfoSrat[] = 1405 { 1406 {ACPI_DMT_UINT32, ACPI_SRAT_OFFSET (TableRevision), "Table Revision", 0}, 1407 {ACPI_DMT_UINT64, ACPI_SRAT_OFFSET (Reserved), "Reserved", 0}, 1408 ACPI_DMT_TERMINATOR 1409 }; 1410 1411 /* Common Subtable header (one per Subtable) */ 1412 1413 ACPI_DMTABLE_INFO AcpiDmTableInfoSratHdr[] = 1414 { 1415 {ACPI_DMT_SRAT, ACPI_SRATH_OFFSET (Type), "Subtable Type", 0}, 1416 {ACPI_DMT_UINT8, ACPI_SRATH_OFFSET (Length), "Length", DT_LENGTH}, 1417 ACPI_DMT_TERMINATOR 1418 }; 1419 1420 /* SRAT Subtables */ 1421 1422 /* 0: Processor Local APIC/SAPIC Affinity */ 1423 1424 ACPI_DMTABLE_INFO AcpiDmTableInfoSrat0[] = 1425 { 1426 {ACPI_DMT_UINT8, ACPI_SRAT0_OFFSET (ProximityDomainLo), "Proximity Domain Low(8)", 0}, 1427 {ACPI_DMT_UINT8, ACPI_SRAT0_OFFSET (ApicId), "Apic ID", 0}, 1428 {ACPI_DMT_UINT32, ACPI_SRAT0_OFFSET (Flags), "Flags (decoded below)", DT_FLAG}, 1429 {ACPI_DMT_FLAG0, ACPI_SRAT0_FLAG_OFFSET (Flags,0), "Enabled", 0}, 1430 {ACPI_DMT_UINT8, ACPI_SRAT0_OFFSET (LocalSapicEid), "Local Sapic EID", 0}, 1431 {ACPI_DMT_UINT24, ACPI_SRAT0_OFFSET (ProximityDomainHi[0]), "Proximity Domain High(24)", 0}, 1432 {ACPI_DMT_UINT32, ACPI_SRAT0_OFFSET (ClockDomain), "Clock Domain", 0}, 1433 ACPI_DMT_TERMINATOR 1434 }; 1435 1436 /* 1: Memory Affinity */ 1437 1438 ACPI_DMTABLE_INFO AcpiDmTableInfoSrat1[] = 1439 { 1440 {ACPI_DMT_UINT32, ACPI_SRAT1_OFFSET (ProximityDomain), "Proximity Domain", 0}, 1441 {ACPI_DMT_UINT16, ACPI_SRAT1_OFFSET (Reserved), "Reserved1", 0}, 1442 {ACPI_DMT_UINT64, ACPI_SRAT1_OFFSET (BaseAddress), "Base Address", 0}, 1443 {ACPI_DMT_UINT64, ACPI_SRAT1_OFFSET (Length), "Address Length", 0}, 1444 {ACPI_DMT_UINT32, ACPI_SRAT1_OFFSET (Reserved1), "Reserved2", 0}, 1445 {ACPI_DMT_UINT32, ACPI_SRAT1_OFFSET (Flags), "Flags (decoded below)", DT_FLAG}, 1446 {ACPI_DMT_FLAG0, ACPI_SRAT1_FLAG_OFFSET (Flags,0), "Enabled", 0}, 1447 {ACPI_DMT_FLAG1, ACPI_SRAT1_FLAG_OFFSET (Flags,0), "Hot Pluggable", 0}, 1448 {ACPI_DMT_FLAG2, ACPI_SRAT1_FLAG_OFFSET (Flags,0), "Non-Volatile", 0}, 1449 {ACPI_DMT_UINT64, ACPI_SRAT1_OFFSET (Reserved2), "Reserved3", 0}, 1450 ACPI_DMT_TERMINATOR 1451 }; 1452 1453 /* 2: Processor Local X2_APIC Affinity (ACPI 4.0) */ 1454 1455 ACPI_DMTABLE_INFO AcpiDmTableInfoSrat2[] = 1456 { 1457 {ACPI_DMT_UINT16, ACPI_SRAT2_OFFSET (Reserved), "Reserved1", 0}, 1458 {ACPI_DMT_UINT32, ACPI_SRAT2_OFFSET (ProximityDomain), "Proximity Domain", 0}, 1459 {ACPI_DMT_UINT32, ACPI_SRAT2_OFFSET (ApicId), "Apic ID", 0}, 1460 {ACPI_DMT_UINT32, ACPI_SRAT2_OFFSET (Flags), "Flags (decoded below)", DT_FLAG}, 1461 {ACPI_DMT_FLAG0, ACPI_SRAT2_FLAG_OFFSET (Flags,0), "Enabled", 0}, 1462 {ACPI_DMT_UINT32, ACPI_SRAT2_OFFSET (ClockDomain), "Clock Domain", 0}, 1463 {ACPI_DMT_UINT32, ACPI_SRAT2_OFFSET (Reserved2), "Reserved2", 0}, 1464 ACPI_DMT_TERMINATOR 1465 }; 1466 1467 1468 /******************************************************************************* 1469 * 1470 * TCPA - Trusted Computing Platform Alliance table 1471 * 1472 ******************************************************************************/ 1473 1474 ACPI_DMTABLE_INFO AcpiDmTableInfoTcpa[] = 1475 { 1476 {ACPI_DMT_UINT16, ACPI_TCPA_OFFSET (Reserved), "Reserved", 0}, 1477 {ACPI_DMT_UINT32, ACPI_TCPA_OFFSET (MaxLogLength), "Max Event Log Length", 0}, 1478 {ACPI_DMT_UINT64, ACPI_TCPA_OFFSET (LogAddress), "Event Log Address", 0}, 1479 ACPI_DMT_TERMINATOR 1480 }; 1481 1482 1483 /******************************************************************************* 1484 * 1485 * UEFI - UEFI Boot optimization Table 1486 * 1487 ******************************************************************************/ 1488 1489 ACPI_DMTABLE_INFO AcpiDmTableInfoUefi[] = 1490 { 1491 {ACPI_DMT_UUID, ACPI_UEFI_OFFSET (Identifier[0]), "UUID Identifier", 0}, 1492 {ACPI_DMT_UINT16, ACPI_UEFI_OFFSET (DataOffset), "Data Offset", 0}, 1493 ACPI_DMT_TERMINATOR 1494 }; 1495 1496 1497 /******************************************************************************* 1498 * 1499 * WAET - Windows ACPI Emulated devices Table 1500 * 1501 ******************************************************************************/ 1502 1503 ACPI_DMTABLE_INFO AcpiDmTableInfoWaet[] = 1504 { 1505 {ACPI_DMT_UINT32, ACPI_WAET_OFFSET (Flags), "Flags (decoded below)", DT_FLAG}, 1506 {ACPI_DMT_FLAG0, ACPI_WAET_OFFSET (Flags), "RTC needs no INT ack", 0}, 1507 {ACPI_DMT_FLAG1, ACPI_WAET_OFFSET (Flags), "PM timer, one read only", 0}, 1508 ACPI_DMT_TERMINATOR 1509 }; 1510 1511 1512 /******************************************************************************* 1513 * 1514 * WDAT - Watchdog Action Table 1515 * 1516 ******************************************************************************/ 1517 1518 ACPI_DMTABLE_INFO AcpiDmTableInfoWdat[] = 1519 { 1520 {ACPI_DMT_UINT32, ACPI_WDAT_OFFSET (HeaderLength), "Header Length", DT_LENGTH}, 1521 {ACPI_DMT_UINT16, ACPI_WDAT_OFFSET (PciSegment), "PCI Segment", 0}, 1522 {ACPI_DMT_UINT8, ACPI_WDAT_OFFSET (PciBus), "PCI Bus", 0}, 1523 {ACPI_DMT_UINT8, ACPI_WDAT_OFFSET (PciDevice), "PCI Device", 0}, 1524 {ACPI_DMT_UINT8, ACPI_WDAT_OFFSET (PciFunction), "PCI Function", 0}, 1525 {ACPI_DMT_UINT24, ACPI_WDAT_OFFSET (Reserved[0]), "Reserved", 0}, 1526 {ACPI_DMT_UINT32, ACPI_WDAT_OFFSET (TimerPeriod), "Timer Period", 0}, 1527 {ACPI_DMT_UINT32, ACPI_WDAT_OFFSET (MaxCount), "Max Count", 0}, 1528 {ACPI_DMT_UINT32, ACPI_WDAT_OFFSET (MinCount), "Min Count", 0}, 1529 {ACPI_DMT_UINT8, ACPI_WDAT_OFFSET (Flags), "Flags (decoded below)", DT_FLAG}, 1530 {ACPI_DMT_FLAG0, ACPI_WDAT_OFFSET (Flags), "Enabled", 0}, 1531 {ACPI_DMT_FLAG7, ACPI_WDAT_OFFSET (Flags), "Stopped When Asleep", 0}, 1532 {ACPI_DMT_UINT24, ACPI_WDAT_OFFSET (Reserved2[0]), "Reserved", 0}, 1533 {ACPI_DMT_UINT32, ACPI_WDAT_OFFSET (Entries), "Watchdog Entry Count", 0}, 1534 ACPI_DMT_TERMINATOR 1535 }; 1536 1537 /* WDAT Subtables - Watchdog Instruction Entries */ 1538 1539 ACPI_DMTABLE_INFO AcpiDmTableInfoWdat0[] = 1540 { 1541 {ACPI_DMT_UINT8, ACPI_WDAT0_OFFSET (Action), "Watchdog Action", 0}, 1542 {ACPI_DMT_UINT8, ACPI_WDAT0_OFFSET (Instruction), "Instruction", 0}, 1543 {ACPI_DMT_UINT16, ACPI_WDAT0_OFFSET (Reserved), "Reserved", 0}, 1544 {ACPI_DMT_GAS, ACPI_WDAT0_OFFSET (RegisterRegion), "Register Region", 0}, 1545 {ACPI_DMT_UINT32, ACPI_WDAT0_OFFSET (Value), "Value", 0}, 1546 {ACPI_DMT_UINT32, ACPI_WDAT0_OFFSET (Mask), "Register Mask", 0}, 1547 ACPI_DMT_TERMINATOR 1548 }; 1549 1550 1551 /******************************************************************************* 1552 * 1553 * WDDT - Watchdog Description Table 1554 * 1555 ******************************************************************************/ 1556 1557 ACPI_DMTABLE_INFO AcpiDmTableInfoWddt[] = 1558 { 1559 {ACPI_DMT_UINT16, ACPI_WDDT_OFFSET (SpecVersion), "Specification Version", 0}, 1560 {ACPI_DMT_UINT16, ACPI_WDDT_OFFSET (TableVersion), "Table Version", 0}, 1561 {ACPI_DMT_UINT16, ACPI_WDDT_OFFSET (PciVendorId), "PCI Vendor ID", 0}, 1562 {ACPI_DMT_GAS, ACPI_WDDT_OFFSET (Address), "Timer Register", 0}, 1563 {ACPI_DMT_UINT16, ACPI_WDDT_OFFSET (MaxCount), "Max Count", 0}, 1564 {ACPI_DMT_UINT16, ACPI_WDDT_OFFSET (MinCount), "Min Count", 0}, 1565 {ACPI_DMT_UINT16, ACPI_WDDT_OFFSET (Period), "Period", 0}, 1566 {ACPI_DMT_UINT16, ACPI_WDDT_OFFSET (Status), "Status (decoded below)", 0}, 1567 1568 /* Status Flags byte 0 */ 1569 1570 {ACPI_DMT_FLAG0, ACPI_WDDT_FLAG_OFFSET (Status,0), "Available", 0}, 1571 {ACPI_DMT_FLAG1, ACPI_WDDT_FLAG_OFFSET (Status,0), "Active", 0}, 1572 {ACPI_DMT_FLAG2, ACPI_WDDT_FLAG_OFFSET (Status,0), "OS Owns", 0}, 1573 1574 /* Status Flags byte 1 */ 1575 1576 {ACPI_DMT_FLAG3, ACPI_WDDT_FLAG_OFFSET (Status,1), "User Reset", 0}, 1577 {ACPI_DMT_FLAG4, ACPI_WDDT_FLAG_OFFSET (Status,1), "Timeout Reset", 0}, 1578 {ACPI_DMT_FLAG5, ACPI_WDDT_FLAG_OFFSET (Status,1), "Power Fail Reset", 0}, 1579 {ACPI_DMT_FLAG6, ACPI_WDDT_FLAG_OFFSET (Status,1), "Unknown Reset", 0}, 1580 1581 {ACPI_DMT_UINT16, ACPI_WDDT_OFFSET (Capability), "Capability (decoded below)", 0}, 1582 1583 /* Capability Flags byte 0 */ 1584 1585 {ACPI_DMT_FLAG0, ACPI_WDDT_FLAG_OFFSET (Capability,0), "Auto Reset", 0}, 1586 {ACPI_DMT_FLAG1, ACPI_WDDT_FLAG_OFFSET (Capability,0), "Timeout Alert", 0}, 1587 ACPI_DMT_TERMINATOR 1588 }; 1589 1590 1591 /******************************************************************************* 1592 * 1593 * WDRT - Watchdog Resource Table 1594 * 1595 ******************************************************************************/ 1596 1597 ACPI_DMTABLE_INFO AcpiDmTableInfoWdrt[] = 1598 { 1599 {ACPI_DMT_GAS, ACPI_WDRT_OFFSET (ControlRegister), "Control Register", 0}, 1600 {ACPI_DMT_GAS, ACPI_WDRT_OFFSET (CountRegister), "Count Register", 0}, 1601 {ACPI_DMT_UINT16, ACPI_WDRT_OFFSET (PciDeviceId), "PCI Device ID", 0}, 1602 {ACPI_DMT_UINT16, ACPI_WDRT_OFFSET (PciVendorId), "PCI Vendor ID", 0}, 1603 {ACPI_DMT_UINT8, ACPI_WDRT_OFFSET (PciBus), "PCI Bus", 0}, 1604 {ACPI_DMT_UINT8, ACPI_WDRT_OFFSET (PciDevice), "PCI Device", 0}, 1605 {ACPI_DMT_UINT8, ACPI_WDRT_OFFSET (PciFunction), "PCI Function", 0}, 1606 {ACPI_DMT_UINT8, ACPI_WDRT_OFFSET (PciSegment), "PCI Segment", 0}, 1607 {ACPI_DMT_UINT16, ACPI_WDRT_OFFSET (MaxCount), "Max Count", 0}, 1608 {ACPI_DMT_UINT8, ACPI_WDRT_OFFSET (Units), "Counter Units", 0}, 1609 ACPI_DMT_TERMINATOR 1610 }; 1611 1612 /* 1613 * Generic types (used in UEFI) 1614 * 1615 * Examples: 1616 * 1617 * Buffer : cc 04 ff bb 1618 * UINT8 : 11 1619 * UINT16 : 1122 1620 * UINT24 : 112233 1621 * UINT32 : 11223344 1622 * UINT56 : 11223344556677 1623 * UINT64 : 1122334455667788 1624 * 1625 * String : "This is string" 1626 * Unicode : "This string encoded to Unicode" 1627 * 1628 * GUID : 11223344-5566-7788-99aa-bbccddeeff00 1629 * DevicePath : "\PciRoot(0)\Pci(0x1f,1)\Usb(0,0)" 1630 */ 1631 1632 #define ACPI_DM_GENERIC_ENTRY(FieldType, FieldName)\ 1633 {{FieldType, 0, FieldName, 0}, ACPI_DMT_TERMINATOR} 1634 1635 ACPI_DMTABLE_INFO AcpiDmTableInfoGeneric[][2] = 1636 { 1637 ACPI_DM_GENERIC_ENTRY (ACPI_DMT_UINT8, "UINT8"), 1638 ACPI_DM_GENERIC_ENTRY (ACPI_DMT_UINT16, "UINT16"), 1639 ACPI_DM_GENERIC_ENTRY (ACPI_DMT_UINT24, "UINT24"), 1640 ACPI_DM_GENERIC_ENTRY (ACPI_DMT_UINT32, "UINT32"), 1641 ACPI_DM_GENERIC_ENTRY (ACPI_DMT_UINT56, "UINT56"), 1642 ACPI_DM_GENERIC_ENTRY (ACPI_DMT_UINT64, "UINT64"), 1643 ACPI_DM_GENERIC_ENTRY (ACPI_DMT_STRING, "String"), 1644 ACPI_DM_GENERIC_ENTRY (ACPI_DMT_UNICODE, "Unicode"), 1645 ACPI_DM_GENERIC_ENTRY (ACPI_DMT_BUFFER, "Buffer"), 1646 ACPI_DM_GENERIC_ENTRY (ACPI_DMT_UUID, "GUID"), 1647 ACPI_DM_GENERIC_ENTRY (ACPI_DMT_STRING, "DevicePath"), 1648 ACPI_DM_GENERIC_ENTRY (ACPI_DMT_LABEL, "Label"), 1649 {ACPI_DMT_TERMINATOR} 1650 }; 1651
Indexes created Fri Sep 26 20:09:58 GMT 2025