dmtbinfo.c revision 1.5
1 /****************************************************************************** 2 * 3 * Module Name: dmtbinfo - Table info for non-AML tables 4 * 5 *****************************************************************************/ 6 7 /* 8 * Copyright (C) 2000 - 2013, Intel Corp. 9 * All rights reserved. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions, and the following disclaimer, 16 * without modification. 17 * 2. Redistributions in binary form must reproduce at minimum a disclaimer 18 * substantially similar to the "NO WARRANTY" disclaimer below 19 * ("Disclaimer") and any redistribution must be conditioned upon 20 * including a substantially similar Disclaimer requirement for further 21 * binary redistribution. 22 * 3. Neither the names of the above-listed copyright holders nor the names 23 * of any contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * Alternatively, this software may be distributed under the terms of the 27 * GNU General Public License ("GPL") version 2 as published by the Free 28 * Software Foundation. 29 * 30 * NO WARRANTY 31 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 32 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 33 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR 34 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 35 * HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 36 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 37 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 38 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 39 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING 40 * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 41 * POSSIBILITY OF SUCH DAMAGES. 42 */ 43 44 #include "acpi.h" 45 #include "accommon.h" 46 #include "acdisasm.h" 47 48 /* This module used for application-level code only */ 49 50 #define _COMPONENT ACPI_CA_DISASSEMBLER 51 ACPI_MODULE_NAME ("dmtbinfo") 52 53 /* 54 * How to add a new table: 55 * 56 * - Add the C table definition to the actbl1.h or actbl2.h header. 57 * - Add ACPI_xxxx_OFFSET macro(s) for the table (and subtables) to list below. 58 * - Define the table in this file (for the disassembler). If any 59 * new data types are required (ACPI_DMT_*), see below. 60 * - Add an external declaration for the new table definition (AcpiDmTableInfo*) 61 * in acdisam.h 62 * - Add new table definition to the dispatch table in dmtable.c (AcpiDmTableData) 63 * If a simple table (with no subtables), no disassembly code is needed. 64 * Otherwise, create the AcpiDmDump* function for to disassemble the table 65 * and add it to the dmtbdump.c file. 66 * - Add an external declaration for the new AcpiDmDump* function in acdisasm.h 67 * - Add the new AcpiDmDump* function to the dispatch table in dmtable.c 68 * - Create a template for the new table 69 * - Add data table compiler support 70 * 71 * How to add a new data type (ACPI_DMT_*): 72 * 73 * - Add new type at the end of the ACPI_DMT list in acdisasm.h 74 * - Add length and implementation cases in dmtable.c (disassembler) 75 * - Add type and length cases in dtutils.c (DT compiler) 76 */ 77 78 /* 79 * Macros used to generate offsets to specific table fields 80 */ 81 #define ACPI_FACS_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_TABLE_FACS,f) 82 #define ACPI_GAS_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_GENERIC_ADDRESS,f) 83 #define ACPI_HDR_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_TABLE_HEADER,f) 84 #define ACPI_RSDP_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_TABLE_RSDP,f) 85 #define ACPI_BERT_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_TABLE_BERT,f) 86 #define ACPI_BGRT_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_TABLE_BGRT,f) 87 #define ACPI_BOOT_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_TABLE_BOOT,f) 88 #define ACPI_CPEP_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_TABLE_CPEP,f) 89 #define ACPI_DBG2_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_TABLE_DBG2,f) 90 #define ACPI_DBGP_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_TABLE_DBGP,f) 91 #define ACPI_DMAR_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_TABLE_DMAR,f) 92 #define ACPI_DRTM_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_TABLE_DRTM,f) 93 #define ACPI_ECDT_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_TABLE_ECDT,f) 94 #define ACPI_EINJ_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_TABLE_EINJ,f) 95 #define ACPI_ERST_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_TABLE_ERST,f) 96 #define ACPI_GTDT_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_TABLE_GTDT,f) 97 #define ACPI_HEST_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_TABLE_HEST,f) 98 #define ACPI_HPET_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_TABLE_HPET,f) 99 #define ACPI_IVRS_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_TABLE_IVRS,f) 100 #define ACPI_MADT_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_TABLE_MADT,f) 101 #define ACPI_MCFG_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_TABLE_MCFG,f) 102 #define ACPI_MCHI_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_TABLE_MCHI,f) 103 #define ACPI_MPST_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_TABLE_MPST,f) 104 #define ACPI_MSCT_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_TABLE_MSCT,f) 105 #define ACPI_PCCT_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_TABLE_PCCT,f) 106 #define ACPI_PMTT_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_TABLE_PMTT,f) 107 #define ACPI_S3PT_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_TABLE_S3PT,f) 108 #define ACPI_SBST_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_TABLE_SBST,f) 109 #define ACPI_SLIT_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_TABLE_SLIT,f) 110 #define ACPI_SPCR_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_TABLE_SPCR,f) 111 #define ACPI_SPMI_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_TABLE_SPMI,f) 112 #define ACPI_SRAT_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_TABLE_SRAT,f) 113 #define ACPI_TCPA_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_TABLE_TCPA,f) 114 #define ACPI_TPM2_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_TABLE_TPM2,f) 115 #define ACPI_UEFI_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_TABLE_UEFI,f) 116 #define ACPI_WAET_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_TABLE_WAET,f) 117 #define ACPI_WDAT_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_TABLE_WDAT,f) 118 #define ACPI_WDDT_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_TABLE_WDDT,f) 119 #define ACPI_WDRT_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_TABLE_WDRT,f) 120 121 /* Subtables */ 122 123 #define ACPI_ASF0_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_ASF_INFO,f) 124 #define ACPI_ASF1_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_ASF_ALERT,f) 125 #define ACPI_ASF1a_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_ASF_ALERT_DATA,f) 126 #define ACPI_ASF2_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_ASF_REMOTE,f) 127 #define ACPI_ASF2a_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_ASF_CONTROL_DATA,f) 128 #define ACPI_ASF3_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_ASF_RMCP,f) 129 #define ACPI_ASF4_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_ASF_ADDRESS,f) 130 #define ACPI_CPEP0_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_CPEP_POLLING,f) 131 #define ACPI_CSRT0_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_CSRT_GROUP,f) 132 #define ACPI_CSRT1_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_CSRT_SHARED_INFO,f) 133 #define ACPI_CSRT2_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_CSRT_DESCRIPTOR,f) 134 #define ACPI_DBG20_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_DBG2_DEVICE,f) 135 #define ACPI_DMARS_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_DMAR_DEVICE_SCOPE,f) 136 #define ACPI_DMAR0_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_DMAR_HARDWARE_UNIT,f) 137 #define ACPI_DMAR1_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_DMAR_RESERVED_MEMORY,f) 138 #define ACPI_DMAR2_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_DMAR_ATSR,f) 139 #define ACPI_DMAR3_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_DMAR_RHSA,f) 140 #define ACPI_EINJ0_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_WHEA_HEADER,f) 141 #define ACPI_ERST0_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_WHEA_HEADER,f) 142 #define ACPI_FPDTH_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_FPDT_HEADER,f) 143 #define ACPI_FPDT0_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_FPDT_BOOT,f) 144 #define ACPI_FPDT1_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_FPDT_S3PT_PTR,f) 145 #define ACPI_HEST0_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_HEST_IA_MACHINE_CHECK,f) 146 #define ACPI_HEST1_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_HEST_IA_CORRECTED,f) 147 #define ACPI_HEST2_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_HEST_IA_NMI,f) 148 #define ACPI_HEST6_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_HEST_AER_ROOT,f) 149 #define ACPI_HEST7_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_HEST_AER,f) 150 #define ACPI_HEST8_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_HEST_AER_BRIDGE,f) 151 #define ACPI_HEST9_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_HEST_GENERIC,f) 152 #define ACPI_HESTN_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_HEST_NOTIFY,f) 153 #define ACPI_HESTB_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_HEST_IA_ERROR_BANK,f) 154 #define ACPI_IVRSH_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_IVRS_HEADER,f) 155 #define ACPI_IVRS0_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_IVRS_HARDWARE,f) 156 #define ACPI_IVRS1_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_IVRS_MEMORY,f) 157 #define ACPI_IVRSD_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_IVRS_DE_HEADER,f) 158 #define ACPI_IVRS8A_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_IVRS_DEVICE8A,f) 159 #define ACPI_IVRS8B_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_IVRS_DEVICE8B,f) 160 #define ACPI_IVRS8C_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_IVRS_DEVICE8C,f) 161 #define ACPI_MADT0_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_MADT_LOCAL_APIC,f) 162 #define ACPI_MADT1_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_MADT_IO_APIC,f) 163 #define ACPI_MADT2_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_MADT_INTERRUPT_OVERRIDE,f) 164 #define ACPI_MADT3_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_MADT_NMI_SOURCE,f) 165 #define ACPI_MADT4_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_MADT_LOCAL_APIC_NMI,f) 166 #define ACPI_MADT5_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_MADT_LOCAL_APIC_OVERRIDE,f) 167 #define ACPI_MADT6_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_MADT_IO_SAPIC,f) 168 #define ACPI_MADT7_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_MADT_LOCAL_SAPIC,f) 169 #define ACPI_MADT8_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_MADT_INTERRUPT_SOURCE,f) 170 #define ACPI_MADT9_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_MADT_LOCAL_X2APIC,f) 171 #define ACPI_MADT10_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_MADT_LOCAL_X2APIC_NMI,f) 172 #define ACPI_MADT11_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_MADT_GENERIC_INTERRUPT,f) 173 #define ACPI_MADT12_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_MADT_GENERIC_DISTRIBUTOR,f) 174 #define ACPI_MADTH_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_SUBTABLE_HEADER,f) 175 #define ACPI_MCFG0_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_MCFG_ALLOCATION,f) 176 #define ACPI_MPST0_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_MPST_POWER_NODE,f) 177 #define ACPI_MPST0A_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_MPST_POWER_STATE,f) 178 #define ACPI_MPST0B_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_MPST_COMPONENT,f) 179 #define ACPI_MPST1_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_MPST_DATA_HDR,f) 180 #define ACPI_MPST2_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_MPST_POWER_DATA,f) 181 #define ACPI_MSCT0_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_MSCT_PROXIMITY,f) 182 #define ACPI_MTMR0_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_MTMR_ENTRY,f) 183 #define ACPI_PCCT0_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_PCCT_SUBSPACE,f) 184 #define ACPI_PMTT0_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_PMTT_SOCKET,f) 185 #define ACPI_PMTT1_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_PMTT_CONTROLLER,f) 186 #define ACPI_PMTT1A_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_PMTT_DOMAIN,f) 187 #define ACPI_PMTT2_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_PMTT_PHYSICAL_COMPONENT,f) 188 #define ACPI_PMTTH_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_PMTT_HEADER,f) 189 #define ACPI_S3PTH_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_S3PT_HEADER,f) 190 #define ACPI_S3PT0_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_S3PT_RESUME,f) 191 #define ACPI_S3PT1_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_S3PT_SUSPEND,f) 192 #define ACPI_SLICH_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_SLIC_HEADER,f) 193 #define ACPI_SLIC0_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_SLIC_KEY,f) 194 #define ACPI_SLIC1_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_SLIC_MARKER,f) 195 #define ACPI_SRATH_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_SUBTABLE_HEADER,f) 196 #define ACPI_SRAT0_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_SRAT_CPU_AFFINITY,f) 197 #define ACPI_SRAT1_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_SRAT_MEM_AFFINITY,f) 198 #define ACPI_SRAT2_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_SRAT_X2APIC_CPU_AFFINITY,f) 199 #define ACPI_VRTC0_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_VRTC_ENTRY,f) 200 #define ACPI_WDAT0_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_WDAT_ENTRY,f) 201 202 /* 203 * Simplify access to flag fields by breaking them up into bytes 204 */ 205 #define ACPI_FLAG_OFFSET(d,f,o) (UINT16) (ACPI_OFFSET (d,f) + o) 206 207 /* Flags */ 208 209 #define ACPI_FADT_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_TABLE_FADT,f,o) 210 #define ACPI_FACS_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_TABLE_FACS,f,o) 211 #define ACPI_HPET_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_TABLE_HPET,f,o) 212 #define ACPI_SRAT0_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_SRAT_CPU_AFFINITY,f,o) 213 #define ACPI_SRAT1_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_SRAT_MEM_AFFINITY,f,o) 214 #define ACPI_SRAT2_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_SRAT_X2APIC_CPU_AFFINITY,f,o) 215 #define ACPI_GTDT_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_TABLE_GTDT,f,o) 216 #define ACPI_MADT_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_TABLE_MADT,f,o) 217 #define ACPI_MADT0_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_MADT_LOCAL_APIC,f,o) 218 #define ACPI_MADT2_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_MADT_INTERRUPT_OVERRIDE,f,o) 219 #define ACPI_MADT3_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_MADT_NMI_SOURCE,f,o) 220 #define ACPI_MADT4_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_MADT_LOCAL_APIC_NMI,f,o) 221 #define ACPI_MADT7_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_MADT_LOCAL_SAPIC,f,o) 222 #define ACPI_MADT8_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_MADT_INTERRUPT_SOURCE,f,o) 223 #define ACPI_MADT9_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_MADT_LOCAL_X2APIC,f,o) 224 #define ACPI_MADT10_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_MADT_LOCAL_X2APIC_NMI,f,o) 225 #define ACPI_MADT11_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_MADT_GENERIC_INTERRUPT,f,o) 226 #define ACPI_MPST0_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_MPST_POWER_NODE,f,o) 227 #define ACPI_MPST2_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_MPST_POWER_DATA,f,o) 228 #define ACPI_PCCT_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_TABLE_PCCT,f,o) 229 #define ACPI_PMTTH_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_PMTT_HEADER,f,o) 230 #define ACPI_WDDT_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_TABLE_WDDT,f,o) 231 #define ACPI_EINJ0_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_WHEA_HEADER,f,o) 232 #define ACPI_ERST0_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_WHEA_HEADER,f,o) 233 #define ACPI_HEST0_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_HEST_IA_MACHINE_CHECK,f,o) 234 #define ACPI_HEST1_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_HEST_IA_CORRECTED,f,o) 235 #define ACPI_HEST6_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_HEST_AER_ROOT,f,o) 236 237 /* 238 * Required terminator for all tables below 239 */ 240 #define ACPI_DMT_TERMINATOR {ACPI_DMT_EXIT, 0, NULL, 0} 241 #define ACPI_DMT_NEW_LINE {ACPI_DMT_EXTRA_TEXT, 0, "\n", 0} 242 243 244 /* 245 * ACPI Table Information, used to dump formatted ACPI tables 246 * 247 * Each entry is of the form: <Field Type, Field Offset, Field Name> 248 */ 249 250 /******************************************************************************* 251 * 252 * Common ACPI table header 253 * 254 ******************************************************************************/ 255 256 ACPI_DMTABLE_INFO AcpiDmTableInfoHeader[] = 257 { 258 {ACPI_DMT_SIG, ACPI_HDR_OFFSET (Signature[0]), "Signature", 0}, 259 {ACPI_DMT_UINT32, ACPI_HDR_OFFSET (Length), "Table Length", DT_LENGTH}, 260 {ACPI_DMT_UINT8, ACPI_HDR_OFFSET (Revision), "Revision", 0}, 261 {ACPI_DMT_CHKSUM, ACPI_HDR_OFFSET (Checksum), "Checksum", 0}, 262 {ACPI_DMT_NAME6, ACPI_HDR_OFFSET (OemId[0]), "Oem ID", 0}, 263 {ACPI_DMT_NAME8, ACPI_HDR_OFFSET (OemTableId[0]), "Oem Table ID", 0}, 264 {ACPI_DMT_UINT32, ACPI_HDR_OFFSET (OemRevision), "Oem Revision", 0}, 265 {ACPI_DMT_NAME4, ACPI_HDR_OFFSET (AslCompilerId[0]), "Asl Compiler ID", 0}, 266 {ACPI_DMT_UINT32, ACPI_HDR_OFFSET (AslCompilerRevision), "Asl Compiler Revision", 0}, 267 ACPI_DMT_TERMINATOR 268 }; 269 270 271 /******************************************************************************* 272 * 273 * GAS - Generic Address Structure 274 * 275 ******************************************************************************/ 276 277 ACPI_DMTABLE_INFO AcpiDmTableInfoGas[] = 278 { 279 {ACPI_DMT_SPACEID, ACPI_GAS_OFFSET (SpaceId), "Space ID", 0}, 280 {ACPI_DMT_UINT8, ACPI_GAS_OFFSET (BitWidth), "Bit Width", 0}, 281 {ACPI_DMT_UINT8, ACPI_GAS_OFFSET (BitOffset), "Bit Offset", 0}, 282 {ACPI_DMT_ACCWIDTH, ACPI_GAS_OFFSET (AccessWidth), "Encoded Access Width", 0}, 283 {ACPI_DMT_UINT64, ACPI_GAS_OFFSET (Address), "Address", 0}, 284 ACPI_DMT_TERMINATOR 285 }; 286 287 288 /******************************************************************************* 289 * 290 * RSDP - Root System Description Pointer (Signature is "RSD PTR ") 291 * 292 ******************************************************************************/ 293 294 ACPI_DMTABLE_INFO AcpiDmTableInfoRsdp1[] = 295 { 296 {ACPI_DMT_NAME8, ACPI_RSDP_OFFSET (Signature[0]), "Signature", 0}, 297 {ACPI_DMT_UINT8, ACPI_RSDP_OFFSET (Checksum), "Checksum", 0}, 298 {ACPI_DMT_NAME6, ACPI_RSDP_OFFSET (OemId[0]), "Oem ID", 0}, 299 {ACPI_DMT_UINT8, ACPI_RSDP_OFFSET (Revision), "Revision", 0}, 300 {ACPI_DMT_UINT32, ACPI_RSDP_OFFSET (RsdtPhysicalAddress), "RSDT Address", 0}, 301 ACPI_DMT_TERMINATOR 302 }; 303 304 /* ACPI 2.0+ Extensions */ 305 306 ACPI_DMTABLE_INFO AcpiDmTableInfoRsdp2[] = 307 { 308 {ACPI_DMT_UINT32, ACPI_RSDP_OFFSET (Length), "Length", DT_LENGTH}, 309 {ACPI_DMT_UINT64, ACPI_RSDP_OFFSET (XsdtPhysicalAddress), "XSDT Address", 0}, 310 {ACPI_DMT_UINT8, ACPI_RSDP_OFFSET (ExtendedChecksum), "Extended Checksum", 0}, 311 {ACPI_DMT_UINT24, ACPI_RSDP_OFFSET (Reserved[0]), "Reserved", 0}, 312 ACPI_DMT_TERMINATOR 313 }; 314 315 316 /******************************************************************************* 317 * 318 * FACS - Firmware ACPI Control Structure 319 * 320 ******************************************************************************/ 321 322 ACPI_DMTABLE_INFO AcpiDmTableInfoFacs[] = 323 { 324 {ACPI_DMT_NAME4, ACPI_FACS_OFFSET (Signature[0]), "Signature", 0}, 325 {ACPI_DMT_UINT32, ACPI_FACS_OFFSET (Length), "Length", DT_LENGTH}, 326 {ACPI_DMT_UINT32, ACPI_FACS_OFFSET (HardwareSignature), "Hardware Signature", 0}, 327 {ACPI_DMT_UINT32, ACPI_FACS_OFFSET (FirmwareWakingVector), "32 Firmware Waking Vector", 0}, 328 {ACPI_DMT_UINT32, ACPI_FACS_OFFSET (GlobalLock), "Global Lock", 0}, 329 {ACPI_DMT_UINT32, ACPI_FACS_OFFSET (Flags), "Flags (decoded below)", DT_FLAG}, 330 {ACPI_DMT_FLAG0, ACPI_FACS_FLAG_OFFSET (Flags,0), "S4BIOS Support Present", 0}, 331 {ACPI_DMT_FLAG1, ACPI_FACS_FLAG_OFFSET (Flags,0), "64-bit Wake Supported (V2)", 0}, 332 {ACPI_DMT_UINT64, ACPI_FACS_OFFSET (XFirmwareWakingVector), "64 Firmware Waking Vector", 0}, 333 {ACPI_DMT_UINT8, ACPI_FACS_OFFSET (Version), "Version", 0}, 334 {ACPI_DMT_UINT24, ACPI_FACS_OFFSET (Reserved[0]), "Reserved", 0}, 335 {ACPI_DMT_UINT32, ACPI_FACS_OFFSET (OspmFlags), "OspmFlags (decoded below)", DT_FLAG}, 336 {ACPI_DMT_FLAG0, ACPI_FACS_FLAG_OFFSET (OspmFlags,0), "64-bit Wake Env Required (V2)", 0}, 337 ACPI_DMT_TERMINATOR 338 }; 339 340 341 /******************************************************************************* 342 * 343 * FADT - Fixed ACPI Description Table (Signature is FACP) 344 * 345 ******************************************************************************/ 346 347 /* ACPI 1.0 FADT (Version 1) */ 348 349 ACPI_DMTABLE_INFO AcpiDmTableInfoFadt1[] = 350 { 351 {ACPI_DMT_UINT32, ACPI_FADT_OFFSET (Facs), "FACS Address", 0}, 352 {ACPI_DMT_UINT32, ACPI_FADT_OFFSET (Dsdt), "DSDT Address", DT_NON_ZERO}, 353 {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (Model), "Model", 0}, 354 {ACPI_DMT_FADTPM, ACPI_FADT_OFFSET (PreferredProfile), "PM Profile", 0}, 355 {ACPI_DMT_UINT16, ACPI_FADT_OFFSET (SciInterrupt), "SCI Interrupt", 0}, 356 {ACPI_DMT_UINT32, ACPI_FADT_OFFSET (SmiCommand), "SMI Command Port", 0}, 357 {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (AcpiEnable), "ACPI Enable Value", 0}, 358 {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (AcpiDisable), "ACPI Disable Value", 0}, 359 {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (S4BiosRequest), "S4BIOS Command", 0}, 360 {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (PstateControl), "P-State Control", 0}, 361 {ACPI_DMT_UINT32, ACPI_FADT_OFFSET (Pm1aEventBlock), "PM1A Event Block Address", 0}, 362 {ACPI_DMT_UINT32, ACPI_FADT_OFFSET (Pm1bEventBlock), "PM1B Event Block Address", 0}, 363 {ACPI_DMT_UINT32, ACPI_FADT_OFFSET (Pm1aControlBlock), "PM1A Control Block Address", 0}, 364 {ACPI_DMT_UINT32, ACPI_FADT_OFFSET (Pm1bControlBlock), "PM1B Control Block Address", 0}, 365 {ACPI_DMT_UINT32, ACPI_FADT_OFFSET (Pm2ControlBlock), "PM2 Control Block Address", 0}, 366 {ACPI_DMT_UINT32, ACPI_FADT_OFFSET (PmTimerBlock), "PM Timer Block Address", 0}, 367 {ACPI_DMT_UINT32, ACPI_FADT_OFFSET (Gpe0Block), "GPE0 Block Address", 0}, 368 {ACPI_DMT_UINT32, ACPI_FADT_OFFSET (Gpe1Block), "GPE1 Block Address", 0}, 369 {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (Pm1EventLength), "PM1 Event Block Length", 0}, 370 {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (Pm1ControlLength), "PM1 Control Block Length", 0}, 371 {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (Pm2ControlLength), "PM2 Control Block Length", 0}, 372 {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (PmTimerLength), "PM Timer Block Length", 0}, 373 {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (Gpe0BlockLength), "GPE0 Block Length", 0}, 374 {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (Gpe1BlockLength), "GPE1 Block Length", 0}, 375 {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (Gpe1Base), "GPE1 Base Offset", 0}, 376 {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (CstControl), "_CST Support", 0}, 377 {ACPI_DMT_UINT16, ACPI_FADT_OFFSET (C2Latency), "C2 Latency", 0}, 378 {ACPI_DMT_UINT16, ACPI_FADT_OFFSET (C3Latency), "C3 Latency", 0}, 379 {ACPI_DMT_UINT16, ACPI_FADT_OFFSET (FlushSize), "CPU Cache Size", 0}, 380 {ACPI_DMT_UINT16, ACPI_FADT_OFFSET (FlushStride), "Cache Flush Stride", 0}, 381 {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (DutyOffset), "Duty Cycle Offset", 0}, 382 {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (DutyWidth), "Duty Cycle Width", 0}, 383 {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (DayAlarm), "RTC Day Alarm Index", 0}, 384 {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (MonthAlarm), "RTC Month Alarm Index", 0}, 385 {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (Century), "RTC Century Index", 0}, 386 {ACPI_DMT_UINT16, ACPI_FADT_OFFSET (BootFlags), "Boot Flags (decoded below)", DT_FLAG}, 387 388 /* Boot Architecture Flags byte 0 */ 389 390 {ACPI_DMT_FLAG0, ACPI_FADT_FLAG_OFFSET (BootFlags,0), "Legacy Devices Supported (V2)", 0}, 391 {ACPI_DMT_FLAG1, ACPI_FADT_FLAG_OFFSET (BootFlags,0), "8042 Present on ports 60/64 (V2)", 0}, 392 {ACPI_DMT_FLAG2, ACPI_FADT_FLAG_OFFSET (BootFlags,0), "VGA Not Present (V4)", 0}, 393 {ACPI_DMT_FLAG3, ACPI_FADT_FLAG_OFFSET (BootFlags,0), "MSI Not Supported (V4)", 0}, 394 {ACPI_DMT_FLAG4, ACPI_FADT_FLAG_OFFSET (BootFlags,0), "PCIe ASPM Not Supported (V4)", 0}, 395 {ACPI_DMT_FLAG5, ACPI_FADT_FLAG_OFFSET (BootFlags,0), "CMOS RTC Not Present (V5)", 0}, 396 397 {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (Reserved), "Reserved", 0}, 398 {ACPI_DMT_UINT32, ACPI_FADT_OFFSET (Flags), "Flags (decoded below)", DT_FLAG}, 399 400 /* Flags byte 0 */ 401 402 {ACPI_DMT_FLAG0, ACPI_FADT_FLAG_OFFSET (Flags,0), "WBINVD instruction is operational (V1)", 0}, 403 {ACPI_DMT_FLAG1, ACPI_FADT_FLAG_OFFSET (Flags,0), "WBINVD flushes all caches (V1)", 0}, 404 {ACPI_DMT_FLAG2, ACPI_FADT_FLAG_OFFSET (Flags,0), "All CPUs support C1 (V1)", 0}, 405 {ACPI_DMT_FLAG3, ACPI_FADT_FLAG_OFFSET (Flags,0), "C2 works on MP system (V1)", 0}, 406 {ACPI_DMT_FLAG4, ACPI_FADT_FLAG_OFFSET (Flags,0), "Control Method Power Button (V1)", 0}, 407 {ACPI_DMT_FLAG5, ACPI_FADT_FLAG_OFFSET (Flags,0), "Control Method Sleep Button (V1)", 0}, 408 {ACPI_DMT_FLAG6, ACPI_FADT_FLAG_OFFSET (Flags,0), "RTC wake not in fixed reg space (V1)", 0}, 409 {ACPI_DMT_FLAG7, ACPI_FADT_FLAG_OFFSET (Flags,0), "RTC can wake system from S4 (V1)", 0}, 410 411 /* Flags byte 1 */ 412 413 {ACPI_DMT_FLAG0, ACPI_FADT_FLAG_OFFSET (Flags,1), "32-bit PM Timer (V1)", 0}, 414 {ACPI_DMT_FLAG1, ACPI_FADT_FLAG_OFFSET (Flags,1), "Docking Supported (V1)", 0}, 415 {ACPI_DMT_FLAG2, ACPI_FADT_FLAG_OFFSET (Flags,1), "Reset Register Supported (V2)", 0}, 416 {ACPI_DMT_FLAG3, ACPI_FADT_FLAG_OFFSET (Flags,1), "Sealed Case (V3)", 0}, 417 {ACPI_DMT_FLAG4, ACPI_FADT_FLAG_OFFSET (Flags,1), "Headless - No Video (V3)", 0}, 418 {ACPI_DMT_FLAG5, ACPI_FADT_FLAG_OFFSET (Flags,1), "Use native instr after SLP_TYPx (V3)", 0}, 419 {ACPI_DMT_FLAG6, ACPI_FADT_FLAG_OFFSET (Flags,1), "PCIEXP_WAK Bits Supported (V4)", 0}, 420 {ACPI_DMT_FLAG7, ACPI_FADT_FLAG_OFFSET (Flags,1), "Use Platform Timer (V4)", 0}, 421 422 /* Flags byte 2 */ 423 424 {ACPI_DMT_FLAG0, ACPI_FADT_FLAG_OFFSET (Flags,2), "RTC_STS valid on S4 wake (V4)", 0}, 425 {ACPI_DMT_FLAG1, ACPI_FADT_FLAG_OFFSET (Flags,2), "Remote Power-on capable (V4)", 0}, 426 {ACPI_DMT_FLAG2, ACPI_FADT_FLAG_OFFSET (Flags,2), "Use APIC Cluster Model (V4)", 0}, 427 {ACPI_DMT_FLAG3, ACPI_FADT_FLAG_OFFSET (Flags,2), "Use APIC Physical Destination Mode (V4)", 0}, 428 {ACPI_DMT_FLAG4, ACPI_FADT_FLAG_OFFSET (Flags,2), "Hardware Reduced (V5)", 0}, 429 {ACPI_DMT_FLAG5, ACPI_FADT_FLAG_OFFSET (Flags,2), "Low Power S0 Idle (V5)", 0}, 430 ACPI_DMT_TERMINATOR 431 }; 432 433 /* ACPI 1.0 MS Extensions (FADT version 2) */ 434 435 ACPI_DMTABLE_INFO AcpiDmTableInfoFadt2[] = 436 { 437 {ACPI_DMT_GAS, ACPI_FADT_OFFSET (ResetRegister), "Reset Register", 0}, 438 {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (ResetValue), "Value to cause reset", 0}, 439 {ACPI_DMT_UINT24, ACPI_FADT_OFFSET (Reserved4[0]), "Reserved", 0}, 440 ACPI_DMT_TERMINATOR 441 }; 442 443 /* ACPI 2.0+ Extensions (FADT version 3 and 4) */ 444 445 ACPI_DMTABLE_INFO AcpiDmTableInfoFadt3[] = 446 { 447 {ACPI_DMT_GAS, ACPI_FADT_OFFSET (ResetRegister), "Reset Register", 0}, 448 {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (ResetValue), "Value to cause reset", 0}, 449 {ACPI_DMT_UINT24, ACPI_FADT_OFFSET (Reserved4[0]), "Reserved", 0}, 450 {ACPI_DMT_UINT64, ACPI_FADT_OFFSET (XFacs), "FACS Address", 0}, 451 {ACPI_DMT_UINT64, ACPI_FADT_OFFSET (XDsdt), "DSDT Address", 0}, 452 {ACPI_DMT_GAS, ACPI_FADT_OFFSET (XPm1aEventBlock), "PM1A Event Block", 0}, 453 {ACPI_DMT_GAS, ACPI_FADT_OFFSET (XPm1bEventBlock), "PM1B Event Block", 0}, 454 {ACPI_DMT_GAS, ACPI_FADT_OFFSET (XPm1aControlBlock), "PM1A Control Block", 0}, 455 {ACPI_DMT_GAS, ACPI_FADT_OFFSET (XPm1bControlBlock), "PM1B Control Block", 0}, 456 {ACPI_DMT_GAS, ACPI_FADT_OFFSET (XPm2ControlBlock), "PM2 Control Block", 0}, 457 {ACPI_DMT_GAS, ACPI_FADT_OFFSET (XPmTimerBlock), "PM Timer Block", 0}, 458 {ACPI_DMT_GAS, ACPI_FADT_OFFSET (XGpe0Block), "GPE0 Block", 0}, 459 {ACPI_DMT_GAS, ACPI_FADT_OFFSET (XGpe1Block), "GPE1 Block", 0}, 460 ACPI_DMT_TERMINATOR 461 }; 462 463 /* ACPI 5.0 Extensions (FADT version 5) */ 464 465 ACPI_DMTABLE_INFO AcpiDmTableInfoFadt5[] = 466 { 467 {ACPI_DMT_GAS, ACPI_FADT_OFFSET (SleepControl), "Sleep Control Register", 0}, 468 {ACPI_DMT_GAS, ACPI_FADT_OFFSET (SleepStatus), "Sleep Status Register", 0}, 469 ACPI_DMT_TERMINATOR 470 }; 471 472 473 /* 474 * Remaining tables are not consumed directly by the ACPICA subsystem 475 */ 476 477 /******************************************************************************* 478 * 479 * ASF - Alert Standard Format table (Signature "ASF!") 480 * 481 ******************************************************************************/ 482 483 /* Common Subtable header (one per Subtable) */ 484 485 ACPI_DMTABLE_INFO AcpiDmTableInfoAsfHdr[] = 486 { 487 {ACPI_DMT_ASF, ACPI_ASF0_OFFSET (Header.Type), "Subtable Type", 0}, 488 {ACPI_DMT_UINT8, ACPI_ASF0_OFFSET (Header.Reserved), "Reserved", 0}, 489 {ACPI_DMT_UINT16, ACPI_ASF0_OFFSET (Header.Length), "Length", DT_LENGTH}, 490 ACPI_DMT_TERMINATOR 491 }; 492 493 /* 0: ASF Information */ 494 495 ACPI_DMTABLE_INFO AcpiDmTableInfoAsf0[] = 496 { 497 {ACPI_DMT_UINT8, ACPI_ASF0_OFFSET (MinResetValue), "Minimum Reset Value", 0}, 498 {ACPI_DMT_UINT8, ACPI_ASF0_OFFSET (MinPollInterval), "Minimum Polling Interval", 0}, 499 {ACPI_DMT_UINT16, ACPI_ASF0_OFFSET (SystemId), "System ID", 0}, 500 {ACPI_DMT_UINT32, ACPI_ASF0_OFFSET (MfgId), "Manufacturer ID", 0}, 501 {ACPI_DMT_UINT8, ACPI_ASF0_OFFSET (Flags), "Flags", 0}, 502 {ACPI_DMT_UINT24, ACPI_ASF0_OFFSET (Reserved2[0]), "Reserved", 0}, 503 ACPI_DMT_TERMINATOR 504 }; 505 506 /* 1: ASF Alerts */ 507 508 ACPI_DMTABLE_INFO AcpiDmTableInfoAsf1[] = 509 { 510 {ACPI_DMT_UINT8, ACPI_ASF1_OFFSET (AssertMask), "AssertMask", 0}, 511 {ACPI_DMT_UINT8, ACPI_ASF1_OFFSET (DeassertMask), "DeassertMask", 0}, 512 {ACPI_DMT_UINT8, ACPI_ASF1_OFFSET (Alerts), "Alert Count", 0}, 513 {ACPI_DMT_UINT8, ACPI_ASF1_OFFSET (DataLength), "Alert Data Length", 0}, 514 ACPI_DMT_TERMINATOR 515 }; 516 517 /* 1a: ASF Alert data */ 518 519 ACPI_DMTABLE_INFO AcpiDmTableInfoAsf1a[] = 520 { 521 {ACPI_DMT_UINT8, ACPI_ASF1a_OFFSET (Address), "Address", 0}, 522 {ACPI_DMT_UINT8, ACPI_ASF1a_OFFSET (Command), "Command", 0}, 523 {ACPI_DMT_UINT8, ACPI_ASF1a_OFFSET (Mask), "Mask", 0}, 524 {ACPI_DMT_UINT8, ACPI_ASF1a_OFFSET (Value), "Value", 0}, 525 {ACPI_DMT_UINT8, ACPI_ASF1a_OFFSET (SensorType), "SensorType", 0}, 526 {ACPI_DMT_UINT8, ACPI_ASF1a_OFFSET (Type), "Type", 0}, 527 {ACPI_DMT_UINT8, ACPI_ASF1a_OFFSET (Offset), "Offset", 0}, 528 {ACPI_DMT_UINT8, ACPI_ASF1a_OFFSET (SourceType), "SourceType", 0}, 529 {ACPI_DMT_UINT8, ACPI_ASF1a_OFFSET (Severity), "Severity", 0}, 530 {ACPI_DMT_UINT8, ACPI_ASF1a_OFFSET (SensorNumber), "SensorNumber", 0}, 531 {ACPI_DMT_UINT8, ACPI_ASF1a_OFFSET (Entity), "Entity", 0}, 532 {ACPI_DMT_UINT8, ACPI_ASF1a_OFFSET (Instance), "Instance", 0}, 533 ACPI_DMT_TERMINATOR 534 }; 535 536 /* 2: ASF Remote Control */ 537 538 ACPI_DMTABLE_INFO AcpiDmTableInfoAsf2[] = 539 { 540 {ACPI_DMT_UINT8, ACPI_ASF2_OFFSET (Controls), "Control Count", 0}, 541 {ACPI_DMT_UINT8, ACPI_ASF2_OFFSET (DataLength), "Control Data Length", 0}, 542 {ACPI_DMT_UINT16, ACPI_ASF2_OFFSET (Reserved2), "Reserved", 0}, 543 ACPI_DMT_TERMINATOR 544 }; 545 546 /* 2a: ASF Control data */ 547 548 ACPI_DMTABLE_INFO AcpiDmTableInfoAsf2a[] = 549 { 550 {ACPI_DMT_UINT8, ACPI_ASF2a_OFFSET (Function), "Function", 0}, 551 {ACPI_DMT_UINT8, ACPI_ASF2a_OFFSET (Address), "Address", 0}, 552 {ACPI_DMT_UINT8, ACPI_ASF2a_OFFSET (Command), "Command", 0}, 553 {ACPI_DMT_UINT8, ACPI_ASF2a_OFFSET (Value), "Value", 0}, 554 ACPI_DMT_TERMINATOR 555 }; 556 557 /* 3: ASF RMCP Boot Options */ 558 559 ACPI_DMTABLE_INFO AcpiDmTableInfoAsf3[] = 560 { 561 {ACPI_DMT_BUF7, ACPI_ASF3_OFFSET (Capabilities[0]), "Capabilities", 0}, 562 {ACPI_DMT_UINT8, ACPI_ASF3_OFFSET (CompletionCode), "Completion Code", 0}, 563 {ACPI_DMT_UINT32, ACPI_ASF3_OFFSET (EnterpriseId), "Enterprise ID", 0}, 564 {ACPI_DMT_UINT8, ACPI_ASF3_OFFSET (Command), "Command", 0}, 565 {ACPI_DMT_UINT16, ACPI_ASF3_OFFSET (Parameter), "Parameter", 0}, 566 {ACPI_DMT_UINT16, ACPI_ASF3_OFFSET (BootOptions), "Boot Options", 0}, 567 {ACPI_DMT_UINT16, ACPI_ASF3_OFFSET (OemParameters), "Oem Parameters", 0}, 568 ACPI_DMT_TERMINATOR 569 }; 570 571 /* 4: ASF Address */ 572 573 ACPI_DMTABLE_INFO AcpiDmTableInfoAsf4[] = 574 { 575 {ACPI_DMT_UINT8, ACPI_ASF4_OFFSET (EpromAddress), "Eprom Address", 0}, 576 {ACPI_DMT_UINT8, ACPI_ASF4_OFFSET (Devices), "Device Count", DT_COUNT}, 577 ACPI_DMT_TERMINATOR 578 }; 579 580 581 /******************************************************************************* 582 * 583 * BERT - Boot Error Record table 584 * 585 ******************************************************************************/ 586 587 ACPI_DMTABLE_INFO AcpiDmTableInfoBert[] = 588 { 589 {ACPI_DMT_UINT32, ACPI_BERT_OFFSET (RegionLength), "Boot Error Region Length", 0}, 590 {ACPI_DMT_UINT64, ACPI_BERT_OFFSET (Address), "Boot Error Region Address", 0}, 591 ACPI_DMT_TERMINATOR 592 }; 593 594 595 /******************************************************************************* 596 * 597 * BGRT - Boot Graphics Resource Table (ACPI 5.0) 598 * 599 ******************************************************************************/ 600 601 ACPI_DMTABLE_INFO AcpiDmTableInfoBgrt[] = 602 { 603 {ACPI_DMT_UINT16, ACPI_BGRT_OFFSET (Version), "Version", 0}, 604 {ACPI_DMT_UINT8, ACPI_BGRT_OFFSET (Status), "Status", 0}, 605 {ACPI_DMT_UINT8, ACPI_BGRT_OFFSET (ImageType), "Image Type", 0}, 606 {ACPI_DMT_UINT64, ACPI_BGRT_OFFSET (ImageAddress), "Image Address", 0}, 607 {ACPI_DMT_UINT32, ACPI_BGRT_OFFSET (ImageOffsetX), "Image OffsetX", 0}, 608 {ACPI_DMT_UINT32, ACPI_BGRT_OFFSET (ImageOffsetY), "Image OffsetY", 0}, 609 ACPI_DMT_TERMINATOR 610 }; 611 612 613 /******************************************************************************* 614 * 615 * BOOT - Simple Boot Flag Table 616 * 617 ******************************************************************************/ 618 619 ACPI_DMTABLE_INFO AcpiDmTableInfoBoot[] = 620 { 621 {ACPI_DMT_UINT8, ACPI_BOOT_OFFSET (CmosIndex), "Boot Register Index", 0}, 622 {ACPI_DMT_UINT24, ACPI_BOOT_OFFSET (Reserved[0]), "Reserved", 0}, 623 ACPI_DMT_TERMINATOR 624 }; 625 626 627 /******************************************************************************* 628 * 629 * CPEP - Corrected Platform Error Polling table 630 * 631 ******************************************************************************/ 632 633 ACPI_DMTABLE_INFO AcpiDmTableInfoCpep[] = 634 { 635 {ACPI_DMT_UINT64, ACPI_CPEP_OFFSET (Reserved), "Reserved", 0}, 636 ACPI_DMT_TERMINATOR 637 }; 638 639 ACPI_DMTABLE_INFO AcpiDmTableInfoCpep0[] = 640 { 641 {ACPI_DMT_UINT8, ACPI_CPEP0_OFFSET (Header.Type), "Subtable Type", 0}, 642 {ACPI_DMT_UINT8, ACPI_CPEP0_OFFSET (Header.Length), "Length", DT_LENGTH}, 643 {ACPI_DMT_UINT8, ACPI_CPEP0_OFFSET (Id), "Processor ID", 0}, 644 {ACPI_DMT_UINT8, ACPI_CPEP0_OFFSET (Eid), "Processor EID", 0}, 645 {ACPI_DMT_UINT32, ACPI_CPEP0_OFFSET (Interval), "Polling Interval", 0}, 646 ACPI_DMT_TERMINATOR 647 }; 648 649 650 /******************************************************************************* 651 * 652 * CSRT - Core System Resource Table 653 * 654 ******************************************************************************/ 655 656 /* Main table consists only of the standard ACPI table header */ 657 658 /* Resource Group subtable */ 659 660 ACPI_DMTABLE_INFO AcpiDmTableInfoCsrt0[] = 661 { 662 {ACPI_DMT_UINT32, ACPI_CSRT0_OFFSET (Length), "Length", 0}, 663 {ACPI_DMT_UINT32, ACPI_CSRT0_OFFSET (VendorId), "Vendor ID", 0}, 664 {ACPI_DMT_UINT32, ACPI_CSRT0_OFFSET (SubvendorId), "Subvendor ID", 0}, 665 {ACPI_DMT_UINT16, ACPI_CSRT0_OFFSET (DeviceId), "Device ID", 0}, 666 {ACPI_DMT_UINT16, ACPI_CSRT0_OFFSET (SubdeviceId), "Subdevice ID", 0}, 667 {ACPI_DMT_UINT16, ACPI_CSRT0_OFFSET (Revision), "Revision", 0}, 668 {ACPI_DMT_UINT16, ACPI_CSRT0_OFFSET (Reserved), "Reserved", 0}, 669 {ACPI_DMT_UINT32, ACPI_CSRT0_OFFSET (SharedInfoLength), "Shared Info Length", 0}, 670 ACPI_DMT_TERMINATOR 671 }; 672 673 /* Shared Info subtable */ 674 675 ACPI_DMTABLE_INFO AcpiDmTableInfoCsrt1[] = 676 { 677 {ACPI_DMT_UINT16, ACPI_CSRT1_OFFSET (MajorVersion), "Major Version", 0}, 678 {ACPI_DMT_UINT16, ACPI_CSRT1_OFFSET (MinorVersion), "Minor Version", 0}, 679 {ACPI_DMT_UINT32, ACPI_CSRT1_OFFSET (MmioBaseLow), "MMIO Base Address Low", 0}, 680 {ACPI_DMT_UINT32, ACPI_CSRT1_OFFSET (MmioBaseHigh), "MMIO Base Address High", 0}, 681 {ACPI_DMT_UINT32, ACPI_CSRT1_OFFSET (GsiInterrupt), "GSI Interrupt", 0}, 682 {ACPI_DMT_UINT8, ACPI_CSRT1_OFFSET (InterruptPolarity), "Interrupt Polarity", 0}, 683 {ACPI_DMT_UINT8, ACPI_CSRT1_OFFSET (InterruptMode), "Interrupt Mode", 0}, 684 {ACPI_DMT_UINT8, ACPI_CSRT1_OFFSET (NumChannels), "Num Channels", 0}, 685 {ACPI_DMT_UINT8, ACPI_CSRT1_OFFSET (DmaAddressWidth), "DMA Address Width", 0}, 686 {ACPI_DMT_UINT16, ACPI_CSRT1_OFFSET (BaseRequestLine), "Base Request Line", 0}, 687 {ACPI_DMT_UINT16, ACPI_CSRT1_OFFSET (NumHandshakeSignals), "Num Handshake Signals", 0}, 688 {ACPI_DMT_UINT32, ACPI_CSRT1_OFFSET (MaxBlockSize), "Max Block Size", 0}, 689 ACPI_DMT_TERMINATOR 690 }; 691 692 693 /* Resource Descriptor subtable */ 694 695 ACPI_DMTABLE_INFO AcpiDmTableInfoCsrt2[] = 696 { 697 {ACPI_DMT_UINT32, ACPI_CSRT2_OFFSET (Length), "Length", 0}, 698 {ACPI_DMT_UINT16, ACPI_CSRT2_OFFSET (Type), "Type", 0}, 699 {ACPI_DMT_UINT16, ACPI_CSRT2_OFFSET (Subtype), "Subtype", 0}, 700 {ACPI_DMT_UINT32, ACPI_CSRT2_OFFSET (Uid), "UID", 0}, 701 ACPI_DMT_TERMINATOR 702 }; 703 704 705 /******************************************************************************* 706 * 707 * DBG2 - Debug Port Table 2 708 * 709 ******************************************************************************/ 710 711 ACPI_DMTABLE_INFO AcpiDmTableInfoDbg2[] = 712 { 713 {ACPI_DMT_UINT32, ACPI_DBG2_OFFSET (InfoOffset), "Info Offset", 0}, 714 {ACPI_DMT_UINT32, ACPI_DBG2_OFFSET (InfoCount), "Info Count", 0}, 715 ACPI_DMT_TERMINATOR 716 }; 717 718 /* Debug Device Information Subtable */ 719 720 ACPI_DMTABLE_INFO AcpiDmTableInfoDbg2Device[] = 721 { 722 {ACPI_DMT_UINT8, ACPI_DBG20_OFFSET (Revision), "Revision", 0}, 723 {ACPI_DMT_UINT16, ACPI_DBG20_OFFSET (Length), "Length", DT_LENGTH}, 724 {ACPI_DMT_UINT8, ACPI_DBG20_OFFSET (RegisterCount), "Register Count", 0}, 725 {ACPI_DMT_UINT16, ACPI_DBG20_OFFSET (NamepathLength), "Namepath Length", 0}, 726 {ACPI_DMT_UINT16, ACPI_DBG20_OFFSET (NamepathOffset), "Namepath Offset", 0}, 727 {ACPI_DMT_UINT16, ACPI_DBG20_OFFSET (OemDataLength), "OEM Data Length", DT_DESCRIBES_OPTIONAL}, 728 {ACPI_DMT_UINT16, ACPI_DBG20_OFFSET (OemDataOffset), "OEM Data Offset", DT_DESCRIBES_OPTIONAL}, 729 {ACPI_DMT_UINT16, ACPI_DBG20_OFFSET (PortType), "Port Type", 0}, 730 {ACPI_DMT_UINT16, ACPI_DBG20_OFFSET (PortSubtype), "Port Subtype", 0}, 731 {ACPI_DMT_UINT16, ACPI_DBG20_OFFSET (Reserved), "Reserved", 0}, 732 {ACPI_DMT_UINT16, ACPI_DBG20_OFFSET (BaseAddressOffset), "Base Address Offset", 0}, 733 {ACPI_DMT_UINT16, ACPI_DBG20_OFFSET (AddressSizeOffset), "Address Size Offset", 0}, 734 ACPI_DMT_TERMINATOR 735 }; 736 737 /* Variable-length data for the subtable */ 738 739 ACPI_DMTABLE_INFO AcpiDmTableInfoDbg2Addr[] = 740 { 741 {ACPI_DMT_GAS, 0, "Base Address Register", 0}, 742 ACPI_DMT_TERMINATOR 743 }; 744 745 ACPI_DMTABLE_INFO AcpiDmTableInfoDbg2Size[] = 746 { 747 {ACPI_DMT_UINT32, 0, "Address Size", 0}, 748 ACPI_DMT_TERMINATOR 749 }; 750 751 ACPI_DMTABLE_INFO AcpiDmTableInfoDbg2Name[] = 752 { 753 {ACPI_DMT_STRING, 0, "Namepath", 0}, 754 ACPI_DMT_TERMINATOR 755 }; 756 757 ACPI_DMTABLE_INFO AcpiDmTableInfoDbg2OemData[] = 758 { 759 {ACPI_DMT_BUFFER, 0, "OEM Data", DT_OPTIONAL}, 760 ACPI_DMT_TERMINATOR 761 }; 762 763 764 /******************************************************************************* 765 * 766 * DBGP - Debug Port 767 * 768 ******************************************************************************/ 769 770 ACPI_DMTABLE_INFO AcpiDmTableInfoDbgp[] = 771 { 772 {ACPI_DMT_UINT8, ACPI_DBGP_OFFSET (Type), "Interface Type", 0}, 773 {ACPI_DMT_UINT24, ACPI_DBGP_OFFSET (Reserved[0]), "Reserved", 0}, 774 {ACPI_DMT_GAS, ACPI_DBGP_OFFSET (DebugPort), "Debug Port Register", 0}, 775 ACPI_DMT_TERMINATOR 776 }; 777 778 779 /******************************************************************************* 780 * 781 * DMAR - DMA Remapping table 782 * 783 ******************************************************************************/ 784 785 ACPI_DMTABLE_INFO AcpiDmTableInfoDmar[] = 786 { 787 {ACPI_DMT_UINT8, ACPI_DMAR_OFFSET (Width), "Host Address Width", 0}, 788 {ACPI_DMT_UINT8, ACPI_DMAR_OFFSET (Flags), "Flags", 0}, 789 {ACPI_DMT_BUF10, ACPI_DMAR_OFFSET (Reserved[0]), "Reserved", 0}, 790 ACPI_DMT_TERMINATOR 791 }; 792 793 /* Common Subtable header (one per Subtable) */ 794 795 ACPI_DMTABLE_INFO AcpiDmTableInfoDmarHdr[] = 796 { 797 {ACPI_DMT_DMAR, ACPI_DMAR0_OFFSET (Header.Type), "Subtable Type", 0}, 798 {ACPI_DMT_UINT16, ACPI_DMAR0_OFFSET (Header.Length), "Length", DT_LENGTH}, 799 ACPI_DMT_TERMINATOR 800 }; 801 802 /* Common device scope entry */ 803 804 ACPI_DMTABLE_INFO AcpiDmTableInfoDmarScope[] = 805 { 806 {ACPI_DMT_UINT8, ACPI_DMARS_OFFSET (EntryType), "Device Scope Entry Type", 0}, 807 {ACPI_DMT_UINT8, ACPI_DMARS_OFFSET (Length), "Entry Length", DT_LENGTH}, 808 {ACPI_DMT_UINT16, ACPI_DMARS_OFFSET (Reserved), "Reserved", 0}, 809 {ACPI_DMT_UINT8, ACPI_DMARS_OFFSET (EnumerationId), "Enumeration ID", 0}, 810 {ACPI_DMT_UINT8, ACPI_DMARS_OFFSET (Bus), "PCI Bus Number", 0}, 811 ACPI_DMT_TERMINATOR 812 }; 813 814 /* DMAR Subtables */ 815 816 /* 0: Hardware Unit Definition */ 817 818 ACPI_DMTABLE_INFO AcpiDmTableInfoDmar0[] = 819 { 820 {ACPI_DMT_UINT8, ACPI_DMAR0_OFFSET (Flags), "Flags", 0}, 821 {ACPI_DMT_UINT8, ACPI_DMAR0_OFFSET (Reserved), "Reserved", 0}, 822 {ACPI_DMT_UINT16, ACPI_DMAR0_OFFSET (Segment), "PCI Segment Number", 0}, 823 {ACPI_DMT_UINT64, ACPI_DMAR0_OFFSET (Address), "Register Base Address", 0}, 824 ACPI_DMT_TERMINATOR 825 }; 826 827 /* 1: Reserved Memory Definition */ 828 829 ACPI_DMTABLE_INFO AcpiDmTableInfoDmar1[] = 830 { 831 {ACPI_DMT_UINT16, ACPI_DMAR1_OFFSET (Reserved), "Reserved", 0}, 832 {ACPI_DMT_UINT16, ACPI_DMAR1_OFFSET (Segment), "PCI Segment Number", 0}, 833 {ACPI_DMT_UINT64, ACPI_DMAR1_OFFSET (BaseAddress), "Base Address", 0}, 834 {ACPI_DMT_UINT64, ACPI_DMAR1_OFFSET (EndAddress), "End Address (limit)", 0}, 835 ACPI_DMT_TERMINATOR 836 }; 837 838 /* 2: Root Port ATS Capability Definition */ 839 840 ACPI_DMTABLE_INFO AcpiDmTableInfoDmar2[] = 841 { 842 {ACPI_DMT_UINT8, ACPI_DMAR2_OFFSET (Flags), "Flags", 0}, 843 {ACPI_DMT_UINT8, ACPI_DMAR2_OFFSET (Reserved), "Reserved", 0}, 844 {ACPI_DMT_UINT16, ACPI_DMAR2_OFFSET (Segment), "PCI Segment Number", 0}, 845 ACPI_DMT_TERMINATOR 846 }; 847 848 /* 3: Remapping Hardware Static Affinity Structure */ 849 850 ACPI_DMTABLE_INFO AcpiDmTableInfoDmar3[] = 851 { 852 {ACPI_DMT_UINT32, ACPI_DMAR3_OFFSET (Reserved), "Reserved", 0}, 853 {ACPI_DMT_UINT64, ACPI_DMAR3_OFFSET (BaseAddress), "Base Address", 0}, 854 {ACPI_DMT_UINT32, ACPI_DMAR3_OFFSET (ProximityDomain), "Proximity Domain", 0}, 855 ACPI_DMT_TERMINATOR 856 }; 857 858 859 /******************************************************************************* 860 * 861 * DRTM - Dynamic Root of Trust for Measurement table 862 * 863 ******************************************************************************/ 864 865 ACPI_DMTABLE_INFO AcpiDmTableInfoDrtm[] = 866 { 867 868 ACPI_DMT_TERMINATOR 869 }; 870 871 872 /******************************************************************************* 873 * 874 * ECDT - Embedded Controller Boot Resources Table 875 * 876 ******************************************************************************/ 877 878 ACPI_DMTABLE_INFO AcpiDmTableInfoEcdt[] = 879 { 880 {ACPI_DMT_GAS, ACPI_ECDT_OFFSET (Control), "Command/Status Register", 0}, 881 {ACPI_DMT_GAS, ACPI_ECDT_OFFSET (Data), "Data Register", 0}, 882 {ACPI_DMT_UINT32, ACPI_ECDT_OFFSET (Uid), "UID", 0}, 883 {ACPI_DMT_UINT8, ACPI_ECDT_OFFSET (Gpe), "GPE Number", 0}, 884 {ACPI_DMT_STRING, ACPI_ECDT_OFFSET (Id[0]), "Namepath", 0}, 885 ACPI_DMT_TERMINATOR 886 }; 887 888 889 /******************************************************************************* 890 * 891 * EINJ - Error Injection table 892 * 893 ******************************************************************************/ 894 895 ACPI_DMTABLE_INFO AcpiDmTableInfoEinj[] = 896 { 897 {ACPI_DMT_UINT32, ACPI_EINJ_OFFSET (HeaderLength), "Injection Header Length", 0}, 898 {ACPI_DMT_UINT8, ACPI_EINJ_OFFSET (Flags), "Flags", 0}, 899 {ACPI_DMT_UINT24, ACPI_EINJ_OFFSET (Reserved[0]), "Reserved", 0}, 900 {ACPI_DMT_UINT32, ACPI_EINJ_OFFSET (Entries), "Injection Entry Count", 0}, 901 ACPI_DMT_TERMINATOR 902 }; 903 904 ACPI_DMTABLE_INFO AcpiDmTableInfoEinj0[] = 905 { 906 {ACPI_DMT_EINJACT, ACPI_EINJ0_OFFSET (Action), "Action", 0}, 907 {ACPI_DMT_EINJINST, ACPI_EINJ0_OFFSET (Instruction), "Instruction", 0}, 908 {ACPI_DMT_UINT8, ACPI_EINJ0_OFFSET (Flags), "Flags (decoded below)", DT_FLAG}, 909 {ACPI_DMT_FLAG0, ACPI_EINJ0_FLAG_OFFSET (Flags,0), "Preserve Register Bits", 0}, 910 911 {ACPI_DMT_UINT8, ACPI_EINJ0_OFFSET (Reserved), "Reserved", 0}, 912 {ACPI_DMT_GAS, ACPI_EINJ0_OFFSET (RegisterRegion), "Register Region", 0}, 913 {ACPI_DMT_UINT64, ACPI_EINJ0_OFFSET (Value), "Value", 0}, 914 {ACPI_DMT_UINT64, ACPI_EINJ0_OFFSET (Mask), "Mask", 0}, 915 ACPI_DMT_TERMINATOR 916 }; 917 918 919 /******************************************************************************* 920 * 921 * ERST - Error Record Serialization table 922 * 923 ******************************************************************************/ 924 925 ACPI_DMTABLE_INFO AcpiDmTableInfoErst[] = 926 { 927 {ACPI_DMT_UINT32, ACPI_ERST_OFFSET (HeaderLength), "Serialization Header Length", 0}, 928 {ACPI_DMT_UINT32, ACPI_ERST_OFFSET (Reserved), "Reserved", 0}, 929 {ACPI_DMT_UINT32, ACPI_ERST_OFFSET (Entries), "Instruction Entry Count", 0}, 930 ACPI_DMT_TERMINATOR 931 }; 932 933 ACPI_DMTABLE_INFO AcpiDmTableInfoErst0[] = 934 { 935 {ACPI_DMT_ERSTACT, ACPI_ERST0_OFFSET (Action), "Action", 0}, 936 {ACPI_DMT_ERSTINST, ACPI_ERST0_OFFSET (Instruction), "Instruction", 0}, 937 {ACPI_DMT_UINT8, ACPI_ERST0_OFFSET (Flags), "Flags (decoded below)", DT_FLAG}, 938 {ACPI_DMT_FLAG0, ACPI_ERST0_FLAG_OFFSET (Flags,0), "Preserve Register Bits", 0}, 939 940 {ACPI_DMT_UINT8, ACPI_ERST0_OFFSET (Reserved), "Reserved", 0}, 941 {ACPI_DMT_GAS, ACPI_ERST0_OFFSET (RegisterRegion), "Register Region", 0}, 942 {ACPI_DMT_UINT64, ACPI_ERST0_OFFSET (Value), "Value", 0}, 943 {ACPI_DMT_UINT64, ACPI_ERST0_OFFSET (Mask), "Mask", 0}, 944 ACPI_DMT_TERMINATOR 945 }; 946 947 948 /******************************************************************************* 949 * 950 * FPDT - Firmware Performance Data Table (ACPI 5.0) 951 * 952 ******************************************************************************/ 953 954 /* Main table consists of only the standard ACPI header - subtables follow */ 955 956 /* FPDT subtable header */ 957 958 ACPI_DMTABLE_INFO AcpiDmTableInfoFpdtHdr[] = 959 { 960 {ACPI_DMT_UINT16, ACPI_FPDTH_OFFSET (Type), "Subtable Type", 0}, 961 {ACPI_DMT_UINT8, ACPI_FPDTH_OFFSET (Length), "Length", DT_LENGTH}, 962 {ACPI_DMT_UINT8, ACPI_FPDTH_OFFSET (Revision), "Revision", 0}, 963 ACPI_DMT_TERMINATOR 964 }; 965 966 /* 0: Firmware Basic Boot Performance Record */ 967 968 ACPI_DMTABLE_INFO AcpiDmTableInfoFpdt0[] = 969 { 970 {ACPI_DMT_UINT32, ACPI_FPDT0_OFFSET (Reserved), "Reserved", 0}, 971 {ACPI_DMT_UINT64, ACPI_FPDT0_OFFSET (ResetEnd), "Reset End", 0}, 972 {ACPI_DMT_UINT64, ACPI_FPDT0_OFFSET (LoadStart), "Load Image Start", 0}, 973 {ACPI_DMT_UINT64, ACPI_FPDT0_OFFSET (StartupStart), "Start Image Start", 0}, 974 {ACPI_DMT_UINT64, ACPI_FPDT0_OFFSET (ExitServicesEntry), "Exit Services Entry", 0}, 975 {ACPI_DMT_UINT64, ACPI_FPDT0_OFFSET (ExitServicesExit), "Exit Services Exit", 0}, 976 ACPI_DMT_TERMINATOR 977 }; 978 979 /* 1: S3 Performance Table Pointer Record */ 980 981 ACPI_DMTABLE_INFO AcpiDmTableInfoFpdt1[] = 982 { 983 {ACPI_DMT_UINT32, ACPI_FPDT1_OFFSET (Reserved), "Reserved", 0}, 984 {ACPI_DMT_UINT64, ACPI_FPDT1_OFFSET (Address), "S3PT Address", 0}, 985 ACPI_DMT_TERMINATOR 986 }; 987 988 989 /******************************************************************************* 990 * 991 * GTDT - Generic Timer Description Table 992 * 993 ******************************************************************************/ 994 995 ACPI_DMTABLE_INFO AcpiDmTableInfoGtdt[] = 996 { 997 {ACPI_DMT_UINT64, ACPI_GTDT_OFFSET (Address), "Timer Address", 0}, 998 {ACPI_DMT_UINT32, ACPI_GTDT_OFFSET (Flags), "Flags (decoded below)", DT_FLAG}, 999 {ACPI_DMT_FLAG0, ACPI_GTDT_FLAG_OFFSET (Flags,0), "Memory Present", 0}, 1000 ACPI_DMT_NEW_LINE, 1001 {ACPI_DMT_UINT32, ACPI_GTDT_OFFSET (SecurePl1Interrupt), "Secure PL1 Interrupt", 0}, 1002 {ACPI_DMT_UINT32, ACPI_GTDT_OFFSET (SecurePl1Flags), "SPL1 Flags (decoded below)", DT_FLAG}, 1003 {ACPI_DMT_FLAG0, ACPI_GTDT_FLAG_OFFSET (SecurePl1Flags,0), "Trigger Mode", 0}, 1004 {ACPI_DMT_FLAG1, ACPI_GTDT_FLAG_OFFSET (SecurePl1Flags,0), "Polarity", 0}, 1005 ACPI_DMT_NEW_LINE, 1006 {ACPI_DMT_UINT32, ACPI_GTDT_OFFSET (NonSecurePl1Interrupt), "Non-Secure PL1 Interrupt", 0}, 1007 {ACPI_DMT_UINT32, ACPI_GTDT_OFFSET (NonSecurePl1Flags), "NSPL1 Flags (decoded below)", DT_FLAG}, 1008 {ACPI_DMT_FLAG0, ACPI_GTDT_FLAG_OFFSET (NonSecurePl1Flags,0),"Trigger Mode", 0}, 1009 {ACPI_DMT_FLAG1, ACPI_GTDT_FLAG_OFFSET (NonSecurePl1Flags,0),"Polarity", 0}, 1010 ACPI_DMT_NEW_LINE, 1011 {ACPI_DMT_UINT32, ACPI_GTDT_OFFSET (VirtualTimerInterrupt), "Virtual Timer Interrupt", 0}, 1012 {ACPI_DMT_UINT32, ACPI_GTDT_OFFSET (VirtualTimerFlags), "VT Flags (decoded below)", DT_FLAG}, 1013 {ACPI_DMT_FLAG0, ACPI_GTDT_FLAG_OFFSET (VirtualTimerFlags,0),"Trigger Mode", 0}, 1014 {ACPI_DMT_FLAG1, ACPI_GTDT_FLAG_OFFSET (VirtualTimerFlags,0),"Polarity", 0}, 1015 ACPI_DMT_NEW_LINE, 1016 {ACPI_DMT_UINT32, ACPI_GTDT_OFFSET (NonSecurePl2Interrupt), "Non-Secure PL2 Interrupt", 0}, 1017 {ACPI_DMT_UINT32, ACPI_GTDT_OFFSET (NonSecurePl2Flags), "NSPL2 Flags (decoded below)", DT_FLAG}, 1018 {ACPI_DMT_FLAG0, ACPI_GTDT_FLAG_OFFSET (NonSecurePl2Flags,0),"Trigger Mode", 0}, 1019 {ACPI_DMT_FLAG1, ACPI_GTDT_FLAG_OFFSET (NonSecurePl2Flags,0),"Polarity", 0}, 1020 ACPI_DMT_TERMINATOR 1021 }; 1022 1023 1024 /******************************************************************************* 1025 * 1026 * HEST - Hardware Error Source table 1027 * 1028 ******************************************************************************/ 1029 1030 ACPI_DMTABLE_INFO AcpiDmTableInfoHest[] = 1031 { 1032 {ACPI_DMT_UINT32, ACPI_HEST_OFFSET (ErrorSourceCount), "Error Source Count", 0}, 1033 ACPI_DMT_TERMINATOR 1034 }; 1035 1036 /* Common HEST structures for subtables */ 1037 1038 #define ACPI_DM_HEST_HEADER \ 1039 {ACPI_DMT_HEST, ACPI_HEST0_OFFSET (Header.Type), "Subtable Type", 0}, \ 1040 {ACPI_DMT_UINT16, ACPI_HEST0_OFFSET (Header.SourceId), "Source Id", 0} 1041 1042 #define ACPI_DM_HEST_AER \ 1043 {ACPI_DMT_UINT16, ACPI_HEST6_OFFSET (Aer.Reserved1), "Reserved", 0}, \ 1044 {ACPI_DMT_UINT8, ACPI_HEST6_OFFSET (Aer.Flags), "Flags (decoded below)", DT_FLAG}, \ 1045 {ACPI_DMT_FLAG0, ACPI_HEST6_FLAG_OFFSET (Aer.Flags,0), "Firmware First", 0}, \ 1046 {ACPI_DMT_UINT8, ACPI_HEST6_OFFSET (Aer.Enabled), "Enabled", 0}, \ 1047 {ACPI_DMT_UINT32, ACPI_HEST6_OFFSET (Aer.RecordsToPreallocate), "Records To Preallocate", 0}, \ 1048 {ACPI_DMT_UINT32, ACPI_HEST6_OFFSET (Aer.MaxSectionsPerRecord), "Max Sections Per Record", 0}, \ 1049 {ACPI_DMT_UINT32, ACPI_HEST6_OFFSET (Aer.Bus), "Bus", 0}, \ 1050 {ACPI_DMT_UINT16, ACPI_HEST6_OFFSET (Aer.Device), "Device", 0}, \ 1051 {ACPI_DMT_UINT16, ACPI_HEST6_OFFSET (Aer.Function), "Function", 0}, \ 1052 {ACPI_DMT_UINT16, ACPI_HEST6_OFFSET (Aer.DeviceControl), "DeviceControl", 0}, \ 1053 {ACPI_DMT_UINT16, ACPI_HEST6_OFFSET (Aer.Reserved2), "Reserved", 0}, \ 1054 {ACPI_DMT_UINT32, ACPI_HEST6_OFFSET (Aer.UncorrectableMask), "Uncorrectable Mask", 0}, \ 1055 {ACPI_DMT_UINT32, ACPI_HEST6_OFFSET (Aer.UncorrectableSeverity), "Uncorrectable Severity", 0}, \ 1056 {ACPI_DMT_UINT32, ACPI_HEST6_OFFSET (Aer.CorrectableMask), "Correctable Mask", 0}, \ 1057 {ACPI_DMT_UINT32, ACPI_HEST6_OFFSET (Aer.AdvancedCapabilities), "Advanced Capabilities", 0} 1058 1059 1060 /* HEST Subtables */ 1061 1062 /* 0: IA32 Machine Check Exception */ 1063 1064 ACPI_DMTABLE_INFO AcpiDmTableInfoHest0[] = 1065 { 1066 ACPI_DM_HEST_HEADER, 1067 {ACPI_DMT_UINT16, ACPI_HEST0_OFFSET (Reserved1), "Reserved1", 0}, 1068 {ACPI_DMT_UINT8, ACPI_HEST0_OFFSET (Flags), "Flags (decoded below)", DT_FLAG}, 1069 {ACPI_DMT_FLAG0, ACPI_HEST0_FLAG_OFFSET (Flags,0), "Firmware First", 0}, 1070 1071 {ACPI_DMT_UINT8, ACPI_HEST0_OFFSET (Enabled), "Enabled", 0}, 1072 {ACPI_DMT_UINT32, ACPI_HEST0_OFFSET (RecordsToPreallocate), "Records To Preallocate", 0}, 1073 {ACPI_DMT_UINT32, ACPI_HEST0_OFFSET (MaxSectionsPerRecord), "Max Sections Per Record", 0}, 1074 {ACPI_DMT_UINT64, ACPI_HEST0_OFFSET (GlobalCapabilityData), "Global Capability Data", 0}, 1075 {ACPI_DMT_UINT64, ACPI_HEST0_OFFSET (GlobalControlData), "Global Control Data", 0}, 1076 {ACPI_DMT_UINT8, ACPI_HEST0_OFFSET (NumHardwareBanks), "Num Hardware Banks", 0}, 1077 {ACPI_DMT_UINT56, ACPI_HEST0_OFFSET (Reserved3[0]), "Reserved2", 0}, 1078 ACPI_DMT_TERMINATOR 1079 }; 1080 1081 /* 1: IA32 Corrected Machine Check */ 1082 1083 ACPI_DMTABLE_INFO AcpiDmTableInfoHest1[] = 1084 { 1085 ACPI_DM_HEST_HEADER, 1086 {ACPI_DMT_UINT16, ACPI_HEST1_OFFSET (Reserved1), "Reserved1", 0}, 1087 {ACPI_DMT_UINT8, ACPI_HEST1_OFFSET (Flags), "Flags (decoded below)", DT_FLAG}, 1088 {ACPI_DMT_FLAG0, ACPI_HEST1_FLAG_OFFSET (Flags,0), "Firmware First", 0}, 1089 1090 {ACPI_DMT_UINT8, ACPI_HEST1_OFFSET (Enabled), "Enabled", 0}, 1091 {ACPI_DMT_UINT32, ACPI_HEST1_OFFSET (RecordsToPreallocate), "Records To Preallocate", 0}, 1092 {ACPI_DMT_UINT32, ACPI_HEST1_OFFSET (MaxSectionsPerRecord), "Max Sections Per Record", 0}, 1093 {ACPI_DMT_HESTNTFY, ACPI_HEST1_OFFSET (Notify), "Notify", 0}, 1094 {ACPI_DMT_UINT8, ACPI_HEST1_OFFSET (NumHardwareBanks), "Num Hardware Banks", 0}, 1095 {ACPI_DMT_UINT24, ACPI_HEST1_OFFSET (Reserved2[0]), "Reserved2", 0}, 1096 ACPI_DMT_TERMINATOR 1097 }; 1098 1099 /* 2: IA32 Non-Maskable Interrupt */ 1100 1101 ACPI_DMTABLE_INFO AcpiDmTableInfoHest2[] = 1102 { 1103 ACPI_DM_HEST_HEADER, 1104 {ACPI_DMT_UINT32, ACPI_HEST2_OFFSET (Reserved), "Reserved", 0}, 1105 {ACPI_DMT_UINT32, ACPI_HEST2_OFFSET (RecordsToPreallocate), "Records To Preallocate", 0}, 1106 {ACPI_DMT_UINT32, ACPI_HEST2_OFFSET (MaxSectionsPerRecord), "Max Sections Per Record", 0}, 1107 {ACPI_DMT_UINT32, ACPI_HEST2_OFFSET (MaxRawDataLength), "Max Raw Data Length", 0}, 1108 ACPI_DMT_TERMINATOR 1109 }; 1110 1111 /* 6: PCI Express Root Port AER */ 1112 1113 ACPI_DMTABLE_INFO AcpiDmTableInfoHest6[] = 1114 { 1115 ACPI_DM_HEST_HEADER, 1116 ACPI_DM_HEST_AER, 1117 {ACPI_DMT_UINT32, ACPI_HEST6_OFFSET (RootErrorCommand), "Root Error Command", 0}, 1118 ACPI_DMT_TERMINATOR 1119 }; 1120 1121 /* 7: PCI Express AER (AER Endpoint) */ 1122 1123 ACPI_DMTABLE_INFO AcpiDmTableInfoHest7[] = 1124 { 1125 ACPI_DM_HEST_HEADER, 1126 ACPI_DM_HEST_AER, 1127 ACPI_DMT_TERMINATOR 1128 }; 1129 1130 /* 8: PCI Express/PCI-X Bridge AER */ 1131 1132 ACPI_DMTABLE_INFO AcpiDmTableInfoHest8[] = 1133 { 1134 ACPI_DM_HEST_HEADER, 1135 ACPI_DM_HEST_AER, 1136 {ACPI_DMT_UINT32, ACPI_HEST8_OFFSET (UncorrectableMask2), "2nd Uncorrectable Mask", 0}, 1137 {ACPI_DMT_UINT32, ACPI_HEST8_OFFSET (UncorrectableSeverity2), "2nd Uncorrectable Severity", 0}, 1138 {ACPI_DMT_UINT32, ACPI_HEST8_OFFSET (AdvancedCapabilities2), "2nd Advanced Capabilities", 0}, 1139 ACPI_DMT_TERMINATOR 1140 }; 1141 1142 /* 9: Generic Hardware Error Source */ 1143 1144 ACPI_DMTABLE_INFO AcpiDmTableInfoHest9[] = 1145 { 1146 ACPI_DM_HEST_HEADER, 1147 {ACPI_DMT_UINT16, ACPI_HEST9_OFFSET (RelatedSourceId), "Related Source Id", 0}, 1148 {ACPI_DMT_UINT8, ACPI_HEST9_OFFSET (Reserved), "Reserved", 0}, 1149 {ACPI_DMT_UINT8, ACPI_HEST9_OFFSET (Enabled), "Enabled", 0}, 1150 {ACPI_DMT_UINT32, ACPI_HEST9_OFFSET (RecordsToPreallocate), "Records To Preallocate", 0}, 1151 {ACPI_DMT_UINT32, ACPI_HEST9_OFFSET (MaxSectionsPerRecord), "Max Sections Per Record", 0}, 1152 {ACPI_DMT_UINT32, ACPI_HEST9_OFFSET (MaxRawDataLength), "Max Raw Data Length", 0}, 1153 {ACPI_DMT_GAS, ACPI_HEST9_OFFSET (ErrorStatusAddress), "Error Status Address", 0}, 1154 {ACPI_DMT_HESTNTFY, ACPI_HEST9_OFFSET (Notify), "Notify", 0}, 1155 {ACPI_DMT_UINT32, ACPI_HEST9_OFFSET (ErrorBlockLength), "Error Status Block Length", 0}, 1156 ACPI_DMT_TERMINATOR 1157 }; 1158 1159 ACPI_DMTABLE_INFO AcpiDmTableInfoHestNotify[] = 1160 { 1161 {ACPI_DMT_HESTNTYP, ACPI_HESTN_OFFSET (Type), "Notify Type", 0}, 1162 {ACPI_DMT_UINT8, ACPI_HESTN_OFFSET (Length), "Notify Length", DT_LENGTH}, 1163 {ACPI_DMT_UINT16, ACPI_HESTN_OFFSET (ConfigWriteEnable), "Configuration Write Enable", 0}, 1164 {ACPI_DMT_UINT32, ACPI_HESTN_OFFSET (PollInterval), "PollInterval", 0}, 1165 {ACPI_DMT_UINT32, ACPI_HESTN_OFFSET (Vector), "Vector", 0}, 1166 {ACPI_DMT_UINT32, ACPI_HESTN_OFFSET (PollingThresholdValue), "Polling Threshold Value", 0}, 1167 {ACPI_DMT_UINT32, ACPI_HESTN_OFFSET (PollingThresholdWindow), "Polling Threshold Window", 0}, 1168 {ACPI_DMT_UINT32, ACPI_HESTN_OFFSET (ErrorThresholdValue), "Error Threshold Value", 0}, 1169 {ACPI_DMT_UINT32, ACPI_HESTN_OFFSET (ErrorThresholdWindow), "Error Threshold Window", 0}, 1170 ACPI_DMT_TERMINATOR 1171 }; 1172 1173 1174 /* 1175 * IA32 Error Bank(s) - Follows the ACPI_HEST_IA_MACHINE_CHECK and 1176 * ACPI_HEST_IA_CORRECTED structures. 1177 */ 1178 ACPI_DMTABLE_INFO AcpiDmTableInfoHestBank[] = 1179 { 1180 {ACPI_DMT_UINT8, ACPI_HESTB_OFFSET (BankNumber), "Bank Number", 0}, 1181 {ACPI_DMT_UINT8, ACPI_HESTB_OFFSET (ClearStatusOnInit), "Clear Status On Init", 0}, 1182 {ACPI_DMT_UINT8, ACPI_HESTB_OFFSET (StatusFormat), "Status Format", 0}, 1183 {ACPI_DMT_UINT8, ACPI_HESTB_OFFSET (Reserved), "Reserved", 0}, 1184 {ACPI_DMT_UINT32, ACPI_HESTB_OFFSET (ControlRegister), "Control Register", 0}, 1185 {ACPI_DMT_UINT64, ACPI_HESTB_OFFSET (ControlData), "Control Data", 0}, 1186 {ACPI_DMT_UINT32, ACPI_HESTB_OFFSET (StatusRegister), "Status Register", 0}, 1187 {ACPI_DMT_UINT32, ACPI_HESTB_OFFSET (AddressRegister), "Address Register", 0}, 1188 {ACPI_DMT_UINT32, ACPI_HESTB_OFFSET (MiscRegister), "Misc Register", 0}, 1189 ACPI_DMT_TERMINATOR 1190 }; 1191 1192 1193 /******************************************************************************* 1194 * 1195 * HPET - High Precision Event Timer table 1196 * 1197 ******************************************************************************/ 1198 1199 ACPI_DMTABLE_INFO AcpiDmTableInfoHpet[] = 1200 { 1201 {ACPI_DMT_UINT32, ACPI_HPET_OFFSET (Id), "Hardware Block ID", 0}, 1202 {ACPI_DMT_GAS, ACPI_HPET_OFFSET (Address), "Timer Block Register", 0}, 1203 {ACPI_DMT_UINT8, ACPI_HPET_OFFSET (Sequence), "Sequence Number", 0}, 1204 {ACPI_DMT_UINT16, ACPI_HPET_OFFSET (MinimumTick), "Minimum Clock Ticks", 0}, 1205 {ACPI_DMT_UINT8, ACPI_HPET_OFFSET (Flags), "Flags (decoded below)", DT_FLAG}, 1206 {ACPI_DMT_FLAG0, ACPI_HPET_FLAG_OFFSET (Flags,0), "4K Page Protect", 0}, 1207 {ACPI_DMT_FLAG1, ACPI_HPET_FLAG_OFFSET (Flags,0), "64K Page Protect", 0}, 1208 ACPI_DMT_TERMINATOR 1209 }; 1210 1211 1212 /******************************************************************************* 1213 * 1214 * IVRS - I/O Virtualization Reporting Structure 1215 * 1216 ******************************************************************************/ 1217 1218 ACPI_DMTABLE_INFO AcpiDmTableInfoIvrs[] = 1219 { 1220 {ACPI_DMT_UINT32, ACPI_IVRS_OFFSET (Info), "Virtualization Info", 0}, 1221 {ACPI_DMT_UINT64, ACPI_IVRS_OFFSET (Reserved), "Reserved", 0}, 1222 ACPI_DMT_TERMINATOR 1223 }; 1224 1225 /* Common Subtable header (one per Subtable) */ 1226 1227 ACPI_DMTABLE_INFO AcpiDmTableInfoIvrsHdr[] = 1228 { 1229 {ACPI_DMT_IVRS, ACPI_IVRSH_OFFSET (Type), "Subtable Type", 0}, 1230 {ACPI_DMT_UINT8, ACPI_IVRSH_OFFSET (Flags), "Flags", 0}, 1231 {ACPI_DMT_UINT16, ACPI_IVRSH_OFFSET (Length), "Length", DT_LENGTH}, 1232 {ACPI_DMT_UINT16, ACPI_IVRSH_OFFSET (DeviceId), "DeviceId", 0}, 1233 ACPI_DMT_TERMINATOR 1234 }; 1235 1236 /* IVRS subtables */ 1237 1238 /* 0x10: I/O Virtualization Hardware Definition (IVHD) Block */ 1239 1240 ACPI_DMTABLE_INFO AcpiDmTableInfoIvrs0[] = 1241 { 1242 {ACPI_DMT_UINT16, ACPI_IVRS0_OFFSET (CapabilityOffset), "Capability Offset", 0}, 1243 {ACPI_DMT_UINT64, ACPI_IVRS0_OFFSET (BaseAddress), "Base Address", 0}, 1244 {ACPI_DMT_UINT16, ACPI_IVRS0_OFFSET (PciSegmentGroup), "PCI Segment Group", 0}, 1245 {ACPI_DMT_UINT16, ACPI_IVRS0_OFFSET (Info), "Virtualization Info", 0}, 1246 {ACPI_DMT_UINT32, ACPI_IVRS0_OFFSET (Reserved), "Reserved", 0}, 1247 ACPI_DMT_TERMINATOR 1248 }; 1249 1250 /* 0x20, 0x21, 0x22: I/O Virtualization Memory Definition (IVMD) Block */ 1251 1252 ACPI_DMTABLE_INFO AcpiDmTableInfoIvrs1[] = 1253 { 1254 {ACPI_DMT_UINT16, ACPI_IVRS1_OFFSET (AuxData), "Auxiliary Data", 0}, 1255 {ACPI_DMT_UINT64, ACPI_IVRS1_OFFSET (Reserved), "Reserved", 0}, 1256 {ACPI_DMT_UINT64, ACPI_IVRS1_OFFSET (StartAddress), "Start Address", 0}, 1257 {ACPI_DMT_UINT64, ACPI_IVRS1_OFFSET (MemoryLength), "Memory Length", 0}, 1258 ACPI_DMT_TERMINATOR 1259 }; 1260 1261 /* Device entry header for IVHD block */ 1262 1263 #define ACPI_DMT_IVRS_DE_HEADER \ 1264 {ACPI_DMT_UINT8, ACPI_IVRSD_OFFSET (Type), "Entry Type", 0}, \ 1265 {ACPI_DMT_UINT16, ACPI_IVRSD_OFFSET (Id), "Device ID", 0}, \ 1266 {ACPI_DMT_UINT8, ACPI_IVRSD_OFFSET (DataSetting), "Data Setting", 0} 1267 1268 /* 4-byte device entry */ 1269 1270 ACPI_DMTABLE_INFO AcpiDmTableInfoIvrs4[] = 1271 { 1272 ACPI_DMT_IVRS_DE_HEADER, 1273 {ACPI_DMT_EXIT, 0, NULL, 0}, 1274 }; 1275 1276 /* 8-byte device entry */ 1277 1278 ACPI_DMTABLE_INFO AcpiDmTableInfoIvrs8a[] = 1279 { 1280 ACPI_DMT_IVRS_DE_HEADER, 1281 {ACPI_DMT_UINT8, ACPI_IVRS8A_OFFSET (Reserved1), "Reserved", 0}, 1282 {ACPI_DMT_UINT16, ACPI_IVRS8A_OFFSET (UsedId), "Source Used Device ID", 0}, 1283 {ACPI_DMT_UINT8, ACPI_IVRS8A_OFFSET (Reserved2), "Reserved", 0}, 1284 ACPI_DMT_TERMINATOR 1285 }; 1286 1287 /* 8-byte device entry */ 1288 1289 ACPI_DMTABLE_INFO AcpiDmTableInfoIvrs8b[] = 1290 { 1291 ACPI_DMT_IVRS_DE_HEADER, 1292 {ACPI_DMT_UINT32, ACPI_IVRS8B_OFFSET (ExtendedData), "Extended Data", 0}, 1293 ACPI_DMT_TERMINATOR 1294 }; 1295 1296 /* 8-byte device entry */ 1297 1298 ACPI_DMTABLE_INFO AcpiDmTableInfoIvrs8c[] = 1299 { 1300 ACPI_DMT_IVRS_DE_HEADER, 1301 {ACPI_DMT_UINT8, ACPI_IVRS8C_OFFSET (Handle), "Handle", 0}, 1302 {ACPI_DMT_UINT16, ACPI_IVRS8C_OFFSET (UsedId), "Source Used Device ID", 0}, 1303 {ACPI_DMT_UINT8, ACPI_IVRS8C_OFFSET (Variety), "Variety", 0}, 1304 ACPI_DMT_TERMINATOR 1305 }; 1306 1307 1308 /******************************************************************************* 1309 * 1310 * MADT - Multiple APIC Description Table and subtables 1311 * 1312 ******************************************************************************/ 1313 1314 ACPI_DMTABLE_INFO AcpiDmTableInfoMadt[] = 1315 { 1316 {ACPI_DMT_UINT32, ACPI_MADT_OFFSET (Address), "Local Apic Address", 0}, 1317 {ACPI_DMT_UINT32, ACPI_MADT_OFFSET (Flags), "Flags (decoded below)", DT_FLAG}, 1318 {ACPI_DMT_FLAG0, ACPI_MADT_FLAG_OFFSET (Flags,0), "PC-AT Compatibility", 0}, 1319 ACPI_DMT_TERMINATOR 1320 }; 1321 1322 /* Common Subtable header (one per Subtable) */ 1323 1324 ACPI_DMTABLE_INFO AcpiDmTableInfoMadtHdr[] = 1325 { 1326 {ACPI_DMT_MADT, ACPI_MADTH_OFFSET (Type), "Subtable Type", 0}, 1327 {ACPI_DMT_UINT8, ACPI_MADTH_OFFSET (Length), "Length", DT_LENGTH}, 1328 ACPI_DMT_TERMINATOR 1329 }; 1330 1331 /* MADT Subtables */ 1332 1333 /* 0: processor APIC */ 1334 1335 ACPI_DMTABLE_INFO AcpiDmTableInfoMadt0[] = 1336 { 1337 {ACPI_DMT_UINT8, ACPI_MADT0_OFFSET (ProcessorId), "Processor ID", 0}, 1338 {ACPI_DMT_UINT8, ACPI_MADT0_OFFSET (Id), "Local Apic ID", 0}, 1339 {ACPI_DMT_UINT32, ACPI_MADT0_OFFSET (LapicFlags), "Flags (decoded below)", DT_FLAG}, 1340 {ACPI_DMT_FLAG0, ACPI_MADT0_FLAG_OFFSET (LapicFlags,0), "Processor Enabled", 0}, 1341 ACPI_DMT_TERMINATOR 1342 }; 1343 1344 /* 1: IO APIC */ 1345 1346 ACPI_DMTABLE_INFO AcpiDmTableInfoMadt1[] = 1347 { 1348 {ACPI_DMT_UINT8, ACPI_MADT1_OFFSET (Id), "I/O Apic ID", 0}, 1349 {ACPI_DMT_UINT8, ACPI_MADT1_OFFSET (Reserved), "Reserved", 0}, 1350 {ACPI_DMT_UINT32, ACPI_MADT1_OFFSET (Address), "Address", 0}, 1351 {ACPI_DMT_UINT32, ACPI_MADT1_OFFSET (GlobalIrqBase), "Interrupt", 0}, 1352 ACPI_DMT_TERMINATOR 1353 }; 1354 1355 /* 2: Interrupt Override */ 1356 1357 ACPI_DMTABLE_INFO AcpiDmTableInfoMadt2[] = 1358 { 1359 {ACPI_DMT_UINT8, ACPI_MADT2_OFFSET (Bus), "Bus", 0}, 1360 {ACPI_DMT_UINT8, ACPI_MADT2_OFFSET (SourceIrq), "Source", 0}, 1361 {ACPI_DMT_UINT32, ACPI_MADT2_OFFSET (GlobalIrq), "Interrupt", 0}, 1362 {ACPI_DMT_UINT16, ACPI_MADT2_OFFSET (IntiFlags), "Flags (decoded below)", DT_FLAG}, 1363 {ACPI_DMT_FLAGS0, ACPI_MADT2_FLAG_OFFSET (IntiFlags,0), "Polarity", 0}, 1364 {ACPI_DMT_FLAGS2, ACPI_MADT2_FLAG_OFFSET (IntiFlags,0), "Trigger Mode", 0}, 1365 ACPI_DMT_TERMINATOR 1366 }; 1367 1368 /* 3: NMI Sources */ 1369 1370 ACPI_DMTABLE_INFO AcpiDmTableInfoMadt3[] = 1371 { 1372 {ACPI_DMT_UINT16, ACPI_MADT3_OFFSET (IntiFlags), "Flags (decoded below)", DT_FLAG}, 1373 {ACPI_DMT_FLAGS0, ACPI_MADT3_FLAG_OFFSET (IntiFlags,0), "Polarity", 0}, 1374 {ACPI_DMT_FLAGS2, ACPI_MADT3_FLAG_OFFSET (IntiFlags,0), "Trigger Mode", 0}, 1375 {ACPI_DMT_UINT32, ACPI_MADT3_OFFSET (GlobalIrq), "Interrupt", 0}, 1376 ACPI_DMT_TERMINATOR 1377 }; 1378 1379 /* 4: Local APIC NMI */ 1380 1381 ACPI_DMTABLE_INFO AcpiDmTableInfoMadt4[] = 1382 { 1383 {ACPI_DMT_UINT8, ACPI_MADT4_OFFSET (ProcessorId), "Processor ID", 0}, 1384 {ACPI_DMT_UINT16, ACPI_MADT4_OFFSET (IntiFlags), "Flags (decoded below)", DT_FLAG}, 1385 {ACPI_DMT_FLAGS0, ACPI_MADT4_FLAG_OFFSET (IntiFlags,0), "Polarity", 0}, 1386 {ACPI_DMT_FLAGS2, ACPI_MADT4_FLAG_OFFSET (IntiFlags,0), "Trigger Mode", 0}, 1387 {ACPI_DMT_UINT8, ACPI_MADT4_OFFSET (Lint), "Interrupt Input LINT", 0}, 1388 ACPI_DMT_TERMINATOR 1389 }; 1390 1391 /* 5: Address Override */ 1392 1393 ACPI_DMTABLE_INFO AcpiDmTableInfoMadt5[] = 1394 { 1395 {ACPI_DMT_UINT16, ACPI_MADT5_OFFSET (Reserved), "Reserved", 0}, 1396 {ACPI_DMT_UINT64, ACPI_MADT5_OFFSET (Address), "APIC Address", 0}, 1397 ACPI_DMT_TERMINATOR 1398 }; 1399 1400 /* 6: I/O Sapic */ 1401 1402 ACPI_DMTABLE_INFO AcpiDmTableInfoMadt6[] = 1403 { 1404 {ACPI_DMT_UINT8, ACPI_MADT6_OFFSET (Id), "I/O Sapic ID", 0}, 1405 {ACPI_DMT_UINT8, ACPI_MADT6_OFFSET (Reserved), "Reserved", 0}, 1406 {ACPI_DMT_UINT32, ACPI_MADT6_OFFSET (GlobalIrqBase), "Interrupt Base", 0}, 1407 {ACPI_DMT_UINT64, ACPI_MADT6_OFFSET (Address), "Address", 0}, 1408 ACPI_DMT_TERMINATOR 1409 }; 1410 1411 /* 7: Local Sapic */ 1412 1413 ACPI_DMTABLE_INFO AcpiDmTableInfoMadt7[] = 1414 { 1415 {ACPI_DMT_UINT8, ACPI_MADT7_OFFSET (ProcessorId), "Processor ID", 0}, 1416 {ACPI_DMT_UINT8, ACPI_MADT7_OFFSET (Id), "Local Sapic ID", 0}, 1417 {ACPI_DMT_UINT8, ACPI_MADT7_OFFSET (Eid), "Local Sapic EID", 0}, 1418 {ACPI_DMT_UINT24, ACPI_MADT7_OFFSET (Reserved[0]), "Reserved", 0}, 1419 {ACPI_DMT_UINT32, ACPI_MADT7_OFFSET (LapicFlags), "Flags (decoded below)", DT_FLAG}, 1420 {ACPI_DMT_FLAG0, ACPI_MADT7_FLAG_OFFSET (LapicFlags,0), "Processor Enabled", 0}, 1421 {ACPI_DMT_UINT32, ACPI_MADT7_OFFSET (Uid), "Processor UID", 0}, 1422 {ACPI_DMT_STRING, ACPI_MADT7_OFFSET (UidString[0]), "Processor UID String", 0}, 1423 ACPI_DMT_TERMINATOR 1424 }; 1425 1426 /* 8: Platform Interrupt Source */ 1427 1428 ACPI_DMTABLE_INFO AcpiDmTableInfoMadt8[] = 1429 { 1430 {ACPI_DMT_UINT16, ACPI_MADT8_OFFSET (IntiFlags), "Flags (decoded below)", DT_FLAG}, 1431 {ACPI_DMT_FLAGS0, ACPI_MADT8_FLAG_OFFSET (IntiFlags,0), "Polarity", 0}, 1432 {ACPI_DMT_FLAGS2, ACPI_MADT8_FLAG_OFFSET (IntiFlags,0), "Trigger Mode", 0}, 1433 {ACPI_DMT_UINT8, ACPI_MADT8_OFFSET (Type), "InterruptType", 0}, 1434 {ACPI_DMT_UINT8, ACPI_MADT8_OFFSET (Id), "Processor ID", 0}, 1435 {ACPI_DMT_UINT8, ACPI_MADT8_OFFSET (Eid), "Processor EID", 0}, 1436 {ACPI_DMT_UINT8, ACPI_MADT8_OFFSET (IoSapicVector), "I/O Sapic Vector", 0}, 1437 {ACPI_DMT_UINT32, ACPI_MADT8_OFFSET (GlobalIrq), "Interrupt", 0}, 1438 {ACPI_DMT_UINT32, ACPI_MADT8_OFFSET (Flags), "Flags (decoded below)", DT_FLAG}, 1439 {ACPI_DMT_FLAG0, ACPI_MADT8_OFFSET (Flags), "CPEI Override", 0}, 1440 ACPI_DMT_TERMINATOR 1441 }; 1442 1443 /* 9: Processor Local X2_APIC (ACPI 4.0) */ 1444 1445 ACPI_DMTABLE_INFO AcpiDmTableInfoMadt9[] = 1446 { 1447 {ACPI_DMT_UINT16, ACPI_MADT9_OFFSET (Reserved), "Reserved", 0}, 1448 {ACPI_DMT_UINT32, ACPI_MADT9_OFFSET (LocalApicId), "Processor x2Apic ID", 0}, 1449 {ACPI_DMT_UINT32, ACPI_MADT9_OFFSET (LapicFlags), "Flags (decoded below)", DT_FLAG}, 1450 {ACPI_DMT_FLAG0, ACPI_MADT9_FLAG_OFFSET (LapicFlags,0), "Processor Enabled", 0}, 1451 {ACPI_DMT_UINT32, ACPI_MADT9_OFFSET (Uid), "Processor UID", 0}, 1452 ACPI_DMT_TERMINATOR 1453 }; 1454 1455 /* 10: Local X2_APIC NMI (ACPI 4.0) */ 1456 1457 ACPI_DMTABLE_INFO AcpiDmTableInfoMadt10[] = 1458 { 1459 {ACPI_DMT_UINT16, ACPI_MADT10_OFFSET (IntiFlags), "Flags (decoded below)", DT_FLAG}, 1460 {ACPI_DMT_FLAGS0, ACPI_MADT10_FLAG_OFFSET (IntiFlags,0), "Polarity", 0}, 1461 {ACPI_DMT_FLAGS2, ACPI_MADT10_FLAG_OFFSET (IntiFlags,0), "Trigger Mode", 0}, 1462 {ACPI_DMT_UINT32, ACPI_MADT10_OFFSET (Uid), "Processor UID", 0}, 1463 {ACPI_DMT_UINT8, ACPI_MADT10_OFFSET (Lint), "Interrupt Input LINT", 0}, 1464 {ACPI_DMT_UINT24, ACPI_MADT10_OFFSET (Reserved[0]), "Reserved", 0}, 1465 ACPI_DMT_TERMINATOR 1466 }; 1467 1468 /* 11: Generic Interrupt Controller (ACPI 5.0) */ 1469 1470 ACPI_DMTABLE_INFO AcpiDmTableInfoMadt11[] = 1471 { 1472 {ACPI_DMT_UINT16, ACPI_MADT11_OFFSET (Reserved), "Reserved", 0}, 1473 {ACPI_DMT_UINT32, ACPI_MADT11_OFFSET (GicId), "Local GIC Hardware ID", 0}, 1474 {ACPI_DMT_UINT32, ACPI_MADT11_OFFSET (Uid), "Processor UID", 0}, 1475 {ACPI_DMT_UINT32, ACPI_MADT11_OFFSET (Flags), "Flags (decoded below)", DT_FLAG}, 1476 {ACPI_DMT_FLAG0, ACPI_MADT11_FLAG_OFFSET (Flags,0), "Processor Enabled", 0}, 1477 {ACPI_DMT_UINT32, ACPI_MADT11_OFFSET (ParkingVersion), "Parking Protocol Version", 0}, 1478 {ACPI_DMT_UINT32, ACPI_MADT11_OFFSET (PerformanceInterrupt), "Performance Interrupt", 0}, 1479 {ACPI_DMT_UINT64, ACPI_MADT11_OFFSET (ParkedAddress), "Parked Address", 0}, 1480 {ACPI_DMT_UINT64, ACPI_MADT11_OFFSET (BaseAddress), "Base Address", 0}, 1481 ACPI_DMT_TERMINATOR 1482 }; 1483 1484 /* 12: Generic Interrupt Distributor (ACPI 5.0) */ 1485 1486 ACPI_DMTABLE_INFO AcpiDmTableInfoMadt12[] = 1487 { 1488 {ACPI_DMT_UINT16, ACPI_MADT12_OFFSET (Reserved), "Reserved", 0}, 1489 {ACPI_DMT_UINT32, ACPI_MADT12_OFFSET (GicId), "Local GIC Hardware ID", 0}, 1490 {ACPI_DMT_UINT64, ACPI_MADT12_OFFSET (BaseAddress), "Base Address", 0}, 1491 {ACPI_DMT_UINT32, ACPI_MADT12_OFFSET (GlobalIrqBase), "Interrupt Base", 0}, 1492 {ACPI_DMT_UINT32, ACPI_MADT12_OFFSET (Reserved2), "Reserved", 0}, 1493 ACPI_DMT_TERMINATOR 1494 }; 1495 1496 1497 /******************************************************************************* 1498 * 1499 * MCFG - PCI Memory Mapped Configuration table and Subtable 1500 * 1501 ******************************************************************************/ 1502 1503 ACPI_DMTABLE_INFO AcpiDmTableInfoMcfg[] = 1504 { 1505 {ACPI_DMT_UINT64, ACPI_MCFG_OFFSET (Reserved[0]), "Reserved", 0}, 1506 ACPI_DMT_TERMINATOR 1507 }; 1508 1509 ACPI_DMTABLE_INFO AcpiDmTableInfoMcfg0[] = 1510 { 1511 {ACPI_DMT_UINT64, ACPI_MCFG0_OFFSET (Address), "Base Address", 0}, 1512 {ACPI_DMT_UINT16, ACPI_MCFG0_OFFSET (PciSegment), "Segment Group Number", 0}, 1513 {ACPI_DMT_UINT8, ACPI_MCFG0_OFFSET (StartBusNumber), "Start Bus Number", 0}, 1514 {ACPI_DMT_UINT8, ACPI_MCFG0_OFFSET (EndBusNumber), "End Bus Number", 0}, 1515 {ACPI_DMT_UINT32, ACPI_MCFG0_OFFSET (Reserved), "Reserved", 0}, 1516 ACPI_DMT_TERMINATOR 1517 }; 1518 1519 1520 /******************************************************************************* 1521 * 1522 * MCHI - Management Controller Host Interface table 1523 * 1524 ******************************************************************************/ 1525 1526 ACPI_DMTABLE_INFO AcpiDmTableInfoMchi[] = 1527 { 1528 {ACPI_DMT_UINT8, ACPI_MCHI_OFFSET (InterfaceType), "Interface Type", 0}, 1529 {ACPI_DMT_UINT8, ACPI_MCHI_OFFSET (Protocol), "Protocol", 0}, 1530 {ACPI_DMT_UINT64, ACPI_MCHI_OFFSET (ProtocolData), "Protocol Data", 0}, 1531 {ACPI_DMT_UINT8, ACPI_MCHI_OFFSET (InterruptType), "Interrupt Type", 0}, 1532 {ACPI_DMT_UINT8, ACPI_MCHI_OFFSET (Gpe), "Gpe", 0}, 1533 {ACPI_DMT_UINT8, ACPI_MCHI_OFFSET (PciDeviceFlag), "Pci Device Flag", 0}, 1534 {ACPI_DMT_UINT32, ACPI_MCHI_OFFSET (GlobalInterrupt), "Global Interrupt", 0}, 1535 {ACPI_DMT_GAS, ACPI_MCHI_OFFSET (ControlRegister), "Control Register", 0}, 1536 {ACPI_DMT_UINT8, ACPI_MCHI_OFFSET (PciSegment), "Pci Segment", 0}, 1537 {ACPI_DMT_UINT8, ACPI_MCHI_OFFSET (PciBus), "Pci Bus", 0}, 1538 {ACPI_DMT_UINT8, ACPI_MCHI_OFFSET (PciDevice), "Pci Device", 0}, 1539 {ACPI_DMT_UINT8, ACPI_MCHI_OFFSET (PciFunction), "Pci Function", 0}, 1540 ACPI_DMT_TERMINATOR 1541 }; 1542 1543 1544 /******************************************************************************* 1545 * 1546 * MPST - Memory Power State Table 1547 * 1548 ******************************************************************************/ 1549 1550 ACPI_DMTABLE_INFO AcpiDmTableInfoMpst[] = 1551 { 1552 {ACPI_DMT_UINT8, ACPI_MPST_OFFSET (ChannelId), "Channel ID", 0}, 1553 {ACPI_DMT_UINT24, ACPI_MPST_OFFSET (Reserved1[0]), "Reserved", 0}, 1554 {ACPI_DMT_UINT16, ACPI_MPST_OFFSET (PowerNodeCount), "Power Node Count", 0}, 1555 {ACPI_DMT_UINT16, ACPI_MPST_OFFSET (Reserved2), "Reserved", 0}, 1556 ACPI_DMT_TERMINATOR 1557 }; 1558 1559 /* MPST subtables */ 1560 1561 /* 0: Memory Power Node Structure */ 1562 1563 ACPI_DMTABLE_INFO AcpiDmTableInfoMpst0[] = 1564 { 1565 {ACPI_DMT_UINT8, ACPI_MPST0_OFFSET (Flags), "Flags (decoded below)", DT_FLAG}, 1566 {ACPI_DMT_FLAG0, ACPI_MPST0_FLAG_OFFSET (Flags,0), "Node Enabled", 0}, 1567 {ACPI_DMT_FLAG1, ACPI_MPST0_FLAG_OFFSET (Flags,0), "Power Managed", 0}, 1568 {ACPI_DMT_FLAG2, ACPI_MPST0_FLAG_OFFSET (Flags,0), "Hot Plug Capable", 0}, 1569 1570 {ACPI_DMT_UINT8, ACPI_MPST0_OFFSET (Reserved1), "Reserved", 0}, 1571 {ACPI_DMT_UINT16, ACPI_MPST0_OFFSET (NodeId), "Node ID", 0}, 1572 {ACPI_DMT_UINT32, ACPI_MPST0_OFFSET (Length), "Length", 0}, 1573 {ACPI_DMT_UINT64, ACPI_MPST0_OFFSET (RangeAddress), "Range Address", 0}, 1574 {ACPI_DMT_UINT64, ACPI_MPST0_OFFSET (RangeLength), "Range Length", 0}, 1575 {ACPI_DMT_UINT32, ACPI_MPST0_OFFSET (NumPowerStates), "Num Power States", 0}, 1576 {ACPI_DMT_UINT32, ACPI_MPST0_OFFSET (NumPhysicalComponents), "Num Physical Components", 0}, 1577 ACPI_DMT_TERMINATOR 1578 }; 1579 1580 /* 0A: Sub-subtable - Memory Power State Structure (follows Memory Power Node above) */ 1581 1582 ACPI_DMTABLE_INFO AcpiDmTableInfoMpst0A[] = 1583 { 1584 {ACPI_DMT_UINT8, ACPI_MPST0A_OFFSET (PowerState), "Power State", 0}, 1585 {ACPI_DMT_UINT8, ACPI_MPST0A_OFFSET (InfoIndex), "InfoIndex", 0}, 1586 ACPI_DMT_TERMINATOR 1587 }; 1588 1589 /* 0B: Sub-subtable - Physical Component ID Structure (follows Memory Power State(s) above) */ 1590 1591 ACPI_DMTABLE_INFO AcpiDmTableInfoMpst0B[] = 1592 { 1593 {ACPI_DMT_UINT16, ACPI_MPST0B_OFFSET (ComponentId), "Component Id", 0}, 1594 ACPI_DMT_TERMINATOR 1595 }; 1596 1597 /* 01: Power Characteristics Count (follows all Power Node(s) above) */ 1598 1599 ACPI_DMTABLE_INFO AcpiDmTableInfoMpst1[] = 1600 { 1601 {ACPI_DMT_UINT16, ACPI_MPST1_OFFSET (CharacteristicsCount), "Characteristics Count", 0}, 1602 {ACPI_DMT_UINT16, ACPI_MPST1_OFFSET (Reserved), "Reserved", 0}, 1603 ACPI_DMT_TERMINATOR 1604 }; 1605 1606 /* 02: Memory Power State Characteristics Structure */ 1607 1608 ACPI_DMTABLE_INFO AcpiDmTableInfoMpst2[] = 1609 { 1610 {ACPI_DMT_UINT8, ACPI_MPST2_OFFSET (StructureId), "Structure ID", 0}, 1611 {ACPI_DMT_UINT8, ACPI_MPST2_OFFSET (Flags), "Flags (decoded below)", DT_FLAG}, 1612 {ACPI_DMT_FLAG0, ACPI_MPST2_FLAG_OFFSET (Flags,0), "Memory Preserved", 0}, 1613 {ACPI_DMT_FLAG1, ACPI_MPST2_FLAG_OFFSET (Flags,0), "Auto Entry", 0}, 1614 {ACPI_DMT_FLAG2, ACPI_MPST2_FLAG_OFFSET (Flags,0), "Auto Exit", 0}, 1615 1616 {ACPI_DMT_UINT16, ACPI_MPST2_OFFSET (Reserved1), "Reserved", 0}, 1617 {ACPI_DMT_UINT32, ACPI_MPST2_OFFSET (AveragePower), "Average Power", 0}, 1618 {ACPI_DMT_UINT32, ACPI_MPST2_OFFSET (PowerSaving), "Power Saving", 0}, 1619 {ACPI_DMT_UINT64, ACPI_MPST2_OFFSET (ExitLatency), "Exit Latency", 0}, 1620 {ACPI_DMT_UINT64, ACPI_MPST2_OFFSET (Reserved2), "Reserved", 0}, 1621 ACPI_DMT_TERMINATOR 1622 }; 1623 1624 1625 /******************************************************************************* 1626 * 1627 * MSCT - Maximum System Characteristics Table (ACPI 4.0) 1628 * 1629 ******************************************************************************/ 1630 1631 ACPI_DMTABLE_INFO AcpiDmTableInfoMsct[] = 1632 { 1633 {ACPI_DMT_UINT32, ACPI_MSCT_OFFSET (ProximityOffset), "Proximity Offset", 0}, 1634 {ACPI_DMT_UINT32, ACPI_MSCT_OFFSET (MaxProximityDomains), "Max Proximity Domains", 0}, 1635 {ACPI_DMT_UINT32, ACPI_MSCT_OFFSET (MaxClockDomains), "Max Clock Domains", 0}, 1636 {ACPI_DMT_UINT64, ACPI_MSCT_OFFSET (MaxAddress), "Max Physical Address", 0}, 1637 ACPI_DMT_TERMINATOR 1638 }; 1639 1640 /* Subtable - Maximum Proximity Domain Information. Version 1 */ 1641 1642 ACPI_DMTABLE_INFO AcpiDmTableInfoMsct0[] = 1643 { 1644 {ACPI_DMT_UINT8, ACPI_MSCT0_OFFSET (Revision), "Revision", 0}, 1645 {ACPI_DMT_UINT8, ACPI_MSCT0_OFFSET (Length), "Length", DT_LENGTH}, 1646 {ACPI_DMT_UINT32, ACPI_MSCT0_OFFSET (RangeStart), "Domain Range Start", 0}, 1647 {ACPI_DMT_UINT32, ACPI_MSCT0_OFFSET (RangeEnd), "Domain Range End", 0}, 1648 {ACPI_DMT_UINT32, ACPI_MSCT0_OFFSET (ProcessorCapacity), "Processor Capacity", 0}, 1649 {ACPI_DMT_UINT64, ACPI_MSCT0_OFFSET (MemoryCapacity), "Memory Capacity", 0}, 1650 ACPI_DMT_TERMINATOR 1651 }; 1652 1653 1654 /******************************************************************************* 1655 * 1656 * MTMR - MID Timer Table 1657 * 1658 ******************************************************************************/ 1659 1660 ACPI_DMTABLE_INFO AcpiDmTableInfoMtmr[] = 1661 { 1662 ACPI_DMT_TERMINATOR 1663 }; 1664 1665 /* MTMR Subtables - MTMR Entry */ 1666 1667 ACPI_DMTABLE_INFO AcpiDmTableInfoMtmr0[] = 1668 { 1669 {ACPI_DMT_GAS, ACPI_MTMR0_OFFSET (PhysicalAddress), "PhysicalAddress", 0}, 1670 {ACPI_DMT_UINT32, ACPI_MTMR0_OFFSET (Frequency), "Frequency", 0}, 1671 {ACPI_DMT_UINT32, ACPI_MTMR0_OFFSET (Irq), "IRQ", 0}, 1672 ACPI_DMT_TERMINATOR 1673 }; 1674 1675 1676 /******************************************************************************* 1677 * 1678 * PCCT - Platform Communications Channel Table (ACPI 5.0) 1679 * 1680 ******************************************************************************/ 1681 1682 ACPI_DMTABLE_INFO AcpiDmTableInfoPcct[] = 1683 { 1684 {ACPI_DMT_UINT32, ACPI_PCCT_OFFSET (Flags), "Flags (decoded below)", DT_FLAG}, 1685 {ACPI_DMT_FLAG0, ACPI_PCCT_FLAG_OFFSET (Flags,0), "Doorbell", 0}, 1686 {ACPI_DMT_UINT64, ACPI_PCCT_OFFSET (Reserved), "Reserved", 0}, 1687 ACPI_DMT_TERMINATOR 1688 }; 1689 1690 /* PCCT subtables */ 1691 1692 ACPI_DMTABLE_INFO AcpiDmTableInfoPcctHdr[] = 1693 { 1694 {ACPI_DMT_PCCT, ACPI_PCCT0_OFFSET (Header.Type), "Subtable Type", 0}, 1695 {ACPI_DMT_UINT8, ACPI_PCCT0_OFFSET (Header.Length), "Length", DT_LENGTH}, 1696 ACPI_DMT_TERMINATOR 1697 }; 1698 1699 /* 0: Generic Communications Subspace */ 1700 1701 ACPI_DMTABLE_INFO AcpiDmTableInfoPcct0[] = 1702 { 1703 {ACPI_DMT_UINT48, ACPI_PCCT0_OFFSET (Reserved[0]), "Reserved", 0}, 1704 {ACPI_DMT_UINT64, ACPI_PCCT0_OFFSET (BaseAddress), "Base Address", 0}, 1705 {ACPI_DMT_UINT64, ACPI_PCCT0_OFFSET (Length), "Address Length", 0}, 1706 {ACPI_DMT_GAS, ACPI_PCCT0_OFFSET (DoorbellRegister), "Doorbell Register", 0}, 1707 {ACPI_DMT_UINT64, ACPI_PCCT0_OFFSET (PreserveMask), "Preserve Mask", 0}, 1708 {ACPI_DMT_UINT64, ACPI_PCCT0_OFFSET (WriteMask), "Write Mask", 0}, 1709 {ACPI_DMT_UINT32, ACPI_PCCT0_OFFSET (Latency), "Command Latency", 0}, 1710 {ACPI_DMT_UINT32, ACPI_PCCT0_OFFSET (MaxAccessRate), "Maximum Access Rate", 0}, 1711 {ACPI_DMT_UINT16, ACPI_PCCT0_OFFSET (MinTurnaroundTime), "Minimum Turnaround Time", 0}, 1712 ACPI_DMT_TERMINATOR 1713 }; 1714 1715 1716 /******************************************************************************* 1717 * 1718 * PMTT - Platform Memory Topology Table 1719 * 1720 ******************************************************************************/ 1721 1722 ACPI_DMTABLE_INFO AcpiDmTableInfoPmtt[] = 1723 { 1724 {ACPI_DMT_UINT32, ACPI_PMTT_OFFSET (Reserved), "Reserved", 0}, 1725 ACPI_DMT_TERMINATOR 1726 }; 1727 1728 /* Common Subtable header (one per Subtable) */ 1729 1730 ACPI_DMTABLE_INFO AcpiDmTableInfoPmttHdr[] = 1731 { 1732 {ACPI_DMT_PMTT, ACPI_PMTTH_OFFSET (Type), "Subtable Type", 0}, 1733 {ACPI_DMT_UINT8, ACPI_PMTTH_OFFSET (Reserved1), "Reserved", 0}, 1734 {ACPI_DMT_UINT16, ACPI_PMTTH_OFFSET (Length), "Length", DT_LENGTH}, 1735 {ACPI_DMT_UINT16, ACPI_PMTTH_OFFSET (Flags), "Flags (decoded below)", DT_FLAG}, 1736 {ACPI_DMT_FLAG0, ACPI_PMTTH_FLAG_OFFSET (Flags,0), "Top-level Device", 0}, 1737 {ACPI_DMT_FLAG1, ACPI_PMTTH_FLAG_OFFSET (Flags,0), "Physical Element", 0}, 1738 {ACPI_DMT_FLAGS2, ACPI_PMTTH_FLAG_OFFSET (Flags,0), "Memory Type", 0}, 1739 {ACPI_DMT_UINT16, ACPI_PMTTH_OFFSET (Reserved2), "Reserved", 0}, 1740 ACPI_DMT_TERMINATOR 1741 }; 1742 1743 /* PMTT Subtables */ 1744 1745 /* 0: Socket */ 1746 1747 ACPI_DMTABLE_INFO AcpiDmTableInfoPmtt0[] = 1748 { 1749 {ACPI_DMT_UINT16, ACPI_PMTT0_OFFSET (SocketId), "Socket ID", 0}, 1750 {ACPI_DMT_UINT16, ACPI_PMTT0_OFFSET (Reserved), "Reserved", 0}, 1751 ACPI_DMT_TERMINATOR 1752 }; 1753 1754 /* 1: Memory Controller */ 1755 1756 ACPI_DMTABLE_INFO AcpiDmTableInfoPmtt1[] = 1757 { 1758 {ACPI_DMT_UINT32, ACPI_PMTT1_OFFSET (ReadLatency), "Read Latency", 0}, 1759 {ACPI_DMT_UINT32, ACPI_PMTT1_OFFSET (WriteLatency), "Write Latency", 0}, 1760 {ACPI_DMT_UINT32, ACPI_PMTT1_OFFSET (ReadBandwidth), "Read Bandwidth", 0}, 1761 {ACPI_DMT_UINT32, ACPI_PMTT1_OFFSET (WriteBandwidth), "Write Bandwidth", 0}, 1762 {ACPI_DMT_UINT16, ACPI_PMTT1_OFFSET (AccessWidth), "Access Width", 0}, 1763 {ACPI_DMT_UINT16, ACPI_PMTT1_OFFSET (Alignment), "Alignment", 0}, 1764 {ACPI_DMT_UINT16, ACPI_PMTT1_OFFSET (Reserved), "Reserved", 0}, 1765 {ACPI_DMT_UINT16, ACPI_PMTT1_OFFSET (DomainCount), "Domain Count", 0}, 1766 ACPI_DMT_TERMINATOR 1767 }; 1768 1769 /* 1a: Proximity Domain */ 1770 1771 ACPI_DMTABLE_INFO AcpiDmTableInfoPmtt1a[] = 1772 { 1773 {ACPI_DMT_UINT32, ACPI_PMTT1A_OFFSET (ProximityDomain), "Proximity Domain", 0}, 1774 ACPI_DMT_TERMINATOR 1775 }; 1776 1777 /* 2: Physical Component */ 1778 1779 ACPI_DMTABLE_INFO AcpiDmTableInfoPmtt2[] = 1780 { 1781 {ACPI_DMT_UINT16, ACPI_PMTT2_OFFSET (ComponentId), "Component ID", 0}, 1782 {ACPI_DMT_UINT16, ACPI_PMTT2_OFFSET (Reserved), "Reserved", 0}, 1783 {ACPI_DMT_UINT32, ACPI_PMTT2_OFFSET (MemorySize), "Memory Size", 0}, 1784 {ACPI_DMT_UINT32, ACPI_PMTT2_OFFSET (BiosHandle), "Bios Handle", 0}, 1785 ACPI_DMT_TERMINATOR 1786 }; 1787 1788 1789 /******************************************************************************* 1790 * 1791 * S3PT - S3 Performance Table 1792 * 1793 ******************************************************************************/ 1794 1795 ACPI_DMTABLE_INFO AcpiDmTableInfoS3pt[] = 1796 { 1797 {ACPI_DMT_SIG, ACPI_S3PT_OFFSET (Signature[0]), "Signature", 0}, 1798 {ACPI_DMT_UINT32, ACPI_S3PT_OFFSET (Length), "Length", DT_LENGTH}, 1799 ACPI_DMT_TERMINATOR 1800 }; 1801 1802 /* S3PT subtable header */ 1803 1804 ACPI_DMTABLE_INFO AcpiDmTableInfoS3ptHdr[] = 1805 { 1806 {ACPI_DMT_UINT16, ACPI_S3PTH_OFFSET (Type), "Type", 0}, 1807 {ACPI_DMT_UINT8, ACPI_S3PTH_OFFSET (Length), "Length", DT_LENGTH}, 1808 {ACPI_DMT_UINT8, ACPI_S3PTH_OFFSET (Revision), "Revision", 0}, 1809 ACPI_DMT_TERMINATOR 1810 }; 1811 1812 /* 0: Basic S3 Resume Performance Record */ 1813 1814 ACPI_DMTABLE_INFO AcpiDmTableInfoS3pt0[] = 1815 { 1816 {ACPI_DMT_UINT32, ACPI_S3PT0_OFFSET (ResumeCount), "Resume Count", 0}, 1817 {ACPI_DMT_UINT64, ACPI_S3PT0_OFFSET (FullResume), "Full Resume", 0}, 1818 {ACPI_DMT_UINT64, ACPI_S3PT0_OFFSET (AverageResume), "Average Resume", 0}, 1819 ACPI_DMT_TERMINATOR 1820 }; 1821 1822 /* 1: Basic S3 Suspend Performance Record */ 1823 1824 ACPI_DMTABLE_INFO AcpiDmTableInfoS3pt1[] = 1825 { 1826 {ACPI_DMT_UINT64, ACPI_S3PT1_OFFSET (SuspendStart), "Suspend Start", 0}, 1827 {ACPI_DMT_UINT64, ACPI_S3PT1_OFFSET (SuspendEnd), "Suspend End", 0}, 1828 ACPI_DMT_TERMINATOR 1829 }; 1830 1831 1832 /******************************************************************************* 1833 * 1834 * SBST - Smart Battery Specification Table 1835 * 1836 ******************************************************************************/ 1837 1838 ACPI_DMTABLE_INFO AcpiDmTableInfoSbst[] = 1839 { 1840 {ACPI_DMT_UINT32, ACPI_SBST_OFFSET (WarningLevel), "Warning Level", 0}, 1841 {ACPI_DMT_UINT32, ACPI_SBST_OFFSET (LowLevel), "Low Level", 0}, 1842 {ACPI_DMT_UINT32, ACPI_SBST_OFFSET (CriticalLevel), "Critical Level", 0}, 1843 ACPI_DMT_TERMINATOR 1844 }; 1845 1846 1847 /******************************************************************************* 1848 * 1849 * SLIC - Software Licensing Description Table. There is no common table, just 1850 * the standard ACPI header and then subtables. 1851 * 1852 ******************************************************************************/ 1853 1854 /* Common Subtable header (one per Subtable) */ 1855 1856 ACPI_DMTABLE_INFO AcpiDmTableInfoSlicHdr[] = 1857 { 1858 {ACPI_DMT_SLIC, ACPI_SLICH_OFFSET (Type), "Subtable Type", 0}, 1859 {ACPI_DMT_UINT32, ACPI_SLICH_OFFSET (Length), "Length", DT_LENGTH}, 1860 ACPI_DMT_TERMINATOR 1861 }; 1862 1863 ACPI_DMTABLE_INFO AcpiDmTableInfoSlic0[] = 1864 { 1865 {ACPI_DMT_UINT8, ACPI_SLIC0_OFFSET (KeyType), "Key Type", 0}, 1866 {ACPI_DMT_UINT8, ACPI_SLIC0_OFFSET (Version), "Version", 0}, 1867 {ACPI_DMT_UINT16, ACPI_SLIC0_OFFSET (Reserved), "Reserved", 0}, 1868 {ACPI_DMT_UINT32, ACPI_SLIC0_OFFSET (Algorithm), "Algorithm", 0}, 1869 {ACPI_DMT_NAME4, ACPI_SLIC0_OFFSET (Magic), "Magic", 0}, 1870 {ACPI_DMT_UINT32, ACPI_SLIC0_OFFSET (BitLength), "BitLength", 0}, 1871 {ACPI_DMT_UINT32, ACPI_SLIC0_OFFSET (Exponent), "Exponent", 0}, 1872 {ACPI_DMT_BUF128, ACPI_SLIC0_OFFSET (Modulus[0]), "Modulus", 0}, 1873 ACPI_DMT_TERMINATOR 1874 }; 1875 1876 ACPI_DMTABLE_INFO AcpiDmTableInfoSlic1[] = 1877 { 1878 {ACPI_DMT_UINT32, ACPI_SLIC1_OFFSET (Version), "Version", 0}, 1879 {ACPI_DMT_NAME6, ACPI_SLIC1_OFFSET (OemId[0]), "Oem ID", 0}, 1880 {ACPI_DMT_NAME8, ACPI_SLIC1_OFFSET (OemTableId[0]), "Oem Table ID", 0}, 1881 {ACPI_DMT_NAME8, ACPI_SLIC1_OFFSET (WindowsFlag[0]), "Windows Flag", 0}, 1882 {ACPI_DMT_UINT32, ACPI_SLIC1_OFFSET (SlicVersion), "SLIC Version", 0}, 1883 {ACPI_DMT_BUF16, ACPI_SLIC1_OFFSET (Reserved[0]), "Reserved", 0}, 1884 {ACPI_DMT_BUF128, ACPI_SLIC1_OFFSET (Signature[0]), "Signature", 0}, 1885 ACPI_DMT_TERMINATOR 1886 }; 1887 1888 1889 /******************************************************************************* 1890 * 1891 * SLIT - System Locality Information Table 1892 * 1893 ******************************************************************************/ 1894 1895 ACPI_DMTABLE_INFO AcpiDmTableInfoSlit[] = 1896 { 1897 {ACPI_DMT_UINT64, ACPI_SLIT_OFFSET (LocalityCount), "Localities", 0}, 1898 ACPI_DMT_TERMINATOR 1899 }; 1900 1901 1902 /******************************************************************************* 1903 * 1904 * SPCR - Serial Port Console Redirection table 1905 * 1906 ******************************************************************************/ 1907 1908 ACPI_DMTABLE_INFO AcpiDmTableInfoSpcr[] = 1909 { 1910 {ACPI_DMT_UINT8, ACPI_SPCR_OFFSET (InterfaceType), "Interface Type", 0}, 1911 {ACPI_DMT_UINT24, ACPI_SPCR_OFFSET (Reserved[0]), "Reserved", 0}, 1912 {ACPI_DMT_GAS, ACPI_SPCR_OFFSET (SerialPort), "Serial Port Register", 0}, 1913 {ACPI_DMT_UINT8, ACPI_SPCR_OFFSET (InterruptType), "Interrupt Type", 0}, 1914 {ACPI_DMT_UINT8, ACPI_SPCR_OFFSET (PcInterrupt), "PCAT-compatible IRQ", 0}, 1915 {ACPI_DMT_UINT32, ACPI_SPCR_OFFSET (Interrupt), "Interrupt", 0}, 1916 {ACPI_DMT_UINT8, ACPI_SPCR_OFFSET (BaudRate), "Baud Rate", 0}, 1917 {ACPI_DMT_UINT8, ACPI_SPCR_OFFSET (Parity), "Parity", 0}, 1918 {ACPI_DMT_UINT8, ACPI_SPCR_OFFSET (StopBits), "Stop Bits", 0}, 1919 {ACPI_DMT_UINT8, ACPI_SPCR_OFFSET (FlowControl), "Flow Control", 0}, 1920 {ACPI_DMT_UINT8, ACPI_SPCR_OFFSET (TerminalType), "Terminal Type", 0}, 1921 {ACPI_DMT_UINT8, ACPI_SPCR_OFFSET (Reserved2), "Reserved", 0}, 1922 {ACPI_DMT_UINT16, ACPI_SPCR_OFFSET (PciDeviceId), "PCI Device ID", 0}, 1923 {ACPI_DMT_UINT16, ACPI_SPCR_OFFSET (PciVendorId), "PCI Vendor ID", 0}, 1924 {ACPI_DMT_UINT8, ACPI_SPCR_OFFSET (PciBus), "PCI Bus", 0}, 1925 {ACPI_DMT_UINT8, ACPI_SPCR_OFFSET (PciDevice), "PCI Device", 0}, 1926 {ACPI_DMT_UINT8, ACPI_SPCR_OFFSET (PciFunction), "PCI Function", 0}, 1927 {ACPI_DMT_UINT32, ACPI_SPCR_OFFSET (PciFlags), "PCI Flags", 0}, 1928 {ACPI_DMT_UINT8, ACPI_SPCR_OFFSET (PciSegment), "PCI Segment", 0}, 1929 {ACPI_DMT_UINT32, ACPI_SPCR_OFFSET (Reserved2), "Reserved", 0}, 1930 ACPI_DMT_TERMINATOR 1931 }; 1932 1933 1934 /******************************************************************************* 1935 * 1936 * SPMI - Server Platform Management Interface table 1937 * 1938 ******************************************************************************/ 1939 1940 ACPI_DMTABLE_INFO AcpiDmTableInfoSpmi[] = 1941 { 1942 {ACPI_DMT_UINT8, ACPI_SPMI_OFFSET (InterfaceType), "Interface Type", 0}, 1943 {ACPI_DMT_UINT8, ACPI_SPMI_OFFSET (Reserved), "Reserved", 0}, 1944 {ACPI_DMT_UINT16, ACPI_SPMI_OFFSET (SpecRevision), "IPMI Spec Version", 0}, 1945 {ACPI_DMT_UINT8, ACPI_SPMI_OFFSET (InterruptType), "Interrupt Type", 0}, 1946 {ACPI_DMT_UINT8, ACPI_SPMI_OFFSET (GpeNumber), "GPE Number", 0}, 1947 {ACPI_DMT_UINT8, ACPI_SPMI_OFFSET (Reserved1), "Reserved", 0}, 1948 {ACPI_DMT_UINT8, ACPI_SPMI_OFFSET (PciDeviceFlag), "PCI Device Flag", 0}, 1949 {ACPI_DMT_UINT32, ACPI_SPMI_OFFSET (Interrupt), "Interrupt", 0}, 1950 {ACPI_DMT_GAS, ACPI_SPMI_OFFSET (IpmiRegister), "IPMI Register", 0}, 1951 {ACPI_DMT_UINT8, ACPI_SPMI_OFFSET (PciSegment), "PCI Segment", 0}, 1952 {ACPI_DMT_UINT8, ACPI_SPMI_OFFSET (PciBus), "PCI Bus", 0}, 1953 {ACPI_DMT_UINT8, ACPI_SPMI_OFFSET (PciDevice), "PCI Device", 0}, 1954 {ACPI_DMT_UINT8, ACPI_SPMI_OFFSET (PciFunction), "PCI Function", 0}, 1955 {ACPI_DMT_UINT8, ACPI_SPMI_OFFSET (Reserved2), "Reserved", 0}, 1956 ACPI_DMT_TERMINATOR 1957 }; 1958 1959 1960 /******************************************************************************* 1961 * 1962 * SRAT - System Resource Affinity Table and Subtables 1963 * 1964 ******************************************************************************/ 1965 1966 ACPI_DMTABLE_INFO AcpiDmTableInfoSrat[] = 1967 { 1968 {ACPI_DMT_UINT32, ACPI_SRAT_OFFSET (TableRevision), "Table Revision", 0}, 1969 {ACPI_DMT_UINT64, ACPI_SRAT_OFFSET (Reserved), "Reserved", 0}, 1970 ACPI_DMT_TERMINATOR 1971 }; 1972 1973 /* Common Subtable header (one per Subtable) */ 1974 1975 ACPI_DMTABLE_INFO AcpiDmTableInfoSratHdr[] = 1976 { 1977 {ACPI_DMT_SRAT, ACPI_SRATH_OFFSET (Type), "Subtable Type", 0}, 1978 {ACPI_DMT_UINT8, ACPI_SRATH_OFFSET (Length), "Length", DT_LENGTH}, 1979 ACPI_DMT_TERMINATOR 1980 }; 1981 1982 /* SRAT Subtables */ 1983 1984 /* 0: Processor Local APIC/SAPIC Affinity */ 1985 1986 ACPI_DMTABLE_INFO AcpiDmTableInfoSrat0[] = 1987 { 1988 {ACPI_DMT_UINT8, ACPI_SRAT0_OFFSET (ProximityDomainLo), "Proximity Domain Low(8)", 0}, 1989 {ACPI_DMT_UINT8, ACPI_SRAT0_OFFSET (ApicId), "Apic ID", 0}, 1990 {ACPI_DMT_UINT32, ACPI_SRAT0_OFFSET (Flags), "Flags (decoded below)", DT_FLAG}, 1991 {ACPI_DMT_FLAG0, ACPI_SRAT0_FLAG_OFFSET (Flags,0), "Enabled", 0}, 1992 {ACPI_DMT_UINT8, ACPI_SRAT0_OFFSET (LocalSapicEid), "Local Sapic EID", 0}, 1993 {ACPI_DMT_UINT24, ACPI_SRAT0_OFFSET (ProximityDomainHi[0]), "Proximity Domain High(24)", 0}, 1994 {ACPI_DMT_UINT32, ACPI_SRAT0_OFFSET (ClockDomain), "Clock Domain", 0}, 1995 ACPI_DMT_TERMINATOR 1996 }; 1997 1998 /* 1: Memory Affinity */ 1999 2000 ACPI_DMTABLE_INFO AcpiDmTableInfoSrat1[] = 2001 { 2002 {ACPI_DMT_UINT32, ACPI_SRAT1_OFFSET (ProximityDomain), "Proximity Domain", 0}, 2003 {ACPI_DMT_UINT16, ACPI_SRAT1_OFFSET (Reserved), "Reserved1", 0}, 2004 {ACPI_DMT_UINT64, ACPI_SRAT1_OFFSET (BaseAddress), "Base Address", 0}, 2005 {ACPI_DMT_UINT64, ACPI_SRAT1_OFFSET (Length), "Address Length", 0}, 2006 {ACPI_DMT_UINT32, ACPI_SRAT1_OFFSET (Reserved1), "Reserved2", 0}, 2007 {ACPI_DMT_UINT32, ACPI_SRAT1_OFFSET (Flags), "Flags (decoded below)", DT_FLAG}, 2008 {ACPI_DMT_FLAG0, ACPI_SRAT1_FLAG_OFFSET (Flags,0), "Enabled", 0}, 2009 {ACPI_DMT_FLAG1, ACPI_SRAT1_FLAG_OFFSET (Flags,0), "Hot Pluggable", 0}, 2010 {ACPI_DMT_FLAG2, ACPI_SRAT1_FLAG_OFFSET (Flags,0), "Non-Volatile", 0}, 2011 {ACPI_DMT_UINT64, ACPI_SRAT1_OFFSET (Reserved2), "Reserved3", 0}, 2012 ACPI_DMT_TERMINATOR 2013 }; 2014 2015 /* 2: Processor Local X2_APIC Affinity (ACPI 4.0) */ 2016 2017 ACPI_DMTABLE_INFO AcpiDmTableInfoSrat2[] = 2018 { 2019 {ACPI_DMT_UINT16, ACPI_SRAT2_OFFSET (Reserved), "Reserved1", 0}, 2020 {ACPI_DMT_UINT32, ACPI_SRAT2_OFFSET (ProximityDomain), "Proximity Domain", 0}, 2021 {ACPI_DMT_UINT32, ACPI_SRAT2_OFFSET (ApicId), "Apic ID", 0}, 2022 {ACPI_DMT_UINT32, ACPI_SRAT2_OFFSET (Flags), "Flags (decoded below)", DT_FLAG}, 2023 {ACPI_DMT_FLAG0, ACPI_SRAT2_FLAG_OFFSET (Flags,0), "Enabled", 0}, 2024 {ACPI_DMT_UINT32, ACPI_SRAT2_OFFSET (ClockDomain), "Clock Domain", 0}, 2025 {ACPI_DMT_UINT32, ACPI_SRAT2_OFFSET (Reserved2), "Reserved2", 0}, 2026 ACPI_DMT_TERMINATOR 2027 }; 2028 2029 2030 /******************************************************************************* 2031 * 2032 * TCPA - Trusted Computing Platform Alliance table 2033 * 2034 ******************************************************************************/ 2035 2036 ACPI_DMTABLE_INFO AcpiDmTableInfoTcpa[] = 2037 { 2038 {ACPI_DMT_UINT16, ACPI_TCPA_OFFSET (Reserved), "Reserved", 0}, 2039 {ACPI_DMT_UINT32, ACPI_TCPA_OFFSET (MaxLogLength), "Max Event Log Length", 0}, 2040 {ACPI_DMT_UINT64, ACPI_TCPA_OFFSET (LogAddress), "Event Log Address", 0}, 2041 ACPI_DMT_TERMINATOR 2042 }; 2043 2044 2045 /******************************************************************************* 2046 * 2047 * TPM2 - Trusted Platform Module (TPM) 2.0 Hardware Interface Table 2048 * 2049 ******************************************************************************/ 2050 2051 ACPI_DMTABLE_INFO AcpiDmTableInfoTpm2[] = 2052 { 2053 {ACPI_DMT_UINT32, ACPI_TPM2_OFFSET (Flags), "Flags", 0}, 2054 {ACPI_DMT_UINT64, ACPI_TPM2_OFFSET (ControlAddress), "Control Address", 0}, 2055 {ACPI_DMT_UINT32, ACPI_TPM2_OFFSET (StartMethod), "Start Method", 0}, 2056 ACPI_DMT_TERMINATOR 2057 }; 2058 2059 2060 /******************************************************************************* 2061 * 2062 * UEFI - UEFI Boot optimization Table 2063 * 2064 ******************************************************************************/ 2065 2066 ACPI_DMTABLE_INFO AcpiDmTableInfoUefi[] = 2067 { 2068 {ACPI_DMT_UUID, ACPI_UEFI_OFFSET (Identifier[0]), "UUID Identifier", 0}, 2069 {ACPI_DMT_UINT16, ACPI_UEFI_OFFSET (DataOffset), "Data Offset", 0}, 2070 ACPI_DMT_TERMINATOR 2071 }; 2072 2073 2074 /******************************************************************************* 2075 * 2076 * VRTC - Virtual Real Time Clock Table 2077 * 2078 ******************************************************************************/ 2079 2080 ACPI_DMTABLE_INFO AcpiDmTableInfoVrtc[] = 2081 { 2082 ACPI_DMT_TERMINATOR 2083 }; 2084 2085 /* VRTC Subtables - VRTC Entry */ 2086 2087 ACPI_DMTABLE_INFO AcpiDmTableInfoVrtc0[] = 2088 { 2089 {ACPI_DMT_GAS, ACPI_VRTC0_OFFSET (PhysicalAddress), "PhysicalAddress", 0}, 2090 {ACPI_DMT_UINT32, ACPI_VRTC0_OFFSET (Irq), "IRQ", 0}, 2091 ACPI_DMT_TERMINATOR 2092 }; 2093 2094 2095 /******************************************************************************* 2096 * 2097 * WAET - Windows ACPI Emulated devices Table 2098 * 2099 ******************************************************************************/ 2100 2101 ACPI_DMTABLE_INFO AcpiDmTableInfoWaet[] = 2102 { 2103 {ACPI_DMT_UINT32, ACPI_WAET_OFFSET (Flags), "Flags (decoded below)", DT_FLAG}, 2104 {ACPI_DMT_FLAG0, ACPI_WAET_OFFSET (Flags), "RTC needs no INT ack", 0}, 2105 {ACPI_DMT_FLAG1, ACPI_WAET_OFFSET (Flags), "PM timer, one read only", 0}, 2106 ACPI_DMT_TERMINATOR 2107 }; 2108 2109 2110 /******************************************************************************* 2111 * 2112 * WDAT - Watchdog Action Table 2113 * 2114 ******************************************************************************/ 2115 2116 ACPI_DMTABLE_INFO AcpiDmTableInfoWdat[] = 2117 { 2118 {ACPI_DMT_UINT32, ACPI_WDAT_OFFSET (HeaderLength), "Header Length", DT_LENGTH}, 2119 {ACPI_DMT_UINT16, ACPI_WDAT_OFFSET (PciSegment), "PCI Segment", 0}, 2120 {ACPI_DMT_UINT8, ACPI_WDAT_OFFSET (PciBus), "PCI Bus", 0}, 2121 {ACPI_DMT_UINT8, ACPI_WDAT_OFFSET (PciDevice), "PCI Device", 0}, 2122 {ACPI_DMT_UINT8, ACPI_WDAT_OFFSET (PciFunction), "PCI Function", 0}, 2123 {ACPI_DMT_UINT24, ACPI_WDAT_OFFSET (Reserved[0]), "Reserved", 0}, 2124 {ACPI_DMT_UINT32, ACPI_WDAT_OFFSET (TimerPeriod), "Timer Period", 0}, 2125 {ACPI_DMT_UINT32, ACPI_WDAT_OFFSET (MaxCount), "Max Count", 0}, 2126 {ACPI_DMT_UINT32, ACPI_WDAT_OFFSET (MinCount), "Min Count", 0}, 2127 {ACPI_DMT_UINT8, ACPI_WDAT_OFFSET (Flags), "Flags (decoded below)", DT_FLAG}, 2128 {ACPI_DMT_FLAG0, ACPI_WDAT_OFFSET (Flags), "Enabled", 0}, 2129 {ACPI_DMT_FLAG7, ACPI_WDAT_OFFSET (Flags), "Stopped When Asleep", 0}, 2130 {ACPI_DMT_UINT24, ACPI_WDAT_OFFSET (Reserved2[0]), "Reserved", 0}, 2131 {ACPI_DMT_UINT32, ACPI_WDAT_OFFSET (Entries), "Watchdog Entry Count", 0}, 2132 ACPI_DMT_TERMINATOR 2133 }; 2134 2135 /* WDAT Subtables - Watchdog Instruction Entries */ 2136 2137 ACPI_DMTABLE_INFO AcpiDmTableInfoWdat0[] = 2138 { 2139 {ACPI_DMT_UINT8, ACPI_WDAT0_OFFSET (Action), "Watchdog Action", 0}, 2140 {ACPI_DMT_UINT8, ACPI_WDAT0_OFFSET (Instruction), "Instruction", 0}, 2141 {ACPI_DMT_UINT16, ACPI_WDAT0_OFFSET (Reserved), "Reserved", 0}, 2142 {ACPI_DMT_GAS, ACPI_WDAT0_OFFSET (RegisterRegion), "Register Region", 0}, 2143 {ACPI_DMT_UINT32, ACPI_WDAT0_OFFSET (Value), "Value", 0}, 2144 {ACPI_DMT_UINT32, ACPI_WDAT0_OFFSET (Mask), "Register Mask", 0}, 2145 ACPI_DMT_TERMINATOR 2146 }; 2147 2148 2149 /******************************************************************************* 2150 * 2151 * WDDT - Watchdog Description Table 2152 * 2153 ******************************************************************************/ 2154 2155 ACPI_DMTABLE_INFO AcpiDmTableInfoWddt[] = 2156 { 2157 {ACPI_DMT_UINT16, ACPI_WDDT_OFFSET (SpecVersion), "Specification Version", 0}, 2158 {ACPI_DMT_UINT16, ACPI_WDDT_OFFSET (TableVersion), "Table Version", 0}, 2159 {ACPI_DMT_UINT16, ACPI_WDDT_OFFSET (PciVendorId), "PCI Vendor ID", 0}, 2160 {ACPI_DMT_GAS, ACPI_WDDT_OFFSET (Address), "Timer Register", 0}, 2161 {ACPI_DMT_UINT16, ACPI_WDDT_OFFSET (MaxCount), "Max Count", 0}, 2162 {ACPI_DMT_UINT16, ACPI_WDDT_OFFSET (MinCount), "Min Count", 0}, 2163 {ACPI_DMT_UINT16, ACPI_WDDT_OFFSET (Period), "Period", 0}, 2164 {ACPI_DMT_UINT16, ACPI_WDDT_OFFSET (Status), "Status (decoded below)", 0}, 2165 2166 /* Status Flags byte 0 */ 2167 2168 {ACPI_DMT_FLAG0, ACPI_WDDT_FLAG_OFFSET (Status,0), "Available", 0}, 2169 {ACPI_DMT_FLAG1, ACPI_WDDT_FLAG_OFFSET (Status,0), "Active", 0}, 2170 {ACPI_DMT_FLAG2, ACPI_WDDT_FLAG_OFFSET (Status,0), "OS Owns", 0}, 2171 2172 /* Status Flags byte 1 */ 2173 2174 {ACPI_DMT_FLAG3, ACPI_WDDT_FLAG_OFFSET (Status,1), "User Reset", 0}, 2175 {ACPI_DMT_FLAG4, ACPI_WDDT_FLAG_OFFSET (Status,1), "Timeout Reset", 0}, 2176 {ACPI_DMT_FLAG5, ACPI_WDDT_FLAG_OFFSET (Status,1), "Power Fail Reset", 0}, 2177 {ACPI_DMT_FLAG6, ACPI_WDDT_FLAG_OFFSET (Status,1), "Unknown Reset", 0}, 2178 2179 {ACPI_DMT_UINT16, ACPI_WDDT_OFFSET (Capability), "Capability (decoded below)", 0}, 2180 2181 /* Capability Flags byte 0 */ 2182 2183 {ACPI_DMT_FLAG0, ACPI_WDDT_FLAG_OFFSET (Capability,0), "Auto Reset", 0}, 2184 {ACPI_DMT_FLAG1, ACPI_WDDT_FLAG_OFFSET (Capability,0), "Timeout Alert", 0}, 2185 ACPI_DMT_TERMINATOR 2186 }; 2187 2188 2189 /******************************************************************************* 2190 * 2191 * WDRT - Watchdog Resource Table 2192 * 2193 ******************************************************************************/ 2194 2195 ACPI_DMTABLE_INFO AcpiDmTableInfoWdrt[] = 2196 { 2197 {ACPI_DMT_GAS, ACPI_WDRT_OFFSET (ControlRegister), "Control Register", 0}, 2198 {ACPI_DMT_GAS, ACPI_WDRT_OFFSET (CountRegister), "Count Register", 0}, 2199 {ACPI_DMT_UINT16, ACPI_WDRT_OFFSET (PciDeviceId), "PCI Device ID", 0}, 2200 {ACPI_DMT_UINT16, ACPI_WDRT_OFFSET (PciVendorId), "PCI Vendor ID", 0}, 2201 {ACPI_DMT_UINT8, ACPI_WDRT_OFFSET (PciBus), "PCI Bus", 0}, 2202 {ACPI_DMT_UINT8, ACPI_WDRT_OFFSET (PciDevice), "PCI Device", 0}, 2203 {ACPI_DMT_UINT8, ACPI_WDRT_OFFSET (PciFunction), "PCI Function", 0}, 2204 {ACPI_DMT_UINT8, ACPI_WDRT_OFFSET (PciSegment), "PCI Segment", 0}, 2205 {ACPI_DMT_UINT16, ACPI_WDRT_OFFSET (MaxCount), "Max Count", 0}, 2206 {ACPI_DMT_UINT8, ACPI_WDRT_OFFSET (Units), "Counter Units", 0}, 2207 ACPI_DMT_TERMINATOR 2208 }; 2209 2210 /*! [Begin] no source code translation */ 2211 2212 /* 2213 * Generic types (used in UEFI and custom tables) 2214 * 2215 * Examples: 2216 * 2217 * Buffer : cc 04 ff bb 2218 * UINT8 : 11 2219 * UINT16 : 1122 2220 * UINT24 : 112233 2221 * UINT32 : 11223344 2222 * UINT56 : 11223344556677 2223 * UINT64 : 1122334455667788 2224 * 2225 * String : "This is string" 2226 * Unicode : "This string encoded to Unicode" 2227 * 2228 * GUID : 11223344-5566-7788-99aa-bbccddeeff00 2229 * DevicePath : "\PciRoot(0)\Pci(0x1f,1)\Usb(0,0)" 2230 */ 2231 2232 #define ACPI_DM_GENERIC_ENTRY(FieldType, FieldName) \ 2233 {{FieldType, 0, FieldName, 0}, ACPI_DMT_TERMINATOR} 2234 2235 ACPI_DMTABLE_INFO AcpiDmTableInfoGeneric[][2] = 2236 { 2237 ACPI_DM_GENERIC_ENTRY (ACPI_DMT_UINT8, "UINT8"), 2238 ACPI_DM_GENERIC_ENTRY (ACPI_DMT_UINT16, "UINT16"), 2239 ACPI_DM_GENERIC_ENTRY (ACPI_DMT_UINT24, "UINT24"), 2240 ACPI_DM_GENERIC_ENTRY (ACPI_DMT_UINT32, "UINT32"), 2241 ACPI_DM_GENERIC_ENTRY (ACPI_DMT_UINT40, "UINT40"), 2242 ACPI_DM_GENERIC_ENTRY (ACPI_DMT_UINT48, "UINT48"), 2243 ACPI_DM_GENERIC_ENTRY (ACPI_DMT_UINT56, "UINT56"), 2244 ACPI_DM_GENERIC_ENTRY (ACPI_DMT_UINT64, "UINT64"), 2245 ACPI_DM_GENERIC_ENTRY (ACPI_DMT_STRING, "String"), 2246 ACPI_DM_GENERIC_ENTRY (ACPI_DMT_UNICODE, "Unicode"), 2247 ACPI_DM_GENERIC_ENTRY (ACPI_DMT_BUFFER, "Buffer"), 2248 ACPI_DM_GENERIC_ENTRY (ACPI_DMT_UUID, "GUID"), 2249 ACPI_DM_GENERIC_ENTRY (ACPI_DMT_STRING, "DevicePath"), 2250 ACPI_DM_GENERIC_ENTRY (ACPI_DMT_LABEL, "Label"), 2251 {ACPI_DMT_TERMINATOR} 2252 }; 2253 /*! [End] no source code translation !*/ 2254
Indexes created Fri Sep 26 20:09:58 GMT 2025