dmtbinfo1.c revision 1.1.1.9
1 /****************************************************************************** 2 * 3 * Module Name: dmtbinfo1 - Table info for non-AML tables 4 * 5 *****************************************************************************/ 6 7 /* 8 * Copyright (C) 2000 - 2022, Intel Corp. 9 * All rights reserved. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions, and the following disclaimer, 16 * without modification. 17 * 2. Redistributions in binary form must reproduce at minimum a disclaimer 18 * substantially similar to the "NO WARRANTY" disclaimer below 19 * ("Disclaimer") and any redistribution must be conditioned upon 20 * including a substantially similar Disclaimer requirement for further 21 * binary redistribution. 22 * 3. Neither the names of the above-listed copyright holders nor the names 23 * of any contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * Alternatively, this software may be distributed under the terms of the 27 * GNU General Public License ("GPL") version 2 as published by the Free 28 * Software Foundation. 29 * 30 * NO WARRANTY 31 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 32 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 33 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 34 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 35 * HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 36 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 37 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 38 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 39 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING 40 * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 41 * POSSIBILITY OF SUCH DAMAGES. 42 */ 43 44 #include "acpi.h" 45 #include "accommon.h" 46 #include "acdisasm.h" 47 #include "actbinfo.h" 48 49 /* This module used for application-level code only */ 50 51 #define _COMPONENT ACPI_CA_DISASSEMBLER 52 ACPI_MODULE_NAME ("dmtbinfo1") 53 54 /* 55 * How to add a new table: 56 * 57 * - Add the C table definition to the actbl1.h or actbl2.h header. 58 * - Add ACPI_xxxx_OFFSET macro(s) for the table (and subtables) to list below. 59 * - Define the table in this file (for the disassembler). If any 60 * new data types are required (ACPI_DMT_*), see below. 61 * - Add an external declaration for the new table definition (AcpiDmTableInfo*) 62 * in acdisam.h 63 * - Add new table definition to the dispatch table in dmtable.c (AcpiDmTableData) 64 * If a simple table (with no subtables), no disassembly code is needed. 65 * Otherwise, create the AcpiDmDump* function for to disassemble the table 66 * and add it to the dmtbdump.c file. 67 * - Add an external declaration for the new AcpiDmDump* function in acdisasm.h 68 * - Add the new AcpiDmDump* function to the dispatch table in dmtable.c 69 * - Create a template for the new table 70 * - Add data table compiler support 71 * 72 * How to add a new data type (ACPI_DMT_*): 73 * 74 * - Add new type at the end of the ACPI_DMT list in acdisasm.h 75 * - Add length and implementation cases in dmtable.c (disassembler) 76 * - Add type and length cases in dtutils.c (DT compiler) 77 */ 78 79 /* 80 * ACPI Table Information, used to dump formatted ACPI tables 81 * 82 * Each entry is of the form: <Field Type, Field Offset, Field Name> 83 */ 84 85 86 /******************************************************************************* 87 * 88 * AEST - ARM Error Source table. Conforms to: 89 * ACPI for the Armv8 RAS Extensions 1.1 Platform Design Document Sep 2020 90 * 91 ******************************************************************************/ 92 93 /* Common Subtable header (one per Subtable) */ 94 95 ACPI_DMTABLE_INFO AcpiDmTableInfoAestHdr[] = 96 { 97 {ACPI_DMT_AEST, ACPI_AESTH_OFFSET (Type), "Subtable Type", 0}, 98 {ACPI_DMT_UINT16, ACPI_AESTH_OFFSET (Length), "Length", DT_LENGTH}, 99 {ACPI_DMT_UINT8, ACPI_AESTH_OFFSET (Reserved), "Reserved", 0}, 100 {ACPI_DMT_UINT32, ACPI_AESTH_OFFSET (NodeSpecificOffset), "Node Specific Offset", 0}, 101 {ACPI_DMT_UINT32, ACPI_AESTH_OFFSET (NodeInterfaceOffset), "Node Interface Offset", 0}, 102 {ACPI_DMT_UINT32, ACPI_AESTH_OFFSET (NodeInterruptOffset), "Node Interrupt Array Offset", 0}, 103 {ACPI_DMT_UINT32, ACPI_AESTH_OFFSET (NodeInterruptCount), "Node Interrupt Array Count", 0}, 104 {ACPI_DMT_UINT64, ACPI_AESTH_OFFSET (TimestampRate), "Timestamp Rate", 0}, 105 {ACPI_DMT_UINT64, ACPI_AESTH_OFFSET (Reserved1), "Reserved", 0}, 106 {ACPI_DMT_UINT64, ACPI_AESTH_OFFSET (ErrorInjectionRate), "Error Injection Rate", 0}, 107 ACPI_DMT_TERMINATOR 108 }; 109 110 /* 111 * AEST subtables (nodes) 112 */ 113 114 /* 0: Processor Error */ 115 116 ACPI_DMTABLE_INFO AcpiDmTableInfoAestProcError[] = 117 { 118 {ACPI_DMT_UINT32, ACPI_AEST0_OFFSET (ProcessorId), "Processor ID", 0}, 119 {ACPI_DMT_AEST_RES, ACPI_AEST0_OFFSET (ResourceType), "Resource Type", 0}, 120 {ACPI_DMT_UINT8, ACPI_AEST0_OFFSET (Reserved), "Reserved", 0}, 121 {ACPI_DMT_UINT8, ACPI_AEST0_OFFSET (Flags), "Flags (decoded Below)", 0}, 122 {ACPI_DMT_FLAG0, ACPI_AEST0_FLAG_OFFSET (Flags, 0), "Global", 0}, 123 {ACPI_DMT_FLAG1, ACPI_AEST0_FLAG_OFFSET (Flags, 0), "Shared", 0}, 124 {ACPI_DMT_UINT8, ACPI_AEST0_OFFSET (Revision), "Revision", 0}, 125 {ACPI_DMT_UINT64, ACPI_AEST0_OFFSET (ProcessorAffinity), "Processor Affinity Structure", 0}, 126 ACPI_DMT_TERMINATOR 127 }; 128 129 /* 0RT: Processor Cache Resource */ 130 131 ACPI_DMTABLE_INFO AcpiDmTableInfoAestCacheRsrc[] = 132 { 133 {ACPI_DMT_UINT32, ACPI_AEST0A_OFFSET (CacheReference), "Cache Reference", 0}, 134 {ACPI_DMT_UINT32, ACPI_AEST0A_OFFSET (Reserved), "Reserved", 0}, 135 ACPI_DMT_TERMINATOR 136 }; 137 138 /* 1RT: ProcessorTLB Resource */ 139 140 ACPI_DMTABLE_INFO AcpiDmTableInfoAestTlbRsrc[] = 141 { 142 {ACPI_DMT_UINT32, ACPI_AEST0B_OFFSET (TlbLevel), "TLB Level", 0}, 143 {ACPI_DMT_UINT32, ACPI_AEST0B_OFFSET (Reserved), "Reserved", 0}, 144 ACPI_DMT_TERMINATOR 145 }; 146 147 /* 2RT: Processor Generic Resource */ 148 149 ACPI_DMTABLE_INFO AcpiDmTableInfoAestGenRsrc[] = 150 { 151 {ACPI_DMT_RAW_BUFFER, 0, "Resource", 0}, 152 ACPI_DMT_TERMINATOR 153 }; 154 155 /* 1: Memory Error */ 156 157 ACPI_DMTABLE_INFO AcpiDmTableInfoAestMemError[] = 158 { 159 {ACPI_DMT_UINT32, ACPI_AEST1_OFFSET (SratProximityDomain), "Srat Proximity Domain", 0}, 160 ACPI_DMT_TERMINATOR 161 }; 162 163 /* 2: Smmu Error */ 164 165 ACPI_DMTABLE_INFO AcpiDmTableInfoAestSmmuError[] = 166 { 167 {ACPI_DMT_UINT32, ACPI_AEST2_OFFSET (IortNodeReference), "Iort Node Reference", 0}, 168 {ACPI_DMT_UINT32, ACPI_AEST2_OFFSET (SubcomponentReference), "Subcomponent Reference", 0}, 169 ACPI_DMT_TERMINATOR 170 }; 171 172 /* 3: Vendor Defined */ 173 174 ACPI_DMTABLE_INFO AcpiDmTableInfoAestVendorError[] = 175 { 176 {ACPI_DMT_UINT32, ACPI_AEST3_OFFSET (AcpiHid), "ACPI HID", 0}, 177 {ACPI_DMT_UINT32, ACPI_AEST3_OFFSET (AcpiUid), "ACPI UID", 0}, 178 {ACPI_DMT_BUF16, ACPI_AEST3_OFFSET (VendorSpecificData), "Vendor Specific Data", 0}, 179 ACPI_DMT_TERMINATOR 180 }; 181 182 /* 4: Gic Error */ 183 184 ACPI_DMTABLE_INFO AcpiDmTableInfoAestGicError[] = 185 { 186 {ACPI_DMT_AEST_GIC, ACPI_AEST4_OFFSET (InterfaceType), "GIC Interface Type", 0}, 187 {ACPI_DMT_UINT32, ACPI_AEST4_OFFSET (InstanceId), "Instance ID", 0}, 188 ACPI_DMT_TERMINATOR 189 }; 190 191 /* AestXface: Node Interface Structure */ 192 193 ACPI_DMTABLE_INFO AcpiDmTableInfoAestXface[] = 194 { 195 {ACPI_DMT_AEST_XFACE, ACPI_AEST0D_OFFSET (Type), "Interface Type", 0}, 196 {ACPI_DMT_UINT24, ACPI_AEST0D_OFFSET (Reserved[0]), "Reserved", 0}, 197 {ACPI_DMT_UINT32, ACPI_AEST0D_OFFSET (Flags), "Flags (decoded below)", 0}, 198 {ACPI_DMT_FLAG0, ACPI_AEST0D_FLAG_OFFSET (Flags, 0), "Shared Interface", 0}, 199 {ACPI_DMT_FLAG1, ACPI_AEST0D_FLAG_OFFSET (Flags, 0), "Clear MISCx Registers", 0}, 200 {ACPI_DMT_UINT64, ACPI_AEST0D_OFFSET (Address), "Address", 0}, 201 {ACPI_DMT_UINT32, ACPI_AEST0D_OFFSET (ErrorRecordIndex), "Error Record Index", 0}, 202 {ACPI_DMT_UINT32, ACPI_AEST0D_OFFSET (ErrorRecordCount), "Error Record Count", 0}, 203 {ACPI_DMT_UINT64, ACPI_AEST0D_OFFSET (ErrorRecordImplemented),"Error Record Implemented", 0}, 204 {ACPI_DMT_UINT64, ACPI_AEST0D_OFFSET (ErrorStatusReporting), "Error Status Reporting", 0}, 205 {ACPI_DMT_UINT64, ACPI_AEST0D_OFFSET (AddressingMode), "Addressing Mode", 0}, 206 ACPI_DMT_TERMINATOR 207 }; 208 209 /* AestXrupt: Node Interrupt Structure */ 210 211 ACPI_DMTABLE_INFO AcpiDmTableInfoAestXrupt[] = 212 { 213 {ACPI_DMT_AEST_XRUPT, ACPI_AEST0E_OFFSET (Type), "Interrupt Type", 0}, 214 {ACPI_DMT_UINT16, ACPI_AEST0E_OFFSET (Reserved), "Reserved", 0}, 215 {ACPI_DMT_UINT8, ACPI_AEST0E_OFFSET (Flags), "Flags (decoded below)", 0}, 216 {ACPI_DMT_FLAG0, ACPI_AEST0E_FLAG_OFFSET (Flags, 0), "Level Triggered", 0}, 217 {ACPI_DMT_UINT32, ACPI_AEST0E_OFFSET (Gsiv), "Gsiv", 0}, 218 {ACPI_DMT_UINT8, ACPI_AEST0E_OFFSET (IortId), "IortId", 0}, 219 {ACPI_DMT_UINT24, ACPI_AEST0E_OFFSET (Reserved1[0]), "Reserved", 0}, 220 ACPI_DMT_TERMINATOR 221 }; 222 223 224 /******************************************************************************* 225 * 226 * ASF - Alert Standard Format table (Signature "ASF!") 227 * 228 ******************************************************************************/ 229 230 /* Common Subtable header (one per Subtable) */ 231 232 ACPI_DMTABLE_INFO AcpiDmTableInfoAsfHdr[] = 233 { 234 {ACPI_DMT_ASF, ACPI_ASF0_OFFSET (Header.Type), "Subtable Type", 0}, 235 {ACPI_DMT_UINT8, ACPI_ASF0_OFFSET (Header.Reserved), "Reserved", 0}, 236 {ACPI_DMT_UINT16, ACPI_ASF0_OFFSET (Header.Length), "Length", DT_LENGTH}, 237 ACPI_DMT_TERMINATOR 238 }; 239 240 /* 0: ASF Information */ 241 242 ACPI_DMTABLE_INFO AcpiDmTableInfoAsf0[] = 243 { 244 {ACPI_DMT_UINT8, ACPI_ASF0_OFFSET (MinResetValue), "Minimum Reset Value", 0}, 245 {ACPI_DMT_UINT8, ACPI_ASF0_OFFSET (MinPollInterval), "Minimum Polling Interval", 0}, 246 {ACPI_DMT_UINT16, ACPI_ASF0_OFFSET (SystemId), "System ID", 0}, 247 {ACPI_DMT_UINT32, ACPI_ASF0_OFFSET (MfgId), "Manufacturer ID", 0}, 248 {ACPI_DMT_UINT8, ACPI_ASF0_OFFSET (Flags), "Flags", 0}, 249 {ACPI_DMT_UINT24, ACPI_ASF0_OFFSET (Reserved2[0]), "Reserved", 0}, 250 ACPI_DMT_TERMINATOR 251 }; 252 253 /* 1: ASF Alerts */ 254 255 ACPI_DMTABLE_INFO AcpiDmTableInfoAsf1[] = 256 { 257 {ACPI_DMT_UINT8, ACPI_ASF1_OFFSET (AssertMask), "AssertMask", 0}, 258 {ACPI_DMT_UINT8, ACPI_ASF1_OFFSET (DeassertMask), "DeassertMask", 0}, 259 {ACPI_DMT_UINT8, ACPI_ASF1_OFFSET (Alerts), "Alert Count", 0}, 260 {ACPI_DMT_UINT8, ACPI_ASF1_OFFSET (DataLength), "Alert Data Length", 0}, 261 ACPI_DMT_TERMINATOR 262 }; 263 264 /* 1a: ASF Alert data */ 265 266 ACPI_DMTABLE_INFO AcpiDmTableInfoAsf1a[] = 267 { 268 {ACPI_DMT_UINT8, ACPI_ASF1a_OFFSET (Address), "Address", 0}, 269 {ACPI_DMT_UINT8, ACPI_ASF1a_OFFSET (Command), "Command", 0}, 270 {ACPI_DMT_UINT8, ACPI_ASF1a_OFFSET (Mask), "Mask", 0}, 271 {ACPI_DMT_UINT8, ACPI_ASF1a_OFFSET (Value), "Value", 0}, 272 {ACPI_DMT_UINT8, ACPI_ASF1a_OFFSET (SensorType), "SensorType", 0}, 273 {ACPI_DMT_UINT8, ACPI_ASF1a_OFFSET (Type), "Type", 0}, 274 {ACPI_DMT_UINT8, ACPI_ASF1a_OFFSET (Offset), "Offset", 0}, 275 {ACPI_DMT_UINT8, ACPI_ASF1a_OFFSET (SourceType), "SourceType", 0}, 276 {ACPI_DMT_UINT8, ACPI_ASF1a_OFFSET (Severity), "Severity", 0}, 277 {ACPI_DMT_UINT8, ACPI_ASF1a_OFFSET (SensorNumber), "SensorNumber", 0}, 278 {ACPI_DMT_UINT8, ACPI_ASF1a_OFFSET (Entity), "Entity", 0}, 279 {ACPI_DMT_UINT8, ACPI_ASF1a_OFFSET (Instance), "Instance", 0}, 280 ACPI_DMT_TERMINATOR 281 }; 282 283 /* 2: ASF Remote Control */ 284 285 ACPI_DMTABLE_INFO AcpiDmTableInfoAsf2[] = 286 { 287 {ACPI_DMT_UINT8, ACPI_ASF2_OFFSET (Controls), "Control Count", 0}, 288 {ACPI_DMT_UINT8, ACPI_ASF2_OFFSET (DataLength), "Control Data Length", 0}, 289 {ACPI_DMT_UINT16, ACPI_ASF2_OFFSET (Reserved2), "Reserved", 0}, 290 ACPI_DMT_TERMINATOR 291 }; 292 293 /* 2a: ASF Control data */ 294 295 ACPI_DMTABLE_INFO AcpiDmTableInfoAsf2a[] = 296 { 297 {ACPI_DMT_UINT8, ACPI_ASF2a_OFFSET (Function), "Function", 0}, 298 {ACPI_DMT_UINT8, ACPI_ASF2a_OFFSET (Address), "Address", 0}, 299 {ACPI_DMT_UINT8, ACPI_ASF2a_OFFSET (Command), "Command", 0}, 300 {ACPI_DMT_UINT8, ACPI_ASF2a_OFFSET (Value), "Value", 0}, 301 ACPI_DMT_TERMINATOR 302 }; 303 304 /* 3: ASF RMCP Boot Options */ 305 306 ACPI_DMTABLE_INFO AcpiDmTableInfoAsf3[] = 307 { 308 {ACPI_DMT_BUF7, ACPI_ASF3_OFFSET (Capabilities[0]), "Capabilities", 0}, 309 {ACPI_DMT_UINT8, ACPI_ASF3_OFFSET (CompletionCode), "Completion Code", 0}, 310 {ACPI_DMT_UINT32, ACPI_ASF3_OFFSET (EnterpriseId), "Enterprise ID", 0}, 311 {ACPI_DMT_UINT8, ACPI_ASF3_OFFSET (Command), "Command", 0}, 312 {ACPI_DMT_UINT16, ACPI_ASF3_OFFSET (Parameter), "Parameter", 0}, 313 {ACPI_DMT_UINT16, ACPI_ASF3_OFFSET (BootOptions), "Boot Options", 0}, 314 {ACPI_DMT_UINT16, ACPI_ASF3_OFFSET (OemParameters), "Oem Parameters", 0}, 315 ACPI_DMT_TERMINATOR 316 }; 317 318 /* 4: ASF Address */ 319 320 ACPI_DMTABLE_INFO AcpiDmTableInfoAsf4[] = 321 { 322 {ACPI_DMT_UINT8, ACPI_ASF4_OFFSET (EpromAddress), "Eprom Address", 0}, 323 {ACPI_DMT_UINT8, ACPI_ASF4_OFFSET (Devices), "Device Count", DT_COUNT}, 324 ACPI_DMT_TERMINATOR 325 }; 326 327 328 /******************************************************************************* 329 * 330 * BDAT - BIOS Data ACPI Table 331 * 332 ******************************************************************************/ 333 334 ACPI_DMTABLE_INFO AcpiDmTableInfoBdat[] = 335 { 336 {ACPI_DMT_GAS, ACPI_BDAT_OFFSET (Gas), "BDAT Generic Address", 0}, 337 ACPI_DMT_TERMINATOR 338 }; 339 340 341 /******************************************************************************* 342 * 343 * BERT - Boot Error Record table 344 * 345 ******************************************************************************/ 346 347 ACPI_DMTABLE_INFO AcpiDmTableInfoBert[] = 348 { 349 {ACPI_DMT_UINT32, ACPI_BERT_OFFSET (RegionLength), "Boot Error Region Length", 0}, 350 {ACPI_DMT_UINT64, ACPI_BERT_OFFSET (Address), "Boot Error Region Address", 0}, 351 ACPI_DMT_TERMINATOR 352 }; 353 354 355 /******************************************************************************* 356 * 357 * BGRT - Boot Graphics Resource Table (ACPI 5.0) 358 * 359 ******************************************************************************/ 360 361 ACPI_DMTABLE_INFO AcpiDmTableInfoBgrt[] = 362 { 363 {ACPI_DMT_UINT16, ACPI_BGRT_OFFSET (Version), "Version", 0}, 364 {ACPI_DMT_UINT8, ACPI_BGRT_OFFSET (Status), "Status (decoded below)", DT_FLAG}, 365 {ACPI_DMT_FLAG0, ACPI_BGRT_FLAG_OFFSET (Status, 0), "Displayed", 0}, 366 {ACPI_DMT_FLAGS1, ACPI_BGRT_FLAG_OFFSET (Status, 0), "Orientation Offset", 0}, 367 368 {ACPI_DMT_UINT8, ACPI_BGRT_OFFSET (ImageType), "Image Type", 0}, 369 {ACPI_DMT_UINT64, ACPI_BGRT_OFFSET (ImageAddress), "Image Address", 0}, 370 {ACPI_DMT_UINT32, ACPI_BGRT_OFFSET (ImageOffsetX), "Image OffsetX", 0}, 371 {ACPI_DMT_UINT32, ACPI_BGRT_OFFSET (ImageOffsetY), "Image OffsetY", 0}, 372 ACPI_DMT_TERMINATOR 373 }; 374 375 376 /******************************************************************************* 377 * 378 * BOOT - Simple Boot Flag Table 379 * 380 ******************************************************************************/ 381 382 ACPI_DMTABLE_INFO AcpiDmTableInfoBoot[] = 383 { 384 {ACPI_DMT_UINT8, ACPI_BOOT_OFFSET (CmosIndex), "Boot Register Index", 0}, 385 {ACPI_DMT_UINT24, ACPI_BOOT_OFFSET (Reserved[0]), "Reserved", 0}, 386 ACPI_DMT_TERMINATOR 387 }; 388 389 /******************************************************************************* 390 * 391 * CDAT - Coherent Device Attribute Table 392 * 393 ******************************************************************************/ 394 395 /* Table header (not ACPI-compliant) */ 396 397 ACPI_DMTABLE_INFO AcpiDmTableInfoCdatTableHdr[] = 398 { 399 {ACPI_DMT_UINT32, ACPI_CDAT_OFFSET (Length), "CDAT Table Length", DT_LENGTH}, 400 {ACPI_DMT_UINT8, ACPI_CDAT_OFFSET (Revision), "Revision", 0}, 401 {ACPI_DMT_UINT8, ACPI_CDAT_OFFSET (Checksum), "Checksum", 0}, 402 {ACPI_DMT_UINT48, ACPI_CDAT_OFFSET (Reserved), "Reserved", 0}, 403 {ACPI_DMT_UINT32, ACPI_CDAT_OFFSET (Sequence), "Sequence", 0}, 404 ACPI_DMT_TERMINATOR 405 }; 406 407 /* Common subtable header */ 408 409 ACPI_DMTABLE_INFO AcpiDmTableInfoCdatHeader[] = 410 { 411 {ACPI_DMT_CDAT, ACPI_CDATH_OFFSET (Type), "Subtable Type", 0}, 412 {ACPI_DMT_UINT8, ACPI_CDATH_OFFSET (Reserved), "Reserved", 0}, 413 {ACPI_DMT_UINT16, ACPI_CDATH_OFFSET (Length), "Length", DT_LENGTH}, 414 ACPI_DMT_TERMINATOR 415 }; 416 417 /* Subtable 0: Device Scoped Memory Affinity Structure (DSMAS) */ 418 419 ACPI_DMTABLE_INFO AcpiDmTableInfoCdat0[] = 420 { 421 {ACPI_DMT_UINT8, ACPI_CDAT0_OFFSET (DsmadHandle), "DSMAD Handle", 0}, 422 {ACPI_DMT_UINT8, ACPI_CDAT0_OFFSET (Flags), "Flags", 0}, 423 {ACPI_DMT_UINT16, ACPI_CDAT0_OFFSET (Reserved), "Reserved", 0}, 424 {ACPI_DMT_UINT64, ACPI_CDAT0_OFFSET (DpaBaseAddress), "DPA Base Address", 0}, 425 {ACPI_DMT_UINT64, ACPI_CDAT0_OFFSET (DpaLength), "DPA Length", 0}, 426 ACPI_DMT_TERMINATOR 427 }; 428 429 /* Subtable 1: Device scoped Latency and Bandwidth Information Structure (DSLBIS) */ 430 431 ACPI_DMTABLE_INFO AcpiDmTableInfoCdat1[] = 432 { 433 {ACPI_DMT_UINT8, ACPI_CDAT1_OFFSET (Handle), "Handle", 0}, 434 {ACPI_DMT_UINT8, ACPI_CDAT1_OFFSET (Flags), "Flags", 0}, 435 {ACPI_DMT_UINT8, ACPI_CDAT1_OFFSET (DataType), "Data Type", 0}, 436 {ACPI_DMT_UINT8, ACPI_CDAT1_OFFSET (Reserved), "Reserved", 0}, 437 {ACPI_DMT_UINT64, ACPI_CDAT1_OFFSET (EntryBaseUnit), "Entry Base Unit", 0}, 438 {ACPI_DMT_UINT16, ACPI_CDAT1_OFFSET (Entry[0]), "Entry0", 0}, 439 {ACPI_DMT_UINT16, ACPI_CDAT1_OFFSET (Entry[1]), "Entry1", 0}, 440 {ACPI_DMT_UINT16, ACPI_CDAT1_OFFSET (Entry[2]), "Entry2", 0}, 441 {ACPI_DMT_UINT16, ACPI_CDAT1_OFFSET (Reserved2), "Reserved", 0}, 442 ACPI_DMT_TERMINATOR 443 }; 444 445 /* Subtable 2: Device Scoped Memory Side Cache Information Structure (DSMSCIS) */ 446 447 ACPI_DMTABLE_INFO AcpiDmTableInfoCdat2[] = 448 { 449 {ACPI_DMT_UINT8, ACPI_CDAT2_OFFSET (DsmasHandle), "DSMAS Handle", 0}, 450 {ACPI_DMT_UINT24, ACPI_CDAT2_OFFSET (Reserved[3]), "Reserved", 0}, 451 {ACPI_DMT_UINT64, ACPI_CDAT2_OFFSET (SideCacheSize), "Side Cache Size", 0}, 452 {ACPI_DMT_UINT32, ACPI_CDAT2_OFFSET (CacheAttributes), "Cache Attributes", 0}, 453 ACPI_DMT_TERMINATOR 454 }; 455 456 /* Subtable 3: Device Scoped Initiator Structure (DSIS) */ 457 458 ACPI_DMTABLE_INFO AcpiDmTableInfoCdat3[] = 459 { 460 {ACPI_DMT_UINT8, ACPI_CDAT3_OFFSET (Flags), "Flags", 0}, 461 {ACPI_DMT_UINT8, ACPI_CDAT3_OFFSET (Handle), "Handle", 0}, 462 {ACPI_DMT_UINT16, ACPI_CDAT3_OFFSET (Reserved), "Reserved", 0}, 463 ACPI_DMT_TERMINATOR 464 }; 465 466 /* Subtable 4: Device Scoped EFI Memory Type Structure (DSEMTS) */ 467 468 ACPI_DMTABLE_INFO AcpiDmTableInfoCdat4[] = 469 { 470 {ACPI_DMT_UINT8, ACPI_CDAT4_OFFSET (DsmasHandle), "DSMAS Handle", 0}, 471 {ACPI_DMT_UINT8, ACPI_CDAT4_OFFSET (MemoryType), "Memory Type", 0}, 472 {ACPI_DMT_UINT16, ACPI_CDAT4_OFFSET (Reserved), "Reserved", 0}, 473 {ACPI_DMT_UINT64, ACPI_CDAT4_OFFSET (DpaOffset), "DPA Offset", 0}, 474 {ACPI_DMT_UINT64, ACPI_CDAT4_OFFSET (RangeLength), "DPA Range Length", 0}, 475 ACPI_DMT_TERMINATOR 476 }; 477 478 /* Subtable 5: Switch Scoped Latency and Bandwidth Information Structure (SSLBIS) */ 479 480 ACPI_DMTABLE_INFO AcpiDmTableInfoCdat5[] = 481 { 482 {ACPI_DMT_UINT8, ACPI_CDAT5_OFFSET (DataType), "Data Type", 0}, 483 {ACPI_DMT_UINT24, ACPI_CDAT5_OFFSET (Reserved), "Reserved", 0}, 484 {ACPI_DMT_UINT64, ACPI_CDAT5_OFFSET (EntryBaseUnit), "Entry Base Unit", 0}, 485 ACPI_DMT_TERMINATOR 486 }; 487 488 /* Switch Scoped Latency and Bandwidth Entry (SSLBE) (For subtable 5 above) */ 489 490 ACPI_DMTABLE_INFO AcpiDmTableInfoCdatEntries[] = 491 { 492 {ACPI_DMT_UINT16, ACPI_CDATE_OFFSET (PortxId), "Port X Id", 0}, 493 {ACPI_DMT_UINT16, ACPI_CDATE_OFFSET (PortyId), "Port Y Id", 0}, 494 {ACPI_DMT_UINT16, ACPI_CDATE_OFFSET (LatencyOrBandwidth), "Latency or Bandwidth", 0}, 495 {ACPI_DMT_UINT16, ACPI_CDATE_OFFSET (Reserved), "Reserved", 0}, 496 ACPI_DMT_TERMINATOR 497 }; 498 499 500 /******************************************************************************* 501 * 502 * CEDT - CXL Early Discovery Table 503 * 504 ******************************************************************************/ 505 506 ACPI_DMTABLE_INFO AcpiDmTableInfoCedtHdr[] = 507 { 508 {ACPI_DMT_CEDT, ACPI_CEDT_OFFSET (Type), "Subtable Type", 0}, 509 {ACPI_DMT_UINT8, ACPI_CEDT_OFFSET (Reserved), "Reserved", 0}, 510 {ACPI_DMT_UINT16, ACPI_CEDT_OFFSET (Length), "Length", DT_LENGTH}, 511 ACPI_DMT_TERMINATOR 512 }; 513 514 /* 0: CXL Host Bridge Structure */ 515 516 ACPI_DMTABLE_INFO AcpiDmTableInfoCedt0[] = 517 { 518 {ACPI_DMT_UINT32, ACPI_CEDT0_OFFSET (Uid), "Associated host bridge", 0}, 519 {ACPI_DMT_UINT32, ACPI_CEDT0_OFFSET (CxlVersion), "Specification version", 0}, 520 {ACPI_DMT_UINT32, ACPI_CEDT0_OFFSET (Reserved), "Reserved", 0}, 521 {ACPI_DMT_UINT64, ACPI_CEDT0_OFFSET (Base), "Register base", 0}, 522 {ACPI_DMT_UINT64, ACPI_CEDT0_OFFSET (Length), "Register length", 0}, 523 ACPI_DMT_TERMINATOR 524 }; 525 526 /* 1: CXL Fixed Memory Window Structure */ 527 528 ACPI_DMTABLE_INFO AcpiDmTableInfoCedt1[] = 529 { 530 {ACPI_DMT_UINT32, ACPI_CEDT1_OFFSET (Reserved1), "Reserved", 0}, 531 {ACPI_DMT_UINT64, ACPI_CEDT1_OFFSET (BaseHpa), "Window base address", 0}, 532 {ACPI_DMT_UINT64, ACPI_CEDT1_OFFSET (WindowSize), "Window size", 0}, 533 {ACPI_DMT_UINT8, ACPI_CEDT1_OFFSET (InterleaveWays), "Interleave Members (2^n)", 0}, 534 {ACPI_DMT_UINT8, ACPI_CEDT1_OFFSET (InterleaveArithmetic), "Interleave Arithmetic", 0}, 535 {ACPI_DMT_UINT16, ACPI_CEDT1_OFFSET (Reserved2), "Reserved", 0}, 536 {ACPI_DMT_UINT32, ACPI_CEDT1_OFFSET (Granularity), "Granularity", 0}, 537 {ACPI_DMT_UINT16, ACPI_CEDT1_OFFSET (Restrictions), "Restrictions", 0}, 538 {ACPI_DMT_UINT16, ACPI_CEDT1_OFFSET (QtgId), "QtgId", 0}, 539 {ACPI_DMT_UINT32, ACPI_CEDT1_OFFSET (InterleaveTargets), "First Target", 0}, 540 ACPI_DMT_TERMINATOR 541 }; 542 543 ACPI_DMTABLE_INFO AcpiDmTableInfoCedt1_te[] = 544 { 545 {ACPI_DMT_UINT32, ACPI_CEDT1_TE_OFFSET (InterleaveTarget), "Next Target", 0}, 546 ACPI_DMT_TERMINATOR 547 }; 548 549 /******************************************************************************* 550 * 551 * CPEP - Corrected Platform Error Polling table 552 * 553 ******************************************************************************/ 554 555 ACPI_DMTABLE_INFO AcpiDmTableInfoCpep[] = 556 { 557 {ACPI_DMT_UINT64, ACPI_CPEP_OFFSET (Reserved), "Reserved", 0}, 558 ACPI_DMT_TERMINATOR 559 }; 560 561 ACPI_DMTABLE_INFO AcpiDmTableInfoCpep0[] = 562 { 563 {ACPI_DMT_UINT8, ACPI_CPEP0_OFFSET (Header.Type), "Subtable Type", 0}, 564 {ACPI_DMT_UINT8, ACPI_CPEP0_OFFSET (Header.Length), "Length", DT_LENGTH}, 565 {ACPI_DMT_UINT8, ACPI_CPEP0_OFFSET (Id), "Processor ID", 0}, 566 {ACPI_DMT_UINT8, ACPI_CPEP0_OFFSET (Eid), "Processor EID", 0}, 567 {ACPI_DMT_UINT32, ACPI_CPEP0_OFFSET (Interval), "Polling Interval", 0}, 568 ACPI_DMT_TERMINATOR 569 }; 570 571 572 /******************************************************************************* 573 * 574 * CSRT - Core System Resource Table 575 * 576 ******************************************************************************/ 577 578 /* Main table consists only of the standard ACPI table header */ 579 580 /* Resource Group subtable */ 581 582 ACPI_DMTABLE_INFO AcpiDmTableInfoCsrt0[] = 583 { 584 {ACPI_DMT_UINT32, ACPI_CSRT0_OFFSET (Length), "Length", DT_LENGTH}, 585 {ACPI_DMT_UINT32, ACPI_CSRT0_OFFSET (VendorId), "Vendor ID", 0}, 586 {ACPI_DMT_UINT32, ACPI_CSRT0_OFFSET (SubvendorId), "Subvendor ID", 0}, 587 {ACPI_DMT_UINT16, ACPI_CSRT0_OFFSET (DeviceId), "Device ID", 0}, 588 {ACPI_DMT_UINT16, ACPI_CSRT0_OFFSET (SubdeviceId), "Subdevice ID", 0}, 589 {ACPI_DMT_UINT16, ACPI_CSRT0_OFFSET (Revision), "Revision", 0}, 590 {ACPI_DMT_UINT16, ACPI_CSRT0_OFFSET (Reserved), "Reserved", 0}, 591 {ACPI_DMT_UINT32, ACPI_CSRT0_OFFSET (SharedInfoLength), "Shared Info Length", 0}, 592 ACPI_DMT_TERMINATOR 593 }; 594 595 /* Shared Info subtable */ 596 597 ACPI_DMTABLE_INFO AcpiDmTableInfoCsrt1[] = 598 { 599 {ACPI_DMT_UINT16, ACPI_CSRT1_OFFSET (MajorVersion), "Major Version", 0}, 600 {ACPI_DMT_UINT16, ACPI_CSRT1_OFFSET (MinorVersion), "Minor Version", 0}, 601 {ACPI_DMT_UINT32, ACPI_CSRT1_OFFSET (MmioBaseLow), "MMIO Base Address Low", 0}, 602 {ACPI_DMT_UINT32, ACPI_CSRT1_OFFSET (MmioBaseHigh), "MMIO Base Address High", 0}, 603 {ACPI_DMT_UINT32, ACPI_CSRT1_OFFSET (GsiInterrupt), "GSI Interrupt", 0}, 604 {ACPI_DMT_UINT8, ACPI_CSRT1_OFFSET (InterruptPolarity), "Interrupt Polarity", 0}, 605 {ACPI_DMT_UINT8, ACPI_CSRT1_OFFSET (InterruptMode), "Interrupt Mode", 0}, 606 {ACPI_DMT_UINT8, ACPI_CSRT1_OFFSET (NumChannels), "Num Channels", 0}, 607 {ACPI_DMT_UINT8, ACPI_CSRT1_OFFSET (DmaAddressWidth), "DMA Address Width", 0}, 608 {ACPI_DMT_UINT16, ACPI_CSRT1_OFFSET (BaseRequestLine), "Base Request Line", 0}, 609 {ACPI_DMT_UINT16, ACPI_CSRT1_OFFSET (NumHandshakeSignals), "Num Handshake Signals", 0}, 610 {ACPI_DMT_UINT32, ACPI_CSRT1_OFFSET (MaxBlockSize), "Max Block Size", 0}, 611 ACPI_DMT_TERMINATOR 612 }; 613 614 /* Resource Descriptor subtable */ 615 616 ACPI_DMTABLE_INFO AcpiDmTableInfoCsrt2[] = 617 { 618 {ACPI_DMT_UINT32, ACPI_CSRT2_OFFSET (Length), "Length", DT_LENGTH}, 619 {ACPI_DMT_UINT16, ACPI_CSRT2_OFFSET (Type), "Type", 0}, 620 {ACPI_DMT_UINT16, ACPI_CSRT2_OFFSET (Subtype), "Subtype", 0}, 621 {ACPI_DMT_UINT32, ACPI_CSRT2_OFFSET (Uid), "UID", 0}, 622 ACPI_DMT_TERMINATOR 623 }; 624 625 ACPI_DMTABLE_INFO AcpiDmTableInfoCsrt2a[] = 626 { 627 {ACPI_DMT_RAW_BUFFER, 0, "ResourceInfo", DT_OPTIONAL}, 628 ACPI_DMT_TERMINATOR 629 }; 630 631 632 /******************************************************************************* 633 * 634 * DBG2 - Debug Port Table 2 635 * 636 ******************************************************************************/ 637 638 ACPI_DMTABLE_INFO AcpiDmTableInfoDbg2[] = 639 { 640 {ACPI_DMT_UINT32, ACPI_DBG2_OFFSET (InfoOffset), "Info Offset", 0}, 641 {ACPI_DMT_UINT32, ACPI_DBG2_OFFSET (InfoCount), "Info Count", 0}, 642 ACPI_DMT_TERMINATOR 643 }; 644 645 /* Debug Device Information Subtable */ 646 647 ACPI_DMTABLE_INFO AcpiDmTableInfoDbg2Device[] = 648 { 649 {ACPI_DMT_UINT8, ACPI_DBG20_OFFSET (Revision), "Revision", 0}, 650 {ACPI_DMT_UINT16, ACPI_DBG20_OFFSET (Length), "Length", DT_LENGTH}, 651 {ACPI_DMT_UINT8, ACPI_DBG20_OFFSET (RegisterCount), "Register Count", 0}, 652 {ACPI_DMT_UINT16, ACPI_DBG20_OFFSET (NamepathLength), "Namepath Length", 0}, 653 {ACPI_DMT_UINT16, ACPI_DBG20_OFFSET (NamepathOffset), "Namepath Offset", 0}, 654 {ACPI_DMT_UINT16, ACPI_DBG20_OFFSET (OemDataLength), "OEM Data Length", DT_DESCRIBES_OPTIONAL}, 655 {ACPI_DMT_UINT16, ACPI_DBG20_OFFSET (OemDataOffset), "OEM Data Offset", DT_DESCRIBES_OPTIONAL}, 656 {ACPI_DMT_UINT16, ACPI_DBG20_OFFSET (PortType), "Port Type", 0}, 657 {ACPI_DMT_UINT16, ACPI_DBG20_OFFSET (PortSubtype), "Port Subtype", 0}, 658 {ACPI_DMT_UINT16, ACPI_DBG20_OFFSET (Reserved), "Reserved", 0}, 659 {ACPI_DMT_UINT16, ACPI_DBG20_OFFSET (BaseAddressOffset), "Base Address Offset", 0}, 660 {ACPI_DMT_UINT16, ACPI_DBG20_OFFSET (AddressSizeOffset), "Address Size Offset", 0}, 661 ACPI_DMT_TERMINATOR 662 }; 663 664 /* Variable-length data for the subtable */ 665 666 ACPI_DMTABLE_INFO AcpiDmTableInfoDbg2Addr[] = 667 { 668 {ACPI_DMT_GAS, 0, "Base Address Register", 0}, 669 ACPI_DMT_TERMINATOR 670 }; 671 672 ACPI_DMTABLE_INFO AcpiDmTableInfoDbg2Size[] = 673 { 674 {ACPI_DMT_UINT32, 0, "Address Size", 0}, 675 ACPI_DMT_TERMINATOR 676 }; 677 678 ACPI_DMTABLE_INFO AcpiDmTableInfoDbg2Name[] = 679 { 680 {ACPI_DMT_STRING, 0, "Namepath", 0}, 681 ACPI_DMT_TERMINATOR 682 }; 683 684 ACPI_DMTABLE_INFO AcpiDmTableInfoDbg2OemData[] = 685 { 686 {ACPI_DMT_RAW_BUFFER, 0, "OEM Data", DT_OPTIONAL}, 687 ACPI_DMT_TERMINATOR 688 }; 689 690 691 /******************************************************************************* 692 * 693 * DBGP - Debug Port 694 * 695 ******************************************************************************/ 696 697 ACPI_DMTABLE_INFO AcpiDmTableInfoDbgp[] = 698 { 699 {ACPI_DMT_UINT8, ACPI_DBGP_OFFSET (Type), "Interface Type", 0}, 700 {ACPI_DMT_UINT24, ACPI_DBGP_OFFSET (Reserved[0]), "Reserved", 0}, 701 {ACPI_DMT_GAS, ACPI_DBGP_OFFSET (DebugPort), "Debug Port Register", 0}, 702 ACPI_DMT_TERMINATOR 703 }; 704 705 706 /******************************************************************************* 707 * 708 * DMAR - DMA Remapping table 709 * 710 ******************************************************************************/ 711 712 ACPI_DMTABLE_INFO AcpiDmTableInfoDmar[] = 713 { 714 {ACPI_DMT_UINT8, ACPI_DMAR_OFFSET (Width), "Host Address Width", 0}, 715 {ACPI_DMT_UINT8, ACPI_DMAR_OFFSET (Flags), "Flags", 0}, 716 {ACPI_DMT_BUF10, ACPI_DMAR_OFFSET (Reserved[0]), "Reserved", 0}, 717 ACPI_DMT_TERMINATOR 718 }; 719 720 /* Common Subtable header (one per Subtable) */ 721 722 ACPI_DMTABLE_INFO AcpiDmTableInfoDmarHdr[] = 723 { 724 {ACPI_DMT_DMAR, ACPI_DMAR0_OFFSET (Header.Type), "Subtable Type", 0}, 725 {ACPI_DMT_UINT16, ACPI_DMAR0_OFFSET (Header.Length), "Length", DT_LENGTH}, 726 ACPI_DMT_TERMINATOR 727 }; 728 729 /* Common device scope entry */ 730 731 ACPI_DMTABLE_INFO AcpiDmTableInfoDmarScope[] = 732 { 733 {ACPI_DMT_DMAR_SCOPE, ACPI_DMARS_OFFSET (EntryType), "Device Scope Type", 0}, 734 {ACPI_DMT_UINT8, ACPI_DMARS_OFFSET (Length), "Entry Length", DT_LENGTH}, 735 {ACPI_DMT_UINT16, ACPI_DMARS_OFFSET (Reserved), "Reserved", 0}, 736 {ACPI_DMT_UINT8, ACPI_DMARS_OFFSET (EnumerationId), "Enumeration ID", 0}, 737 {ACPI_DMT_UINT8, ACPI_DMARS_OFFSET (Bus), "PCI Bus Number", 0}, 738 ACPI_DMT_TERMINATOR 739 }; 740 741 /* DMAR Subtables */ 742 743 /* 0: Hardware Unit Definition */ 744 745 ACPI_DMTABLE_INFO AcpiDmTableInfoDmar0[] = 746 { 747 {ACPI_DMT_UINT8, ACPI_DMAR0_OFFSET (Flags), "Flags", 0}, 748 {ACPI_DMT_UINT8, ACPI_DMAR0_OFFSET (Reserved), "Reserved", 0}, 749 {ACPI_DMT_UINT16, ACPI_DMAR0_OFFSET (Segment), "PCI Segment Number", 0}, 750 {ACPI_DMT_UINT64, ACPI_DMAR0_OFFSET (Address), "Register Base Address", 0}, 751 ACPI_DMT_TERMINATOR 752 }; 753 754 /* 1: Reserved Memory Definition */ 755 756 ACPI_DMTABLE_INFO AcpiDmTableInfoDmar1[] = 757 { 758 {ACPI_DMT_UINT16, ACPI_DMAR1_OFFSET (Reserved), "Reserved", 0}, 759 {ACPI_DMT_UINT16, ACPI_DMAR1_OFFSET (Segment), "PCI Segment Number", 0}, 760 {ACPI_DMT_UINT64, ACPI_DMAR1_OFFSET (BaseAddress), "Base Address", 0}, 761 {ACPI_DMT_UINT64, ACPI_DMAR1_OFFSET (EndAddress), "End Address (limit)", 0}, 762 ACPI_DMT_TERMINATOR 763 }; 764 765 /* 2: Root Port ATS Capability Definition */ 766 767 ACPI_DMTABLE_INFO AcpiDmTableInfoDmar2[] = 768 { 769 {ACPI_DMT_UINT8, ACPI_DMAR2_OFFSET (Flags), "Flags", 0}, 770 {ACPI_DMT_UINT8, ACPI_DMAR2_OFFSET (Reserved), "Reserved", 0}, 771 {ACPI_DMT_UINT16, ACPI_DMAR2_OFFSET (Segment), "PCI Segment Number", 0}, 772 ACPI_DMT_TERMINATOR 773 }; 774 775 /* 3: Remapping Hardware Static Affinity Structure */ 776 777 ACPI_DMTABLE_INFO AcpiDmTableInfoDmar3[] = 778 { 779 {ACPI_DMT_UINT32, ACPI_DMAR3_OFFSET (Reserved), "Reserved", 0}, 780 {ACPI_DMT_UINT64, ACPI_DMAR3_OFFSET (BaseAddress), "Base Address", 0}, 781 {ACPI_DMT_UINT32, ACPI_DMAR3_OFFSET (ProximityDomain), "Proximity Domain", 0}, 782 ACPI_DMT_TERMINATOR 783 }; 784 785 /* 4: ACPI Namespace Device Declaration Structure */ 786 787 ACPI_DMTABLE_INFO AcpiDmTableInfoDmar4[] = 788 { 789 {ACPI_DMT_UINT24, ACPI_DMAR4_OFFSET (Reserved[0]), "Reserved", 0}, 790 {ACPI_DMT_UINT8, ACPI_DMAR4_OFFSET (DeviceNumber), "Device Number", 0}, 791 {ACPI_DMT_STRING, ACPI_DMAR4_OFFSET (DeviceName[0]), "Device Name", 0}, 792 ACPI_DMT_TERMINATOR 793 }; 794 795 /* 5: Hardware Unit Definition */ 796 797 ACPI_DMTABLE_INFO AcpiDmTableInfoDmar5[] = 798 { 799 {ACPI_DMT_UINT8, ACPI_DMAR5_OFFSET (Flags), "Flags", 0}, 800 {ACPI_DMT_UINT8, ACPI_DMAR5_OFFSET (Reserved), "Reserved", 0}, 801 {ACPI_DMT_UINT16, ACPI_DMAR5_OFFSET (Segment), "PCI Segment Number", 0}, 802 ACPI_DMT_TERMINATOR 803 }; 804 805 /******************************************************************************* 806 * 807 * DRTM - Dynamic Root of Trust for Measurement table 808 * 809 ******************************************************************************/ 810 811 ACPI_DMTABLE_INFO AcpiDmTableInfoDrtm[] = 812 { 813 {ACPI_DMT_UINT64, ACPI_DRTM_OFFSET (EntryBaseAddress), "Entry Base Address", 0}, 814 {ACPI_DMT_UINT64, ACPI_DRTM_OFFSET (EntryLength), "Entry Length", 0}, 815 {ACPI_DMT_UINT32, ACPI_DRTM_OFFSET (EntryAddress32), "Entry 32", 0}, 816 {ACPI_DMT_UINT64, ACPI_DRTM_OFFSET (EntryAddress64), "Entry 64", 0}, 817 {ACPI_DMT_UINT64, ACPI_DRTM_OFFSET (ExitAddress), "Exit Address", 0}, 818 {ACPI_DMT_UINT64, ACPI_DRTM_OFFSET (LogAreaAddress), "Log Area Start", 0}, 819 {ACPI_DMT_UINT32, ACPI_DRTM_OFFSET (LogAreaLength), "Log Area Length", 0}, 820 {ACPI_DMT_UINT64, ACPI_DRTM_OFFSET (ArchDependentAddress), "Arch Dependent Address", 0}, 821 {ACPI_DMT_UINT32, ACPI_DRTM_OFFSET (Flags), "Flags (decoded below)", 0}, 822 {ACPI_DMT_FLAG0, ACPI_DRTM_FLAG_OFFSET (Flags, 0), "Namespace in TCB", 0}, 823 {ACPI_DMT_FLAG1, ACPI_DRTM_FLAG_OFFSET (Flags, 0), "Gap Code on S3 Resume", 0}, 824 {ACPI_DMT_FLAG2, ACPI_DRTM_FLAG_OFFSET (Flags, 0), "Gap Code on DLME_Exit", 0}, 825 {ACPI_DMT_FLAG3, ACPI_DRTM_FLAG_OFFSET (Flags, 0), "PCR_Authorities Changed", 0}, 826 ACPI_DMT_TERMINATOR 827 }; 828 829 ACPI_DMTABLE_INFO AcpiDmTableInfoDrtm0[] = 830 { 831 {ACPI_DMT_UINT32, ACPI_DRTM0_OFFSET (ValidatedTableCount), "Validated Table Count", DT_COUNT}, 832 ACPI_DMT_TERMINATOR 833 }; 834 835 ACPI_DMTABLE_INFO AcpiDmTableInfoDrtm0a[] = 836 { 837 {ACPI_DMT_UINT64, 0, "Table Address", DT_OPTIONAL}, 838 ACPI_DMT_TERMINATOR 839 }; 840 841 ACPI_DMTABLE_INFO AcpiDmTableInfoDrtm1[] = 842 { 843 {ACPI_DMT_UINT32, ACPI_DRTM1_OFFSET (ResourceCount), "Resource Count", DT_COUNT}, 844 ACPI_DMT_TERMINATOR 845 }; 846 847 ACPI_DMTABLE_INFO AcpiDmTableInfoDrtm1a[] = 848 { 849 {ACPI_DMT_UINT56, ACPI_DRTM1a_OFFSET (Size[0]), "Size", DT_OPTIONAL}, 850 {ACPI_DMT_UINT8, ACPI_DRTM1a_OFFSET (Type), "Type", 0}, 851 {ACPI_DMT_FLAG0, ACPI_DRTM1a_FLAG_OFFSET (Type, 0), "Resource Type", 0}, 852 {ACPI_DMT_FLAG7, ACPI_DRTM1a_FLAG_OFFSET (Type, 0), "Protections", 0}, 853 {ACPI_DMT_UINT64, ACPI_DRTM1a_OFFSET (Address), "Address", 0}, 854 ACPI_DMT_TERMINATOR 855 }; 856 857 ACPI_DMTABLE_INFO AcpiDmTableInfoDrtm2[] = 858 { 859 {ACPI_DMT_UINT32, ACPI_DRTM2_OFFSET (DpsIdLength), "DLME Platform Id Length", DT_COUNT}, 860 {ACPI_DMT_BUF16, ACPI_DRTM2_OFFSET (DpsId), "DLME Platform Id", DT_COUNT}, 861 ACPI_DMT_TERMINATOR 862 }; 863 864 865 /******************************************************************************* 866 * 867 * ECDT - Embedded Controller Boot Resources Table 868 * 869 ******************************************************************************/ 870 871 ACPI_DMTABLE_INFO AcpiDmTableInfoEcdt[] = 872 { 873 {ACPI_DMT_GAS, ACPI_ECDT_OFFSET (Control), "Command/Status Register", 0}, 874 {ACPI_DMT_GAS, ACPI_ECDT_OFFSET (Data), "Data Register", 0}, 875 {ACPI_DMT_UINT32, ACPI_ECDT_OFFSET (Uid), "UID", 0}, 876 {ACPI_DMT_UINT8, ACPI_ECDT_OFFSET (Gpe), "GPE Number", 0}, 877 {ACPI_DMT_STRING, ACPI_ECDT_OFFSET (Id[0]), "Namepath", 0}, 878 ACPI_DMT_TERMINATOR 879 }; 880 881 882 /******************************************************************************* 883 * 884 * EINJ - Error Injection table 885 * 886 ******************************************************************************/ 887 888 ACPI_DMTABLE_INFO AcpiDmTableInfoEinj[] = 889 { 890 {ACPI_DMT_UINT32, ACPI_EINJ_OFFSET (HeaderLength), "Injection Header Length", 0}, 891 {ACPI_DMT_UINT8, ACPI_EINJ_OFFSET (Flags), "Flags", 0}, 892 {ACPI_DMT_UINT24, ACPI_EINJ_OFFSET (Reserved[0]), "Reserved", 0}, 893 {ACPI_DMT_UINT32, ACPI_EINJ_OFFSET (Entries), "Injection Entry Count", 0}, 894 ACPI_DMT_TERMINATOR 895 }; 896 897 ACPI_DMTABLE_INFO AcpiDmTableInfoEinj0[] = 898 { 899 {ACPI_DMT_EINJACT, ACPI_EINJ0_OFFSET (Action), "Action", 0}, 900 {ACPI_DMT_EINJINST, ACPI_EINJ0_OFFSET (Instruction), "Instruction", 0}, 901 {ACPI_DMT_UINT8, ACPI_EINJ0_OFFSET (Flags), "Flags (decoded below)", DT_FLAG}, 902 {ACPI_DMT_FLAG0, ACPI_EINJ0_FLAG_OFFSET (Flags,0), "Preserve Register Bits", 0}, 903 904 {ACPI_DMT_UINT8, ACPI_EINJ0_OFFSET (Reserved), "Reserved", 0}, 905 {ACPI_DMT_GAS, ACPI_EINJ0_OFFSET (RegisterRegion), "Register Region", 0}, 906 {ACPI_DMT_UINT64, ACPI_EINJ0_OFFSET (Value), "Value", 0}, 907 {ACPI_DMT_UINT64, ACPI_EINJ0_OFFSET (Mask), "Mask", 0}, 908 ACPI_DMT_TERMINATOR 909 }; 910 911 912 /******************************************************************************* 913 * 914 * ERST - Error Record Serialization table 915 * 916 ******************************************************************************/ 917 918 ACPI_DMTABLE_INFO AcpiDmTableInfoErst[] = 919 { 920 {ACPI_DMT_UINT32, ACPI_ERST_OFFSET (HeaderLength), "Serialization Header Length", 0}, 921 {ACPI_DMT_UINT32, ACPI_ERST_OFFSET (Reserved), "Reserved", 0}, 922 {ACPI_DMT_UINT32, ACPI_ERST_OFFSET (Entries), "Instruction Entry Count", 0}, 923 ACPI_DMT_TERMINATOR 924 }; 925 926 ACPI_DMTABLE_INFO AcpiDmTableInfoErst0[] = 927 { 928 {ACPI_DMT_ERSTACT, ACPI_ERST0_OFFSET (Action), "Action", 0}, 929 {ACPI_DMT_ERSTINST, ACPI_ERST0_OFFSET (Instruction), "Instruction", 0}, 930 {ACPI_DMT_UINT8, ACPI_ERST0_OFFSET (Flags), "Flags (decoded below)", DT_FLAG}, 931 {ACPI_DMT_FLAG0, ACPI_ERST0_FLAG_OFFSET (Flags,0), "Preserve Register Bits", 0}, 932 933 {ACPI_DMT_UINT8, ACPI_ERST0_OFFSET (Reserved), "Reserved", 0}, 934 {ACPI_DMT_GAS, ACPI_ERST0_OFFSET (RegisterRegion), "Register Region", 0}, 935 {ACPI_DMT_UINT64, ACPI_ERST0_OFFSET (Value), "Value", 0}, 936 {ACPI_DMT_UINT64, ACPI_ERST0_OFFSET (Mask), "Mask", 0}, 937 ACPI_DMT_TERMINATOR 938 }; 939 940 941 /******************************************************************************* 942 * 943 * FPDT - Firmware Performance Data Table (ACPI 5.0) 944 * 945 ******************************************************************************/ 946 947 /* Main table consists of only the standard ACPI header - subtables follow */ 948 949 /* FPDT subtable header */ 950 951 ACPI_DMTABLE_INFO AcpiDmTableInfoFpdtHdr[] = 952 { 953 {ACPI_DMT_UINT16, ACPI_FPDTH_OFFSET (Type), "Subtable Type", 0}, 954 {ACPI_DMT_UINT8, ACPI_FPDTH_OFFSET (Length), "Length", DT_LENGTH}, 955 {ACPI_DMT_UINT8, ACPI_FPDTH_OFFSET (Revision), "Revision", 0}, 956 ACPI_DMT_TERMINATOR 957 }; 958 959 /* 0: Firmware Basic Boot Performance Record */ 960 961 ACPI_DMTABLE_INFO AcpiDmTableInfoFpdt0[] = 962 { 963 {ACPI_DMT_UINT32, ACPI_FPDT0_OFFSET (Reserved), "Reserved", 0}, 964 {ACPI_DMT_UINT64, ACPI_FPDT1_OFFSET (Address), "FPDT Boot Record Address", 0}, 965 ACPI_DMT_TERMINATOR 966 }; 967 968 /* 1: S3 Performance Table Pointer Record */ 969 970 ACPI_DMTABLE_INFO AcpiDmTableInfoFpdt1[] = 971 { 972 {ACPI_DMT_UINT32, ACPI_FPDT1_OFFSET (Reserved), "Reserved", 0}, 973 {ACPI_DMT_UINT64, ACPI_FPDT1_OFFSET (Address), "S3PT Record Address", 0}, 974 ACPI_DMT_TERMINATOR 975 }; 976 977 #if 0 978 /* Boot Performance Record, not supported at this time. */ 979 {ACPI_DMT_UINT64, ACPI_FPDT0_OFFSET (ResetEnd), "Reset End", 0}, 980 {ACPI_DMT_UINT64, ACPI_FPDT0_OFFSET (LoadStart), "Load Image Start", 0}, 981 {ACPI_DMT_UINT64, ACPI_FPDT0_OFFSET (StartupStart), "Start Image Start", 0}, 982 {ACPI_DMT_UINT64, ACPI_FPDT0_OFFSET (ExitServicesEntry), "Exit Services Entry", 0}, 983 {ACPI_DMT_UINT64, ACPI_FPDT0_OFFSET (ExitServicesExit), "Exit Services Exit", 0}, 984 #endif 985 986 987 /******************************************************************************* 988 * 989 * GTDT - Generic Timer Description Table 990 * 991 ******************************************************************************/ 992 993 ACPI_DMTABLE_INFO AcpiDmTableInfoGtdt[] = 994 { 995 {ACPI_DMT_UINT64, ACPI_GTDT_OFFSET (CounterBlockAddresss), "Counter Block Address", 0}, 996 {ACPI_DMT_UINT32, ACPI_GTDT_OFFSET (Reserved), "Reserved", 0}, 997 ACPI_DMT_NEW_LINE, 998 {ACPI_DMT_UINT32, ACPI_GTDT_OFFSET (SecureEl1Interrupt), "Secure EL1 Interrupt", 0}, 999 {ACPI_DMT_UINT32, ACPI_GTDT_OFFSET (SecureEl1Flags), "EL1 Flags (decoded below)", DT_FLAG}, 1000 {ACPI_DMT_FLAG0, ACPI_GTDT_FLAG_OFFSET (SecureEl1Flags,0), "Trigger Mode", 0}, 1001 {ACPI_DMT_FLAG1, ACPI_GTDT_FLAG_OFFSET (SecureEl1Flags,0), "Polarity", 0}, 1002 {ACPI_DMT_FLAG2, ACPI_GTDT_FLAG_OFFSET (SecureEl1Flags,0), "Always On", 0}, 1003 ACPI_DMT_NEW_LINE, 1004 {ACPI_DMT_UINT32, ACPI_GTDT_OFFSET (NonSecureEl1Interrupt), "Non-Secure EL1 Interrupt", 0}, 1005 {ACPI_DMT_UINT32, ACPI_GTDT_OFFSET (NonSecureEl1Flags), "NEL1 Flags (decoded below)", DT_FLAG}, 1006 {ACPI_DMT_FLAG0, ACPI_GTDT_FLAG_OFFSET (NonSecureEl1Flags,0),"Trigger Mode", 0}, 1007 {ACPI_DMT_FLAG1, ACPI_GTDT_FLAG_OFFSET (NonSecureEl1Flags,0),"Polarity", 0}, 1008 {ACPI_DMT_FLAG2, ACPI_GTDT_FLAG_OFFSET (NonSecureEl1Flags,0),"Always On", 0}, 1009 ACPI_DMT_NEW_LINE, 1010 {ACPI_DMT_UINT32, ACPI_GTDT_OFFSET (VirtualTimerInterrupt), "Virtual Timer Interrupt", 0}, 1011 {ACPI_DMT_UINT32, ACPI_GTDT_OFFSET (VirtualTimerFlags), "VT Flags (decoded below)", DT_FLAG}, 1012 {ACPI_DMT_FLAG0, ACPI_GTDT_FLAG_OFFSET (VirtualTimerFlags,0),"Trigger Mode", 0}, 1013 {ACPI_DMT_FLAG1, ACPI_GTDT_FLAG_OFFSET (VirtualTimerFlags,0),"Polarity", 0}, 1014 {ACPI_DMT_FLAG2, ACPI_GTDT_FLAG_OFFSET (VirtualTimerFlags,0),"Always On", 0}, 1015 ACPI_DMT_NEW_LINE, 1016 {ACPI_DMT_UINT32, ACPI_GTDT_OFFSET (NonSecureEl2Interrupt), "Non-Secure EL2 Interrupt", 0}, 1017 {ACPI_DMT_UINT32, ACPI_GTDT_OFFSET (NonSecureEl2Flags), "NEL2 Flags (decoded below)", DT_FLAG}, 1018 {ACPI_DMT_FLAG0, ACPI_GTDT_FLAG_OFFSET (NonSecureEl2Flags,0),"Trigger Mode", 0}, 1019 {ACPI_DMT_FLAG1, ACPI_GTDT_FLAG_OFFSET (NonSecureEl2Flags,0),"Polarity", 0}, 1020 {ACPI_DMT_FLAG2, ACPI_GTDT_FLAG_OFFSET (NonSecureEl2Flags,0),"Always On", 0}, 1021 {ACPI_DMT_UINT64, ACPI_GTDT_OFFSET (CounterReadBlockAddress), "Counter Read Block Address", 0}, 1022 ACPI_DMT_NEW_LINE, 1023 {ACPI_DMT_UINT32, ACPI_GTDT_OFFSET (PlatformTimerCount), "Platform Timer Count", 0}, 1024 {ACPI_DMT_UINT32, ACPI_GTDT_OFFSET (PlatformTimerOffset), "Platform Timer Offset", 0}, 1025 ACPI_DMT_TERMINATOR 1026 }; 1027 1028 /* GDTD EL2 timer info. This table is appended to AcpiDmTableInfoGtdt for rev 3 and later */ 1029 1030 ACPI_DMTABLE_INFO AcpiDmTableInfoGtdtEl2[] = 1031 { 1032 {ACPI_DMT_UINT32, ACPI_GTDT_EL2_OFFSET (VirtualEL2TimerGsiv), "Virtual EL2 Timer GSIV", 0}, 1033 {ACPI_DMT_UINT32, ACPI_GTDT_EL2_OFFSET (VirtualEL2TimerFlags), "Virtual EL2 Timer Flags", 0}, 1034 ACPI_DMT_TERMINATOR 1035 }; 1036 1037 /* GTDT Subtable header (one per Subtable) */ 1038 1039 ACPI_DMTABLE_INFO AcpiDmTableInfoGtdtHdr[] = 1040 { 1041 {ACPI_DMT_GTDT, ACPI_GTDTH_OFFSET (Type), "Subtable Type", 0}, 1042 {ACPI_DMT_UINT16, ACPI_GTDTH_OFFSET (Length), "Length", DT_LENGTH}, 1043 ACPI_DMT_TERMINATOR 1044 }; 1045 1046 /* GTDT Subtables */ 1047 1048 ACPI_DMTABLE_INFO AcpiDmTableInfoGtdt0[] = 1049 { 1050 {ACPI_DMT_UINT8, ACPI_GTDT0_OFFSET (Reserved), "Reserved", 0}, 1051 {ACPI_DMT_UINT64, ACPI_GTDT0_OFFSET (BlockAddress), "Block Address", 0}, 1052 {ACPI_DMT_UINT32, ACPI_GTDT0_OFFSET (TimerCount), "Timer Count", 0}, 1053 {ACPI_DMT_UINT32, ACPI_GTDT0_OFFSET (TimerOffset), "Timer Offset", 0}, 1054 ACPI_DMT_TERMINATOR 1055 }; 1056 1057 ACPI_DMTABLE_INFO AcpiDmTableInfoGtdt0a[] = 1058 { 1059 {ACPI_DMT_UINT8 , ACPI_GTDT0a_OFFSET (FrameNumber), "Frame Number", 0}, 1060 {ACPI_DMT_UINT24, ACPI_GTDT0a_OFFSET (Reserved[0]), "Reserved", 0}, 1061 {ACPI_DMT_UINT64, ACPI_GTDT0a_OFFSET (BaseAddress), "Base Address", 0}, 1062 {ACPI_DMT_UINT64, ACPI_GTDT0a_OFFSET (El0BaseAddress), "EL0 Base Address", 0}, 1063 {ACPI_DMT_UINT32, ACPI_GTDT0a_OFFSET (TimerInterrupt), "Timer Interrupt", 0}, 1064 {ACPI_DMT_UINT32, ACPI_GTDT0a_OFFSET (TimerFlags), "Timer Flags (decoded below)", 0}, 1065 {ACPI_DMT_FLAG0, ACPI_GTDT0a_FLAG_OFFSET (TimerFlags,0), "Trigger Mode", 0}, 1066 {ACPI_DMT_FLAG1, ACPI_GTDT0a_FLAG_OFFSET (TimerFlags,0), "Polarity", 0}, 1067 {ACPI_DMT_UINT32, ACPI_GTDT0a_OFFSET (VirtualTimerInterrupt), "Virtual Timer Interrupt", 0}, 1068 {ACPI_DMT_UINT32, ACPI_GTDT0a_OFFSET (VirtualTimerFlags), "Virtual Timer Flags (decoded below)", 0}, 1069 {ACPI_DMT_FLAG0, ACPI_GTDT0a_FLAG_OFFSET (VirtualTimerFlags,0), "Trigger Mode", 0}, 1070 {ACPI_DMT_FLAG1, ACPI_GTDT0a_FLAG_OFFSET (VirtualTimerFlags,0), "Polarity", 0}, 1071 {ACPI_DMT_UINT32, ACPI_GTDT0a_OFFSET (CommonFlags), "Common Flags (decoded below)", 0}, 1072 {ACPI_DMT_FLAG0, ACPI_GTDT0a_FLAG_OFFSET (CommonFlags,0), "Secure", 0}, 1073 {ACPI_DMT_FLAG1, ACPI_GTDT0a_FLAG_OFFSET (CommonFlags,0), "Always On", 0}, 1074 ACPI_DMT_TERMINATOR 1075 }; 1076 1077 ACPI_DMTABLE_INFO AcpiDmTableInfoGtdt1[] = 1078 { 1079 {ACPI_DMT_UINT8, ACPI_GTDT1_OFFSET (Reserved), "Reserved", 0}, 1080 {ACPI_DMT_UINT64, ACPI_GTDT1_OFFSET (RefreshFrameAddress), "Refresh Frame Address", 0}, 1081 {ACPI_DMT_UINT64, ACPI_GTDT1_OFFSET (ControlFrameAddress), "Control Frame Address", 0}, 1082 {ACPI_DMT_UINT32, ACPI_GTDT1_OFFSET (TimerInterrupt), "Timer Interrupt", 0}, 1083 {ACPI_DMT_UINT32, ACPI_GTDT1_OFFSET (TimerFlags), "Timer Flags (decoded below)", DT_FLAG}, 1084 {ACPI_DMT_FLAG0, ACPI_GTDT1_FLAG_OFFSET (TimerFlags,0), "Trigger Mode", 0}, 1085 {ACPI_DMT_FLAG1, ACPI_GTDT1_FLAG_OFFSET (TimerFlags,0), "Polarity", 0}, 1086 {ACPI_DMT_FLAG2, ACPI_GTDT1_FLAG_OFFSET (TimerFlags,0), "Security", 0}, 1087 ACPI_DMT_TERMINATOR 1088 }; 1089 1090 1091 /******************************************************************************* 1092 * 1093 * HEST - Hardware Error Source table 1094 * 1095 ******************************************************************************/ 1096 1097 ACPI_DMTABLE_INFO AcpiDmTableInfoHest[] = 1098 { 1099 {ACPI_DMT_UINT32, ACPI_HEST_OFFSET (ErrorSourceCount), "Error Source Count", 0}, 1100 ACPI_DMT_TERMINATOR 1101 }; 1102 1103 /* Common HEST structures for subtables */ 1104 1105 #define ACPI_DM_HEST_HEADER \ 1106 {ACPI_DMT_HEST, ACPI_HEST0_OFFSET (Header.Type), "Subtable Type", 0}, \ 1107 {ACPI_DMT_UINT16, ACPI_HEST0_OFFSET (Header.SourceId), "Source Id", 0} 1108 1109 #define ACPI_DM_HEST_AER \ 1110 {ACPI_DMT_UINT16, ACPI_HEST6_OFFSET (Aer.Reserved1), "Reserved", 0}, \ 1111 {ACPI_DMT_UINT8, ACPI_HEST6_OFFSET (Aer.Flags), "Flags (decoded below)", DT_FLAG}, \ 1112 {ACPI_DMT_FLAG0, ACPI_HEST6_FLAG_OFFSET (Aer.Flags,0), "Firmware First", 0}, \ 1113 {ACPI_DMT_FLAG0, ACPI_HEST6_FLAG_OFFSET (Aer.Flags,0), "Global", 0}, \ 1114 {ACPI_DMT_UINT8, ACPI_HEST6_OFFSET (Aer.Enabled), "Enabled", 0}, \ 1115 {ACPI_DMT_UINT32, ACPI_HEST6_OFFSET (Aer.RecordsToPreallocate), "Records To Preallocate", 0}, \ 1116 {ACPI_DMT_UINT32, ACPI_HEST6_OFFSET (Aer.MaxSectionsPerRecord), "Max Sections Per Record", 0}, \ 1117 {ACPI_DMT_UINT32, ACPI_HEST6_OFFSET (Aer.Bus), "Bus", 0}, \ 1118 {ACPI_DMT_UINT16, ACPI_HEST6_OFFSET (Aer.Device), "Device", 0}, \ 1119 {ACPI_DMT_UINT16, ACPI_HEST6_OFFSET (Aer.Function), "Function", 0}, \ 1120 {ACPI_DMT_UINT16, ACPI_HEST6_OFFSET (Aer.DeviceControl), "DeviceControl", 0}, \ 1121 {ACPI_DMT_UINT16, ACPI_HEST6_OFFSET (Aer.Reserved2), "Reserved", 0}, \ 1122 {ACPI_DMT_UINT32, ACPI_HEST6_OFFSET (Aer.UncorrectableMask), "Uncorrectable Mask", 0}, \ 1123 {ACPI_DMT_UINT32, ACPI_HEST6_OFFSET (Aer.UncorrectableSeverity), "Uncorrectable Severity", 0}, \ 1124 {ACPI_DMT_UINT32, ACPI_HEST6_OFFSET (Aer.CorrectableMask), "Correctable Mask", 0}, \ 1125 {ACPI_DMT_UINT32, ACPI_HEST6_OFFSET (Aer.AdvancedCapabilities), "Advanced Capabilities", 0} 1126 1127 1128 /* HEST Subtables */ 1129 1130 /* 0: IA32 Machine Check Exception */ 1131 1132 ACPI_DMTABLE_INFO AcpiDmTableInfoHest0[] = 1133 { 1134 ACPI_DM_HEST_HEADER, 1135 {ACPI_DMT_UINT16, ACPI_HEST0_OFFSET (Reserved1), "Reserved1", 0}, 1136 {ACPI_DMT_UINT8, ACPI_HEST0_OFFSET (Flags), "Flags (decoded below)", DT_FLAG}, 1137 {ACPI_DMT_FLAG0, ACPI_HEST0_FLAG_OFFSET (Flags,0), "Firmware First", 0}, 1138 {ACPI_DMT_FLAG2, ACPI_HEST0_FLAG_OFFSET (Flags,0), "GHES Assist", 0}, 1139 1140 {ACPI_DMT_UINT8, ACPI_HEST0_OFFSET (Enabled), "Enabled", 0}, 1141 {ACPI_DMT_UINT32, ACPI_HEST0_OFFSET (RecordsToPreallocate), "Records To Preallocate", 0}, 1142 {ACPI_DMT_UINT32, ACPI_HEST0_OFFSET (MaxSectionsPerRecord), "Max Sections Per Record", 0}, 1143 {ACPI_DMT_UINT64, ACPI_HEST0_OFFSET (GlobalCapabilityData), "Global Capability Data", 0}, 1144 {ACPI_DMT_UINT64, ACPI_HEST0_OFFSET (GlobalControlData), "Global Control Data", 0}, 1145 {ACPI_DMT_UINT8, ACPI_HEST0_OFFSET (NumHardwareBanks), "Num Hardware Banks", 0}, 1146 {ACPI_DMT_UINT56, ACPI_HEST0_OFFSET (Reserved3[0]), "Reserved2", 0}, 1147 ACPI_DMT_TERMINATOR 1148 }; 1149 1150 /* 1: IA32 Corrected Machine Check */ 1151 1152 ACPI_DMTABLE_INFO AcpiDmTableInfoHest1[] = 1153 { 1154 ACPI_DM_HEST_HEADER, 1155 {ACPI_DMT_UINT16, ACPI_HEST1_OFFSET (Reserved1), "Reserved1", 0}, 1156 {ACPI_DMT_UINT8, ACPI_HEST1_OFFSET (Flags), "Flags (decoded below)", DT_FLAG}, 1157 {ACPI_DMT_FLAG0, ACPI_HEST1_FLAG_OFFSET (Flags,0), "Firmware First", 0}, 1158 {ACPI_DMT_FLAG2, ACPI_HEST1_FLAG_OFFSET (Flags,0), "GHES Assist", 0}, 1159 1160 {ACPI_DMT_UINT8, ACPI_HEST1_OFFSET (Enabled), "Enabled", 0}, 1161 {ACPI_DMT_UINT32, ACPI_HEST1_OFFSET (RecordsToPreallocate), "Records To Preallocate", 0}, 1162 {ACPI_DMT_UINT32, ACPI_HEST1_OFFSET (MaxSectionsPerRecord), "Max Sections Per Record", 0}, 1163 {ACPI_DMT_HESTNTFY, ACPI_HEST1_OFFSET (Notify), "Notify", 0}, 1164 {ACPI_DMT_UINT8, ACPI_HEST1_OFFSET (NumHardwareBanks), "Num Hardware Banks", 0}, 1165 {ACPI_DMT_UINT24, ACPI_HEST1_OFFSET (Reserved2[0]), "Reserved2", 0}, 1166 ACPI_DMT_TERMINATOR 1167 }; 1168 1169 /* 2: IA32 Non-Maskable Interrupt */ 1170 1171 ACPI_DMTABLE_INFO AcpiDmTableInfoHest2[] = 1172 { 1173 ACPI_DM_HEST_HEADER, 1174 {ACPI_DMT_UINT32, ACPI_HEST2_OFFSET (Reserved), "Reserved", 0}, 1175 {ACPI_DMT_UINT32, ACPI_HEST2_OFFSET (RecordsToPreallocate), "Records To Preallocate", 0}, 1176 {ACPI_DMT_UINT32, ACPI_HEST2_OFFSET (MaxSectionsPerRecord), "Max Sections Per Record", 0}, 1177 {ACPI_DMT_UINT32, ACPI_HEST2_OFFSET (MaxRawDataLength), "Max Raw Data Length", 0}, 1178 ACPI_DMT_TERMINATOR 1179 }; 1180 1181 /* 6: PCI Express Root Port AER */ 1182 1183 ACPI_DMTABLE_INFO AcpiDmTableInfoHest6[] = 1184 { 1185 ACPI_DM_HEST_HEADER, 1186 ACPI_DM_HEST_AER, 1187 {ACPI_DMT_UINT32, ACPI_HEST6_OFFSET (RootErrorCommand), "Root Error Command", 0}, 1188 ACPI_DMT_TERMINATOR 1189 }; 1190 1191 /* 7: PCI Express AER (AER Endpoint) */ 1192 1193 ACPI_DMTABLE_INFO AcpiDmTableInfoHest7[] = 1194 { 1195 ACPI_DM_HEST_HEADER, 1196 ACPI_DM_HEST_AER, 1197 ACPI_DMT_TERMINATOR 1198 }; 1199 1200 /* 8: PCI Express/PCI-X Bridge AER */ 1201 1202 ACPI_DMTABLE_INFO AcpiDmTableInfoHest8[] = 1203 { 1204 ACPI_DM_HEST_HEADER, 1205 ACPI_DM_HEST_AER, 1206 {ACPI_DMT_UINT32, ACPI_HEST8_OFFSET (UncorrectableMask2), "2nd Uncorrectable Mask", 0}, 1207 {ACPI_DMT_UINT32, ACPI_HEST8_OFFSET (UncorrectableSeverity2), "2nd Uncorrectable Severity", 0}, 1208 {ACPI_DMT_UINT32, ACPI_HEST8_OFFSET (AdvancedCapabilities2), "2nd Advanced Capabilities", 0}, 1209 ACPI_DMT_TERMINATOR 1210 }; 1211 1212 /* 9: Generic Hardware Error Source */ 1213 1214 ACPI_DMTABLE_INFO AcpiDmTableInfoHest9[] = 1215 { 1216 ACPI_DM_HEST_HEADER, 1217 {ACPI_DMT_UINT16, ACPI_HEST9_OFFSET (RelatedSourceId), "Related Source Id", 0}, 1218 {ACPI_DMT_UINT8, ACPI_HEST9_OFFSET (Reserved), "Reserved", 0}, 1219 {ACPI_DMT_UINT8, ACPI_HEST9_OFFSET (Enabled), "Enabled", 0}, 1220 {ACPI_DMT_UINT32, ACPI_HEST9_OFFSET (RecordsToPreallocate), "Records To Preallocate", 0}, 1221 {ACPI_DMT_UINT32, ACPI_HEST9_OFFSET (MaxSectionsPerRecord), "Max Sections Per Record", 0}, 1222 {ACPI_DMT_UINT32, ACPI_HEST9_OFFSET (MaxRawDataLength), "Max Raw Data Length", 0}, 1223 {ACPI_DMT_GAS, ACPI_HEST9_OFFSET (ErrorStatusAddress), "Error Status Address", 0}, 1224 {ACPI_DMT_HESTNTFY, ACPI_HEST9_OFFSET (Notify), "Notify", 0}, 1225 {ACPI_DMT_UINT32, ACPI_HEST9_OFFSET (ErrorBlockLength), "Error Status Block Length", 0}, 1226 ACPI_DMT_TERMINATOR 1227 }; 1228 1229 /* 10: Generic Hardware Error Source - Version 2 */ 1230 1231 ACPI_DMTABLE_INFO AcpiDmTableInfoHest10[] = 1232 { 1233 ACPI_DM_HEST_HEADER, 1234 {ACPI_DMT_UINT16, ACPI_HEST10_OFFSET (RelatedSourceId), "Related Source Id", 0}, 1235 {ACPI_DMT_UINT8, ACPI_HEST10_OFFSET (Reserved), "Reserved", 0}, 1236 {ACPI_DMT_UINT8, ACPI_HEST10_OFFSET (Enabled), "Enabled", 0}, 1237 {ACPI_DMT_UINT32, ACPI_HEST10_OFFSET (RecordsToPreallocate), "Records To Preallocate", 0}, 1238 {ACPI_DMT_UINT32, ACPI_HEST10_OFFSET (MaxSectionsPerRecord), "Max Sections Per Record", 0}, 1239 {ACPI_DMT_UINT32, ACPI_HEST10_OFFSET (MaxRawDataLength), "Max Raw Data Length", 0}, 1240 {ACPI_DMT_GAS, ACPI_HEST10_OFFSET (ErrorStatusAddress), "Error Status Address", 0}, 1241 {ACPI_DMT_HESTNTFY, ACPI_HEST10_OFFSET (Notify), "Notify", 0}, 1242 {ACPI_DMT_UINT32, ACPI_HEST10_OFFSET (ErrorBlockLength), "Error Status Block Length", 0}, 1243 {ACPI_DMT_GAS, ACPI_HEST10_OFFSET (ReadAckRegister), "Read Ack Register", 0}, 1244 {ACPI_DMT_UINT64, ACPI_HEST10_OFFSET (ReadAckPreserve), "Read Ack Preserve", 0}, 1245 {ACPI_DMT_UINT64, ACPI_HEST10_OFFSET (ReadAckWrite), "Read Ack Write", 0}, 1246 ACPI_DMT_TERMINATOR 1247 }; 1248 1249 /* 11: IA32 Deferred Machine Check */ 1250 1251 ACPI_DMTABLE_INFO AcpiDmTableInfoHest11[] = 1252 { 1253 ACPI_DM_HEST_HEADER, 1254 {ACPI_DMT_UINT16, ACPI_HEST11_OFFSET (Reserved1), "Reserved1", 0}, 1255 {ACPI_DMT_UINT8, ACPI_HEST11_OFFSET (Flags), "Flags (decoded below)", DT_FLAG}, 1256 {ACPI_DMT_FLAG0, ACPI_HEST11_FLAG_OFFSET (Flags,0), "Firmware First", 0}, 1257 {ACPI_DMT_FLAG2, ACPI_HEST11_FLAG_OFFSET (Flags,0), "GHES Assist", 0}, 1258 1259 {ACPI_DMT_UINT8, ACPI_HEST11_OFFSET (Enabled), "Enabled", 0}, 1260 {ACPI_DMT_UINT32, ACPI_HEST11_OFFSET (RecordsToPreallocate), "Records To Preallocate", 0}, 1261 {ACPI_DMT_UINT32, ACPI_HEST11_OFFSET (MaxSectionsPerRecord), "Max Sections Per Record", 0}, 1262 {ACPI_DMT_HESTNTFY, ACPI_HEST11_OFFSET (Notify), "Notify", 0}, 1263 {ACPI_DMT_UINT8, ACPI_HEST11_OFFSET (NumHardwareBanks), "Num Hardware Banks", 0}, 1264 {ACPI_DMT_UINT24, ACPI_HEST11_OFFSET (Reserved2[0]), "Reserved2", 0}, 1265 ACPI_DMT_TERMINATOR 1266 }; 1267 1268 /* Notification Structure */ 1269 1270 ACPI_DMTABLE_INFO AcpiDmTableInfoHestNotify[] = 1271 { 1272 {ACPI_DMT_HESTNTYP, ACPI_HESTN_OFFSET (Type), "Notify Type", 0}, 1273 {ACPI_DMT_UINT8, ACPI_HESTN_OFFSET (Length), "Notify Length", DT_LENGTH}, 1274 {ACPI_DMT_UINT16, ACPI_HESTN_OFFSET (ConfigWriteEnable), "Configuration Write Enable", 0}, 1275 {ACPI_DMT_UINT32, ACPI_HESTN_OFFSET (PollInterval), "PollInterval", 0}, 1276 {ACPI_DMT_UINT32, ACPI_HESTN_OFFSET (Vector), "Vector", 0}, 1277 {ACPI_DMT_UINT32, ACPI_HESTN_OFFSET (PollingThresholdValue), "Polling Threshold Value", 0}, 1278 {ACPI_DMT_UINT32, ACPI_HESTN_OFFSET (PollingThresholdWindow), "Polling Threshold Window", 0}, 1279 {ACPI_DMT_UINT32, ACPI_HESTN_OFFSET (ErrorThresholdValue), "Error Threshold Value", 0}, 1280 {ACPI_DMT_UINT32, ACPI_HESTN_OFFSET (ErrorThresholdWindow), "Error Threshold Window", 0}, 1281 ACPI_DMT_TERMINATOR 1282 }; 1283 1284 1285 /* 1286 * IA32 Error Bank(s) - Follows the ACPI_HEST_IA_MACHINE_CHECK and 1287 * ACPI_HEST_IA_CORRECTED structures. 1288 */ 1289 ACPI_DMTABLE_INFO AcpiDmTableInfoHestBank[] = 1290 { 1291 {ACPI_DMT_UINT8, ACPI_HESTB_OFFSET (BankNumber), "Bank Number", 0}, 1292 {ACPI_DMT_UINT8, ACPI_HESTB_OFFSET (ClearStatusOnInit), "Clear Status On Init", 0}, 1293 {ACPI_DMT_UINT8, ACPI_HESTB_OFFSET (StatusFormat), "Status Format", 0}, 1294 {ACPI_DMT_UINT8, ACPI_HESTB_OFFSET (Reserved), "Reserved", 0}, 1295 {ACPI_DMT_UINT32, ACPI_HESTB_OFFSET (ControlRegister), "Control Register", 0}, 1296 {ACPI_DMT_UINT64, ACPI_HESTB_OFFSET (ControlData), "Control Data", 0}, 1297 {ACPI_DMT_UINT32, ACPI_HESTB_OFFSET (StatusRegister), "Status Register", 0}, 1298 {ACPI_DMT_UINT32, ACPI_HESTB_OFFSET (AddressRegister), "Address Register", 0}, 1299 {ACPI_DMT_UINT32, ACPI_HESTB_OFFSET (MiscRegister), "Misc Register", 0}, 1300 ACPI_DMT_TERMINATOR 1301 }; 1302 1303 1304 /******************************************************************************* 1305 * 1306 * HMAT - Heterogeneous Memory Attributes Table 1307 * 1308 ******************************************************************************/ 1309 1310 ACPI_DMTABLE_INFO AcpiDmTableInfoHmat[] = 1311 { 1312 {ACPI_DMT_UINT32, ACPI_HMAT_OFFSET (Reserved), "Reserved", 0}, 1313 ACPI_DMT_TERMINATOR 1314 }; 1315 1316 /* Common HMAT structure header (one per Subtable) */ 1317 1318 ACPI_DMTABLE_INFO AcpiDmTableInfoHmatHdr[] = 1319 { 1320 {ACPI_DMT_HMAT, ACPI_HMATH_OFFSET (Type), "Structure Type", 0}, 1321 {ACPI_DMT_UINT16, ACPI_HMATH_OFFSET (Reserved), "Reserved", 0}, 1322 {ACPI_DMT_UINT32, ACPI_HMATH_OFFSET (Length), "Length", 0}, 1323 ACPI_DMT_TERMINATOR 1324 }; 1325 1326 /* HMAT subtables */ 1327 1328 /* 0x00: Memory proximity domain attributes */ 1329 1330 ACPI_DMTABLE_INFO AcpiDmTableInfoHmat0[] = 1331 { 1332 {ACPI_DMT_UINT16, ACPI_HMAT0_OFFSET (Flags), "Flags (decoded below)", 0}, 1333 {ACPI_DMT_FLAG0, ACPI_HMAT0_FLAG_OFFSET (Flags,0), "Processor Proximity Domain Valid", 0}, 1334 {ACPI_DMT_UINT16, ACPI_HMAT0_OFFSET (Reserved1), "Reserved1", 0}, 1335 {ACPI_DMT_UINT32, ACPI_HMAT0_OFFSET (InitiatorPD), "Attached Initiator Proximity Domain", 0}, 1336 {ACPI_DMT_UINT32, ACPI_HMAT0_OFFSET (MemoryPD), "Memory Proximity Domain", 0}, 1337 {ACPI_DMT_UINT32, ACPI_HMAT0_OFFSET (Reserved2), "Reserved2", 0}, 1338 {ACPI_DMT_UINT64, ACPI_HMAT0_OFFSET (Reserved3), "Reserved3", 0}, 1339 {ACPI_DMT_UINT64, ACPI_HMAT0_OFFSET (Reserved4), "Reserved4", 0}, 1340 ACPI_DMT_TERMINATOR 1341 }; 1342 1343 /* 0x01: System Locality Latency and Bandwidth Information */ 1344 1345 ACPI_DMTABLE_INFO AcpiDmTableInfoHmat1[] = 1346 { 1347 {ACPI_DMT_UINT8, ACPI_HMAT1_OFFSET (Flags), "Flags (decoded below)", 0}, 1348 {ACPI_DMT_FLAGS4_0, ACPI_HMAT1_FLAG_OFFSET (Flags,0), "Memory Hierarchy", 0}, /* First 4 bits */ 1349 {ACPI_DMT_FLAG4, ACPI_HMAT1_FLAG_OFFSET (Flags,0), "Use Minimum Transfer Size", 0}, 1350 {ACPI_DMT_FLAG5, ACPI_HMAT1_FLAG_OFFSET (Flags,0), "Non-sequential Transfers", 0}, 1351 {ACPI_DMT_UINT8, ACPI_HMAT1_OFFSET (DataType), "Data Type", 0}, 1352 {ACPI_DMT_UINT8, ACPI_HMAT1_OFFSET (MinTransferSize), "Minimum Transfer Size", 0}, 1353 {ACPI_DMT_UINT8, ACPI_HMAT1_OFFSET (Reserved1), "Reserved1", 0}, 1354 {ACPI_DMT_UINT32, ACPI_HMAT1_OFFSET (NumberOfInitiatorPDs), "Initiator Proximity Domains #", 0}, 1355 {ACPI_DMT_UINT32, ACPI_HMAT1_OFFSET (NumberOfTargetPDs), "Target Proximity Domains #", 0}, 1356 {ACPI_DMT_UINT32, ACPI_HMAT1_OFFSET (Reserved2), "Reserved2", 0}, 1357 {ACPI_DMT_UINT64, ACPI_HMAT1_OFFSET (EntryBaseUnit), "Entry Base Unit", 0}, 1358 ACPI_DMT_TERMINATOR 1359 }; 1360 1361 ACPI_DMTABLE_INFO AcpiDmTableInfoHmat1a[] = 1362 { 1363 {ACPI_DMT_UINT32, 0, "Initiator Proximity Domain List", DT_OPTIONAL}, 1364 ACPI_DMT_TERMINATOR 1365 }; 1366 1367 ACPI_DMTABLE_INFO AcpiDmTableInfoHmat1b[] = 1368 { 1369 {ACPI_DMT_UINT32, 0, "Target Proximity Domain List", DT_OPTIONAL}, 1370 ACPI_DMT_TERMINATOR 1371 }; 1372 1373 ACPI_DMTABLE_INFO AcpiDmTableInfoHmat1c[] = 1374 { 1375 {ACPI_DMT_UINT16, 0, "Entry", DT_OPTIONAL}, 1376 ACPI_DMT_TERMINATOR 1377 }; 1378 1379 /* 0x02: Memory Side Cache Information */ 1380 1381 ACPI_DMTABLE_INFO AcpiDmTableInfoHmat2[] = 1382 { 1383 {ACPI_DMT_UINT32, ACPI_HMAT2_OFFSET (MemoryPD), "Memory Proximity Domain", 0}, 1384 {ACPI_DMT_UINT32, ACPI_HMAT2_OFFSET (Reserved1), "Reserved1", 0}, 1385 {ACPI_DMT_UINT64, ACPI_HMAT2_OFFSET (CacheSize), "Memory Side Cache Size", 0}, 1386 {ACPI_DMT_UINT32, ACPI_HMAT2_OFFSET (CacheAttributes), "Cache Attributes (decoded below)", 0}, 1387 {ACPI_DMT_FLAGS4_0, ACPI_HMAT2_FLAG_OFFSET (CacheAttributes,0), "Total Cache Levels", 0}, 1388 {ACPI_DMT_FLAGS4_4, ACPI_HMAT2_FLAG_OFFSET (CacheAttributes,0), "Cache Level", 0}, 1389 {ACPI_DMT_FLAGS4_8, ACPI_HMAT2_FLAG_OFFSET (CacheAttributes,0), "Cache Associativity", 0}, 1390 {ACPI_DMT_FLAGS4_12, ACPI_HMAT2_FLAG_OFFSET (CacheAttributes,0), "Write Policy", 0}, 1391 {ACPI_DMT_FLAGS16_16, ACPI_HMAT2_FLAG_OFFSET (CacheAttributes,0), "Cache Line Size", 0}, 1392 {ACPI_DMT_UINT16, ACPI_HMAT2_OFFSET (Reserved2), "Reserved2", 0}, 1393 {ACPI_DMT_UINT16, ACPI_HMAT2_OFFSET (NumberOfSMBIOSHandles), "SMBIOS Handle #", 0}, 1394 ACPI_DMT_TERMINATOR 1395 }; 1396 1397 ACPI_DMTABLE_INFO AcpiDmTableInfoHmat2a[] = 1398 { 1399 {ACPI_DMT_UINT16, 0, "SMBIOS Handle", DT_OPTIONAL}, 1400 ACPI_DMT_TERMINATOR 1401 }; 1402 1403 1404 /******************************************************************************* 1405 * 1406 * HPET - High Precision Event Timer table 1407 * 1408 ******************************************************************************/ 1409 1410 ACPI_DMTABLE_INFO AcpiDmTableInfoHpet[] = 1411 { 1412 {ACPI_DMT_UINT32, ACPI_HPET_OFFSET (Id), "Hardware Block ID", 0}, 1413 {ACPI_DMT_GAS, ACPI_HPET_OFFSET (Address), "Timer Block Register", 0}, 1414 {ACPI_DMT_UINT8, ACPI_HPET_OFFSET (Sequence), "Sequence Number", 0}, 1415 {ACPI_DMT_UINT16, ACPI_HPET_OFFSET (MinimumTick), "Minimum Clock Ticks", 0}, 1416 {ACPI_DMT_UINT8, ACPI_HPET_OFFSET (Flags), "Flags (decoded below)", DT_FLAG}, 1417 {ACPI_DMT_FLAG0, ACPI_HPET_FLAG_OFFSET (Flags,0), "4K Page Protect", 0}, 1418 {ACPI_DMT_FLAG1, ACPI_HPET_FLAG_OFFSET (Flags,0), "64K Page Protect", 0}, 1419 ACPI_DMT_TERMINATOR 1420 }; 1421 /*! [End] no source code translation !*/ 1422
Indexes created Mon Sep 29 13:09:55 GMT 2025