dmtbinfo2.c revision 1.1.1.9
1 /****************************************************************************** 2 * 3 * Module Name: dmtbinfo2 - Table info for non-AML tables 4 * 5 *****************************************************************************/ 6 7 /* 8 * Copyright (C) 2000 - 2021, Intel Corp. 9 * All rights reserved. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions, and the following disclaimer, 16 * without modification. 17 * 2. Redistributions in binary form must reproduce at minimum a disclaimer 18 * substantially similar to the "NO WARRANTY" disclaimer below 19 * ("Disclaimer") and any redistribution must be conditioned upon 20 * including a substantially similar Disclaimer requirement for further 21 * binary redistribution. 22 * 3. Neither the names of the above-listed copyright holders nor the names 23 * of any contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * Alternatively, this software may be distributed under the terms of the 27 * GNU General Public License ("GPL") version 2 as published by the Free 28 * Software Foundation. 29 * 30 * NO WARRANTY 31 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 32 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 33 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 34 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 35 * HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 36 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 37 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 38 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 39 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING 40 * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 41 * POSSIBILITY OF SUCH DAMAGES. 42 */ 43 44 #include "acpi.h" 45 #include "accommon.h" 46 #include "acdisasm.h" 47 #include "actbinfo.h" 48 49 /* This module used for application-level code only */ 50 51 #define _COMPONENT ACPI_CA_DISASSEMBLER 52 ACPI_MODULE_NAME ("dmtbinfo2") 53 54 /* 55 * How to add a new table: 56 * 57 * - Add the C table definition to the actbl1.h or actbl2.h header. 58 * - Add ACPI_xxxx_OFFSET macro(s) for the table (and subtables) to list below. 59 * - Define the table in this file (for the disassembler). If any 60 * new data types are required (ACPI_DMT_*), see below. 61 * - Add an external declaration for the new table definition (AcpiDmTableInfo*) 62 * in acdisam.h 63 * - Add new table definition to the dispatch table in dmtable.c (AcpiDmTableData) 64 * If a simple table (with no subtables), no disassembly code is needed. 65 * Otherwise, create the AcpiDmDump* function for to disassemble the table 66 * and add it to the dmtbdump.c file. 67 * - Add an external declaration for the new AcpiDmDump* function in acdisasm.h 68 * - Add the new AcpiDmDump* function to the dispatch table in dmtable.c 69 * - Create a template for the new table 70 * - Add data table compiler support 71 * 72 * How to add a new data type (ACPI_DMT_*): 73 * 74 * - Add new type at the end of the ACPI_DMT list in acdisasm.h 75 * - Add length and implementation cases in dmtable.c (disassembler) 76 * - Add type and length cases in dtutils.c (DT compiler) 77 */ 78 79 /* 80 * Remaining tables are not consumed directly by the ACPICA subsystem 81 */ 82 83 /******************************************************************************* 84 * 85 * AGDI - Arm Generic Diagnostic Dump and Reset Device Interface 86 * 87 * Conforms to "ACPI for Arm Components 1.1, Platform Design Document" 88 * ARM DEN0093 v1.1 89 * 90 ******************************************************************************/ 91 92 ACPI_DMTABLE_INFO AcpiDmTableInfoAgdi[] = 93 { 94 {ACPI_DMT_UINT8, ACPI_AGDI_OFFSET (Flags), "Flags (decoded below)", 0}, 95 {ACPI_DMT_FLAG0, ACPI_AGDI_FLAG_OFFSET (Flags, 0), "Signalling mode", 0}, 96 {ACPI_DMT_UINT24, ACPI_AGDI_OFFSET (Reserved[0]), "Reserved", 0}, 97 {ACPI_DMT_UINT32, ACPI_AGDI_OFFSET (SdeiEvent), "SdeiEvent", 0}, 98 {ACPI_DMT_UINT32, ACPI_AGDI_OFFSET (Gsiv), "Gsiv", 0}, 99 ACPI_DMT_TERMINATOR 100 }; 101 102 103 /******************************************************************************* 104 * 105 * IORT - IO Remapping Table 106 * 107 ******************************************************************************/ 108 109 ACPI_DMTABLE_INFO AcpiDmTableInfoIort[] = 110 { 111 {ACPI_DMT_UINT32, ACPI_IORT_OFFSET (NodeCount), "Node Count", 0}, 112 {ACPI_DMT_UINT32, ACPI_IORT_OFFSET (NodeOffset), "Node Offset", 0}, 113 {ACPI_DMT_UINT32, ACPI_IORT_OFFSET (Reserved), "Reserved", 0}, 114 ACPI_DMT_TERMINATOR 115 }; 116 117 /* Optional padding field */ 118 119 ACPI_DMTABLE_INFO AcpiDmTableInfoIortPad[] = 120 { 121 {ACPI_DMT_RAW_BUFFER, 0, "Optional Padding", DT_OPTIONAL}, 122 ACPI_DMT_TERMINATOR 123 }; 124 125 /* Common Subtable header (one per Subtable) */ 126 127 ACPI_DMTABLE_INFO AcpiDmTableInfoIortHdr[] = 128 { 129 {ACPI_DMT_UINT8, ACPI_IORTH_OFFSET (Type), "Type", 0}, 130 {ACPI_DMT_UINT16, ACPI_IORTH_OFFSET (Length), "Length", DT_LENGTH}, 131 {ACPI_DMT_UINT8, ACPI_IORTH_OFFSET (Revision), "Revision", 0}, 132 {ACPI_DMT_UINT32, ACPI_IORTH_OFFSET (Identifier), "Reserved", 0}, 133 {ACPI_DMT_UINT32, ACPI_IORTH_OFFSET (MappingCount), "Mapping Count", 0}, 134 {ACPI_DMT_UINT32, ACPI_IORTH_OFFSET (MappingOffset), "Mapping Offset", 0}, 135 ACPI_DMT_TERMINATOR 136 }; 137 138 /* Common Subtable header (one per Subtable)- Revision 3 */ 139 140 ACPI_DMTABLE_INFO AcpiDmTableInfoIortHdr3[] = 141 { 142 {ACPI_DMT_UINT8, ACPI_IORTH_OFFSET (Type), "Type", 0}, 143 {ACPI_DMT_UINT16, ACPI_IORTH_OFFSET (Length), "Length", DT_LENGTH}, 144 {ACPI_DMT_UINT8, ACPI_IORTH_OFFSET (Revision), "Revision", 0}, 145 {ACPI_DMT_UINT32, ACPI_IORTH_OFFSET (Identifier), "Identifier", 0}, 146 {ACPI_DMT_UINT32, ACPI_IORTH_OFFSET (MappingCount), "Mapping Count", 0}, 147 {ACPI_DMT_UINT32, ACPI_IORTH_OFFSET (MappingOffset), "Mapping Offset", 0}, 148 ACPI_DMT_TERMINATOR 149 }; 150 151 ACPI_DMTABLE_INFO AcpiDmTableInfoIortMap[] = 152 { 153 {ACPI_DMT_UINT32, ACPI_IORTM_OFFSET (InputBase), "Input base", DT_OPTIONAL}, 154 {ACPI_DMT_UINT32, ACPI_IORTM_OFFSET (IdCount), "ID Count", 0}, 155 {ACPI_DMT_UINT32, ACPI_IORTM_OFFSET (OutputBase), "Output Base", 0}, 156 {ACPI_DMT_UINT32, ACPI_IORTM_OFFSET (OutputReference), "Output Reference", 0}, 157 {ACPI_DMT_UINT32, ACPI_IORTM_OFFSET (Flags), "Flags (decoded below)", 0}, 158 {ACPI_DMT_FLAG0, ACPI_IORTM_FLAG_OFFSET (Flags, 0), "Single Mapping", 0}, 159 ACPI_DMT_TERMINATOR 160 }; 161 162 ACPI_DMTABLE_INFO AcpiDmTableInfoIortAcc[] = 163 { 164 {ACPI_DMT_UINT32, ACPI_IORTA_OFFSET (CacheCoherency), "Cache Coherency", 0}, 165 {ACPI_DMT_UINT8, ACPI_IORTA_OFFSET (Hints), "Hints (decoded below)", 0}, 166 {ACPI_DMT_FLAG0, ACPI_IORTA_FLAG_OFFSET (Hints, 0), "Transient", 0}, 167 {ACPI_DMT_FLAG1, ACPI_IORTA_FLAG_OFFSET (Hints, 0), "Write Allocate", 0}, 168 {ACPI_DMT_FLAG2, ACPI_IORTA_FLAG_OFFSET (Hints, 0), "Read Allocate", 0}, 169 {ACPI_DMT_FLAG3, ACPI_IORTA_FLAG_OFFSET (Hints, 0), "Override", 0}, 170 {ACPI_DMT_UINT16, ACPI_IORTA_OFFSET (Reserved), "Reserved", 0}, 171 {ACPI_DMT_UINT8, ACPI_IORTA_OFFSET (MemoryFlags), "Memory Flags (decoded below)", 0}, 172 {ACPI_DMT_FLAG0, ACPI_IORTA_FLAG_OFFSET (MemoryFlags, 0), "Coherency", 0}, 173 {ACPI_DMT_FLAG1, ACPI_IORTA_FLAG_OFFSET (MemoryFlags, 0), "Device Attribute", 0}, 174 ACPI_DMT_TERMINATOR 175 }; 176 177 /* IORT subtables */ 178 179 /* 0x00: ITS Group */ 180 181 ACPI_DMTABLE_INFO AcpiDmTableInfoIort0[] = 182 { 183 {ACPI_DMT_UINT32, ACPI_IORT0_OFFSET (ItsCount), "ItsCount", 0}, 184 ACPI_DMT_TERMINATOR 185 }; 186 187 ACPI_DMTABLE_INFO AcpiDmTableInfoIort0a[] = 188 { 189 {ACPI_DMT_UINT32, 0, "Identifiers", DT_OPTIONAL}, 190 ACPI_DMT_TERMINATOR 191 }; 192 193 /* 0x01: Named Component */ 194 195 ACPI_DMTABLE_INFO AcpiDmTableInfoIort1[] = 196 { 197 {ACPI_DMT_UINT32, ACPI_IORT1_OFFSET (NodeFlags), "Node Flags", 0}, 198 {ACPI_DMT_IORTMEM, ACPI_IORT1_OFFSET (MemoryProperties), "Memory Properties", 0}, 199 {ACPI_DMT_UINT8, ACPI_IORT1_OFFSET (MemoryAddressLimit), "Memory Size Limit", 0}, 200 {ACPI_DMT_STRING, ACPI_IORT1_OFFSET (DeviceName[0]), "Device Name", 0}, 201 ACPI_DMT_TERMINATOR 202 }; 203 204 ACPI_DMTABLE_INFO AcpiDmTableInfoIort1a[] = 205 { 206 {ACPI_DMT_RAW_BUFFER, 0, "Padding", DT_OPTIONAL}, 207 ACPI_DMT_TERMINATOR 208 }; 209 210 /* 0x02: PCI Root Complex */ 211 212 ACPI_DMTABLE_INFO AcpiDmTableInfoIort2[] = 213 { 214 {ACPI_DMT_IORTMEM, ACPI_IORT2_OFFSET (MemoryProperties), "Memory Properties", 0}, 215 {ACPI_DMT_UINT32, ACPI_IORT2_OFFSET (AtsAttribute), "ATS Attribute", 0}, 216 {ACPI_DMT_UINT32, ACPI_IORT2_OFFSET (PciSegmentNumber), "PCI Segment Number", 0}, 217 {ACPI_DMT_UINT8, ACPI_IORT2_OFFSET (MemoryAddressLimit), "Memory Size Limit", 0}, 218 {ACPI_DMT_UINT24, ACPI_IORT2_OFFSET (Reserved[0]), "Reserved", 0}, 219 ACPI_DMT_TERMINATOR 220 }; 221 222 /* 0x03: SMMUv1/2 */ 223 224 ACPI_DMTABLE_INFO AcpiDmTableInfoIort3[] = 225 { 226 {ACPI_DMT_UINT64, ACPI_IORT3_OFFSET (BaseAddress), "Base Address", 0}, 227 {ACPI_DMT_UINT64, ACPI_IORT3_OFFSET (Span), "Span", 0}, 228 {ACPI_DMT_UINT32, ACPI_IORT3_OFFSET (Model), "Model", 0}, 229 {ACPI_DMT_UINT32, ACPI_IORT3_OFFSET (Flags), "Flags (decoded below)", 0}, 230 {ACPI_DMT_FLAG0, ACPI_IORT3_FLAG_OFFSET (Flags, 0), "DVM Supported", 0}, 231 {ACPI_DMT_FLAG1, ACPI_IORT3_FLAG_OFFSET (Flags, 0), "Coherent Walk", 0}, 232 {ACPI_DMT_UINT32, ACPI_IORT3_OFFSET (GlobalInterruptOffset), "Global Interrupt Offset", 0}, 233 {ACPI_DMT_UINT32, ACPI_IORT3_OFFSET (ContextInterruptCount), "Context Interrupt Count", 0}, 234 {ACPI_DMT_UINT32, ACPI_IORT3_OFFSET (ContextInterruptOffset), "Context Interrupt Offset", 0}, 235 {ACPI_DMT_UINT32, ACPI_IORT3_OFFSET (PmuInterruptCount), "PMU Interrupt Count", 0}, 236 {ACPI_DMT_UINT32, ACPI_IORT3_OFFSET (PmuInterruptOffset), "PMU Interrupt Offset", 0}, 237 ACPI_DMT_TERMINATOR 238 }; 239 240 ACPI_DMTABLE_INFO AcpiDmTableInfoIort3a[] = 241 { 242 {ACPI_DMT_UINT32, ACPI_IORT3A_OFFSET (NSgIrpt), "NSgIrpt", 0}, 243 {ACPI_DMT_UINT32, ACPI_IORT3A_OFFSET (NSgIrptFlags), "NSgIrpt Flags (decoded below)", 0}, 244 {ACPI_DMT_FLAG0, ACPI_IORT3a_FLAG_OFFSET (NSgIrptFlags, 0), "Edge Triggered", 0}, 245 {ACPI_DMT_UINT32, ACPI_IORT3A_OFFSET (NSgCfgIrpt), "NSgCfgIrpt", 0}, 246 {ACPI_DMT_UINT32, ACPI_IORT3A_OFFSET (NSgCfgIrptFlags), "NSgCfgIrpt Flags (decoded below)", 0}, 247 {ACPI_DMT_FLAG0, ACPI_IORT3a_FLAG_OFFSET (NSgCfgIrptFlags, 0), "Edge Triggered", 0}, 248 ACPI_DMT_TERMINATOR 249 }; 250 251 ACPI_DMTABLE_INFO AcpiDmTableInfoIort3b[] = 252 { 253 {ACPI_DMT_UINT64, 0, "Context Interrupt", DT_OPTIONAL}, 254 ACPI_DMT_TERMINATOR 255 }; 256 257 ACPI_DMTABLE_INFO AcpiDmTableInfoIort3c[] = 258 { 259 {ACPI_DMT_UINT64, 0, "PMU Interrupt", DT_OPTIONAL}, 260 ACPI_DMT_TERMINATOR 261 }; 262 263 /* 0x04: SMMUv3 */ 264 265 ACPI_DMTABLE_INFO AcpiDmTableInfoIort4[] = 266 { 267 {ACPI_DMT_UINT64, ACPI_IORT4_OFFSET (BaseAddress), "Base Address", 0}, 268 {ACPI_DMT_UINT32, ACPI_IORT4_OFFSET (Flags), "Flags (decoded below)", 0}, 269 {ACPI_DMT_FLAG0, ACPI_IORT4_FLAG_OFFSET (Flags, 0), "COHACC Override", 0}, 270 {ACPI_DMT_FLAG1, ACPI_IORT4_FLAG_OFFSET (Flags, 0), "HTTU Override", 0}, 271 {ACPI_DMT_FLAG3, ACPI_IORT4_FLAG_OFFSET (Flags, 0), "Proximity Domain Valid", 0}, 272 {ACPI_DMT_UINT32, ACPI_IORT4_OFFSET (Reserved), "Reserved", 0}, 273 {ACPI_DMT_UINT64, ACPI_IORT4_OFFSET (VatosAddress), "VATOS Address", 0}, 274 {ACPI_DMT_UINT32, ACPI_IORT4_OFFSET (Model), "Model", 0}, 275 {ACPI_DMT_UINT32, ACPI_IORT4_OFFSET (EventGsiv), "Event GSIV", 0}, 276 {ACPI_DMT_UINT32, ACPI_IORT4_OFFSET (PriGsiv), "PRI GSIV", 0}, 277 {ACPI_DMT_UINT32, ACPI_IORT4_OFFSET (GerrGsiv), "GERR GSIV", 0}, 278 {ACPI_DMT_UINT32, ACPI_IORT4_OFFSET (SyncGsiv), "Sync GSIV", 0}, 279 {ACPI_DMT_UINT32, ACPI_IORT4_OFFSET (Pxm), "Proximity Domain", 0}, 280 {ACPI_DMT_UINT32, ACPI_IORT4_OFFSET (IdMappingIndex), "Device ID Mapping Index", 0}, 281 ACPI_DMT_TERMINATOR 282 }; 283 284 /* 0x05: PMCG */ 285 286 ACPI_DMTABLE_INFO AcpiDmTableInfoIort5[] = 287 { 288 {ACPI_DMT_UINT64, ACPI_IORT5_OFFSET (Page0BaseAddress), "Page 0 Base Address", 0}, 289 {ACPI_DMT_UINT32, ACPI_IORT5_OFFSET (OverflowGsiv), "Overflow Interrupt GSIV", 0}, 290 {ACPI_DMT_UINT32, ACPI_IORT5_OFFSET (NodeReference), "Node Reference", 0}, 291 {ACPI_DMT_UINT64, ACPI_IORT5_OFFSET (Page1BaseAddress), "Page 1 Base Address", 0}, 292 ACPI_DMT_TERMINATOR 293 }; 294 295 296 /* 0x06: RMR */ 297 298 ACPI_DMTABLE_INFO AcpiDmTableInfoIort6[] = 299 { 300 {ACPI_DMT_UINT32, ACPI_IORT6_OFFSET (Flags), "Flags (decoded below)", 0}, 301 {ACPI_DMT_FLAG0, ACPI_IORT6_FLAG_OFFSET (Flags, 0), "Remapping Permitted", 0}, 302 {ACPI_DMT_UINT32, ACPI_IORT6_OFFSET (RmrCount), "Number of RMR Descriptors", 0}, 303 {ACPI_DMT_UINT32, ACPI_IORT6_OFFSET (RmrOffset), "RMR Descriptor Offset", 0}, 304 ACPI_DMT_TERMINATOR 305 }; 306 307 ACPI_DMTABLE_INFO AcpiDmTableInfoIort6a[] = 308 { 309 {ACPI_DMT_UINT64, ACPI_IORT6A_OFFSET (BaseAddress), "Base Address of RMR", DT_OPTIONAL}, 310 {ACPI_DMT_UINT64, ACPI_IORT6A_OFFSET (Length), "Length of RMR", 0}, 311 {ACPI_DMT_UINT32, ACPI_IORT6A_OFFSET (Reserved), "Reserved", 0}, 312 ACPI_DMT_TERMINATOR 313 }; 314 315 /******************************************************************************* 316 * 317 * IVRS - I/O Virtualization Reporting Structure 318 * 319 ******************************************************************************/ 320 321 ACPI_DMTABLE_INFO AcpiDmTableInfoIvrs[] = 322 { 323 {ACPI_DMT_UINT32, ACPI_IVRS_OFFSET (Info), "Virtualization Info", 0}, 324 {ACPI_DMT_UINT64, ACPI_IVRS_OFFSET (Reserved), "Reserved", 0}, 325 ACPI_DMT_TERMINATOR 326 }; 327 328 /* IVRS subtables */ 329 330 /* 0x10: I/O Virtualization Hardware Definition (IVHD) Block */ 331 332 ACPI_DMTABLE_INFO AcpiDmTableInfoIvrsHware1[] = 333 { 334 {ACPI_DMT_IVRS, ACPI_IVRSH_OFFSET (Type), "Subtable Type", 0}, 335 {ACPI_DMT_UINT8, ACPI_IVRSH_OFFSET (Flags), "Flags (decoded below)", DT_FLAG}, 336 {ACPI_DMT_FLAG0, ACPI_IVRS_FLAG_OFFSET (Flags,0), "HtTunEn", 0}, 337 {ACPI_DMT_FLAG1, ACPI_IVRS_FLAG_OFFSET (Flags,0), "PassPW", 0}, 338 {ACPI_DMT_FLAG2, ACPI_IVRS_FLAG_OFFSET (Flags,0), "ResPassPW", 0}, 339 {ACPI_DMT_FLAG3, ACPI_IVRS_FLAG_OFFSET (Flags,0), "Isoc Control", 0}, 340 {ACPI_DMT_FLAG4, ACPI_IVRS_FLAG_OFFSET (Flags,0), "Iotlb Support", 0}, 341 {ACPI_DMT_FLAG5, ACPI_IVRS_FLAG_OFFSET (Flags,0), "Coherent", 0}, 342 {ACPI_DMT_FLAG6, ACPI_IVRS_FLAG_OFFSET (Flags,0), "Prefetch Support", 0}, 343 {ACPI_DMT_FLAG7, ACPI_IVRS_FLAG_OFFSET (Flags,0), "PPR Support", 0}, 344 {ACPI_DMT_UINT16, ACPI_IVRSH_OFFSET (Length), "Length", DT_LENGTH}, 345 {ACPI_DMT_UINT16, ACPI_IVRSH_OFFSET (DeviceId), "DeviceId", 0}, 346 {ACPI_DMT_UINT16, ACPI_IVRS0_OFFSET (CapabilityOffset), "Capability Offset", 0}, 347 {ACPI_DMT_UINT64, ACPI_IVRS0_OFFSET (BaseAddress), "Base Address", 0}, 348 {ACPI_DMT_UINT16, ACPI_IVRS0_OFFSET (PciSegmentGroup), "PCI Segment Group", 0}, 349 {ACPI_DMT_UINT16, ACPI_IVRS0_OFFSET (Info), "Virtualization Info", 0}, 350 {ACPI_DMT_UINT32, ACPI_IVRS0_OFFSET (FeatureReporting), "Feature Reporting", 0}, 351 ACPI_DMT_TERMINATOR 352 }; 353 354 /* 0x11, 0x40: I/O Virtualization Hardware Definition (IVHD) Block */ 355 356 ACPI_DMTABLE_INFO AcpiDmTableInfoIvrsHware23[] = 357 { 358 {ACPI_DMT_IVRS, ACPI_IVRSH_OFFSET (Type), "Subtable Type", 0}, 359 {ACPI_DMT_UINT8, ACPI_IVRSH_OFFSET (Flags), "Flags (decoded below)", DT_FLAG}, 360 {ACPI_DMT_FLAG0, ACPI_IVRS_FLAG_OFFSET (Flags,0), "HtTunEn", 0}, 361 {ACPI_DMT_FLAG1, ACPI_IVRS_FLAG_OFFSET (Flags,0), "PassPW", 0}, 362 {ACPI_DMT_FLAG2, ACPI_IVRS_FLAG_OFFSET (Flags,0), "ResPassPW", 0}, 363 {ACPI_DMT_FLAG3, ACPI_IVRS_FLAG_OFFSET (Flags,0), "Isoc Control", 0}, 364 {ACPI_DMT_FLAG4, ACPI_IVRS_FLAG_OFFSET (Flags,0), "Iotlb Support", 0}, 365 {ACPI_DMT_FLAG5, ACPI_IVRS_FLAG_OFFSET (Flags,0), "Coherent", 0}, 366 {ACPI_DMT_FLAG6, ACPI_IVRS_FLAG_OFFSET (Flags,0), "Prefetch Support", 0}, 367 {ACPI_DMT_FLAG7, ACPI_IVRS_FLAG_OFFSET (Flags,0), "PPR Support", 0}, 368 {ACPI_DMT_UINT16, ACPI_IVRS01_OFFSET (Header.Length), "Length", DT_LENGTH}, 369 {ACPI_DMT_UINT16, ACPI_IVRS01_OFFSET (Header.DeviceId), "DeviceId", 0}, 370 {ACPI_DMT_UINT16, ACPI_IVRS01_OFFSET (CapabilityOffset), "Capability Offset", 0}, 371 {ACPI_DMT_UINT64, ACPI_IVRS01_OFFSET (BaseAddress), "Base Address", 0}, 372 {ACPI_DMT_UINT16, ACPI_IVRS01_OFFSET (PciSegmentGroup), "PCI Segment Group", 0}, 373 {ACPI_DMT_UINT16, ACPI_IVRS01_OFFSET (Info), "Virtualization Info", 0}, 374 {ACPI_DMT_UINT32, ACPI_IVRS01_OFFSET (Attributes), "Attributes", 0}, 375 {ACPI_DMT_UINT64, ACPI_IVRS01_OFFSET (EfrRegisterImage), "EFR Image", 0}, 376 {ACPI_DMT_UINT64, ACPI_IVRS01_OFFSET (Reserved), "Reserved", 0}, 377 ACPI_DMT_TERMINATOR 378 }; 379 380 /* 0x20, 0x21, 0x22: I/O Virtualization Memory Definition (IVMD) Device Entry Block */ 381 382 ACPI_DMTABLE_INFO AcpiDmTableInfoIvrsMemory[] = 383 { 384 {ACPI_DMT_IVRS, ACPI_IVRSH_OFFSET (Type), "Subtable Type", 0}, 385 {ACPI_DMT_UINT8, ACPI_IVRSH_OFFSET (Flags), "Flags (decoded below)", DT_FLAG}, 386 {ACPI_DMT_FLAG0, ACPI_IVRS_FLAG_OFFSET (Flags,0), "Unity", 0}, 387 {ACPI_DMT_FLAG1, ACPI_IVRS_FLAG_OFFSET (Flags,0), "Readable", 0}, 388 {ACPI_DMT_FLAG2, ACPI_IVRS_FLAG_OFFSET (Flags,0), "Writeable", 0}, 389 {ACPI_DMT_FLAG3, ACPI_IVRS_FLAG_OFFSET (Flags,0), "Exclusion Range", 0}, 390 {ACPI_DMT_UINT16, ACPI_IVRSH_OFFSET (Length), "Length", DT_LENGTH}, 391 {ACPI_DMT_UINT16, ACPI_IVRSH_OFFSET (DeviceId), "DeviceId", 0}, 392 {ACPI_DMT_UINT16, ACPI_IVRS1_OFFSET (AuxData), "Auxiliary Data", 0}, 393 {ACPI_DMT_UINT64, ACPI_IVRS1_OFFSET (Reserved), "Reserved", 0}, 394 {ACPI_DMT_UINT64, ACPI_IVRS1_OFFSET (StartAddress), "Start Address", 0}, 395 {ACPI_DMT_UINT64, ACPI_IVRS1_OFFSET (MemoryLength), "Memory Length", 0}, 396 ACPI_DMT_TERMINATOR 397 }; 398 399 /* Device entry header for IVHD block */ 400 401 #define ACPI_DMT_IVRS_DE_HEADER \ 402 {ACPI_DMT_IVRS_DE, ACPI_IVRSD_OFFSET (Type), "Subtable Type", 0}, \ 403 {ACPI_DMT_UINT16, ACPI_IVRSD_OFFSET (Id), "Device ID", 0}, \ 404 {ACPI_DMT_UINT8, ACPI_IVRSD_OFFSET (DataSetting), "Data Setting (decoded below)", 0}, \ 405 {ACPI_DMT_FLAG0, ACPI_IVRSDE_FLAG_OFFSET (DataSetting, 0), "INITPass", 0}, \ 406 {ACPI_DMT_FLAG1, ACPI_IVRSDE_FLAG_OFFSET (DataSetting, 0), "EIntPass", 0}, \ 407 {ACPI_DMT_FLAG2, ACPI_IVRSDE_FLAG_OFFSET (DataSetting, 0), "NMIPass", 0}, \ 408 {ACPI_DMT_FLAG3, ACPI_IVRSDE_FLAG_OFFSET (DataSetting, 0), "Reserved", 0}, \ 409 {ACPI_DMT_FLAGS4, ACPI_IVRSDE_FLAG_OFFSET (DataSetting, 0), "System MGMT", 0}, \ 410 {ACPI_DMT_FLAG6, ACPI_IVRSDE_FLAG_OFFSET (DataSetting, 0), "LINT0 Pass", 0}, \ 411 {ACPI_DMT_FLAG7, ACPI_IVRSDE_FLAG_OFFSET (DataSetting, 0), "LINT1 Pass", 0} 412 413 /* 4-byte device entry (Types 1,2,3,4) */ 414 415 ACPI_DMTABLE_INFO AcpiDmTableInfoIvrs4[] = 416 { 417 ACPI_DMT_IVRS_DE_HEADER, 418 ACPI_DMT_TERMINATOR 419 }; 420 421 /* 8-byte device entry (Type Alias Select, Alias Start of Range) */ 422 423 ACPI_DMTABLE_INFO AcpiDmTableInfoIvrs8a[] = 424 { 425 ACPI_DMT_IVRS_DE_HEADER, 426 {ACPI_DMT_UINT8, ACPI_IVRS8A_OFFSET (Reserved1), "Reserved", 0}, 427 {ACPI_DMT_UINT16, ACPI_IVRS8A_OFFSET (UsedId), "Source Used Device ID", 0}, 428 {ACPI_DMT_UINT8, ACPI_IVRS8A_OFFSET (Reserved2), "Reserved", 0}, 429 ACPI_DMT_TERMINATOR 430 }; 431 432 /* 8-byte device entry (Type Extended Select, Extended Start of Range) */ 433 434 ACPI_DMTABLE_INFO AcpiDmTableInfoIvrs8b[] = 435 { 436 ACPI_DMT_IVRS_DE_HEADER, 437 {ACPI_DMT_UINT32, ACPI_IVRS8B_OFFSET (ExtendedData), "Extended Data", 0}, 438 ACPI_DMT_TERMINATOR 439 }; 440 441 /* 8-byte device entry (Type Special Device) */ 442 443 ACPI_DMTABLE_INFO AcpiDmTableInfoIvrs8c[] = 444 { 445 ACPI_DMT_IVRS_DE_HEADER, 446 {ACPI_DMT_UINT8, ACPI_IVRS8C_OFFSET (Handle), "Handle", 0}, 447 {ACPI_DMT_UINT16, ACPI_IVRS8C_OFFSET (UsedId), "Source Used Device ID", 0}, 448 {ACPI_DMT_UINT8, ACPI_IVRS8C_OFFSET (Variety), "Variety", 0}, 449 ACPI_DMT_TERMINATOR 450 }; 451 452 /* Variable-length Device Entry Type 0xF0 */ 453 454 ACPI_DMTABLE_INFO AcpiDmTableInfoIvrsHid[] = 455 { 456 ACPI_DMT_IVRS_DE_HEADER, 457 ACPI_DMT_TERMINATOR 458 }; 459 460 ACPI_DMTABLE_INFO AcpiDmTableInfoIvrsUidString[] = 461 { 462 {ACPI_DMT_UINT8, 0, "UID Format", DT_DESCRIBES_OPTIONAL}, 463 {ACPI_DMT_UINT8, 1, "UID Length", DT_DESCRIBES_OPTIONAL}, 464 {ACPI_DMT_IVRS_UNTERMINATED_STRING, 2, "UID", DT_OPTIONAL}, 465 ACPI_DMT_TERMINATOR 466 }; 467 468 ACPI_DMTABLE_INFO AcpiDmTableInfoIvrsUidInteger[] = 469 { 470 {ACPI_DMT_UINT8, 0, "UID Format", DT_DESCRIBES_OPTIONAL}, 471 {ACPI_DMT_UINT8, 1, "UID Length", DT_DESCRIBES_OPTIONAL}, 472 {ACPI_DMT_UINT64, 2, "UID", DT_OPTIONAL}, 473 ACPI_DMT_TERMINATOR 474 }; 475 476 ACPI_DMTABLE_INFO AcpiDmTableInfoIvrsHidString[] = 477 { 478 {ACPI_DMT_NAME8, 0, "ACPI HID", 0}, 479 ACPI_DMT_TERMINATOR 480 }; 481 482 ACPI_DMTABLE_INFO AcpiDmTableInfoIvrsHidInteger[] = 483 { 484 {ACPI_DMT_UINT64, 0, "ACPI HID", 0}, 485 ACPI_DMT_TERMINATOR 486 }; 487 ACPI_DMTABLE_INFO AcpiDmTableInfoIvrsCidString[] = 488 { 489 {ACPI_DMT_NAME8, 0, "ACPI CID", 0}, 490 ACPI_DMT_TERMINATOR 491 }; 492 493 ACPI_DMTABLE_INFO AcpiDmTableInfoIvrsCidInteger[] = 494 { 495 {ACPI_DMT_UINT64, 0, "ACPI CID", 0}, 496 ACPI_DMT_TERMINATOR 497 }; 498 499 500 /******************************************************************************* 501 * 502 * LPIT - Low Power Idle Table 503 * 504 ******************************************************************************/ 505 506 /* Main table consists only of the standard ACPI table header */ 507 508 /* Common Subtable header (one per Subtable) */ 509 510 ACPI_DMTABLE_INFO AcpiDmTableInfoLpitHdr[] = 511 { 512 {ACPI_DMT_LPIT, ACPI_LPITH_OFFSET (Type), "Subtable Type", 0}, 513 {ACPI_DMT_UINT32, ACPI_LPITH_OFFSET (Length), "Length", DT_LENGTH}, 514 {ACPI_DMT_UINT16, ACPI_LPITH_OFFSET (UniqueId), "Unique ID", 0}, 515 {ACPI_DMT_UINT16, ACPI_LPITH_OFFSET (Reserved), "Reserved", 0}, 516 {ACPI_DMT_UINT32, ACPI_LPITH_OFFSET (Flags), "Flags (decoded below)", DT_FLAG}, 517 {ACPI_DMT_FLAG0, ACPI_LPITH_FLAG_OFFSET (Flags, 0), "State Disabled", 0}, 518 {ACPI_DMT_FLAG1, ACPI_LPITH_FLAG_OFFSET (Flags, 0), "No Counter", 0}, 519 ACPI_DMT_TERMINATOR 520 }; 521 522 /* LPIT Subtables */ 523 524 /* 0: Native C-state */ 525 526 ACPI_DMTABLE_INFO AcpiDmTableInfoLpit0[] = 527 { 528 {ACPI_DMT_GAS, ACPI_LPIT0_OFFSET (EntryTrigger), "Entry Trigger", 0}, 529 {ACPI_DMT_UINT32, ACPI_LPIT0_OFFSET (Residency), "Residency", 0}, 530 {ACPI_DMT_UINT32, ACPI_LPIT0_OFFSET (Latency), "Latency", 0}, 531 {ACPI_DMT_GAS, ACPI_LPIT0_OFFSET (ResidencyCounter), "Residency Counter", 0}, 532 {ACPI_DMT_UINT64, ACPI_LPIT0_OFFSET (CounterFrequency), "Counter Frequency", 0}, 533 ACPI_DMT_TERMINATOR 534 }; 535 536 537 /******************************************************************************* 538 * 539 * MADT - Multiple APIC Description Table and subtables 540 * 541 ******************************************************************************/ 542 543 ACPI_DMTABLE_INFO AcpiDmTableInfoMadt[] = 544 { 545 {ACPI_DMT_UINT32, ACPI_MADT_OFFSET (Address), "Local Apic Address", 0}, 546 {ACPI_DMT_UINT32, ACPI_MADT_OFFSET (Flags), "Flags (decoded below)", DT_FLAG}, 547 {ACPI_DMT_FLAG0, ACPI_MADT_FLAG_OFFSET (Flags,0), "PC-AT Compatibility", 0}, 548 ACPI_DMT_TERMINATOR 549 }; 550 551 /* Common Subtable header (one per Subtable) */ 552 553 ACPI_DMTABLE_INFO AcpiDmTableInfoMadtHdr[] = 554 { 555 {ACPI_DMT_MADT, ACPI_MADTH_OFFSET (Type), "Subtable Type", 0}, 556 {ACPI_DMT_UINT8, ACPI_MADTH_OFFSET (Length), "Length", DT_LENGTH}, 557 ACPI_DMT_TERMINATOR 558 }; 559 560 /* MADT Subtables */ 561 562 /* 0: processor APIC */ 563 564 ACPI_DMTABLE_INFO AcpiDmTableInfoMadt0[] = 565 { 566 {ACPI_DMT_UINT8, ACPI_MADT0_OFFSET (ProcessorId), "Processor ID", 0}, 567 {ACPI_DMT_UINT8, ACPI_MADT0_OFFSET (Id), "Local Apic ID", 0}, 568 {ACPI_DMT_UINT32, ACPI_MADT0_OFFSET (LapicFlags), "Flags (decoded below)", DT_FLAG}, 569 {ACPI_DMT_FLAG0, ACPI_MADT0_FLAG_OFFSET (LapicFlags,0), "Processor Enabled", 0}, 570 {ACPI_DMT_FLAG1, ACPI_MADT0_FLAG_OFFSET (LapicFlags,0), "Runtime Online Capable", 0}, 571 ACPI_DMT_TERMINATOR 572 }; 573 574 /* 1: IO APIC */ 575 576 ACPI_DMTABLE_INFO AcpiDmTableInfoMadt1[] = 577 { 578 {ACPI_DMT_UINT8, ACPI_MADT1_OFFSET (Id), "I/O Apic ID", 0}, 579 {ACPI_DMT_UINT8, ACPI_MADT1_OFFSET (Reserved), "Reserved", 0}, 580 {ACPI_DMT_UINT32, ACPI_MADT1_OFFSET (Address), "Address", 0}, 581 {ACPI_DMT_UINT32, ACPI_MADT1_OFFSET (GlobalIrqBase), "Interrupt", 0}, 582 ACPI_DMT_TERMINATOR 583 }; 584 585 /* 2: Interrupt Override */ 586 587 ACPI_DMTABLE_INFO AcpiDmTableInfoMadt2[] = 588 { 589 {ACPI_DMT_UINT8, ACPI_MADT2_OFFSET (Bus), "Bus", 0}, 590 {ACPI_DMT_UINT8, ACPI_MADT2_OFFSET (SourceIrq), "Source", 0}, 591 {ACPI_DMT_UINT32, ACPI_MADT2_OFFSET (GlobalIrq), "Interrupt", 0}, 592 {ACPI_DMT_UINT16, ACPI_MADT2_OFFSET (IntiFlags), "Flags (decoded below)", DT_FLAG}, 593 {ACPI_DMT_FLAGS0, ACPI_MADT2_FLAG_OFFSET (IntiFlags,0), "Polarity", 0}, 594 {ACPI_DMT_FLAGS2, ACPI_MADT2_FLAG_OFFSET (IntiFlags,0), "Trigger Mode", 0}, 595 ACPI_DMT_TERMINATOR 596 }; 597 598 /* 3: NMI Sources */ 599 600 ACPI_DMTABLE_INFO AcpiDmTableInfoMadt3[] = 601 { 602 {ACPI_DMT_UINT16, ACPI_MADT3_OFFSET (IntiFlags), "Flags (decoded below)", DT_FLAG}, 603 {ACPI_DMT_FLAGS0, ACPI_MADT3_FLAG_OFFSET (IntiFlags,0), "Polarity", 0}, 604 {ACPI_DMT_FLAGS2, ACPI_MADT3_FLAG_OFFSET (IntiFlags,0), "Trigger Mode", 0}, 605 {ACPI_DMT_UINT32, ACPI_MADT3_OFFSET (GlobalIrq), "Interrupt", 0}, 606 ACPI_DMT_TERMINATOR 607 }; 608 609 /* 4: Local APIC NMI */ 610 611 ACPI_DMTABLE_INFO AcpiDmTableInfoMadt4[] = 612 { 613 {ACPI_DMT_UINT8, ACPI_MADT4_OFFSET (ProcessorId), "Processor ID", 0}, 614 {ACPI_DMT_UINT16, ACPI_MADT4_OFFSET (IntiFlags), "Flags (decoded below)", DT_FLAG}, 615 {ACPI_DMT_FLAGS0, ACPI_MADT4_FLAG_OFFSET (IntiFlags,0), "Polarity", 0}, 616 {ACPI_DMT_FLAGS2, ACPI_MADT4_FLAG_OFFSET (IntiFlags,0), "Trigger Mode", 0}, 617 {ACPI_DMT_UINT8, ACPI_MADT4_OFFSET (Lint), "Interrupt Input LINT", 0}, 618 ACPI_DMT_TERMINATOR 619 }; 620 621 /* 5: Address Override */ 622 623 ACPI_DMTABLE_INFO AcpiDmTableInfoMadt5[] = 624 { 625 {ACPI_DMT_UINT16, ACPI_MADT5_OFFSET (Reserved), "Reserved", 0}, 626 {ACPI_DMT_UINT64, ACPI_MADT5_OFFSET (Address), "APIC Address", 0}, 627 ACPI_DMT_TERMINATOR 628 }; 629 630 /* 6: I/O Sapic */ 631 632 ACPI_DMTABLE_INFO AcpiDmTableInfoMadt6[] = 633 { 634 {ACPI_DMT_UINT8, ACPI_MADT6_OFFSET (Id), "I/O Sapic ID", 0}, 635 {ACPI_DMT_UINT8, ACPI_MADT6_OFFSET (Reserved), "Reserved", 0}, 636 {ACPI_DMT_UINT32, ACPI_MADT6_OFFSET (GlobalIrqBase), "Interrupt Base", 0}, 637 {ACPI_DMT_UINT64, ACPI_MADT6_OFFSET (Address), "Address", 0}, 638 ACPI_DMT_TERMINATOR 639 }; 640 641 /* 7: Local Sapic */ 642 643 ACPI_DMTABLE_INFO AcpiDmTableInfoMadt7[] = 644 { 645 {ACPI_DMT_UINT8, ACPI_MADT7_OFFSET (ProcessorId), "Processor ID", 0}, 646 {ACPI_DMT_UINT8, ACPI_MADT7_OFFSET (Id), "Local Sapic ID", 0}, 647 {ACPI_DMT_UINT8, ACPI_MADT7_OFFSET (Eid), "Local Sapic EID", 0}, 648 {ACPI_DMT_UINT24, ACPI_MADT7_OFFSET (Reserved[0]), "Reserved", 0}, 649 {ACPI_DMT_UINT32, ACPI_MADT7_OFFSET (LapicFlags), "Flags (decoded below)", DT_FLAG}, 650 {ACPI_DMT_FLAG0, ACPI_MADT7_FLAG_OFFSET (LapicFlags,0), "Processor Enabled", 0}, 651 {ACPI_DMT_UINT32, ACPI_MADT7_OFFSET (Uid), "Processor UID", 0}, 652 {ACPI_DMT_STRING, ACPI_MADT7_OFFSET (UidString[0]), "Processor UID String", 0}, 653 ACPI_DMT_TERMINATOR 654 }; 655 656 /* 8: Platform Interrupt Source */ 657 658 ACPI_DMTABLE_INFO AcpiDmTableInfoMadt8[] = 659 { 660 {ACPI_DMT_UINT16, ACPI_MADT8_OFFSET (IntiFlags), "Flags (decoded below)", DT_FLAG}, 661 {ACPI_DMT_FLAGS0, ACPI_MADT8_FLAG_OFFSET (IntiFlags,0), "Polarity", 0}, 662 {ACPI_DMT_FLAGS2, ACPI_MADT8_FLAG_OFFSET (IntiFlags,0), "Trigger Mode", 0}, 663 {ACPI_DMT_UINT8, ACPI_MADT8_OFFSET (Type), "InterruptType", 0}, 664 {ACPI_DMT_UINT8, ACPI_MADT8_OFFSET (Id), "Processor ID", 0}, 665 {ACPI_DMT_UINT8, ACPI_MADT8_OFFSET (Eid), "Processor EID", 0}, 666 {ACPI_DMT_UINT8, ACPI_MADT8_OFFSET (IoSapicVector), "I/O Sapic Vector", 0}, 667 {ACPI_DMT_UINT32, ACPI_MADT8_OFFSET (GlobalIrq), "Interrupt", 0}, 668 {ACPI_DMT_UINT32, ACPI_MADT8_OFFSET (Flags), "Flags (decoded below)", DT_FLAG}, 669 {ACPI_DMT_FLAG0, ACPI_MADT8_OFFSET (Flags), "CPEI Override", 0}, 670 ACPI_DMT_TERMINATOR 671 }; 672 673 /* 9: Processor Local X2_APIC (ACPI 4.0) */ 674 675 ACPI_DMTABLE_INFO AcpiDmTableInfoMadt9[] = 676 { 677 {ACPI_DMT_UINT16, ACPI_MADT9_OFFSET (Reserved), "Reserved", 0}, 678 {ACPI_DMT_UINT32, ACPI_MADT9_OFFSET (LocalApicId), "Processor x2Apic ID", 0}, 679 {ACPI_DMT_UINT32, ACPI_MADT9_OFFSET (LapicFlags), "Flags (decoded below)", DT_FLAG}, 680 {ACPI_DMT_FLAG0, ACPI_MADT9_FLAG_OFFSET (LapicFlags,0), "Processor Enabled", 0}, 681 {ACPI_DMT_UINT32, ACPI_MADT9_OFFSET (Uid), "Processor UID", 0}, 682 ACPI_DMT_TERMINATOR 683 }; 684 685 /* 10: Local X2_APIC NMI (ACPI 4.0) */ 686 687 ACPI_DMTABLE_INFO AcpiDmTableInfoMadt10[] = 688 { 689 {ACPI_DMT_UINT16, ACPI_MADT10_OFFSET (IntiFlags), "Flags (decoded below)", DT_FLAG}, 690 {ACPI_DMT_FLAGS0, ACPI_MADT10_FLAG_OFFSET (IntiFlags,0), "Polarity", 0}, 691 {ACPI_DMT_FLAGS2, ACPI_MADT10_FLAG_OFFSET (IntiFlags,0), "Trigger Mode", 0}, 692 {ACPI_DMT_UINT32, ACPI_MADT10_OFFSET (Uid), "Processor UID", 0}, 693 {ACPI_DMT_UINT8, ACPI_MADT10_OFFSET (Lint), "Interrupt Input LINT", 0}, 694 {ACPI_DMT_UINT24, ACPI_MADT10_OFFSET (Reserved[0]), "Reserved", 0}, 695 ACPI_DMT_TERMINATOR 696 }; 697 698 /* 11: Generic Interrupt Controller (ACPI 5.0) */ 699 700 ACPI_DMTABLE_INFO AcpiDmTableInfoMadt11[] = 701 { 702 {ACPI_DMT_UINT16, ACPI_MADT11_OFFSET (Reserved), "Reserved", 0}, 703 {ACPI_DMT_UINT32, ACPI_MADT11_OFFSET (CpuInterfaceNumber), "CPU Interface Number", 0}, 704 {ACPI_DMT_UINT32, ACPI_MADT11_OFFSET (Uid), "Processor UID", 0}, 705 {ACPI_DMT_UINT32, ACPI_MADT11_OFFSET (Flags), "Flags (decoded below)", DT_FLAG}, 706 {ACPI_DMT_FLAG0, ACPI_MADT11_FLAG_OFFSET (Flags,0), "Processor Enabled", 0}, 707 {ACPI_DMT_FLAG1, ACPI_MADT11_FLAG_OFFSET (Flags,0), "Performance Interrupt Trigger Mode", 0}, 708 {ACPI_DMT_FLAG2, ACPI_MADT11_FLAG_OFFSET (Flags,0), "Virtual GIC Interrupt Trigger Mode", 0}, 709 {ACPI_DMT_UINT32, ACPI_MADT11_OFFSET (ParkingVersion), "Parking Protocol Version", 0}, 710 {ACPI_DMT_UINT32, ACPI_MADT11_OFFSET (PerformanceInterrupt), "Performance Interrupt", 0}, 711 {ACPI_DMT_UINT64, ACPI_MADT11_OFFSET (ParkedAddress), "Parked Address", 0}, 712 {ACPI_DMT_UINT64, ACPI_MADT11_OFFSET (BaseAddress), "Base Address", 0}, 713 {ACPI_DMT_UINT64, ACPI_MADT11_OFFSET (GicvBaseAddress), "Virtual GIC Base Address", 0}, 714 {ACPI_DMT_UINT64, ACPI_MADT11_OFFSET (GichBaseAddress), "Hypervisor GIC Base Address", 0}, 715 {ACPI_DMT_UINT32, ACPI_MADT11_OFFSET (VgicInterrupt), "Virtual GIC Interrupt", 0}, 716 {ACPI_DMT_UINT64, ACPI_MADT11_OFFSET (GicrBaseAddress), "Redistributor Base Address", 0}, 717 {ACPI_DMT_UINT64, ACPI_MADT11_OFFSET (ArmMpidr), "ARM MPIDR", 0}, 718 {ACPI_DMT_UINT8, ACPI_MADT11_OFFSET (EfficiencyClass), "Efficiency Class", 0}, 719 {ACPI_DMT_UINT8, ACPI_MADT11_OFFSET (Reserved2[0]), "Reserved", 0}, 720 {ACPI_DMT_UINT16, ACPI_MADT11_OFFSET (SpeInterrupt), "SPE Overflow Interrupt", 0}, 721 ACPI_DMT_TERMINATOR 722 }; 723 724 /* 12: Generic Interrupt Distributor (ACPI 5.0) */ 725 726 ACPI_DMTABLE_INFO AcpiDmTableInfoMadt12[] = 727 { 728 {ACPI_DMT_UINT16, ACPI_MADT12_OFFSET (Reserved), "Reserved", 0}, 729 {ACPI_DMT_UINT32, ACPI_MADT12_OFFSET (GicId), "Local GIC Hardware ID", 0}, 730 {ACPI_DMT_UINT64, ACPI_MADT12_OFFSET (BaseAddress), "Base Address", 0}, 731 {ACPI_DMT_UINT32, ACPI_MADT12_OFFSET (GlobalIrqBase), "Interrupt Base", 0}, 732 {ACPI_DMT_UINT8, ACPI_MADT12_OFFSET (Version), "Version", 0}, 733 {ACPI_DMT_UINT24, ACPI_MADT12_OFFSET (Reserved2[0]), "Reserved", 0}, 734 ACPI_DMT_TERMINATOR 735 }; 736 737 /* 13: Generic MSI Frame (ACPI 5.1) */ 738 739 ACPI_DMTABLE_INFO AcpiDmTableInfoMadt13[] = 740 { 741 {ACPI_DMT_UINT16, ACPI_MADT13_OFFSET (Reserved), "Reserved", 0}, 742 {ACPI_DMT_UINT32, ACPI_MADT13_OFFSET (MsiFrameId), "MSI Frame ID", 0}, 743 {ACPI_DMT_UINT64, ACPI_MADT13_OFFSET (BaseAddress), "Base Address", 0}, 744 {ACPI_DMT_UINT32, ACPI_MADT13_OFFSET (Flags), "Flags (decoded below)", DT_FLAG}, 745 {ACPI_DMT_FLAG0, ACPI_MADT13_FLAG_OFFSET (Flags,0), "Select SPI", 0}, 746 {ACPI_DMT_UINT16, ACPI_MADT13_OFFSET (SpiCount), "SPI Count", 0}, 747 {ACPI_DMT_UINT16, ACPI_MADT13_OFFSET (SpiBase), "SPI Base", 0}, 748 ACPI_DMT_TERMINATOR 749 }; 750 751 /* 14: Generic Redistributor (ACPI 5.1) */ 752 753 ACPI_DMTABLE_INFO AcpiDmTableInfoMadt14[] = 754 { 755 {ACPI_DMT_UINT16, ACPI_MADT14_OFFSET (Reserved), "Reserved", 0}, 756 {ACPI_DMT_UINT64, ACPI_MADT14_OFFSET (BaseAddress), "Base Address", 0}, 757 {ACPI_DMT_UINT32, ACPI_MADT14_OFFSET (Length), "Length", 0}, 758 ACPI_DMT_TERMINATOR 759 }; 760 761 /* 15: Generic Translator (ACPI 6.0) */ 762 763 ACPI_DMTABLE_INFO AcpiDmTableInfoMadt15[] = 764 { 765 {ACPI_DMT_UINT16, ACPI_MADT15_OFFSET (Reserved), "Reserved", 0}, 766 {ACPI_DMT_UINT32, ACPI_MADT15_OFFSET (TranslationId), "Translation ID", 0}, 767 {ACPI_DMT_UINT64, ACPI_MADT15_OFFSET (BaseAddress), "Base Address", 0}, 768 {ACPI_DMT_UINT32, ACPI_MADT15_OFFSET (Reserved2), "Reserved", 0}, 769 ACPI_DMT_TERMINATOR 770 }; 771 772 /* 16: Multiprocessor wakeup structure (ACPI 6.4) */ 773 774 ACPI_DMTABLE_INFO AcpiDmTableInfoMadt16[] = 775 { 776 {ACPI_DMT_UINT16, ACPI_MADT16_OFFSET (MailboxVersion), "Mailbox Version", 0}, 777 {ACPI_DMT_UINT32, ACPI_MADT16_OFFSET (Reserved), "Reserved", 0}, 778 {ACPI_DMT_UINT64, ACPI_MADT16_OFFSET (BaseAddress), "Mailbox Address", 0}, 779 ACPI_DMT_TERMINATOR 780 }; 781 782 783 /******************************************************************************* 784 * 785 * MCFG - PCI Memory Mapped Configuration table and Subtable 786 * 787 ******************************************************************************/ 788 789 ACPI_DMTABLE_INFO AcpiDmTableInfoMcfg[] = 790 { 791 {ACPI_DMT_UINT64, ACPI_MCFG_OFFSET (Reserved[0]), "Reserved", 0}, 792 ACPI_DMT_TERMINATOR 793 }; 794 795 ACPI_DMTABLE_INFO AcpiDmTableInfoMcfg0[] = 796 { 797 {ACPI_DMT_UINT64, ACPI_MCFG0_OFFSET (Address), "Base Address", 0}, 798 {ACPI_DMT_UINT16, ACPI_MCFG0_OFFSET (PciSegment), "Segment Group Number", 0}, 799 {ACPI_DMT_UINT8, ACPI_MCFG0_OFFSET (StartBusNumber), "Start Bus Number", 0}, 800 {ACPI_DMT_UINT8, ACPI_MCFG0_OFFSET (EndBusNumber), "End Bus Number", 0}, 801 {ACPI_DMT_UINT32, ACPI_MCFG0_OFFSET (Reserved), "Reserved", 0}, 802 ACPI_DMT_TERMINATOR 803 }; 804 805 806 /******************************************************************************* 807 * 808 * MCHI - Management Controller Host Interface table 809 * 810 ******************************************************************************/ 811 812 ACPI_DMTABLE_INFO AcpiDmTableInfoMchi[] = 813 { 814 {ACPI_DMT_UINT8, ACPI_MCHI_OFFSET (InterfaceType), "Interface Type", 0}, 815 {ACPI_DMT_UINT8, ACPI_MCHI_OFFSET (Protocol), "Protocol", 0}, 816 {ACPI_DMT_UINT64, ACPI_MCHI_OFFSET (ProtocolData), "Protocol Data", 0}, 817 {ACPI_DMT_UINT8, ACPI_MCHI_OFFSET (InterruptType), "Interrupt Type", 0}, 818 {ACPI_DMT_UINT8, ACPI_MCHI_OFFSET (Gpe), "Gpe", 0}, 819 {ACPI_DMT_UINT8, ACPI_MCHI_OFFSET (PciDeviceFlag), "Pci Device Flag", 0}, 820 {ACPI_DMT_UINT32, ACPI_MCHI_OFFSET (GlobalInterrupt), "Global Interrupt", 0}, 821 {ACPI_DMT_GAS, ACPI_MCHI_OFFSET (ControlRegister), "Control Register", 0}, 822 {ACPI_DMT_UINT8, ACPI_MCHI_OFFSET (PciSegment), "Pci Segment", 0}, 823 {ACPI_DMT_UINT8, ACPI_MCHI_OFFSET (PciBus), "Pci Bus", 0}, 824 {ACPI_DMT_UINT8, ACPI_MCHI_OFFSET (PciDevice), "Pci Device", 0}, 825 {ACPI_DMT_UINT8, ACPI_MCHI_OFFSET (PciFunction), "Pci Function", 0}, 826 ACPI_DMT_TERMINATOR 827 }; 828 829 830 /******************************************************************************* 831 * 832 * MPST - Memory Power State Table 833 * 834 ******************************************************************************/ 835 836 ACPI_DMTABLE_INFO AcpiDmTableInfoMpst[] = 837 { 838 {ACPI_DMT_UINT8, ACPI_MPST_OFFSET (ChannelId), "Channel ID", 0}, 839 {ACPI_DMT_UINT24, ACPI_MPST_OFFSET (Reserved1[0]), "Reserved", 0}, 840 {ACPI_DMT_UINT16, ACPI_MPST_OFFSET (PowerNodeCount), "Power Node Count", 0}, 841 {ACPI_DMT_UINT16, ACPI_MPST_OFFSET (Reserved2), "Reserved", 0}, 842 ACPI_DMT_TERMINATOR 843 }; 844 845 /* MPST subtables */ 846 847 /* 0: Memory Power Node Structure */ 848 849 ACPI_DMTABLE_INFO AcpiDmTableInfoMpst0[] = 850 { 851 {ACPI_DMT_UINT8, ACPI_MPST0_OFFSET (Flags), "Flags (decoded below)", DT_FLAG}, 852 {ACPI_DMT_FLAG0, ACPI_MPST0_FLAG_OFFSET (Flags,0), "Node Enabled", 0}, 853 {ACPI_DMT_FLAG1, ACPI_MPST0_FLAG_OFFSET (Flags,0), "Power Managed", 0}, 854 {ACPI_DMT_FLAG2, ACPI_MPST0_FLAG_OFFSET (Flags,0), "Hot Plug Capable", 0}, 855 856 {ACPI_DMT_UINT8, ACPI_MPST0_OFFSET (Reserved1), "Reserved", 0}, 857 {ACPI_DMT_UINT16, ACPI_MPST0_OFFSET (NodeId), "Node ID", 0}, 858 {ACPI_DMT_UINT32, ACPI_MPST0_OFFSET (Length), "Length", 0}, 859 {ACPI_DMT_UINT64, ACPI_MPST0_OFFSET (RangeAddress), "Range Address", 0}, 860 {ACPI_DMT_UINT64, ACPI_MPST0_OFFSET (RangeLength), "Range Length", 0}, 861 {ACPI_DMT_UINT32, ACPI_MPST0_OFFSET (NumPowerStates), "Num Power States", 0}, 862 {ACPI_DMT_UINT32, ACPI_MPST0_OFFSET (NumPhysicalComponents), "Num Physical Components", 0}, 863 ACPI_DMT_TERMINATOR 864 }; 865 866 /* 0A: Sub-subtable - Memory Power State Structure (follows Memory Power Node above) */ 867 868 ACPI_DMTABLE_INFO AcpiDmTableInfoMpst0A[] = 869 { 870 {ACPI_DMT_UINT8, ACPI_MPST0A_OFFSET (PowerState), "Power State", 0}, 871 {ACPI_DMT_UINT8, ACPI_MPST0A_OFFSET (InfoIndex), "InfoIndex", 0}, 872 ACPI_DMT_TERMINATOR 873 }; 874 875 /* 0B: Sub-subtable - Physical Component ID Structure (follows Memory Power State(s) above) */ 876 877 ACPI_DMTABLE_INFO AcpiDmTableInfoMpst0B[] = 878 { 879 {ACPI_DMT_UINT16, ACPI_MPST0B_OFFSET (ComponentId), "Component Id", 0}, 880 ACPI_DMT_TERMINATOR 881 }; 882 883 /* 01: Power Characteristics Count (follows all Power Node(s) above) */ 884 885 ACPI_DMTABLE_INFO AcpiDmTableInfoMpst1[] = 886 { 887 {ACPI_DMT_UINT16, ACPI_MPST1_OFFSET (CharacteristicsCount), "Characteristics Count", 0}, 888 {ACPI_DMT_UINT16, ACPI_MPST1_OFFSET (Reserved), "Reserved", 0}, 889 ACPI_DMT_TERMINATOR 890 }; 891 892 /* 02: Memory Power State Characteristics Structure */ 893 894 ACPI_DMTABLE_INFO AcpiDmTableInfoMpst2[] = 895 { 896 {ACPI_DMT_UINT8, ACPI_MPST2_OFFSET (StructureId), "Structure ID", 0}, 897 {ACPI_DMT_UINT8, ACPI_MPST2_OFFSET (Flags), "Flags (decoded below)", DT_FLAG}, 898 {ACPI_DMT_FLAG0, ACPI_MPST2_FLAG_OFFSET (Flags,0), "Memory Preserved", 0}, 899 {ACPI_DMT_FLAG1, ACPI_MPST2_FLAG_OFFSET (Flags,0), "Auto Entry", 0}, 900 {ACPI_DMT_FLAG2, ACPI_MPST2_FLAG_OFFSET (Flags,0), "Auto Exit", 0}, 901 902 {ACPI_DMT_UINT16, ACPI_MPST2_OFFSET (Reserved1), "Reserved", 0}, 903 {ACPI_DMT_UINT32, ACPI_MPST2_OFFSET (AveragePower), "Average Power", 0}, 904 {ACPI_DMT_UINT32, ACPI_MPST2_OFFSET (PowerSaving), "Power Saving", 0}, 905 {ACPI_DMT_UINT64, ACPI_MPST2_OFFSET (ExitLatency), "Exit Latency", 0}, 906 {ACPI_DMT_UINT64, ACPI_MPST2_OFFSET (Reserved2), "Reserved", 0}, 907 ACPI_DMT_TERMINATOR 908 }; 909 910 911 /******************************************************************************* 912 * 913 * MSCT - Maximum System Characteristics Table (ACPI 4.0) 914 * 915 ******************************************************************************/ 916 917 ACPI_DMTABLE_INFO AcpiDmTableInfoMsct[] = 918 { 919 {ACPI_DMT_UINT32, ACPI_MSCT_OFFSET (ProximityOffset), "Proximity Offset", 0}, 920 {ACPI_DMT_UINT32, ACPI_MSCT_OFFSET (MaxProximityDomains), "Max Proximity Domains", 0}, 921 {ACPI_DMT_UINT32, ACPI_MSCT_OFFSET (MaxClockDomains), "Max Clock Domains", 0}, 922 {ACPI_DMT_UINT64, ACPI_MSCT_OFFSET (MaxAddress), "Max Physical Address", 0}, 923 ACPI_DMT_TERMINATOR 924 }; 925 926 /* Subtable - Maximum Proximity Domain Information. Version 1 */ 927 928 ACPI_DMTABLE_INFO AcpiDmTableInfoMsct0[] = 929 { 930 {ACPI_DMT_UINT8, ACPI_MSCT0_OFFSET (Revision), "Revision", 0}, 931 {ACPI_DMT_UINT8, ACPI_MSCT0_OFFSET (Length), "Length", DT_LENGTH}, 932 {ACPI_DMT_UINT32, ACPI_MSCT0_OFFSET (RangeStart), "Domain Range Start", 0}, 933 {ACPI_DMT_UINT32, ACPI_MSCT0_OFFSET (RangeEnd), "Domain Range End", 0}, 934 {ACPI_DMT_UINT32, ACPI_MSCT0_OFFSET (ProcessorCapacity), "Processor Capacity", 0}, 935 {ACPI_DMT_UINT64, ACPI_MSCT0_OFFSET (MemoryCapacity), "Memory Capacity", 0}, 936 ACPI_DMT_TERMINATOR 937 }; 938 939 940 /******************************************************************************* 941 * 942 * NFIT - NVDIMM Firmware Interface Table and Subtables - (ACPI 6.0) 943 * 944 ******************************************************************************/ 945 946 ACPI_DMTABLE_INFO AcpiDmTableInfoNfit[] = 947 { 948 {ACPI_DMT_UINT32, ACPI_NFIT_OFFSET (Reserved), "Reserved", 0}, 949 ACPI_DMT_TERMINATOR 950 }; 951 952 /* Common Subtable header */ 953 954 ACPI_DMTABLE_INFO AcpiDmTableInfoNfitHdr[] = 955 { 956 {ACPI_DMT_NFIT, ACPI_NFITH_OFFSET (Type), "Subtable Type", 0}, 957 {ACPI_DMT_UINT16, ACPI_NFITH_OFFSET (Length), "Length", DT_LENGTH}, 958 ACPI_DMT_TERMINATOR 959 }; 960 961 /* 0: System Physical Address Range Structure */ 962 963 ACPI_DMTABLE_INFO AcpiDmTableInfoNfit0[] = 964 { 965 {ACPI_DMT_UINT16, ACPI_NFIT0_OFFSET (RangeIndex), "Range Index", 0}, 966 {ACPI_DMT_UINT16, ACPI_NFIT0_OFFSET (Flags), "Flags (decoded below)", DT_FLAG}, 967 {ACPI_DMT_FLAG0, ACPI_NFIT0_FLAG_OFFSET (Flags,0), "Add/Online Operation Only", 0}, 968 {ACPI_DMT_FLAG1, ACPI_NFIT0_FLAG_OFFSET (Flags,0), "Proximity Domain Valid", 0}, 969 {ACPI_DMT_FLAG2, ACPI_NFIT0_FLAG_OFFSET (Flags,0), "Location Cookie Valid", 0}, 970 {ACPI_DMT_UINT32, ACPI_NFIT0_OFFSET (Reserved), "Reserved", 0}, 971 {ACPI_DMT_UINT32, ACPI_NFIT0_OFFSET (ProximityDomain), "Proximity Domain", 0}, 972 {ACPI_DMT_UUID, ACPI_NFIT0_OFFSET (RangeGuid[0]), "Region Type GUID", 0}, 973 {ACPI_DMT_UINT64, ACPI_NFIT0_OFFSET (Address), "Address Range Base", 0}, 974 {ACPI_DMT_UINT64, ACPI_NFIT0_OFFSET (Length), "Address Range Length", 0}, 975 {ACPI_DMT_UINT64, ACPI_NFIT0_OFFSET (MemoryMapping), "Memory Map Attribute", 0}, 976 {ACPI_DMT_UINT64, ACPI_NFIT0_OFFSET (LocationCookie), "Location Cookie", 0}, /* ACPI 6.4 */ 977 ACPI_DMT_TERMINATOR 978 }; 979 980 /* 1: Memory Device to System Address Range Map Structure */ 981 982 ACPI_DMTABLE_INFO AcpiDmTableInfoNfit1[] = 983 { 984 {ACPI_DMT_UINT32, ACPI_NFIT1_OFFSET (DeviceHandle), "Device Handle", 0}, 985 {ACPI_DMT_UINT16, ACPI_NFIT1_OFFSET (PhysicalId), "Physical Id", 0}, 986 {ACPI_DMT_UINT16, ACPI_NFIT1_OFFSET (RegionId), "Region Id", 0}, 987 {ACPI_DMT_UINT16, ACPI_NFIT1_OFFSET (RangeIndex), "Range Index", 0}, 988 {ACPI_DMT_UINT16, ACPI_NFIT1_OFFSET (RegionIndex), "Control Region Index", 0}, 989 {ACPI_DMT_UINT64, ACPI_NFIT1_OFFSET (RegionSize), "Region Size", 0}, 990 {ACPI_DMT_UINT64, ACPI_NFIT1_OFFSET (RegionOffset), "Region Offset", 0}, 991 {ACPI_DMT_UINT64, ACPI_NFIT1_OFFSET (Address), "Address Region Base", 0}, 992 {ACPI_DMT_UINT16, ACPI_NFIT1_OFFSET (InterleaveIndex), "Interleave Index", 0}, 993 {ACPI_DMT_UINT16, ACPI_NFIT1_OFFSET (InterleaveWays), "Interleave Ways", 0}, 994 {ACPI_DMT_UINT16, ACPI_NFIT1_OFFSET (Flags), "Flags", DT_FLAG}, 995 {ACPI_DMT_FLAG0, ACPI_NFIT1_FLAG_OFFSET (Flags,0), "Save to device failed", 0}, 996 {ACPI_DMT_FLAG1, ACPI_NFIT1_FLAG_OFFSET (Flags,0), "Restore from device failed", 0}, 997 {ACPI_DMT_FLAG2, ACPI_NFIT1_FLAG_OFFSET (Flags,0), "Platform flush failed", 0}, 998 {ACPI_DMT_FLAG3, ACPI_NFIT1_FLAG_OFFSET (Flags,0), "Device not armed", 0}, 999 {ACPI_DMT_FLAG4, ACPI_NFIT1_FLAG_OFFSET (Flags,0), "Health events observed", 0}, 1000 {ACPI_DMT_FLAG5, ACPI_NFIT1_FLAG_OFFSET (Flags,0), "Health events enabled", 0}, 1001 {ACPI_DMT_FLAG6, ACPI_NFIT1_FLAG_OFFSET (Flags,0), "Mapping failed", 0}, 1002 {ACPI_DMT_UINT16, ACPI_NFIT1_OFFSET (Reserved), "Reserved", 0}, 1003 ACPI_DMT_TERMINATOR 1004 }; 1005 1006 /* 2: Interleave Structure */ 1007 1008 ACPI_DMTABLE_INFO AcpiDmTableInfoNfit2[] = 1009 { 1010 {ACPI_DMT_UINT16, ACPI_NFIT2_OFFSET (InterleaveIndex), "Interleave Index", 0}, 1011 {ACPI_DMT_UINT16, ACPI_NFIT2_OFFSET (Reserved), "Reserved", 0}, 1012 {ACPI_DMT_UINT32, ACPI_NFIT2_OFFSET (LineCount), "Line Count", 0}, 1013 {ACPI_DMT_UINT32, ACPI_NFIT2_OFFSET (LineSize), "Line Size", 0}, 1014 ACPI_DMT_TERMINATOR 1015 }; 1016 1017 ACPI_DMTABLE_INFO AcpiDmTableInfoNfit2a[] = 1018 { 1019 {ACPI_DMT_UINT32, 0, "Line Offset", DT_OPTIONAL}, 1020 ACPI_DMT_TERMINATOR 1021 }; 1022 1023 /* 3: SMBIOS Management Information Structure */ 1024 1025 ACPI_DMTABLE_INFO AcpiDmTableInfoNfit3[] = 1026 { 1027 {ACPI_DMT_UINT32, ACPI_NFIT3_OFFSET (Reserved), "Reserved", 0}, 1028 ACPI_DMT_TERMINATOR 1029 }; 1030 1031 ACPI_DMTABLE_INFO AcpiDmTableInfoNfit3a[] = 1032 { 1033 {ACPI_DMT_RAW_BUFFER, 0, "SMBIOS Table Entries", DT_OPTIONAL}, 1034 ACPI_DMT_TERMINATOR 1035 }; 1036 1037 /* 4: NVDIMM Control Region Structure */ 1038 1039 ACPI_DMTABLE_INFO AcpiDmTableInfoNfit4[] = 1040 { 1041 {ACPI_DMT_UINT16, ACPI_NFIT4_OFFSET (RegionIndex), "Region Index", 0}, 1042 {ACPI_DMT_UINT16, ACPI_NFIT4_OFFSET (VendorId), "Vendor Id", 0}, 1043 {ACPI_DMT_UINT16, ACPI_NFIT4_OFFSET (DeviceId), "Device Id", 0}, 1044 {ACPI_DMT_UINT16, ACPI_NFIT4_OFFSET (RevisionId), "Revision Id", 0}, 1045 {ACPI_DMT_UINT16, ACPI_NFIT4_OFFSET (SubsystemVendorId), "Subsystem Vendor Id", 0}, 1046 {ACPI_DMT_UINT16, ACPI_NFIT4_OFFSET (SubsystemDeviceId), "Subsystem Device Id", 0}, 1047 {ACPI_DMT_UINT16, ACPI_NFIT4_OFFSET (SubsystemRevisionId), "Subsystem Revision Id", 0}, 1048 {ACPI_DMT_UINT8, ACPI_NFIT4_OFFSET (ValidFields), "Valid Fields", 0}, 1049 {ACPI_DMT_UINT8, ACPI_NFIT4_OFFSET (ManufacturingLocation), "Manufacturing Location", 0}, 1050 {ACPI_DMT_UINT16, ACPI_NFIT4_OFFSET (ManufacturingDate), "Manufacturing Date", 0}, 1051 {ACPI_DMT_UINT16, ACPI_NFIT4_OFFSET (Reserved[0]), "Reserved", 0}, 1052 {ACPI_DMT_UINT32, ACPI_NFIT4_OFFSET (SerialNumber), "Serial Number", 0}, 1053 {ACPI_DMT_UINT16, ACPI_NFIT4_OFFSET (Code), "Code", 0}, 1054 {ACPI_DMT_UINT16, ACPI_NFIT4_OFFSET (Windows), "Window Count", 0}, 1055 {ACPI_DMT_UINT64, ACPI_NFIT4_OFFSET (WindowSize), "Window Size", 0}, 1056 {ACPI_DMT_UINT64, ACPI_NFIT4_OFFSET (CommandOffset), "Command Offset", 0}, 1057 {ACPI_DMT_UINT64, ACPI_NFIT4_OFFSET (CommandSize), "Command Size", 0}, 1058 {ACPI_DMT_UINT64, ACPI_NFIT4_OFFSET (StatusOffset), "Status Offset", 0}, 1059 {ACPI_DMT_UINT64, ACPI_NFIT4_OFFSET (StatusSize), "Status Size", 0}, 1060 {ACPI_DMT_UINT16, ACPI_NFIT4_OFFSET (Flags), "Flags", DT_FLAG}, 1061 {ACPI_DMT_FLAG0, ACPI_NFIT4_FLAG_OFFSET (Flags,0), "Windows buffered", 0}, 1062 {ACPI_DMT_UINT48, ACPI_NFIT4_OFFSET (Reserved1[0]), "Reserved1", 0}, 1063 ACPI_DMT_TERMINATOR 1064 }; 1065 1066 /* 5: NVDIMM Block Data Window Region Structure */ 1067 1068 ACPI_DMTABLE_INFO AcpiDmTableInfoNfit5[] = 1069 { 1070 {ACPI_DMT_UINT16, ACPI_NFIT5_OFFSET (RegionIndex), "Region Index", 0}, 1071 {ACPI_DMT_UINT16, ACPI_NFIT5_OFFSET (Windows), "Window Count", 0}, 1072 {ACPI_DMT_UINT64, ACPI_NFIT5_OFFSET (Offset), "Offset", 0}, 1073 {ACPI_DMT_UINT64, ACPI_NFIT5_OFFSET (Size), "Size", 0}, 1074 {ACPI_DMT_UINT64, ACPI_NFIT5_OFFSET (Capacity), "Capacity", 0}, 1075 {ACPI_DMT_UINT64, ACPI_NFIT5_OFFSET (StartAddress), "Start Address", 0}, 1076 ACPI_DMT_TERMINATOR 1077 }; 1078 1079 /* 6: Flush Hint Address Structure */ 1080 1081 ACPI_DMTABLE_INFO AcpiDmTableInfoNfit6[] = 1082 { 1083 {ACPI_DMT_UINT32, ACPI_NFIT6_OFFSET (DeviceHandle), "Device Handle", 0}, 1084 {ACPI_DMT_UINT16, ACPI_NFIT6_OFFSET (HintCount), "Hint Count", 0}, 1085 {ACPI_DMT_UINT48, ACPI_NFIT6_OFFSET (Reserved[0]), "Reserved", 0}, 1086 ACPI_DMT_TERMINATOR 1087 }; 1088 1089 ACPI_DMTABLE_INFO AcpiDmTableInfoNfit6a[] = 1090 { 1091 {ACPI_DMT_UINT64, 0, "Hint Address", DT_OPTIONAL}, 1092 ACPI_DMT_TERMINATOR 1093 }; 1094 1095 ACPI_DMTABLE_INFO AcpiDmTableInfoNfit7[] = 1096 { 1097 {ACPI_DMT_UINT8, ACPI_NFIT7_OFFSET (HighestCapability), "Highest Capability", 0}, 1098 {ACPI_DMT_UINT24, ACPI_NFIT7_OFFSET (Reserved[0]), "Reserved", 0}, 1099 {ACPI_DMT_UINT32, ACPI_NFIT7_OFFSET (Capabilities), "Capabilities (decoded below)", DT_FLAG}, 1100 {ACPI_DMT_FLAG0, ACPI_NFIT7_FLAG_OFFSET (Capabilities,0), "Cache Flush to NVDIMM", 0}, 1101 {ACPI_DMT_FLAG1, ACPI_NFIT7_FLAG_OFFSET (Capabilities,0), "Memory Flush to NVDIMM", 0}, 1102 {ACPI_DMT_FLAG2, ACPI_NFIT7_FLAG_OFFSET (Capabilities,0), "Memory Mirroring", 0}, 1103 {ACPI_DMT_UINT32, ACPI_NFIT7_OFFSET (Reserved2), "Reserved", 0}, 1104 ACPI_DMT_TERMINATOR 1105 }; 1106 1107 1108 /******************************************************************************* 1109 * 1110 * NHLT - Non HD Audio Link Table. Conforms to Intel Smart Sound Technology 1111 * NHLT Specification, January 2020 Revision 0.8.1 1112 * 1113 ******************************************************************************/ 1114 1115 /* Main table */ 1116 1117 ACPI_DMTABLE_INFO AcpiDmTableInfoNhlt[] = 1118 { 1119 {ACPI_DMT_UINT8, ACPI_NHLT_OFFSET (EndpointCount), "Endpoint Count", 0}, 1120 ACPI_DMT_TERMINATOR 1121 }; 1122 1123 /* Endpoint config */ 1124 1125 ACPI_DMTABLE_INFO AcpiDmTableInfoNhlt0[] = 1126 { 1127 {ACPI_DMT_UINT32, ACPI_NHLT0_OFFSET (DescriptorLength), "Descriptor Length", DT_LENGTH}, 1128 {ACPI_DMT_NHLT1, ACPI_NHLT0_OFFSET (LinkType), "Link Type", 0}, 1129 {ACPI_DMT_UINT8, ACPI_NHLT0_OFFSET (InstanceId), "Instance Id", 0}, 1130 {ACPI_DMT_UINT16, ACPI_NHLT0_OFFSET (VendorId), "Vendor Id", 0}, 1131 {ACPI_DMT_NHLT1e, ACPI_NHLT0_OFFSET (DeviceId), "Device Id", 0}, 1132 {ACPI_DMT_UINT16, ACPI_NHLT0_OFFSET (RevisionId), "Revision Id", 0}, 1133 {ACPI_DMT_UINT32, ACPI_NHLT0_OFFSET (SubsystemId), "Subsystem Id", 0}, 1134 {ACPI_DMT_UINT8, ACPI_NHLT0_OFFSET (DeviceType), "Device Type", 0}, 1135 {ACPI_DMT_NHLT1a, ACPI_NHLT0_OFFSET (Direction), "Direction", 0}, 1136 {ACPI_DMT_UINT8, ACPI_NHLT0_OFFSET (VirtualBusId), "Virtual Bus Id", 0}, 1137 ACPI_DMT_TERMINATOR 1138 }; 1139 1140 /* Device_Specific config */ 1141 1142 ACPI_DMTABLE_INFO AcpiDmTableInfoNhlt1[] = 1143 { 1144 {ACPI_DMT_UINT32, ACPI_NHLT1_OFFSET (CapabilitiesSize), "Capabilities Size", 0}, 1145 {ACPI_DMT_UINT8, ACPI_NHLT1_OFFSET (VirtualSlot), "Virtual Slot", 0}, 1146 {ACPI_DMT_NHLT1f, ACPI_NHLT1_OFFSET (ConfigType), "Config Type", 0}, 1147 ACPI_DMT_TERMINATOR 1148 }; 1149 1150 /* Wave Format Extensible */ 1151 1152 ACPI_DMTABLE_INFO AcpiDmTableInfoNhlt2[] = 1153 { 1154 {ACPI_DMT_UINT16, ACPI_NHLT2_OFFSET (FormatTag), "Format Tag", 0}, 1155 {ACPI_DMT_UINT16, ACPI_NHLT2_OFFSET (ChannelCount), "Channel Count", 0}, 1156 {ACPI_DMT_UINT32, ACPI_NHLT2_OFFSET (SamplesPerSec), "Samples Per Second", 0}, 1157 {ACPI_DMT_UINT32, ACPI_NHLT2_OFFSET (AvgBytesPerSec), "Average Bytes Per Second", 0}, 1158 {ACPI_DMT_UINT16, ACPI_NHLT2_OFFSET (BlockAlign), "Block Alignment", 0}, 1159 {ACPI_DMT_UINT16, ACPI_NHLT2_OFFSET (BitsPerSample), "Bits Per Sample", 0}, 1160 {ACPI_DMT_UINT16, ACPI_NHLT2_OFFSET (ExtraFormatSize), "Extra Format Size", 0}, 1161 {ACPI_DMT_UINT16, ACPI_NHLT2_OFFSET (ValidBitsPerSample), "Valid Bits Per Sample", 0}, 1162 {ACPI_DMT_UINT32, ACPI_NHLT2_OFFSET (ChannelMask), "Channel Mask", 0}, 1163 {ACPI_DMT_UUID, ACPI_NHLT2_OFFSET (SubFormatGuid), "SubFormat GUID", 0}, 1164 ACPI_DMT_TERMINATOR 1165 }; 1166 1167 /* Format Config (wave_format_extensible structure) */ 1168 1169 ACPI_DMTABLE_INFO AcpiDmTableInfoNhlt3[] = 1170 { 1171 {ACPI_DMT_UINT16, ACPI_NHLT3_OFFSET (Format.FormatTag), "Format Tag", 0}, 1172 {ACPI_DMT_UINT16, ACPI_NHLT3_OFFSET (Format.ChannelCount), "Channel Count", 0}, 1173 {ACPI_DMT_UINT32, ACPI_NHLT3_OFFSET (Format.SamplesPerSec), "Samples Per Second", 0}, 1174 {ACPI_DMT_UINT32, ACPI_NHLT3_OFFSET (Format.AvgBytesPerSec), "Average Bytes Per Second", 0}, 1175 {ACPI_DMT_UINT16, ACPI_NHLT3_OFFSET (Format.BlockAlign), "Block Alignment", 0}, 1176 {ACPI_DMT_UINT16, ACPI_NHLT3_OFFSET (Format.BitsPerSample), "Bits Per Sample", 0}, 1177 {ACPI_DMT_UINT16, ACPI_NHLT3_OFFSET (Format.ExtraFormatSize), "Extra Format Size", 0}, 1178 {ACPI_DMT_UINT16, ACPI_NHLT3_OFFSET (Format.ValidBitsPerSample), "Valid Bits Per Sample", 0}, 1179 {ACPI_DMT_UINT32, ACPI_NHLT3_OFFSET (Format.ChannelMask), "Channel Mask", 0}, 1180 {ACPI_DMT_UUID, ACPI_NHLT3_OFFSET (Format.SubFormatGuid), "SubFormat GUID", 0}, 1181 {ACPI_DMT_UINT32, ACPI_NHLT3_OFFSET (CapabilitySize), "Capabilities Length", 0}, 1182 ACPI_DMT_TERMINATOR 1183 }; 1184 1185 /* 1186 * We treat the binary Capabilities field as its own subtable (to make 1187 * ACPI_DMT_RAW_BUFFER work properly). 1188 */ 1189 ACPI_DMTABLE_INFO AcpiDmTableInfoNhlt3a[] = 1190 { 1191 {ACPI_DMT_RAW_BUFFER, 0, "Capabilities", 0}, 1192 ACPI_DMT_TERMINATOR 1193 }; 1194 1195 /* Formats Config */ 1196 1197 ACPI_DMTABLE_INFO AcpiDmTableInfoNhlt4[] = 1198 { 1199 {ACPI_DMT_UINT8, ACPI_NHLT4_OFFSET (FormatsCount), "Formats Count", 0}, 1200 ACPI_DMT_TERMINATOR 1201 }; 1202 1203 /* Specific Config, CapabilitiesSize == 2 */ 1204 1205 ACPI_DMTABLE_INFO AcpiDmTableInfoNhlt5[] = 1206 { 1207 {ACPI_DMT_UINT8, ACPI_NHLT5_OFFSET (VirtualSlot), "Virtual Slot", 0}, 1208 {ACPI_DMT_NHLT1f, ACPI_NHLT5_OFFSET (ConfigType), "Config Type", 0}, 1209 ACPI_DMT_TERMINATOR 1210 }; 1211 1212 /* Specific Config, CapabilitiesSize == 3 */ 1213 1214 ACPI_DMTABLE_INFO AcpiDmTableInfoNhlt5a[] = 1215 { 1216 {ACPI_DMT_UINT8, ACPI_NHLT5A_OFFSET (VirtualSlot), "Virtual Slot", 0}, 1217 {ACPI_DMT_NHLT1f, ACPI_NHLT5A_OFFSET (ConfigType), "Config Type", 0}, 1218 {ACPI_DMT_NHLT1d, ACPI_NHLT5A_OFFSET (ArrayType), "Array Type", 0}, 1219 ACPI_DMT_TERMINATOR 1220 }; 1221 1222 /* Specific Config, CapabilitiesSize == 0 */ 1223 1224 ACPI_DMTABLE_INFO AcpiDmTableInfoNhlt5b[] = 1225 { 1226 {ACPI_DMT_UINT32, ACPI_NHLT5B_OFFSET (CapabilitiesSize), "Capabilities Size", 0}, 1227 ACPI_DMT_TERMINATOR 1228 }; 1229 1230 /* Specific Config, CapabilitiesSize == 1 */ 1231 1232 ACPI_DMTABLE_INFO AcpiDmTableInfoNhlt5c[] = 1233 { 1234 {ACPI_DMT_UINT8, ACPI_NHLT5C_OFFSET (VirtualSlot), "Virtual Slot", 0}, 1235 ACPI_DMT_TERMINATOR 1236 }; 1237 1238 /* Microphone array Config */ 1239 1240 ACPI_DMTABLE_INFO AcpiDmTableInfoNhlt6a[] = 1241 { 1242 {ACPI_DMT_UINT8, ACPI_NHLT6A_OFFSET (MicrophoneCount), "Microphone Count", 0}, 1243 ACPI_DMT_TERMINATOR 1244 }; 1245 1246 /* Render Feedback Device Config, CapabilitiesSize == 7 */ 1247 1248 ACPI_DMTABLE_INFO AcpiDmTableInfoNhlt6b[] = 1249 { 1250 {ACPI_DMT_UINT8, ACPI_NHLT6B_OFFSET (FeedbackVirtualSlot), "Feedback Virtual Slot", 0}, 1251 {ACPI_DMT_UINT16, ACPI_NHLT6B_OFFSET (FeedbackChannels), "Feedback Channels", 0}, 1252 {ACPI_DMT_UINT16, ACPI_NHLT6B_OFFSET (FeedbackValidBitsPerSample),"Valid Bits Per Sample", 0}, 1253 ACPI_DMT_TERMINATOR 1254 }; 1255 1256 ACPI_DMTABLE_INFO AcpiDmTableInfoNhlt6[] = 1257 { 1258 {ACPI_DMT_NHLT1b, ACPI_NHLT6_OFFSET (Type), "Type", 0}, 1259 {ACPI_DMT_NHLT1c, ACPI_NHLT6_OFFSET (Panel), "Panel", 0}, 1260 {ACPI_DMT_UINT16, ACPI_NHLT6_OFFSET (SpeakerPositionDistance), "Speaker Position Distance", 0}, 1261 {ACPI_DMT_UINT16, ACPI_NHLT6_OFFSET (HorizontalOffset), "Horizontal Offset", 0}, 1262 {ACPI_DMT_UINT16, ACPI_NHLT6_OFFSET (VerticalOffset), "Vertical Offset", 0}, 1263 {ACPI_DMT_UINT8, ACPI_NHLT6_OFFSET (FrequencyLowBand), "Frequency Low Band", 0}, 1264 {ACPI_DMT_UINT8, ACPI_NHLT6_OFFSET (FrequencyHighBand), "Frequency High Band", 0}, 1265 {ACPI_DMT_UINT16, ACPI_NHLT6_OFFSET (DirectionAngle), "Direction Angle", 0}, 1266 {ACPI_DMT_UINT16, ACPI_NHLT6_OFFSET (ElevationAngle), "Elevation Angle", 0}, 1267 {ACPI_DMT_UINT16, ACPI_NHLT6_OFFSET (WorkVerticalAngleBegin), "Work Vertical Angle Begin", 0}, 1268 {ACPI_DMT_UINT16, ACPI_NHLT6_OFFSET (WorkVerticalAngleEnd), "Work Vertical Angle End", 0}, 1269 {ACPI_DMT_UINT16, ACPI_NHLT6_OFFSET (WorkHorizontalAngleBegin), "Work Horizontal Angle Begin", 0}, 1270 {ACPI_DMT_UINT16, ACPI_NHLT6_OFFSET (WorkHorizontalAngleEnd), "Work Horizontal Angle End", 0}, 1271 ACPI_DMT_TERMINATOR 1272 }; 1273 1274 /* Number of Linux-specific structures */ 1275 1276 ACPI_DMTABLE_INFO AcpiDmTableInfoNhlt7[] = 1277 { 1278 {ACPI_DMT_UINT8, ACPI_NHLT7_OFFSET (StructureCount), "Linux-specific Count", 0}, 1279 ACPI_DMT_TERMINATOR 1280 }; 1281 1282 /* The Linux-specific structure */ 1283 1284 ACPI_DMTABLE_INFO AcpiDmTableInfoNhlt7a[] = 1285 { 1286 {ACPI_DMT_BUF16, ACPI_NHLT7A_OFFSET (DeviceId), "Device ID", 0}, 1287 {ACPI_DMT_UINT8, ACPI_NHLT7A_OFFSET (DeviceInstanceId), "Device Instance ID", 0}, 1288 {ACPI_DMT_UINT8, ACPI_NHLT7A_OFFSET (DevicePortId), "Device Port ID", 0}, 1289 ACPI_DMT_TERMINATOR 1290 }; 1291 1292 ACPI_DMTABLE_INFO AcpiDmTableInfoNhlt7b[] = 1293 { 1294 {ACPI_DMT_BUF18, ACPI_NHLT7B_OFFSET (SpecificData), "Specific Data", 0}, 1295 ACPI_DMT_TERMINATOR 1296 }; 1297 1298 /* Table terminator (may or may not be present) */ 1299 1300 ACPI_DMTABLE_INFO AcpiDmTableInfoNhlt8[] = 1301 { 1302 {ACPI_DMT_UINT32, ACPI_NHLT8_OFFSET (TerminatorValue), "Terminator Value", 0}, 1303 {ACPI_DMT_UINT32, ACPI_NHLT8_OFFSET (TerminatorSignature), "Terminator Signature", 0}, 1304 ACPI_DMT_TERMINATOR 1305 }; 1306 1307 /* Sensitivity Extension */ 1308 1309 ACPI_DMTABLE_INFO AcpiDmTableInfoNhlt9[] = 1310 { 1311 {ACPI_DMT_UINT32, ACPI_NHLT9_OFFSET (SNR), "Signal-to-noise ratio", 0}, 1312 {ACPI_DMT_UINT32, ACPI_NHLT9_OFFSET (Sensitivity), "Mic Sensitivity", 0}, 1313 ACPI_DMT_TERMINATOR 1314 }; 1315 1316 1317 /******************************************************************************* 1318 * 1319 * PCCT - Platform Communications Channel Table (ACPI 5.0) 1320 * 1321 ******************************************************************************/ 1322 1323 ACPI_DMTABLE_INFO AcpiDmTableInfoPcct[] = 1324 { 1325 {ACPI_DMT_UINT32, ACPI_PCCT_OFFSET (Flags), "Flags (decoded below)", DT_FLAG}, 1326 {ACPI_DMT_FLAG0, ACPI_PCCT_FLAG_OFFSET (Flags,0), "Platform", 0}, 1327 {ACPI_DMT_UINT64, ACPI_PCCT_OFFSET (Reserved), "Reserved", 0}, 1328 ACPI_DMT_TERMINATOR 1329 }; 1330 1331 /* PCCT subtables */ 1332 1333 ACPI_DMTABLE_INFO AcpiDmTableInfoPcctHdr[] = 1334 { 1335 {ACPI_DMT_PCCT, ACPI_PCCT0_OFFSET (Header.Type), "Subtable Type", 0}, 1336 {ACPI_DMT_UINT8, ACPI_PCCT0_OFFSET (Header.Length), "Length", DT_LENGTH}, 1337 ACPI_DMT_TERMINATOR 1338 }; 1339 1340 /* 0: Generic Communications Subspace */ 1341 1342 ACPI_DMTABLE_INFO AcpiDmTableInfoPcct0[] = 1343 { 1344 {ACPI_DMT_UINT48, ACPI_PCCT0_OFFSET (Reserved[0]), "Reserved", 0}, 1345 {ACPI_DMT_UINT64, ACPI_PCCT0_OFFSET (BaseAddress), "Base Address", 0}, 1346 {ACPI_DMT_UINT64, ACPI_PCCT0_OFFSET (Length), "Address Length", 0}, 1347 {ACPI_DMT_GAS, ACPI_PCCT0_OFFSET (DoorbellRegister), "Doorbell Register", 0}, 1348 {ACPI_DMT_UINT64, ACPI_PCCT0_OFFSET (PreserveMask), "Preserve Mask", 0}, 1349 {ACPI_DMT_UINT64, ACPI_PCCT0_OFFSET (WriteMask), "Write Mask", 0}, 1350 {ACPI_DMT_UINT32, ACPI_PCCT0_OFFSET (Latency), "Command Latency", 0}, 1351 {ACPI_DMT_UINT32, ACPI_PCCT0_OFFSET (MaxAccessRate), "Maximum Access Rate", 0}, 1352 {ACPI_DMT_UINT16, ACPI_PCCT0_OFFSET (MinTurnaroundTime), "Minimum Turnaround Time", 0}, 1353 ACPI_DMT_TERMINATOR 1354 }; 1355 1356 /* 1: HW-reduced Communications Subspace (ACPI 5.1) */ 1357 1358 ACPI_DMTABLE_INFO AcpiDmTableInfoPcct1[] = 1359 { 1360 {ACPI_DMT_UINT32, ACPI_PCCT1_OFFSET (PlatformInterrupt), "Platform Interrupt", 0}, 1361 {ACPI_DMT_UINT8, ACPI_PCCT1_OFFSET (Flags), "Flags (Decoded Below)", DT_FLAG}, 1362 {ACPI_DMT_FLAG0, ACPI_PCCT1_FLAG_OFFSET (Flags,0), "Polarity", 0}, 1363 {ACPI_DMT_FLAG1, ACPI_PCCT1_FLAG_OFFSET (Flags,0), "Mode", 0}, 1364 {ACPI_DMT_UINT8, ACPI_PCCT1_OFFSET (Reserved), "Reserved", 0}, 1365 {ACPI_DMT_UINT64, ACPI_PCCT1_OFFSET (BaseAddress), "Base Address", 0}, 1366 {ACPI_DMT_UINT64, ACPI_PCCT1_OFFSET (Length), "Address Length", 0}, 1367 {ACPI_DMT_GAS, ACPI_PCCT1_OFFSET (DoorbellRegister), "Doorbell Register", 0}, 1368 {ACPI_DMT_UINT64, ACPI_PCCT1_OFFSET (PreserveMask), "Preserve Mask", 0}, 1369 {ACPI_DMT_UINT64, ACPI_PCCT1_OFFSET (WriteMask), "Write Mask", 0}, 1370 {ACPI_DMT_UINT32, ACPI_PCCT1_OFFSET (Latency), "Command Latency", 0}, 1371 {ACPI_DMT_UINT32, ACPI_PCCT1_OFFSET (MaxAccessRate), "Maximum Access Rate", 0}, 1372 {ACPI_DMT_UINT16, ACPI_PCCT1_OFFSET (MinTurnaroundTime), "Minimum Turnaround Time", 0}, 1373 ACPI_DMT_TERMINATOR 1374 }; 1375 1376 /* 2: HW-reduced Communications Subspace Type 2 (ACPI 6.1) */ 1377 1378 ACPI_DMTABLE_INFO AcpiDmTableInfoPcct2[] = 1379 { 1380 {ACPI_DMT_UINT32, ACPI_PCCT2_OFFSET (PlatformInterrupt), "Platform Interrupt", 0}, 1381 {ACPI_DMT_UINT8, ACPI_PCCT2_OFFSET (Flags), "Flags (Decoded Below)", DT_FLAG}, 1382 {ACPI_DMT_FLAG0, ACPI_PCCT2_FLAG_OFFSET (Flags,0), "Polarity", 0}, 1383 {ACPI_DMT_FLAG1, ACPI_PCCT2_FLAG_OFFSET (Flags,0), "Mode", 0}, 1384 {ACPI_DMT_UINT8, ACPI_PCCT2_OFFSET (Reserved), "Reserved", 0}, 1385 {ACPI_DMT_UINT64, ACPI_PCCT2_OFFSET (BaseAddress), "Base Address", 0}, 1386 {ACPI_DMT_UINT64, ACPI_PCCT2_OFFSET (Length), "Address Length", 0}, 1387 {ACPI_DMT_GAS, ACPI_PCCT2_OFFSET (DoorbellRegister), "Doorbell Register", 0}, 1388 {ACPI_DMT_UINT64, ACPI_PCCT2_OFFSET (PreserveMask), "Preserve Mask", 0}, 1389 {ACPI_DMT_UINT64, ACPI_PCCT2_OFFSET (WriteMask), "Write Mask", 0}, 1390 {ACPI_DMT_UINT32, ACPI_PCCT2_OFFSET (Latency), "Command Latency", 0}, 1391 {ACPI_DMT_UINT32, ACPI_PCCT2_OFFSET (MaxAccessRate), "Maximum Access Rate", 0}, 1392 {ACPI_DMT_UINT16, ACPI_PCCT2_OFFSET (MinTurnaroundTime), "Minimum Turnaround Time", 0}, 1393 {ACPI_DMT_GAS, ACPI_PCCT2_OFFSET (PlatformAckRegister), "Platform ACK Register", 0}, 1394 {ACPI_DMT_UINT64, ACPI_PCCT2_OFFSET (AckPreserveMask), "ACK Preserve Mask", 0}, 1395 {ACPI_DMT_UINT64, ACPI_PCCT2_OFFSET (AckWriteMask), "ACK Write Mask", 0}, 1396 ACPI_DMT_TERMINATOR 1397 }; 1398 1399 /* 3: Extended PCC Master Subspace Type 3 (ACPI 6.2) */ 1400 1401 ACPI_DMTABLE_INFO AcpiDmTableInfoPcct3[] = 1402 { 1403 {ACPI_DMT_UINT32, ACPI_PCCT3_OFFSET (PlatformInterrupt), "Platform Interrupt", 0}, 1404 {ACPI_DMT_UINT8, ACPI_PCCT3_OFFSET (Flags), "Flags (Decoded Below)", DT_FLAG}, 1405 {ACPI_DMT_FLAG0, ACPI_PCCT3_FLAG_OFFSET (Flags,0), "Polarity", 0}, 1406 {ACPI_DMT_FLAG1, ACPI_PCCT3_FLAG_OFFSET (Flags,0), "Mode", 0}, 1407 {ACPI_DMT_UINT8, ACPI_PCCT3_OFFSET (Reserved1), "Reserved", 0}, 1408 {ACPI_DMT_UINT64, ACPI_PCCT3_OFFSET (BaseAddress), "Base Address", 0}, 1409 {ACPI_DMT_UINT32, ACPI_PCCT3_OFFSET (Length), "Address Length", 0}, 1410 {ACPI_DMT_GAS, ACPI_PCCT3_OFFSET (DoorbellRegister), "Doorbell Register", 0}, 1411 {ACPI_DMT_UINT64, ACPI_PCCT3_OFFSET (PreserveMask), "Preserve Mask", 0}, 1412 {ACPI_DMT_UINT64, ACPI_PCCT3_OFFSET (WriteMask), "Write Mask", 0}, 1413 {ACPI_DMT_UINT32, ACPI_PCCT3_OFFSET (Latency), "Command Latency", 0}, 1414 {ACPI_DMT_UINT32, ACPI_PCCT3_OFFSET (MaxAccessRate), "Maximum Access Rate", 0}, 1415 {ACPI_DMT_UINT32, ACPI_PCCT3_OFFSET (MinTurnaroundTime), "Minimum Turnaround Time", 0}, 1416 {ACPI_DMT_GAS, ACPI_PCCT3_OFFSET (PlatformAckRegister), "Platform ACK Register", 0}, 1417 {ACPI_DMT_UINT64, ACPI_PCCT3_OFFSET (AckPreserveMask), "ACK Preserve Mask", 0}, 1418 {ACPI_DMT_UINT64, ACPI_PCCT3_OFFSET (AckSetMask), "ACK Set Mask", 0}, 1419 {ACPI_DMT_UINT64, ACPI_PCCT3_OFFSET (Reserved2), "Reserved", 0}, 1420 {ACPI_DMT_GAS, ACPI_PCCT3_OFFSET (CmdCompleteRegister), "Command Complete Register", 0}, 1421 {ACPI_DMT_UINT64, ACPI_PCCT3_OFFSET (CmdCompleteMask), "Command Complete Check Mask", 0}, 1422 {ACPI_DMT_GAS, ACPI_PCCT3_OFFSET (CmdUpdateRegister), "Command Update Register", 0}, 1423 {ACPI_DMT_UINT64, ACPI_PCCT3_OFFSET (CmdUpdatePreserveMask), "Command Update Preserve Mask", 0}, 1424 {ACPI_DMT_UINT64, ACPI_PCCT3_OFFSET (CmdUpdateSetMask), "Command Update Set Mask", 0}, 1425 {ACPI_DMT_GAS, ACPI_PCCT3_OFFSET (ErrorStatusRegister), "Error Status Register", 0}, 1426 {ACPI_DMT_UINT64, ACPI_PCCT3_OFFSET (ErrorStatusMask), "Error Status Mask", 0}, 1427 ACPI_DMT_TERMINATOR 1428 }; 1429 1430 /* 4: Extended PCC Slave Subspace Type 4 (ACPI 6.2) */ 1431 1432 ACPI_DMTABLE_INFO AcpiDmTableInfoPcct4[] = 1433 { 1434 {ACPI_DMT_UINT32, ACPI_PCCT4_OFFSET (PlatformInterrupt), "Platform Interrupt", 0}, 1435 {ACPI_DMT_UINT8, ACPI_PCCT4_OFFSET (Flags), "Flags (Decoded Below)", DT_FLAG}, 1436 {ACPI_DMT_FLAG0, ACPI_PCCT4_FLAG_OFFSET (Flags,0), "Polarity", 0}, 1437 {ACPI_DMT_FLAG1, ACPI_PCCT4_FLAG_OFFSET (Flags,0), "Mode", 0}, 1438 {ACPI_DMT_UINT8, ACPI_PCCT4_OFFSET (Reserved1), "Reserved", 0}, 1439 {ACPI_DMT_UINT64, ACPI_PCCT4_OFFSET (BaseAddress), "Base Address", 0}, 1440 {ACPI_DMT_UINT32, ACPI_PCCT4_OFFSET (Length), "Address Length", 0}, 1441 {ACPI_DMT_GAS, ACPI_PCCT4_OFFSET (DoorbellRegister), "Doorbell Register", 0}, 1442 {ACPI_DMT_UINT64, ACPI_PCCT4_OFFSET (PreserveMask), "Preserve Mask", 0}, 1443 {ACPI_DMT_UINT64, ACPI_PCCT4_OFFSET (WriteMask), "Write Mask", 0}, 1444 {ACPI_DMT_UINT32, ACPI_PCCT4_OFFSET (Latency), "Command Latency", 0}, 1445 {ACPI_DMT_UINT32, ACPI_PCCT4_OFFSET (MaxAccessRate), "Maximum Access Rate", 0}, 1446 {ACPI_DMT_UINT32, ACPI_PCCT4_OFFSET (MinTurnaroundTime), "Minimum Turnaround Time", 0}, 1447 {ACPI_DMT_GAS, ACPI_PCCT4_OFFSET (PlatformAckRegister), "Platform ACK Register", 0}, 1448 {ACPI_DMT_UINT64, ACPI_PCCT4_OFFSET (AckPreserveMask), "ACK Preserve Mask", 0}, 1449 {ACPI_DMT_UINT64, ACPI_PCCT4_OFFSET (AckSetMask), "ACK Set Mask", 0}, 1450 {ACPI_DMT_UINT64, ACPI_PCCT4_OFFSET (Reserved2), "Reserved", 0}, 1451 {ACPI_DMT_GAS, ACPI_PCCT4_OFFSET (CmdCompleteRegister), "Command Complete Register", 0}, 1452 {ACPI_DMT_UINT64, ACPI_PCCT4_OFFSET (CmdCompleteMask), "Command Complete Check Mask", 0}, 1453 {ACPI_DMT_GAS, ACPI_PCCT4_OFFSET (CmdUpdateRegister), "Command Update Register", 0}, 1454 {ACPI_DMT_UINT64, ACPI_PCCT4_OFFSET (CmdUpdatePreserveMask), "Command Update Preserve Mask", 0}, 1455 {ACPI_DMT_UINT64, ACPI_PCCT4_OFFSET (CmdUpdateSetMask), "Command Update Set Mask", 0}, 1456 {ACPI_DMT_GAS, ACPI_PCCT4_OFFSET (ErrorStatusRegister), "Error Status Register", 0}, 1457 {ACPI_DMT_UINT64, ACPI_PCCT4_OFFSET (ErrorStatusMask), "Error Status Mask", 0}, 1458 ACPI_DMT_TERMINATOR 1459 }; 1460 1461 /* 5: HW Registers based Communications Subspace */ 1462 1463 ACPI_DMTABLE_INFO AcpiDmTableInfoPcct5[] = 1464 { 1465 {ACPI_DMT_UINT16, ACPI_PCCT5_OFFSET (Version), "Version", 0}, 1466 {ACPI_DMT_UINT64, ACPI_PCCT5_OFFSET (BaseAddress), "Base Address", 0}, 1467 {ACPI_DMT_UINT64, ACPI_PCCT5_OFFSET (Length), "Length", 0}, 1468 {ACPI_DMT_GAS, ACPI_PCCT5_OFFSET (DoorbellRegister), "Doorbell Register", 0}, 1469 {ACPI_DMT_UINT64, ACPI_PCCT5_OFFSET (DoorbellPreserve), "Preserve Mask", 0}, 1470 {ACPI_DMT_UINT64, ACPI_PCCT5_OFFSET (DoorbellWrite), "Write Mask", 0}, 1471 {ACPI_DMT_GAS, ACPI_PCCT5_OFFSET (CmdCompleteRegister), "Command Complete Register", 0}, 1472 {ACPI_DMT_UINT64, ACPI_PCCT5_OFFSET (CmdCompleteMask), "Command Complete Check Mask", 0}, 1473 {ACPI_DMT_GAS, ACPI_PCCT5_OFFSET (ErrorStatusRegister), "Error Status Register", 0}, 1474 {ACPI_DMT_UINT64, ACPI_PCCT5_OFFSET (ErrorStatusMask), "Error Status Mask", 0}, 1475 {ACPI_DMT_UINT32, ACPI_PCCT5_OFFSET (NominalLatency), "Nominal Latency", 0}, 1476 {ACPI_DMT_UINT32, ACPI_PCCT5_OFFSET (MinTurnaroundTime), "Minimum Turnaround Time", 0}, 1477 ACPI_DMT_TERMINATOR 1478 }; 1479 1480 1481 /******************************************************************************* 1482 * 1483 * PDTT - Platform Debug Trigger Table (ACPI 6.2) 1484 * 1485 ******************************************************************************/ 1486 1487 ACPI_DMTABLE_INFO AcpiDmTableInfoPdtt[] = 1488 { 1489 {ACPI_DMT_UINT8, ACPI_PDTT_OFFSET (TriggerCount), "Trigger Count", 0}, 1490 {ACPI_DMT_UINT24, ACPI_PDTT_OFFSET (Reserved), "Reserved", 0}, 1491 {ACPI_DMT_UINT32, ACPI_PDTT_OFFSET (ArrayOffset), "Array Offset", 0}, 1492 ACPI_DMT_TERMINATOR 1493 }; 1494 1495 ACPI_DMTABLE_INFO AcpiDmTableInfoPdtt0[] = 1496 { 1497 {ACPI_DMT_UINT8, ACPI_PDTT0_OFFSET (SubchannelId), "Subchannel Id", 0}, 1498 {ACPI_DMT_UINT8, ACPI_PDTT0_OFFSET (Flags), "Flags (Decoded Below)", DT_FLAG}, 1499 {ACPI_DMT_FLAG0, ACPI_PDTT0_FLAG_OFFSET (Flags,0), "Runtime Trigger", 0}, 1500 {ACPI_DMT_FLAG1, ACPI_PDTT0_FLAG_OFFSET (Flags,0), "Wait for Completion", 0}, 1501 {ACPI_DMT_FLAG2, ACPI_PDTT0_FLAG_OFFSET (Flags,0), "Trigger Order", 0}, 1502 ACPI_DMT_TERMINATOR 1503 }; 1504 1505 1506 /******************************************************************************* 1507 * 1508 * PHAT - Platform Health Assessment Table (ACPI 6.4) 1509 * 1510 ******************************************************************************/ 1511 1512 ACPI_DMTABLE_INFO AcpiDmTableInfoPhatHdr[] = 1513 { 1514 {ACPI_DMT_PHAT, ACPI_PHATH_OFFSET (Type), "Subtable Type", 0}, 1515 {ACPI_DMT_UINT16, ACPI_PHATH_OFFSET (Length), "Length", 0}, 1516 {ACPI_DMT_UINT8, ACPI_PHATH_OFFSET (Revision), "Revision", 0}, 1517 ACPI_DMT_TERMINATOR 1518 }; 1519 1520 /* 0: Firmware version table */ 1521 1522 ACPI_DMTABLE_INFO AcpiDmTableInfoPhat0[] = 1523 { 1524 {ACPI_DMT_UINT24, ACPI_PHAT0_OFFSET (Reserved), "Reserved", 0}, 1525 {ACPI_DMT_UINT32, ACPI_PHAT0_OFFSET (ElementCount), "Element Count", 0}, 1526 ACPI_DMT_TERMINATOR 1527 }; 1528 1529 ACPI_DMTABLE_INFO AcpiDmTableInfoPhat0a[] = 1530 { 1531 {ACPI_DMT_UUID, ACPI_PHAT0A_OFFSET (Guid), "GUID", 0}, 1532 {ACPI_DMT_UINT64, ACPI_PHAT0A_OFFSET (VersionValue), "Version Value", 0}, 1533 {ACPI_DMT_UINT32, ACPI_PHAT0A_OFFSET (ProducerId), "Producer ID", 0}, 1534 ACPI_DMT_TERMINATOR 1535 }; 1536 1537 /* 1: Firmware Health Data Record */ 1538 1539 ACPI_DMTABLE_INFO AcpiDmTableInfoPhat1[] = 1540 { 1541 {ACPI_DMT_UINT16, ACPI_PHAT1_OFFSET (Reserved), "Reserved", 0}, 1542 {ACPI_DMT_UINT8, ACPI_PHAT1_OFFSET (Health), "Health", 0}, 1543 {ACPI_DMT_UUID, ACPI_PHAT1_OFFSET (DeviceGuid), "Device GUID", 0}, 1544 {ACPI_DMT_UINT32, ACPI_PHAT1_OFFSET (DeviceSpecificOffset), "Device specific offset", 0}, 1545 ACPI_DMT_TERMINATOR 1546 }; 1547 1548 ACPI_DMTABLE_INFO AcpiDmTableInfoPhat1a[] = 1549 { 1550 {ACPI_DMT_STRING, 0, "Namepath", 0}, 1551 ACPI_DMT_TERMINATOR 1552 }; 1553 1554 ACPI_DMTABLE_INFO AcpiDmTableInfoPhat1b[] = 1555 { 1556 {ACPI_DMT_RAW_BUFFER, 0, "Vendor Data", 0}, 1557 ACPI_DMT_TERMINATOR 1558 }; 1559 1560 1561 /******************************************************************************* 1562 * 1563 * PMTT - Platform Memory Topology Table 1564 * 1565 ******************************************************************************/ 1566 1567 ACPI_DMTABLE_INFO AcpiDmTableInfoPmtt[] = 1568 { 1569 {ACPI_DMT_UINT32, ACPI_PMTT_OFFSET (MemoryDeviceCount), "Memory Device Count", 0}, 1570 ACPI_DMT_TERMINATOR 1571 }; 1572 1573 /* Common Subtable header (one per Subtable) */ 1574 1575 #define ACPI_DM_PMTT_HEADER \ 1576 {ACPI_DMT_PMTT, ACPI_PMTTH_OFFSET (Type), "Subtable Type", 0}, \ 1577 {ACPI_DMT_UINT8, ACPI_PMTTH_OFFSET (Reserved1), "Reserved", 0}, \ 1578 {ACPI_DMT_UINT16, ACPI_PMTTH_OFFSET (Length), "Length", DT_LENGTH}, \ 1579 {ACPI_DMT_UINT16, ACPI_PMTTH_OFFSET (Flags), "Flags (decoded below)", DT_FLAG}, \ 1580 {ACPI_DMT_FLAG0, ACPI_PMTTH_FLAG_OFFSET (Flags,0), "Top-level Device", 0}, \ 1581 {ACPI_DMT_FLAG1, ACPI_PMTTH_FLAG_OFFSET (Flags,0), "Physical Element", 0}, \ 1582 {ACPI_DMT_FLAGS2, ACPI_PMTTH_FLAG_OFFSET (Flags,0), "Memory Type", 0}, \ 1583 {ACPI_DMT_UINT16, ACPI_PMTTH_OFFSET (Reserved2), "Reserved", 0}, \ 1584 {ACPI_DMT_UINT32, ACPI_PMTTH_OFFSET (MemoryDeviceCount), "Memory Device Count", 0} 1585 1586 /* PMTT Subtables */ 1587 1588 /* 0: Socket */ 1589 1590 ACPI_DMTABLE_INFO AcpiDmTableInfoPmtt0[] = 1591 { 1592 ACPI_DM_PMTT_HEADER, 1593 {ACPI_DMT_UINT16, ACPI_PMTT0_OFFSET (SocketId), "Socket ID", 0}, 1594 {ACPI_DMT_UINT16, ACPI_PMTT0_OFFSET (Reserved), "Reserved", 0}, 1595 ACPI_DMT_TERMINATOR 1596 }; 1597 1598 /* 1: Memory Controller */ 1599 1600 ACPI_DMTABLE_INFO AcpiDmTableInfoPmtt1[] = 1601 { 1602 ACPI_DM_PMTT_HEADER, 1603 {ACPI_DMT_UINT16, ACPI_PMTT1_OFFSET (ControllerId), "Controller ID", 0}, 1604 {ACPI_DMT_UINT16, ACPI_PMTT1_OFFSET (Reserved), "Reserved", 0}, 1605 ACPI_DMT_TERMINATOR 1606 }; 1607 1608 /* 2: Physical Component */ 1609 1610 ACPI_DMTABLE_INFO AcpiDmTableInfoPmtt2[] = 1611 { 1612 ACPI_DM_PMTT_HEADER, 1613 {ACPI_DMT_UINT32, ACPI_PMTT2_OFFSET (BiosHandle), "Bios Handle", 0}, 1614 ACPI_DMT_TERMINATOR 1615 }; 1616 1617 /* 0xFF: Vendor Specific */ 1618 1619 ACPI_DMTABLE_INFO AcpiDmTableInfoPmttVendor[] = 1620 { 1621 ACPI_DM_PMTT_HEADER, 1622 {ACPI_DMT_UUID, ACPI_PMTT_VENDOR_OFFSET (TypeUuid), "Type Uuid", 0}, 1623 {ACPI_DMT_PMTT_VENDOR, ACPI_PMTT_VENDOR_OFFSET (Specific), "Vendor Data", 0}, 1624 ACPI_DMT_TERMINATOR 1625 }; 1626 1627 1628 /******************************************************************************* 1629 * 1630 * PPTT - Processor Properties Topology Table (ACPI 6.2) 1631 * 1632 ******************************************************************************/ 1633 1634 /* Main table consists of only the standard ACPI header - subtables follow */ 1635 1636 /* Common Subtable header (one per Subtable) */ 1637 1638 ACPI_DMTABLE_INFO AcpiDmTableInfoPpttHdr[] = 1639 { 1640 {ACPI_DMT_PPTT, ACPI_PPTTH_OFFSET (Type), "Subtable Type", 0}, 1641 {ACPI_DMT_UINT8, ACPI_PPTTH_OFFSET (Length), "Length", 0}, 1642 ACPI_DMT_TERMINATOR 1643 }; 1644 1645 /* 0: Processor hierarchy node */ 1646 1647 ACPI_DMTABLE_INFO AcpiDmTableInfoPptt0[] = 1648 { 1649 {ACPI_DMT_UINT16, ACPI_PPTT0_OFFSET (Reserved), "Reserved", 0}, 1650 {ACPI_DMT_UINT32, ACPI_PPTT0_OFFSET (Flags), "Flags (decoded below)", 0}, 1651 {ACPI_DMT_FLAG0, ACPI_PPTT0_FLAG_OFFSET (Flags,0), "Physical package", 0}, 1652 {ACPI_DMT_FLAG1, ACPI_PPTT0_FLAG_OFFSET (Flags,0), "ACPI Processor ID valid", 0}, 1653 {ACPI_DMT_FLAG2, ACPI_PPTT0_FLAG_OFFSET (Flags,0), "Processor is a thread", 0}, 1654 {ACPI_DMT_FLAG3, ACPI_PPTT0_FLAG_OFFSET (Flags,0), "Node is a leaf", 0}, 1655 {ACPI_DMT_FLAG4, ACPI_PPTT0_FLAG_OFFSET (Flags,0), "Identical Implementation", 0}, 1656 {ACPI_DMT_UINT32, ACPI_PPTT0_OFFSET (Parent), "Parent", 0}, 1657 {ACPI_DMT_UINT32, ACPI_PPTT0_OFFSET (AcpiProcessorId), "ACPI Processor ID", 0}, 1658 {ACPI_DMT_UINT32, ACPI_PPTT0_OFFSET (NumberOfPrivResources), "Private Resource Number", 0}, 1659 ACPI_DMT_TERMINATOR 1660 }; 1661 1662 ACPI_DMTABLE_INFO AcpiDmTableInfoPptt0a[] = 1663 { 1664 {ACPI_DMT_UINT32, 0, "Private Resource", DT_OPTIONAL}, 1665 ACPI_DMT_TERMINATOR 1666 }; 1667 1668 /* 1: Cache type */ 1669 1670 ACPI_DMTABLE_INFO AcpiDmTableInfoPptt1[] = 1671 { 1672 {ACPI_DMT_UINT16, ACPI_PPTT1_OFFSET (Reserved), "Reserved", 0}, 1673 {ACPI_DMT_UINT32, ACPI_PPTT1_OFFSET (Flags), "Flags (decoded below)", 0}, 1674 {ACPI_DMT_FLAG0, ACPI_PPTT1_FLAG_OFFSET (Flags,0), "Size valid", 0}, 1675 {ACPI_DMT_FLAG1, ACPI_PPTT1_FLAG_OFFSET (Flags,0), "Number of Sets valid", 0}, 1676 {ACPI_DMT_FLAG2, ACPI_PPTT1_FLAG_OFFSET (Flags,0), "Associativity valid", 0}, 1677 {ACPI_DMT_FLAG3, ACPI_PPTT1_FLAG_OFFSET (Flags,0), "Allocation Type valid", 0}, 1678 {ACPI_DMT_FLAG4, ACPI_PPTT1_FLAG_OFFSET (Flags,0), "Cache Type valid", 0}, 1679 {ACPI_DMT_FLAG5, ACPI_PPTT1_FLAG_OFFSET (Flags,0), "Write Policy valid", 0}, 1680 {ACPI_DMT_FLAG6, ACPI_PPTT1_FLAG_OFFSET (Flags,0), "Line Size valid", 0}, 1681 {ACPI_DMT_FLAG7, ACPI_PPTT1_FLAG_OFFSET (Flags,0), "Cache ID valid", 0}, 1682 {ACPI_DMT_UINT32, ACPI_PPTT1_OFFSET (NextLevelOfCache), "Next Level of Cache", 0}, 1683 {ACPI_DMT_UINT32, ACPI_PPTT1_OFFSET (Size), "Size", 0}, 1684 {ACPI_DMT_UINT32, ACPI_PPTT1_OFFSET (NumberOfSets), "Number of Sets", 0}, 1685 {ACPI_DMT_UINT8, ACPI_PPTT1_OFFSET (Associativity), "Associativity", 0}, 1686 {ACPI_DMT_UINT8, ACPI_PPTT1_OFFSET (Attributes), "Attributes", 0}, 1687 {ACPI_DMT_FLAGS0, ACPI_PPTT1_OFFSET (Attributes), "Allocation Type", 0}, 1688 {ACPI_DMT_FLAGS2, ACPI_PPTT1_OFFSET (Attributes), "Cache Type", 0}, 1689 {ACPI_DMT_FLAG4, ACPI_PPTT1_OFFSET (Attributes), "Write Policy", 0}, 1690 {ACPI_DMT_UINT16, ACPI_PPTT1_OFFSET (LineSize), "Line Size", 0}, 1691 ACPI_DMT_TERMINATOR 1692 }; 1693 1694 /* 1: cache type v1 */ 1695 1696 ACPI_DMTABLE_INFO AcpiDmTableInfoPptt1a[] = 1697 { 1698 {ACPI_DMT_UINT32, ACPI_PPTT1A_OFFSET (CacheId), "Cache ID", 0}, 1699 ACPI_DMT_TERMINATOR 1700 }; 1701 1702 /* 2: ID */ 1703 1704 ACPI_DMTABLE_INFO AcpiDmTableInfoPptt2[] = 1705 { 1706 {ACPI_DMT_UINT16, ACPI_PPTT2_OFFSET (Reserved), "Reserved", 0}, 1707 {ACPI_DMT_UINT32, ACPI_PPTT2_OFFSET (VendorId), "Vendor ID", 0}, 1708 {ACPI_DMT_UINT64, ACPI_PPTT2_OFFSET (Level1Id), "Level1 ID", 0}, 1709 {ACPI_DMT_UINT64, ACPI_PPTT2_OFFSET (Level2Id), "Level2 ID", 0}, 1710 {ACPI_DMT_UINT16, ACPI_PPTT2_OFFSET (MajorRev), "Major revision", 0}, 1711 {ACPI_DMT_UINT16, ACPI_PPTT2_OFFSET (MinorRev), "Minor revision", 0}, 1712 {ACPI_DMT_UINT16, ACPI_PPTT2_OFFSET (SpinRev), "Spin revision", 0}, 1713 ACPI_DMT_TERMINATOR 1714 }; 1715 1716 1717 /******************************************************************************* 1718 * 1719 * PRMT - Platform Runtime Mechanism Table 1720 * Version 1 1721 * 1722 ******************************************************************************/ 1723 1724 ACPI_DMTABLE_INFO AcpiDmTableInfoPrmtHdr[] = 1725 { 1726 {ACPI_DMT_UUID, ACPI_PRMTH_OFFSET (PlatformGuid[0]), "Platform GUID", 0}, 1727 {ACPI_DMT_UINT32, ACPI_PRMTH_OFFSET (ModuleInfoOffset), "Module info offset", 0}, 1728 {ACPI_DMT_UINT32, ACPI_PRMTH_OFFSET (ModuleInfoCount), "Module info count", 0}, 1729 ACPI_DMT_NEW_LINE, 1730 ACPI_DMT_TERMINATOR 1731 1732 }; 1733 1734 ACPI_DMTABLE_INFO AcpiDmTableInfoPrmtModule[] = 1735 { 1736 {ACPI_DMT_UINT16, ACPI_PRMT0_OFFSET (Revision), "Revision", 0}, 1737 {ACPI_DMT_UINT16, ACPI_PRMT0_OFFSET (Length), "Length", 0}, 1738 {ACPI_DMT_UUID, ACPI_PRMT0_OFFSET (ModuleGuid[0]), "Module GUID", 0}, 1739 {ACPI_DMT_UINT16, ACPI_PRMT0_OFFSET (MajorRev), "Major Revision", 0}, 1740 {ACPI_DMT_UINT16, ACPI_PRMT0_OFFSET (MinorRev), "Minor Revision", 0}, 1741 {ACPI_DMT_UINT16, ACPI_PRMT0_OFFSET (HandlerInfoCount), "Handler Info Count", 0}, 1742 {ACPI_DMT_UINT32, ACPI_PRMT0_OFFSET (HandlerInfoOffset), "Handler Info Offset", 0}, 1743 {ACPI_DMT_UINT64, ACPI_PRMT0_OFFSET (MmioListPointer), "Mmio List pointer", 0}, 1744 ACPI_DMT_NEW_LINE, 1745 ACPI_DMT_TERMINATOR 1746 1747 }; 1748 1749 ACPI_DMTABLE_INFO AcpiDmTableInfoPrmtHandler[] = 1750 { 1751 {ACPI_DMT_UINT16, ACPI_PRMT1_OFFSET (Revision), "Revision", 0}, 1752 {ACPI_DMT_UINT16, ACPI_PRMT1_OFFSET (Length), "Length", 0}, 1753 {ACPI_DMT_UUID, ACPI_PRMT1_OFFSET (HandlerGuid[0]), "Handler GUID", 0}, 1754 {ACPI_DMT_UINT64, ACPI_PRMT1_OFFSET (HandlerAddress), "Handler address", 0}, 1755 {ACPI_DMT_UINT64, ACPI_PRMT1_OFFSET (StaticDataBufferAddress),"Satic Data Address", 0}, 1756 {ACPI_DMT_UINT64, ACPI_PRMT1_OFFSET (AcpiParamBufferAddress), "ACPI Parameter Address", 0}, 1757 ACPI_DMT_NEW_LINE, 1758 ACPI_DMT_TERMINATOR 1759 1760 }; 1761 1762 1763 /******************************************************************************* 1764 * 1765 * RASF - RAS Feature table 1766 * 1767 ******************************************************************************/ 1768 1769 ACPI_DMTABLE_INFO AcpiDmTableInfoRasf[] = 1770 { 1771 {ACPI_DMT_BUF12, ACPI_RASF_OFFSET (ChannelId[0]), "Channel ID", 0}, 1772 ACPI_DMT_TERMINATOR 1773 }; 1774 1775 1776 /******************************************************************************* 1777 * 1778 * RGRT - Regulatory Graphics Resource Table 1779 * 1780 ******************************************************************************/ 1781 1782 ACPI_DMTABLE_INFO AcpiDmTableInfoRgrt[] = 1783 { 1784 {ACPI_DMT_UINT16, ACPI_RGRT_OFFSET (Version), "Version", 0}, 1785 {ACPI_DMT_RGRT, ACPI_RGRT_OFFSET (ImageType), "Image Type", 0}, 1786 {ACPI_DMT_UINT8, ACPI_RGRT_OFFSET (Reserved), "Reserved", 0}, 1787 ACPI_DMT_TERMINATOR 1788 }; 1789 1790 /* 1791 * We treat the binary image field as its own subtable (to make 1792 * ACPI_DMT_RAW_BUFFER work properly). 1793 */ 1794 ACPI_DMTABLE_INFO AcpiDmTableInfoRgrt0[] = 1795 { 1796 {ACPI_DMT_RAW_BUFFER, 0, "Image", 0}, 1797 ACPI_DMT_TERMINATOR 1798 }; 1799 1800 1801 /******************************************************************************* 1802 * 1803 * S3PT - S3 Performance Table 1804 * 1805 ******************************************************************************/ 1806 1807 ACPI_DMTABLE_INFO AcpiDmTableInfoS3pt[] = 1808 { 1809 {ACPI_DMT_SIG, ACPI_S3PT_OFFSET (Signature[0]), "Signature", 0}, 1810 {ACPI_DMT_UINT32, ACPI_S3PT_OFFSET (Length), "Length", DT_LENGTH}, 1811 ACPI_DMT_TERMINATOR 1812 }; 1813 1814 /* S3PT subtable header */ 1815 1816 ACPI_DMTABLE_INFO AcpiDmTableInfoS3ptHdr[] = 1817 { 1818 {ACPI_DMT_UINT16, ACPI_S3PTH_OFFSET (Type), "Type", 0}, 1819 {ACPI_DMT_UINT8, ACPI_S3PTH_OFFSET (Length), "Length", DT_LENGTH}, 1820 {ACPI_DMT_UINT8, ACPI_S3PTH_OFFSET (Revision), "Revision", 0}, 1821 ACPI_DMT_TERMINATOR 1822 }; 1823 1824 /* 0: Basic S3 Resume Performance Record */ 1825 1826 ACPI_DMTABLE_INFO AcpiDmTableInfoS3pt0[] = 1827 { 1828 {ACPI_DMT_UINT32, ACPI_S3PT0_OFFSET (ResumeCount), "Resume Count", 0}, 1829 {ACPI_DMT_UINT64, ACPI_S3PT0_OFFSET (FullResume), "Full Resume", 0}, 1830 {ACPI_DMT_UINT64, ACPI_S3PT0_OFFSET (AverageResume), "Average Resume", 0}, 1831 ACPI_DMT_TERMINATOR 1832 }; 1833 1834 /* 1: Basic S3 Suspend Performance Record */ 1835 1836 ACPI_DMTABLE_INFO AcpiDmTableInfoS3pt1[] = 1837 { 1838 {ACPI_DMT_UINT64, ACPI_S3PT1_OFFSET (SuspendStart), "Suspend Start", 0}, 1839 {ACPI_DMT_UINT64, ACPI_S3PT1_OFFSET (SuspendEnd), "Suspend End", 0}, 1840 ACPI_DMT_TERMINATOR 1841 }; 1842 1843 1844 /******************************************************************************* 1845 * 1846 * SBST - Smart Battery Specification Table 1847 * 1848 ******************************************************************************/ 1849 1850 ACPI_DMTABLE_INFO AcpiDmTableInfoSbst[] = 1851 { 1852 {ACPI_DMT_UINT32, ACPI_SBST_OFFSET (WarningLevel), "Warning Level", 0}, 1853 {ACPI_DMT_UINT32, ACPI_SBST_OFFSET (LowLevel), "Low Level", 0}, 1854 {ACPI_DMT_UINT32, ACPI_SBST_OFFSET (CriticalLevel), "Critical Level", 0}, 1855 ACPI_DMT_TERMINATOR 1856 }; 1857 1858 1859 /******************************************************************************* 1860 * 1861 * SDEI - Software Delegated Exception Interface Descriptor Table 1862 * 1863 ******************************************************************************/ 1864 1865 ACPI_DMTABLE_INFO AcpiDmTableInfoSdei[] = 1866 { 1867 ACPI_DMT_TERMINATOR 1868 }; 1869 1870 1871 /******************************************************************************* 1872 * 1873 * SDEV - Secure Devices Table (ACPI 6.2) 1874 * 1875 ******************************************************************************/ 1876 1877 ACPI_DMTABLE_INFO AcpiDmTableInfoSdev[] = 1878 { 1879 ACPI_DMT_TERMINATOR 1880 }; 1881 1882 /* Common Subtable header (one per Subtable) */ 1883 1884 ACPI_DMTABLE_INFO AcpiDmTableInfoSdevHdr[] = 1885 { 1886 {ACPI_DMT_SDEV, ACPI_SDEVH_OFFSET (Type), "Subtable Type", 0}, 1887 {ACPI_DMT_UINT8, ACPI_SDEVH_OFFSET (Flags), "Flags (decoded below)", 0}, 1888 {ACPI_DMT_FLAG0, ACPI_SDEVH_FLAG_OFFSET (Flags,0), "Allow handoff to unsecure OS", 0}, 1889 {ACPI_DMT_FLAG1, ACPI_SDEVH_FLAG_OFFSET (Flags,0), "Secure access components present", 0}, 1890 {ACPI_DMT_UINT16, ACPI_SDEVH_OFFSET (Length), "Length", 0}, 1891 ACPI_DMT_TERMINATOR 1892 }; 1893 1894 /* SDEV Subtables */ 1895 1896 /* 0: Namespace Device Based Secure Device Structure */ 1897 1898 ACPI_DMTABLE_INFO AcpiDmTableInfoSdev0[] = 1899 { 1900 {ACPI_DMT_UINT16, ACPI_SDEV0_OFFSET (DeviceIdOffset), "Device ID Offset", 0}, 1901 {ACPI_DMT_UINT16, ACPI_SDEV0_OFFSET (DeviceIdLength), "Device ID Length", 0}, 1902 {ACPI_DMT_UINT16, ACPI_SDEV0_OFFSET (VendorDataOffset), "Vendor Data Offset", 0}, 1903 {ACPI_DMT_UINT16, ACPI_SDEV0_OFFSET (VendorDataLength), "Vendor Data Length", 0}, 1904 ACPI_DMT_TERMINATOR 1905 }; 1906 1907 ACPI_DMTABLE_INFO AcpiDmTableInfoSdev0a[] = 1908 { 1909 {ACPI_DMT_STRING, 0, "Namepath", 0}, 1910 ACPI_DMT_TERMINATOR 1911 }; 1912 1913 ACPI_DMTABLE_INFO AcpiDmTableInfoSdev0b[] = 1914 { 1915 {ACPI_DMT_UINT16, ACPI_SDEV0B_OFFSET (SecureComponentOffset), "Secure Access Components Offset", 0}, 1916 {ACPI_DMT_UINT16, ACPI_SDEV0B_OFFSET (SecureComponentLength), "Secure Access Components Length", 0}, 1917 ACPI_DMT_TERMINATOR 1918 }; 1919 1920 /* Secure access components */ 1921 1922 /* Common secure access components header secure access component */ 1923 1924 ACPI_DMTABLE_INFO AcpiDmTableInfoSdevSecCompHdr[] = 1925 { 1926 {ACPI_DMT_UINT8, ACPI_SDEVCH_OFFSET (Type), "Secure Component Type", 0}, 1927 {ACPI_DMT_UINT8, ACPI_SDEVCH_OFFSET (Flags), "Flags (decoded below)", 0}, 1928 {ACPI_DMT_UINT16, ACPI_SDEVCH_OFFSET (Length), "Length", 0}, 1929 ACPI_DMT_TERMINATOR 1930 }; 1931 1932 /* 0: Identification Based Secure Access Component */ 1933 1934 ACPI_DMTABLE_INFO AcpiDmTableInfoSdevSecCompId[] = 1935 { 1936 {ACPI_DMT_UINT16, ACPI_SDEVC0_OFFSET (HardwareIdOffset), "Hardware ID Offset", 0}, 1937 {ACPI_DMT_UINT16, ACPI_SDEVC0_OFFSET (HardwareIdLength), "Hardware ID Length", 0}, 1938 {ACPI_DMT_UINT16, ACPI_SDEVC0_OFFSET (SubsystemIdOffset), "Subsystem ID Offset", 0}, 1939 {ACPI_DMT_UINT16, ACPI_SDEVC0_OFFSET (SubsystemIdLength), "Subsystem ID Length", 0}, 1940 {ACPI_DMT_UINT16, ACPI_SDEVC0_OFFSET (HardwareRevision), "Hardware Revision", 0}, 1941 {ACPI_DMT_UINT8, ACPI_SDEVC0_OFFSET (HardwareRevPresent), "Hardware Rev Present", 0}, 1942 {ACPI_DMT_UINT8, ACPI_SDEVC0_OFFSET (ClassCodePresent), "Class Code Present", 0}, 1943 {ACPI_DMT_UINT8, ACPI_SDEVC0_OFFSET (PciBaseClass), "PCI Base Class", 0}, 1944 {ACPI_DMT_UINT8, ACPI_SDEVC0_OFFSET (PciSubClass), "PCI SubClass", 0}, 1945 {ACPI_DMT_UINT8, ACPI_SDEVC0_OFFSET (PciProgrammingXface), "PCI Programming Xface", 0}, 1946 ACPI_DMT_TERMINATOR 1947 }; 1948 1949 /* 1: Memory Based Secure Access Component */ 1950 1951 ACPI_DMTABLE_INFO AcpiDmTableInfoSdevSecCompMem[] = 1952 { 1953 {ACPI_DMT_UINT32, ACPI_SDEVC1_OFFSET (Reserved), "Reserved", 0}, 1954 {ACPI_DMT_UINT64, ACPI_SDEVC1_OFFSET (MemoryBaseAddress), "Memory Base Address", 0}, 1955 {ACPI_DMT_UINT64, ACPI_SDEVC1_OFFSET (MemoryLength), "Memory Length", 0}, 1956 ACPI_DMT_TERMINATOR 1957 }; 1958 1959 1960 /* 1: PCIe Endpoint Device Based Device Structure */ 1961 1962 ACPI_DMTABLE_INFO AcpiDmTableInfoSdev1[] = 1963 { 1964 {ACPI_DMT_UINT16, ACPI_SDEV1_OFFSET (Segment), "Segment", 0}, 1965 {ACPI_DMT_UINT16, ACPI_SDEV1_OFFSET (StartBus), "Start Bus", 0}, 1966 {ACPI_DMT_UINT16, ACPI_SDEV1_OFFSET (PathOffset), "Path Offset", 0}, 1967 {ACPI_DMT_UINT16, ACPI_SDEV1_OFFSET (PathLength), "Path Length", 0}, 1968 {ACPI_DMT_UINT16, ACPI_SDEV1_OFFSET (VendorDataOffset), "Vendor Data Offset", 0}, 1969 {ACPI_DMT_UINT16, ACPI_SDEV1_OFFSET (VendorDataLength), "Vendor Data Length", 0}, 1970 ACPI_DMT_TERMINATOR 1971 }; 1972 1973 ACPI_DMTABLE_INFO AcpiDmTableInfoSdev1a[] = 1974 { 1975 {ACPI_DMT_UINT8, ACPI_SDEV1A_OFFSET (Device), "Device", 0}, 1976 {ACPI_DMT_UINT8, ACPI_SDEV1A_OFFSET (Function), "Function", 0}, 1977 ACPI_DMT_TERMINATOR 1978 }; 1979 1980 ACPI_DMTABLE_INFO AcpiDmTableInfoSdev1b[] = 1981 { 1982 {ACPI_DMT_RAW_BUFFER, 0, "Vendor Data", 0}, /*, DT_OPTIONAL}, */ 1983 ACPI_DMT_TERMINATOR 1984 }; 1985 1986 /*! [End] no source code translation !*/ 1987
Indexes created Sun Sep 28 16:09:52 GMT 2025