actbl1.h revision 1.1.1.23
1 /****************************************************************************** 2 * 3 * Name: actbl1.h - Additional ACPI table definitions 4 * 5 *****************************************************************************/ 6 7 /****************************************************************************** 8 * 9 * 1. Copyright Notice 10 * 11 * Some or all of this work - Copyright (c) 1999 - 2024, Intel Corp. 12 * All rights reserved. 13 * 14 * 2. License 15 * 16 * 2.1. This is your license from Intel Corp. under its intellectual property 17 * rights. You may have additional license terms from the party that provided 18 * you this software, covering your right to use that party's intellectual 19 * property rights. 20 * 21 * 2.2. Intel grants, free of charge, to any person ("Licensee") obtaining a 22 * copy of the source code appearing in this file ("Covered Code") an 23 * irrevocable, perpetual, worldwide license under Intel's copyrights in the 24 * base code distributed originally by Intel ("Original Intel Code") to copy, 25 * make derivatives, distribute, use and display any portion of the Covered 26 * Code in any form, with the right to sublicense such rights; and 27 * 28 * 2.3. Intel grants Licensee a non-exclusive and non-transferable patent 29 * license (with the right to sublicense), under only those claims of Intel 30 * patents that are infringed by the Original Intel Code, to make, use, sell, 31 * offer to sell, and import the Covered Code and derivative works thereof 32 * solely to the minimum extent necessary to exercise the above copyright 33 * license, and in no event shall the patent license extend to any additions 34 * to or modifications of the Original Intel Code. No other license or right 35 * is granted directly or by implication, estoppel or otherwise; 36 * 37 * The above copyright and patent license is granted only if the following 38 * conditions are met: 39 * 40 * 3. Conditions 41 * 42 * 3.1. Redistribution of Source with Rights to Further Distribute Source. 43 * Redistribution of source code of any substantial portion of the Covered 44 * Code or modification with rights to further distribute source must include 45 * the above Copyright Notice, the above License, this list of Conditions, 46 * and the following Disclaimer and Export Compliance provision. In addition, 47 * Licensee must cause all Covered Code to which Licensee contributes to 48 * contain a file documenting the changes Licensee made to create that Covered 49 * Code and the date of any change. Licensee must include in that file the 50 * documentation of any changes made by any predecessor Licensee. Licensee 51 * must include a prominent statement that the modification is derived, 52 * directly or indirectly, from Original Intel Code. 53 * 54 * 3.2. Redistribution of Source with no Rights to Further Distribute Source. 55 * Redistribution of source code of any substantial portion of the Covered 56 * Code or modification without rights to further distribute source must 57 * include the following Disclaimer and Export Compliance provision in the 58 * documentation and/or other materials provided with distribution. In 59 * addition, Licensee may not authorize further sublicense of source of any 60 * portion of the Covered Code, and must include terms to the effect that the 61 * license from Licensee to its licensee is limited to the intellectual 62 * property embodied in the software Licensee provides to its licensee, and 63 * not to intellectual property embodied in modifications its licensee may 64 * make. 65 * 66 * 3.3. Redistribution of Executable. Redistribution in executable form of any 67 * substantial portion of the Covered Code or modification must reproduce the 68 * above Copyright Notice, and the following Disclaimer and Export Compliance 69 * provision in the documentation and/or other materials provided with the 70 * distribution. 71 * 72 * 3.4. Intel retains all right, title, and interest in and to the Original 73 * Intel Code. 74 * 75 * 3.5. Neither the name Intel nor any other trademark owned or controlled by 76 * Intel shall be used in advertising or otherwise to promote the sale, use or 77 * other dealings in products derived from or relating to the Covered Code 78 * without prior written authorization from Intel. 79 * 80 * 4. Disclaimer and Export Compliance 81 * 82 * 4.1. INTEL MAKES NO WARRANTY OF ANY KIND REGARDING ANY SOFTWARE PROVIDED 83 * HERE. ANY SOFTWARE ORIGINATING FROM INTEL OR DERIVED FROM INTEL SOFTWARE 84 * IS PROVIDED "AS IS," AND INTEL WILL NOT PROVIDE ANY SUPPORT, ASSISTANCE, 85 * INSTALLATION, TRAINING OR OTHER SERVICES. INTEL WILL NOT PROVIDE ANY 86 * UPDATES, ENHANCEMENTS OR EXTENSIONS. INTEL SPECIFICALLY DISCLAIMS ANY 87 * IMPLIED WARRANTIES OF MERCHANTABILITY, NONINFRINGEMENT AND FITNESS FOR A 88 * PARTICULAR PURPOSE. 89 * 90 * 4.2. IN NO EVENT SHALL INTEL HAVE ANY LIABILITY TO LICENSEE, ITS LICENSEES 91 * OR ANY OTHER THIRD PARTY, FOR ANY LOST PROFITS, LOST DATA, LOSS OF USE OR 92 * COSTS OF PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES, OR FOR ANY INDIRECT, 93 * SPECIAL OR CONSEQUENTIAL DAMAGES ARISING OUT OF THIS AGREEMENT, UNDER ANY 94 * CAUSE OF ACTION OR THEORY OF LIABILITY, AND IRRESPECTIVE OF WHETHER INTEL 95 * HAS ADVANCE NOTICE OF THE POSSIBILITY OF SUCH DAMAGES. THESE LIMITATIONS 96 * SHALL APPLY NOTWITHSTANDING THE FAILURE OF THE ESSENTIAL PURPOSE OF ANY 97 * LIMITED REMEDY. 98 * 99 * 4.3. Licensee shall not export, either directly or indirectly, any of this 100 * software or system incorporating such software without first obtaining any 101 * required license or other approval from the U. S. Department of Commerce or 102 * any other agency or department of the United States Government. In the 103 * event Licensee exports any such software from the United States or 104 * re-exports any such software from a foreign destination, Licensee shall 105 * ensure that the distribution and export/re-export of the software is in 106 * compliance with all laws, regulations, orders, or other restrictions of the 107 * U.S. Export Administration Regulations. Licensee agrees that neither it nor 108 * any of its subsidiaries will export/re-export any technical data, process, 109 * software, or service, directly or indirectly, to any country for which the 110 * United States government or any agency thereof requires an export license, 111 * other governmental approval, or letter of assurance, without first obtaining 112 * such license, approval or letter. 113 * 114 ***************************************************************************** 115 * 116 * Alternatively, you may choose to be licensed under the terms of the 117 * following license: 118 * 119 * Redistribution and use in source and binary forms, with or without 120 * modification, are permitted provided that the following conditions 121 * are met: 122 * 1. Redistributions of source code must retain the above copyright 123 * notice, this list of conditions, and the following disclaimer, 124 * without modification. 125 * 2. Redistributions in binary form must reproduce at minimum a disclaimer 126 * substantially similar to the "NO WARRANTY" disclaimer below 127 * ("Disclaimer") and any redistribution must be conditioned upon 128 * including a substantially similar Disclaimer requirement for further 129 * binary redistribution. 130 * 3. Neither the names of the above-listed copyright holders nor the names 131 * of any contributors may be used to endorse or promote products derived 132 * from this software without specific prior written permission. 133 * 134 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 135 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 136 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 137 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 138 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 139 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 140 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 141 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 142 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 143 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 144 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 145 * 146 * Alternatively, you may choose to be licensed under the terms of the 147 * GNU General Public License ("GPL") version 2 as published by the Free 148 * Software Foundation. 149 * 150 *****************************************************************************/ 151 152 #ifndef __ACTBL1_H__ 153 #define __ACTBL1_H__ 154 155 156 /******************************************************************************* 157 * 158 * Additional ACPI Tables 159 * 160 * These tables are not consumed directly by the ACPICA subsystem, but are 161 * included here to support device drivers and the AML disassembler. 162 * 163 ******************************************************************************/ 164 165 166 /* 167 * Values for description table header signatures for tables defined in this 168 * file. Useful because they make it more difficult to inadvertently type in 169 * the wrong signature. 170 */ 171 #define ACPI_SIG_AEST "AEST" /* Arm Error Source Table */ 172 #define ACPI_SIG_ASF "ASF!" /* Alert Standard Format table */ 173 #define ACPI_SIG_ASPT "ASPT" /* AMD Secure Processor Table */ 174 #define ACPI_SIG_BERT "BERT" /* Boot Error Record Table */ 175 #define ACPI_SIG_BGRT "BGRT" /* Boot Graphics Resource Table */ 176 #define ACPI_SIG_BOOT "BOOT" /* Simple Boot Flag Table */ 177 #define ACPI_SIG_CEDT "CEDT" /* CXL Early Discovery Table */ 178 #define ACPI_SIG_CPEP "CPEP" /* Corrected Platform Error Polling table */ 179 #define ACPI_SIG_CSRT "CSRT" /* Core System Resource Table */ 180 #define ACPI_SIG_DBG2 "DBG2" /* Debug Port table type 2 */ 181 #define ACPI_SIG_DBGP "DBGP" /* Debug Port table */ 182 #define ACPI_SIG_DMAR "DMAR" /* DMA Remapping table */ 183 #define ACPI_SIG_DRTM "DRTM" /* Dynamic Root of Trust for Measurement table */ 184 #define ACPI_SIG_ECDT "ECDT" /* Embedded Controller Boot Resources Table */ 185 #define ACPI_SIG_EINJ "EINJ" /* Error Injection table */ 186 #define ACPI_SIG_ERST "ERST" /* Error Record Serialization Table */ 187 #define ACPI_SIG_FPDT "FPDT" /* Firmware Performance Data Table */ 188 #define ACPI_SIG_GTDT "GTDT" /* Generic Timer Description Table */ 189 #define ACPI_SIG_HEST "HEST" /* Hardware Error Source Table */ 190 #define ACPI_SIG_HMAT "HMAT" /* Heterogeneous Memory Attributes Table */ 191 #define ACPI_SIG_HPET "HPET" /* High Precision Event Timer table */ 192 #define ACPI_SIG_IBFT "IBFT" /* iSCSI Boot Firmware Table */ 193 #define ACPI_SIG_MSCT "MSCT" /* Maximum System Characteristics Table*/ 194 195 #define ACPI_SIG_S3PT "S3PT" /* S3 Performance (sub)Table */ 196 #define ACPI_SIG_PCCS "PCC" /* PCC Shared Memory Region */ 197 198 199 /* Reserved table signatures */ 200 201 #define ACPI_SIG_MATR "MATR" /* Memory Address Translation Table */ 202 #define ACPI_SIG_MSDM "MSDM" /* Microsoft Data Management Table */ 203 204 /* 205 * These tables have been seen in the field, but no definition has been found 206 */ 207 #ifdef ACPI_UNDEFINED_TABLES 208 #define ACPI_SIG_ATKG "ATKG" 209 #define ACPI_SIG_GSCI "GSCI" /* GMCH SCI table */ 210 #define ACPI_SIG_IEIT "IEIT" 211 #endif 212 213 /* 214 * All tables must be byte-packed to match the ACPI specification, since 215 * the tables are provided by the system BIOS. 216 */ 217 #pragma pack(1) 218 219 /* 220 * Note: C bitfields are not used for this reason: 221 * 222 * "Bitfields are great and easy to read, but unfortunately the C language 223 * does not specify the layout of bitfields in memory, which means they are 224 * essentially useless for dealing with packed data in on-disk formats or 225 * binary wire protocols." (Or ACPI tables and buffers.) "If you ask me, 226 * this decision was a design error in C. Ritchie could have picked an order 227 * and stuck with it." Norman Ramsey. 228 * See http://stackoverflow.com/a/1053662/41661 229 */ 230 231 232 /******************************************************************************* 233 * 234 * Common subtable headers 235 * 236 ******************************************************************************/ 237 238 /* Generic subtable header (used in MADT, SRAT, etc.) */ 239 240 typedef struct acpi_subtable_header 241 { 242 UINT8 Type; 243 UINT8 Length; 244 245 } ACPI_SUBTABLE_HEADER; 246 247 248 /* Subtable header for WHEA tables (EINJ, ERST, WDAT) */ 249 250 typedef struct acpi_whea_header 251 { 252 UINT8 Action; 253 UINT8 Instruction; 254 UINT8 Flags; 255 UINT8 Reserved; 256 ACPI_GENERIC_ADDRESS RegisterRegion; 257 UINT64 Value; /* Value used with Read/Write register */ 258 UINT64 Mask; /* Bitmask required for this register instruction */ 259 260 } ACPI_WHEA_HEADER; 261 262 263 /******************************************************************************* 264 * 265 * ASF - Alert Standard Format table (Signature "ASF!") 266 * Revision 0x10 267 * 268 * Conforms to the Alert Standard Format Specification V2.0, 23 April 2003 269 * 270 ******************************************************************************/ 271 272 typedef struct acpi_table_asf 273 { 274 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 275 276 } ACPI_TABLE_ASF; 277 278 279 /* ASF subtable header */ 280 281 typedef struct acpi_asf_header 282 { 283 UINT8 Type; 284 UINT8 Reserved; 285 UINT16 Length; 286 287 } ACPI_ASF_HEADER; 288 289 290 /* Values for Type field above */ 291 292 enum AcpiAsfType 293 { 294 ACPI_ASF_TYPE_INFO = 0, 295 ACPI_ASF_TYPE_ALERT = 1, 296 ACPI_ASF_TYPE_CONTROL = 2, 297 ACPI_ASF_TYPE_BOOT = 3, 298 ACPI_ASF_TYPE_ADDRESS = 4, 299 ACPI_ASF_TYPE_RESERVED = 5 300 }; 301 302 /* 303 * ASF subtables 304 */ 305 306 /* 0: ASF Information */ 307 308 typedef struct acpi_asf_info 309 { 310 ACPI_ASF_HEADER Header; 311 UINT8 MinResetValue; 312 UINT8 MinPollInterval; 313 UINT16 SystemId; 314 UINT32 MfgId; 315 UINT8 Flags; 316 UINT8 Reserved2[3]; 317 318 } ACPI_ASF_INFO; 319 320 /* Masks for Flags field above */ 321 322 #define ACPI_ASF_SMBUS_PROTOCOLS (1) 323 324 325 /* 1: ASF Alerts */ 326 327 typedef struct acpi_asf_alert 328 { 329 ACPI_ASF_HEADER Header; 330 UINT8 AssertMask; 331 UINT8 DeassertMask; 332 UINT8 Alerts; 333 UINT8 DataLength; 334 335 } ACPI_ASF_ALERT; 336 337 typedef struct acpi_asf_alert_data 338 { 339 UINT8 Address; 340 UINT8 Command; 341 UINT8 Mask; 342 UINT8 Value; 343 UINT8 SensorType; 344 UINT8 Type; 345 UINT8 Offset; 346 UINT8 SourceType; 347 UINT8 Severity; 348 UINT8 SensorNumber; 349 UINT8 Entity; 350 UINT8 Instance; 351 352 } ACPI_ASF_ALERT_DATA; 353 354 355 /* 2: ASF Remote Control */ 356 357 typedef struct acpi_asf_remote 358 { 359 ACPI_ASF_HEADER Header; 360 UINT8 Controls; 361 UINT8 DataLength; 362 UINT16 Reserved2; 363 364 } ACPI_ASF_REMOTE; 365 366 typedef struct acpi_asf_control_data 367 { 368 UINT8 Function; 369 UINT8 Address; 370 UINT8 Command; 371 UINT8 Value; 372 373 } ACPI_ASF_CONTROL_DATA; 374 375 376 /* 3: ASF RMCP Boot Options */ 377 378 typedef struct acpi_asf_rmcp 379 { 380 ACPI_ASF_HEADER Header; 381 UINT8 Capabilities[7]; 382 UINT8 CompletionCode; 383 UINT32 EnterpriseId; 384 UINT8 Command; 385 UINT16 Parameter; 386 UINT16 BootOptions; 387 UINT16 OemParameters; 388 389 } ACPI_ASF_RMCP; 390 391 392 /* 4: ASF Address */ 393 394 typedef struct acpi_asf_address 395 { 396 ACPI_ASF_HEADER Header; 397 UINT8 EpromAddress; 398 UINT8 Devices; 399 400 } ACPI_ASF_ADDRESS; 401 402 /******************************************************************************* 403 * 404 * ASPT - AMD Secure Processor Table (Signature "ASPT") 405 * Revision 0x1 406 * 407 * Conforms to AMD Socket SP5/SP6 Platform ASPT Rev1 Specification, 408 * 12 September 2022 409 * 410 ******************************************************************************/ 411 412 typedef struct acpi_table_aspt 413 { 414 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 415 UINT32 NumEntries; 416 417 } ACPI_TABLE_ASPT; 418 419 420 /* ASPT subtable header */ 421 422 typedef struct acpi_aspt_header 423 { 424 UINT16 Type; 425 UINT16 Length; 426 427 } ACPI_ASPT_HEADER; 428 429 430 /* Values for Type field above */ 431 432 enum AcpiAsptType 433 { 434 ACPI_ASPT_TYPE_GLOBAL_REGS = 0, 435 ACPI_ASPT_TYPE_SEV_MBOX_REGS = 1, 436 ACPI_ASPT_TYPE_ACPI_MBOX_REGS = 2, 437 ACPI_ASPT_TYPE_UNKNOWN = 3, 438 }; 439 440 /* 441 * ASPT subtables 442 */ 443 444 /* 0: ASPT Global Registers */ 445 446 typedef struct acpi_aspt_global_regs 447 { 448 ACPI_ASPT_HEADER Header; 449 UINT32 Reserved; 450 UINT64 FeatureRegAddr; 451 UINT64 IrqEnRegAddr; 452 UINT64 IrqStRegAddr; 453 454 } ACPI_ASPT_GLOBAL_REGS; 455 456 457 /* 1: ASPT SEV Mailbox Registers */ 458 459 typedef struct acpi_aspt_sev_mbox_regs 460 { 461 ACPI_ASPT_HEADER Header; 462 UINT8 MboxIrqId; 463 UINT8 Reserved[3]; 464 UINT64 CmdRespRegAddr; 465 UINT64 CmdBufLoRegAddr; 466 UINT64 CmdBufHiRegAddr; 467 468 } ACPI_ASPT_SEV_MBOX_REGS; 469 470 471 /* 2: ASPT ACPI Mailbox Registers */ 472 473 typedef struct acpi_aspt_acpi_mbox_regs 474 { 475 ACPI_ASPT_HEADER Header; 476 UINT32 Reserved1; 477 UINT64 CmdRespRegAddr; 478 UINT64 Reserved2[2]; 479 480 } ACPI_ASPT_ACPI_MBOX_REGS; 481 482 483 /******************************************************************************* 484 * 485 * BERT - Boot Error Record Table (ACPI 4.0) 486 * Version 1 487 * 488 ******************************************************************************/ 489 490 typedef struct acpi_table_bert 491 { 492 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 493 UINT32 RegionLength; /* Length of the boot error region */ 494 UINT64 Address; /* Physical address of the error region */ 495 496 } ACPI_TABLE_BERT; 497 498 499 /* Boot Error Region (not a subtable, pointed to by Address field above) */ 500 501 typedef struct acpi_bert_region 502 { 503 UINT32 BlockStatus; /* Type of error information */ 504 UINT32 RawDataOffset; /* Offset to raw error data */ 505 UINT32 RawDataLength; /* Length of raw error data */ 506 UINT32 DataLength; /* Length of generic error data */ 507 UINT32 ErrorSeverity; /* Severity code */ 508 509 } ACPI_BERT_REGION; 510 511 /* Values for BlockStatus flags above */ 512 513 #define ACPI_BERT_UNCORRECTABLE (1) 514 #define ACPI_BERT_CORRECTABLE (1<<1) 515 #define ACPI_BERT_MULTIPLE_UNCORRECTABLE (1<<2) 516 #define ACPI_BERT_MULTIPLE_CORRECTABLE (1<<3) 517 #define ACPI_BERT_ERROR_ENTRY_COUNT (0xFF<<4) /* 8 bits, error count */ 518 519 /* Values for ErrorSeverity above */ 520 521 enum AcpiBertErrorSeverity 522 { 523 ACPI_BERT_ERROR_CORRECTABLE = 0, 524 ACPI_BERT_ERROR_FATAL = 1, 525 ACPI_BERT_ERROR_CORRECTED = 2, 526 ACPI_BERT_ERROR_NONE = 3, 527 ACPI_BERT_ERROR_RESERVED = 4 /* 4 and greater are reserved */ 528 }; 529 530 /* 531 * Note: The generic error data that follows the ErrorSeverity field above 532 * uses the ACPI_HEST_GENERIC_DATA defined under the HEST table below 533 */ 534 535 536 /******************************************************************************* 537 * 538 * BGRT - Boot Graphics Resource Table (ACPI 5.0) 539 * Version 1 540 * 541 ******************************************************************************/ 542 543 typedef struct acpi_table_bgrt 544 { 545 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 546 UINT16 Version; 547 UINT8 Status; 548 UINT8 ImageType; 549 UINT64 ImageAddress; 550 UINT32 ImageOffsetX; 551 UINT32 ImageOffsetY; 552 553 } ACPI_TABLE_BGRT; 554 555 /* Flags for Status field above */ 556 557 #define ACPI_BGRT_DISPLAYED (1) 558 #define ACPI_BGRT_ORIENTATION_OFFSET (3 << 1) 559 560 561 /******************************************************************************* 562 * 563 * BOOT - Simple Boot Flag Table 564 * Version 1 565 * 566 * Conforms to the "Simple Boot Flag Specification", Version 2.1 567 * 568 ******************************************************************************/ 569 570 typedef struct acpi_table_boot 571 { 572 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 573 UINT8 CmosIndex; /* Index in CMOS RAM for the boot register */ 574 UINT8 Reserved[3]; 575 576 } ACPI_TABLE_BOOT; 577 578 579 /******************************************************************************* 580 * 581 * CDAT - Coherent Device Attribute Table 582 * Version 1 583 * 584 * Conforms to the "Coherent Device Attribute Table (CDAT) Specification 585 " (Revision 1.01, October 2020.) 586 * 587 ******************************************************************************/ 588 589 typedef struct acpi_table_cdat 590 { 591 UINT32 Length; /* Length of table in bytes, including this header */ 592 UINT8 Revision; /* ACPI Specification minor version number */ 593 UINT8 Checksum; /* To make sum of entire table == 0 */ 594 UINT8 Reserved[6]; 595 UINT32 Sequence; /* Used to detect runtime CDAT table changes */ 596 597 } ACPI_TABLE_CDAT; 598 599 600 /* CDAT common subtable header */ 601 602 typedef struct acpi_cdat_header 603 { 604 UINT8 Type; 605 UINT8 Reserved; 606 UINT16 Length; 607 608 } ACPI_CDAT_HEADER; 609 610 /* Values for Type field above */ 611 612 enum AcpiCdatType 613 { 614 ACPI_CDAT_TYPE_DSMAS = 0, 615 ACPI_CDAT_TYPE_DSLBIS = 1, 616 ACPI_CDAT_TYPE_DSMSCIS = 2, 617 ACPI_CDAT_TYPE_DSIS = 3, 618 ACPI_CDAT_TYPE_DSEMTS = 4, 619 ACPI_CDAT_TYPE_SSLBIS = 5, 620 ACPI_CDAT_TYPE_RESERVED = 6 /* 6 through 0xFF are reserved */ 621 }; 622 623 624 /* Subtable 0: Device Scoped Memory Affinity Structure (DSMAS) */ 625 626 typedef struct acpi_cdat_dsmas 627 { 628 UINT8 DsmadHandle; 629 UINT8 Flags; 630 UINT16 Reserved; 631 UINT64 DpaBaseAddress; 632 UINT64 DpaLength; 633 634 } ACPI_CDAT_DSMAS; 635 636 /* Flags for subtable above */ 637 638 #define ACPI_CDAT_DSMAS_NON_VOLATILE (1 << 2) 639 #define ACPI_CDAT_DSMAS_SHAREABLE (1 << 3) 640 #define ACPI_CDAT_DSMAS_READ_ONLY (1 << 6) 641 642 643 /* Subtable 1: Device scoped Latency and Bandwidth Information Structure (DSLBIS) */ 644 645 typedef struct acpi_cdat_dslbis 646 { 647 UINT8 Handle; 648 UINT8 Flags; /* If Handle matches a DSMAS handle, the definition of this field matches 649 * Flags field in HMAT System Locality Latency */ 650 UINT8 DataType; 651 UINT8 Reserved; 652 UINT64 EntryBaseUnit; 653 UINT16 Entry[3]; 654 UINT16 Reserved2; 655 656 } ACPI_CDAT_DSLBIS; 657 658 659 /* Subtable 2: Device Scoped Memory Side Cache Information Structure (DSMSCIS) */ 660 661 typedef struct acpi_cdat_dsmscis 662 { 663 UINT8 DsmasHandle; 664 UINT8 Reserved[3]; 665 UINT64 SideCacheSize; 666 UINT32 CacheAttributes; 667 668 } ACPI_CDAT_DSMSCIS; 669 670 671 /* Subtable 3: Device Scoped Initiator Structure (DSIS) */ 672 673 typedef struct acpi_cdat_dsis 674 { 675 UINT8 Flags; 676 UINT8 Handle; 677 UINT16 Reserved; 678 679 } ACPI_CDAT_DSIS; 680 681 /* Flags for above subtable */ 682 683 #define ACPI_CDAT_DSIS_MEM_ATTACHED (1 << 0) 684 685 686 /* Subtable 4: Device Scoped EFI Memory Type Structure (DSEMTS) */ 687 688 typedef struct acpi_cdat_dsemts 689 { 690 UINT8 DsmasHandle; 691 UINT8 MemoryType; 692 UINT16 Reserved; 693 UINT64 DpaOffset; 694 UINT64 RangeLength; 695 696 } ACPI_CDAT_DSEMTS; 697 698 699 /* Subtable 5: Switch Scoped Latency and Bandwidth Information Structure (SSLBIS) */ 700 701 typedef struct acpi_cdat_sslbis 702 { 703 UINT8 DataType; 704 UINT8 Reserved[3]; 705 UINT64 EntryBaseUnit; 706 707 } ACPI_CDAT_SSLBIS; 708 709 710 /* Sub-subtable for above, SslbeEntries field */ 711 712 typedef struct acpi_cdat_sslbe 713 { 714 UINT16 PortxId; 715 UINT16 PortyId; 716 UINT16 LatencyOrBandwidth; 717 UINT16 Reserved; 718 719 } ACPI_CDAT_SSLBE; 720 721 #define ACPI_CDAT_SSLBIS_US_PORT 0x0100 722 #define ACPI_CDAT_SSLBIS_ANY_PORT 0xffff 723 724 /******************************************************************************* 725 * 726 * CEDT - CXL Early Discovery Table 727 * Version 1 728 * 729 * Conforms to the "CXL Early Discovery Table" (CXL 2.0, October 2020) 730 * 731 ******************************************************************************/ 732 733 typedef struct acpi_table_cedt 734 { 735 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 736 737 } ACPI_TABLE_CEDT; 738 739 /* CEDT subtable header (Performance Record Structure) */ 740 741 typedef struct acpi_cedt_header 742 { 743 UINT8 Type; 744 UINT8 Reserved; 745 UINT16 Length; 746 747 } ACPI_CEDT_HEADER; 748 749 /* Values for Type field above */ 750 751 enum AcpiCedtType 752 { 753 ACPI_CEDT_TYPE_CHBS = 0, 754 ACPI_CEDT_TYPE_CFMWS = 1, 755 ACPI_CEDT_TYPE_CXIMS = 2, 756 ACPI_CEDT_TYPE_RDPAS = 3, 757 ACPI_CEDT_TYPE_RESERVED = 4, 758 }; 759 760 /* Values for version field above */ 761 762 #define ACPI_CEDT_CHBS_VERSION_CXL11 (0) 763 #define ACPI_CEDT_CHBS_VERSION_CXL20 (1) 764 765 /* Values for length field above */ 766 767 #define ACPI_CEDT_CHBS_LENGTH_CXL11 (0x2000) 768 #define ACPI_CEDT_CHBS_LENGTH_CXL20 (0x10000) 769 770 /* 771 * CEDT subtables 772 */ 773 774 /* 0: CXL Host Bridge Structure */ 775 776 typedef struct acpi_cedt_chbs 777 { 778 ACPI_CEDT_HEADER Header; 779 UINT32 Uid; 780 UINT32 CxlVersion; 781 UINT32 Reserved; 782 UINT64 Base; 783 UINT64 Length; 784 785 } ACPI_CEDT_CHBS; 786 787 788 /* 1: CXL Fixed Memory Window Structure */ 789 790 typedef struct acpi_cedt_cfmws 791 { 792 ACPI_CEDT_HEADER Header; 793 UINT32 Reserved1; 794 UINT64 BaseHpa; 795 UINT64 WindowSize; 796 UINT8 InterleaveWays; 797 UINT8 InterleaveArithmetic; 798 UINT16 Reserved2; 799 UINT32 Granularity; 800 UINT16 Restrictions; 801 UINT16 QtgId; 802 UINT32 InterleaveTargets[]; 803 804 } ACPI_CEDT_CFMWS; 805 806 typedef struct acpi_cedt_cfmws_target_element 807 { 808 UINT32 InterleaveTarget; 809 810 } ACPI_CEDT_CFMWS_TARGET_ELEMENT; 811 812 /* Values for Interleave Arithmetic field above */ 813 814 #define ACPI_CEDT_CFMWS_ARITHMETIC_MODULO (0) 815 #define ACPI_CEDT_CFMWS_ARITHMETIC_XOR (1) 816 817 /* Values for Restrictions field above */ 818 819 #define ACPI_CEDT_CFMWS_RESTRICT_TYPE2 (1) 820 #define ACPI_CEDT_CFMWS_RESTRICT_TYPE3 (1<<1) 821 #define ACPI_CEDT_CFMWS_RESTRICT_VOLATILE (1<<2) 822 #define ACPI_CEDT_CFMWS_RESTRICT_PMEM (1<<3) 823 #define ACPI_CEDT_CFMWS_RESTRICT_FIXED (1<<4) 824 825 /* 2: CXL XOR Interleave Math Structure */ 826 827 typedef struct acpi_cedt_cxims { 828 ACPI_CEDT_HEADER Header; 829 UINT16 Reserved1; 830 UINT8 Hbig; 831 UINT8 NrXormaps; 832 UINT64 XormapList[]; 833 } ACPI_CEDT_CXIMS; 834 835 typedef struct acpi_cedt_cxims_target_element 836 { 837 UINT64 Xormap; 838 839 } ACPI_CEDT_CXIMS_TARGET_ELEMENT; 840 841 842 /* 3: CXL RCEC Downstream Port Association Structure */ 843 844 struct acpi_cedt_rdpas { 845 ACPI_CEDT_HEADER Header; 846 UINT16 Segment; 847 UINT16 Bdf; 848 UINT8 Protocol; 849 UINT64 Address; 850 }; 851 852 /* Masks for bdf field above */ 853 #define ACPI_CEDT_RDPAS_BUS_MASK 0xff00 854 #define ACPI_CEDT_RDPAS_DEVICE_MASK 0x00f8 855 #define ACPI_CEDT_RDPAS_FUNCTION_MASK 0x0007 856 857 #define ACPI_CEDT_RDPAS_PROTOCOL_IO (0) 858 #define ACPI_CEDT_RDPAS_PROTOCOL_CACHEMEM (1) 859 860 /******************************************************************************* 861 * 862 * CPEP - Corrected Platform Error Polling table (ACPI 4.0) 863 * Version 1 864 * 865 ******************************************************************************/ 866 867 typedef struct acpi_table_cpep 868 { 869 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 870 UINT64 Reserved; 871 872 } ACPI_TABLE_CPEP; 873 874 875 /* Subtable */ 876 877 typedef struct acpi_cpep_polling 878 { 879 ACPI_SUBTABLE_HEADER Header; 880 UINT8 Id; /* Processor ID */ 881 UINT8 Eid; /* Processor EID */ 882 UINT32 Interval; /* Polling interval (msec) */ 883 884 } ACPI_CPEP_POLLING; 885 886 887 /******************************************************************************* 888 * 889 * CSRT - Core System Resource Table 890 * Version 0 891 * 892 * Conforms to the "Core System Resource Table (CSRT)", November 14, 2011 893 * 894 ******************************************************************************/ 895 896 typedef struct acpi_table_csrt 897 { 898 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 899 900 } ACPI_TABLE_CSRT; 901 902 903 /* Resource Group subtable */ 904 905 typedef struct acpi_csrt_group 906 { 907 UINT32 Length; 908 UINT32 VendorId; 909 UINT32 SubvendorId; 910 UINT16 DeviceId; 911 UINT16 SubdeviceId; 912 UINT16 Revision; 913 UINT16 Reserved; 914 UINT32 SharedInfoLength; 915 916 /* Shared data immediately follows (Length = SharedInfoLength) */ 917 918 } ACPI_CSRT_GROUP; 919 920 /* Shared Info subtable */ 921 922 typedef struct acpi_csrt_shared_info 923 { 924 UINT16 MajorVersion; 925 UINT16 MinorVersion; 926 UINT32 MmioBaseLow; 927 UINT32 MmioBaseHigh; 928 UINT32 GsiInterrupt; 929 UINT8 InterruptPolarity; 930 UINT8 InterruptMode; 931 UINT8 NumChannels; 932 UINT8 DmaAddressWidth; 933 UINT16 BaseRequestLine; 934 UINT16 NumHandshakeSignals; 935 UINT32 MaxBlockSize; 936 937 /* Resource descriptors immediately follow (Length = Group Length - SharedInfoLength) */ 938 939 } ACPI_CSRT_SHARED_INFO; 940 941 /* Resource Descriptor subtable */ 942 943 typedef struct acpi_csrt_descriptor 944 { 945 UINT32 Length; 946 UINT16 Type; 947 UINT16 Subtype; 948 UINT32 Uid; 949 950 /* Resource-specific information immediately follows */ 951 952 } ACPI_CSRT_DESCRIPTOR; 953 954 955 /* Resource Types */ 956 957 #define ACPI_CSRT_TYPE_INTERRUPT 0x0001 958 #define ACPI_CSRT_TYPE_TIMER 0x0002 959 #define ACPI_CSRT_TYPE_DMA 0x0003 960 961 /* Resource Subtypes */ 962 963 #define ACPI_CSRT_XRUPT_LINE 0x0000 964 #define ACPI_CSRT_XRUPT_CONTROLLER 0x0001 965 #define ACPI_CSRT_TIMER 0x0000 966 #define ACPI_CSRT_DMA_CHANNEL 0x0000 967 #define ACPI_CSRT_DMA_CONTROLLER 0x0001 968 969 970 /******************************************************************************* 971 * 972 * DBG2 - Debug Port Table 2 973 * Version 0 (Both main table and subtables) 974 * 975 * Conforms to "Microsoft Debug Port Table 2 (DBG2)", September 21, 2020 976 * 977 ******************************************************************************/ 978 979 typedef struct acpi_table_dbg2 980 { 981 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 982 UINT32 InfoOffset; 983 UINT32 InfoCount; 984 985 } ACPI_TABLE_DBG2; 986 987 988 typedef struct acpi_dbg2_header 989 { 990 UINT32 InfoOffset; 991 UINT32 InfoCount; 992 993 } ACPI_DBG2_HEADER; 994 995 996 /* Debug Device Information Subtable */ 997 998 typedef struct acpi_dbg2_device 999 { 1000 UINT8 Revision; 1001 UINT16 Length; 1002 UINT8 RegisterCount; /* Number of BaseAddress registers */ 1003 UINT16 NamepathLength; 1004 UINT16 NamepathOffset; 1005 UINT16 OemDataLength; 1006 UINT16 OemDataOffset; 1007 UINT16 PortType; 1008 UINT16 PortSubtype; 1009 UINT16 Reserved; 1010 UINT16 BaseAddressOffset; 1011 UINT16 AddressSizeOffset; 1012 /* 1013 * Data that follows: 1014 * BaseAddress (required) - Each in 12-byte Generic Address Structure format. 1015 * AddressSize (required) - Array of UINT32 sizes corresponding to each BaseAddress register. 1016 * Namepath (required) - Null terminated string. Single dot if not supported. 1017 * OemData (optional) - Length is OemDataLength. 1018 */ 1019 } ACPI_DBG2_DEVICE; 1020 1021 /* Types for PortType field above */ 1022 1023 #define ACPI_DBG2_SERIAL_PORT 0x8000 1024 #define ACPI_DBG2_1394_PORT 0x8001 1025 #define ACPI_DBG2_USB_PORT 0x8002 1026 #define ACPI_DBG2_NET_PORT 0x8003 1027 1028 /* Subtypes for PortSubtype field above */ 1029 1030 #define ACPI_DBG2_16550_COMPATIBLE 0x0000 1031 #define ACPI_DBG2_16550_SUBSET 0x0001 1032 #define ACPI_DBG2_MAX311XE_SPI 0x0002 1033 #define ACPI_DBG2_ARM_PL011 0x0003 1034 #define ACPI_DBG2_MSM8X60 0x0004 1035 #define ACPI_DBG2_16550_NVIDIA 0x0005 1036 #define ACPI_DBG2_TI_OMAP 0x0006 1037 #define ACPI_DBG2_APM88XXXX 0x0008 1038 #define ACPI_DBG2_MSM8974 0x0009 1039 #define ACPI_DBG2_SAM5250 0x000A 1040 #define ACPI_DBG2_INTEL_USIF 0x000B 1041 #define ACPI_DBG2_IMX6 0x000C 1042 #define ACPI_DBG2_ARM_SBSA_32BIT 0x000D 1043 #define ACPI_DBG2_ARM_SBSA_GENERIC 0x000E 1044 #define ACPI_DBG2_ARM_DCC 0x000F 1045 #define ACPI_DBG2_BCM2835 0x0010 1046 #define ACPI_DBG2_SDM845_1_8432MHZ 0x0011 1047 #define ACPI_DBG2_16550_WITH_GAS 0x0012 1048 #define ACPI_DBG2_SDM845_7_372MHZ 0x0013 1049 #define ACPI_DBG2_INTEL_LPSS 0x0014 1050 #define ACPI_DBG2_RISCV_SBI_CON 0x0015 1051 1052 #define ACPI_DBG2_1394_STANDARD 0x0000 1053 1054 #define ACPI_DBG2_USB_XHCI 0x0000 1055 #define ACPI_DBG2_USB_EHCI 0x0001 1056 1057 1058 /******************************************************************************* 1059 * 1060 * DBGP - Debug Port table 1061 * Version 1 1062 * 1063 * Conforms to the "Debug Port Specification", Version 1.00, 2/9/2000 1064 * 1065 ******************************************************************************/ 1066 1067 typedef struct acpi_table_dbgp 1068 { 1069 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1070 UINT8 Type; /* 0=full 16550, 1=subset of 16550 */ 1071 UINT8 Reserved[3]; 1072 ACPI_GENERIC_ADDRESS DebugPort; 1073 1074 } ACPI_TABLE_DBGP; 1075 1076 1077 /******************************************************************************* 1078 * 1079 * DMAR - DMA Remapping table 1080 * Version 1 1081 * 1082 * Conforms to "Intel Virtualization Technology for Directed I/O", 1083 * Version 2.3, October 2014 1084 * 1085 ******************************************************************************/ 1086 1087 typedef struct acpi_table_dmar 1088 { 1089 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1090 UINT8 Width; /* Host Address Width */ 1091 UINT8 Flags; 1092 UINT8 Reserved[10]; 1093 1094 } ACPI_TABLE_DMAR; 1095 1096 /* Masks for Flags field above */ 1097 1098 #define ACPI_DMAR_INTR_REMAP (1) 1099 #define ACPI_DMAR_X2APIC_OPT_OUT (1<<1) 1100 #define ACPI_DMAR_X2APIC_MODE (1<<2) 1101 1102 1103 /* DMAR subtable header */ 1104 1105 typedef struct acpi_dmar_header 1106 { 1107 UINT16 Type; 1108 UINT16 Length; 1109 1110 } ACPI_DMAR_HEADER; 1111 1112 /* Values for subtable type in ACPI_DMAR_HEADER */ 1113 1114 enum AcpiDmarType 1115 { 1116 ACPI_DMAR_TYPE_HARDWARE_UNIT = 0, 1117 ACPI_DMAR_TYPE_RESERVED_MEMORY = 1, 1118 ACPI_DMAR_TYPE_ROOT_ATS = 2, 1119 ACPI_DMAR_TYPE_HARDWARE_AFFINITY = 3, 1120 ACPI_DMAR_TYPE_NAMESPACE = 4, 1121 ACPI_DMAR_TYPE_SATC = 5, 1122 ACPI_DMAR_TYPE_RESERVED = 6 /* 6 and greater are reserved */ 1123 }; 1124 1125 1126 /* DMAR Device Scope structure */ 1127 1128 typedef struct acpi_dmar_device_scope 1129 { 1130 UINT8 EntryType; 1131 UINT8 Length; 1132 UINT16 Reserved; 1133 UINT8 EnumerationId; 1134 UINT8 Bus; 1135 1136 } ACPI_DMAR_DEVICE_SCOPE; 1137 1138 /* Values for EntryType in ACPI_DMAR_DEVICE_SCOPE - device types */ 1139 1140 enum AcpiDmarScopeType 1141 { 1142 ACPI_DMAR_SCOPE_TYPE_NOT_USED = 0, 1143 ACPI_DMAR_SCOPE_TYPE_ENDPOINT = 1, 1144 ACPI_DMAR_SCOPE_TYPE_BRIDGE = 2, 1145 ACPI_DMAR_SCOPE_TYPE_IOAPIC = 3, 1146 ACPI_DMAR_SCOPE_TYPE_HPET = 4, 1147 ACPI_DMAR_SCOPE_TYPE_NAMESPACE = 5, 1148 ACPI_DMAR_SCOPE_TYPE_RESERVED = 6 /* 6 and greater are reserved */ 1149 }; 1150 1151 typedef struct acpi_dmar_pci_path 1152 { 1153 UINT8 Device; 1154 UINT8 Function; 1155 1156 } ACPI_DMAR_PCI_PATH; 1157 1158 1159 /* 1160 * DMAR Subtables, correspond to Type in ACPI_DMAR_HEADER 1161 */ 1162 1163 /* 0: Hardware Unit Definition */ 1164 1165 typedef struct acpi_dmar_hardware_unit 1166 { 1167 ACPI_DMAR_HEADER Header; 1168 UINT8 Flags; 1169 UINT8 Reserved; 1170 UINT16 Segment; 1171 UINT64 Address; /* Register Base Address */ 1172 1173 } ACPI_DMAR_HARDWARE_UNIT; 1174 1175 /* Masks for Flags field above */ 1176 1177 #define ACPI_DMAR_INCLUDE_ALL (1) 1178 1179 1180 /* 1: Reserved Memory Definition */ 1181 1182 typedef struct acpi_dmar_reserved_memory 1183 { 1184 ACPI_DMAR_HEADER Header; 1185 UINT16 Reserved; 1186 UINT16 Segment; 1187 UINT64 BaseAddress; /* 4K aligned base address */ 1188 UINT64 EndAddress; /* 4K aligned limit address */ 1189 1190 } ACPI_DMAR_RESERVED_MEMORY; 1191 1192 /* Masks for Flags field above */ 1193 1194 #define ACPI_DMAR_ALLOW_ALL (1) 1195 1196 1197 /* 2: Root Port ATS Capability Reporting Structure */ 1198 1199 typedef struct acpi_dmar_atsr 1200 { 1201 ACPI_DMAR_HEADER Header; 1202 UINT8 Flags; 1203 UINT8 Reserved; 1204 UINT16 Segment; 1205 1206 } ACPI_DMAR_ATSR; 1207 1208 /* Masks for Flags field above */ 1209 1210 #define ACPI_DMAR_ALL_PORTS (1) 1211 1212 1213 /* 3: Remapping Hardware Static Affinity Structure */ 1214 1215 typedef struct acpi_dmar_rhsa 1216 { 1217 ACPI_DMAR_HEADER Header; 1218 UINT32 Reserved; 1219 UINT64 BaseAddress; 1220 UINT32 ProximityDomain; 1221 1222 } ACPI_DMAR_RHSA; 1223 1224 1225 /* 4: ACPI Namespace Device Declaration Structure */ 1226 1227 typedef struct acpi_dmar_andd 1228 { 1229 ACPI_DMAR_HEADER Header; 1230 UINT8 Reserved[3]; 1231 UINT8 DeviceNumber; 1232 union { 1233 char __pad; 1234 ACPI_FLEX_ARRAY(char, DeviceName); 1235 }; 1236 1237 } ACPI_DMAR_ANDD; 1238 1239 1240 /* 5: SoC Integrated Address Translation Cache (SATC) */ 1241 1242 typedef struct acpi_dmar_satc 1243 { 1244 ACPI_DMAR_HEADER Header; 1245 UINT8 Flags; 1246 UINT8 Reserved; 1247 UINT16 Segment; 1248 1249 } ACPI_DMAR_SATC 1250 1251 ; 1252 /******************************************************************************* 1253 * 1254 * DRTM - Dynamic Root of Trust for Measurement table 1255 * Conforms to "TCG D-RTM Architecture" June 17 2013, Version 1.0.0 1256 * Table version 1 1257 * 1258 ******************************************************************************/ 1259 1260 typedef struct acpi_table_drtm 1261 { 1262 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1263 UINT64 EntryBaseAddress; 1264 UINT64 EntryLength; 1265 UINT32 EntryAddress32; 1266 UINT64 EntryAddress64; 1267 UINT64 ExitAddress; 1268 UINT64 LogAreaAddress; 1269 UINT32 LogAreaLength; 1270 UINT64 ArchDependentAddress; 1271 UINT32 Flags; 1272 1273 } ACPI_TABLE_DRTM; 1274 1275 /* Flag Definitions for above */ 1276 1277 #define ACPI_DRTM_ACCESS_ALLOWED (1) 1278 #define ACPI_DRTM_ENABLE_GAP_CODE (1<<1) 1279 #define ACPI_DRTM_INCOMPLETE_MEASUREMENTS (1<<2) 1280 #define ACPI_DRTM_AUTHORITY_ORDER (1<<3) 1281 1282 1283 /* 1) Validated Tables List (64-bit addresses) */ 1284 1285 typedef struct acpi_drtm_vtable_list 1286 { 1287 UINT32 ValidatedTableCount; 1288 UINT64 ValidatedTables[]; 1289 1290 } ACPI_DRTM_VTABLE_LIST; 1291 1292 /* 2) Resources List (of Resource Descriptors) */ 1293 1294 /* Resource Descriptor */ 1295 1296 typedef struct acpi_drtm_resource 1297 { 1298 UINT8 Size[7]; 1299 UINT8 Type; 1300 UINT64 Address; 1301 1302 } ACPI_DRTM_RESOURCE; 1303 1304 typedef struct acpi_drtm_resource_list 1305 { 1306 UINT32 ResourceCount; 1307 ACPI_DRTM_RESOURCE Resources[]; 1308 1309 } ACPI_DRTM_RESOURCE_LIST; 1310 1311 /* 3) Platform-specific Identifiers List */ 1312 1313 typedef struct acpi_drtm_dps_id 1314 { 1315 UINT32 DpsIdLength; 1316 UINT8 DpsId[16]; 1317 1318 } ACPI_DRTM_DPS_ID; 1319 1320 1321 /******************************************************************************* 1322 * 1323 * ECDT - Embedded Controller Boot Resources Table 1324 * Version 1 1325 * 1326 ******************************************************************************/ 1327 1328 typedef struct acpi_table_ecdt 1329 { 1330 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1331 ACPI_GENERIC_ADDRESS Control; /* Address of EC command/status register */ 1332 ACPI_GENERIC_ADDRESS Data; /* Address of EC data register */ 1333 UINT32 Uid; /* Unique ID - must be same as the EC _UID method */ 1334 UINT8 Gpe; /* The GPE for the EC */ 1335 UINT8 Id[]; /* Full namepath of the EC in the ACPI namespace */ 1336 1337 } ACPI_TABLE_ECDT; 1338 1339 1340 /******************************************************************************* 1341 * 1342 * EINJ - Error Injection Table (ACPI 4.0) 1343 * Version 1 1344 * 1345 ******************************************************************************/ 1346 1347 typedef struct acpi_table_einj 1348 { 1349 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1350 UINT32 HeaderLength; 1351 UINT8 Flags; 1352 UINT8 Reserved[3]; 1353 UINT32 Entries; 1354 1355 } ACPI_TABLE_EINJ; 1356 1357 1358 /* EINJ Injection Instruction Entries (actions) */ 1359 1360 typedef struct acpi_einj_entry 1361 { 1362 ACPI_WHEA_HEADER WheaHeader; /* Common header for WHEA tables */ 1363 1364 } ACPI_EINJ_ENTRY; 1365 1366 /* Masks for Flags field above */ 1367 1368 #define ACPI_EINJ_PRESERVE (1) 1369 1370 /* Values for Action field above */ 1371 1372 enum AcpiEinjActions 1373 { 1374 ACPI_EINJ_BEGIN_OPERATION = 0x0, 1375 ACPI_EINJ_GET_TRIGGER_TABLE = 0x1, 1376 ACPI_EINJ_SET_ERROR_TYPE = 0x2, 1377 ACPI_EINJ_GET_ERROR_TYPE = 0x3, 1378 ACPI_EINJ_END_OPERATION = 0x4, 1379 ACPI_EINJ_EXECUTE_OPERATION = 0x5, 1380 ACPI_EINJ_CHECK_BUSY_STATUS = 0x6, 1381 ACPI_EINJ_GET_COMMAND_STATUS = 0x7, 1382 ACPI_EINJ_SET_ERROR_TYPE_WITH_ADDRESS = 0x8, 1383 ACPI_EINJ_GET_EXECUTE_TIMINGS = 0x9, 1384 ACPI_EINJV2_GET_ERROR_TYPE = 0x11, 1385 ACPI_EINJ_ACTION_RESERVED = 0x12, /* 0x12 and greater are reserved */ 1386 ACPI_EINJ_TRIGGER_ERROR = 0xFF /* Except for this value */ 1387 }; 1388 1389 /* Values for Instruction field above */ 1390 1391 enum AcpiEinjInstructions 1392 { 1393 ACPI_EINJ_READ_REGISTER = 0, 1394 ACPI_EINJ_READ_REGISTER_VALUE = 1, 1395 ACPI_EINJ_WRITE_REGISTER = 2, 1396 ACPI_EINJ_WRITE_REGISTER_VALUE = 3, 1397 ACPI_EINJ_NOOP = 4, 1398 ACPI_EINJ_FLUSH_CACHELINE = 5, 1399 ACPI_EINJ_INSTRUCTION_RESERVED = 6 /* 6 and greater are reserved */ 1400 }; 1401 1402 typedef struct acpi_einj_error_type_with_addr 1403 { 1404 UINT32 ErrorType; 1405 UINT32 VendorStructOffset; 1406 UINT32 Flags; 1407 UINT32 ApicId; 1408 UINT64 Address; 1409 UINT64 Range; 1410 UINT32 PcieId; 1411 1412 } ACPI_EINJ_ERROR_TYPE_WITH_ADDR; 1413 1414 typedef struct acpi_einj_vendor 1415 { 1416 UINT32 Length; 1417 UINT32 PcieId; 1418 UINT16 VendorId; 1419 UINT16 DeviceId; 1420 UINT8 RevisionId; 1421 UINT8 Reserved[3]; 1422 1423 } ACPI_EINJ_VENDOR; 1424 1425 1426 /* EINJ Trigger Error Action Table */ 1427 1428 typedef struct acpi_einj_trigger 1429 { 1430 UINT32 HeaderSize; 1431 UINT32 Revision; 1432 UINT32 TableSize; 1433 UINT32 EntryCount; 1434 1435 } ACPI_EINJ_TRIGGER; 1436 1437 /* Command status return values */ 1438 1439 enum AcpiEinjCommandStatus 1440 { 1441 ACPI_EINJ_SUCCESS = 0, 1442 ACPI_EINJ_FAILURE = 1, 1443 ACPI_EINJ_INVALID_ACCESS = 2, 1444 ACPI_EINJ_STATUS_RESERVED = 3 /* 3 and greater are reserved */ 1445 }; 1446 1447 1448 /* Error types returned from ACPI_EINJ_GET_ERROR_TYPE (bitfield) */ 1449 1450 #define ACPI_EINJ_PROCESSOR_CORRECTABLE (1) 1451 #define ACPI_EINJ_PROCESSOR_UNCORRECTABLE (1<<1) 1452 #define ACPI_EINJ_PROCESSOR_FATAL (1<<2) 1453 #define ACPI_EINJ_MEMORY_CORRECTABLE (1<<3) 1454 #define ACPI_EINJ_MEMORY_UNCORRECTABLE (1<<4) 1455 #define ACPI_EINJ_MEMORY_FATAL (1<<5) 1456 #define ACPI_EINJ_PCIX_CORRECTABLE (1<<6) 1457 #define ACPI_EINJ_PCIX_UNCORRECTABLE (1<<7) 1458 #define ACPI_EINJ_PCIX_FATAL (1<<8) 1459 #define ACPI_EINJ_PLATFORM_CORRECTABLE (1<<9) 1460 #define ACPI_EINJ_PLATFORM_UNCORRECTABLE (1<<10) 1461 #define ACPI_EINJ_PLATFORM_FATAL (1<<11) 1462 #define ACPI_EINJ_CXL_CACHE_CORRECTABLE (1<<12) 1463 #define ACPI_EINJ_CXL_CACHE_UNCORRECTABLE (1<<13) 1464 #define ACPI_EINJ_CXL_CACHE_FATAL (1<<14) 1465 #define ACPI_EINJ_CXL_MEM_CORRECTABLE (1<<15) 1466 #define ACPI_EINJ_CXL_MEM_UNCORRECTABLE (1<<16) 1467 #define ACPI_EINJ_CXL_MEM_FATAL (1<<17) 1468 #define ACPI_EINJ_VENDOR_DEFINED (1<<31) 1469 1470 1471 /******************************************************************************* 1472 * 1473 * ERST - Error Record Serialization Table (ACPI 4.0) 1474 * Version 1 1475 * 1476 ******************************************************************************/ 1477 1478 typedef struct acpi_table_erst 1479 { 1480 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1481 UINT32 HeaderLength; 1482 UINT32 Reserved; 1483 UINT32 Entries; 1484 1485 } ACPI_TABLE_ERST; 1486 1487 1488 /* ERST Serialization Entries (actions) */ 1489 1490 typedef struct acpi_erst_entry 1491 { 1492 ACPI_WHEA_HEADER WheaHeader; /* Common header for WHEA tables */ 1493 1494 } ACPI_ERST_ENTRY; 1495 1496 /* Masks for Flags field above */ 1497 1498 #define ACPI_ERST_PRESERVE (1) 1499 1500 /* Values for Action field above */ 1501 1502 enum AcpiErstActions 1503 { 1504 ACPI_ERST_BEGIN_WRITE = 0, 1505 ACPI_ERST_BEGIN_READ = 1, 1506 ACPI_ERST_BEGIN_CLEAR = 2, 1507 ACPI_ERST_END = 3, 1508 ACPI_ERST_SET_RECORD_OFFSET = 4, 1509 ACPI_ERST_EXECUTE_OPERATION = 5, 1510 ACPI_ERST_CHECK_BUSY_STATUS = 6, 1511 ACPI_ERST_GET_COMMAND_STATUS = 7, 1512 ACPI_ERST_GET_RECORD_ID = 8, 1513 ACPI_ERST_SET_RECORD_ID = 9, 1514 ACPI_ERST_GET_RECORD_COUNT = 10, 1515 ACPI_ERST_BEGIN_DUMMY_WRIITE = 11, 1516 ACPI_ERST_NOT_USED = 12, 1517 ACPI_ERST_GET_ERROR_RANGE = 13, 1518 ACPI_ERST_GET_ERROR_LENGTH = 14, 1519 ACPI_ERST_GET_ERROR_ATTRIBUTES = 15, 1520 ACPI_ERST_EXECUTE_TIMINGS = 16, 1521 ACPI_ERST_ACTION_RESERVED = 17 /* 17 and greater are reserved */ 1522 }; 1523 1524 /* Values for Instruction field above */ 1525 1526 enum AcpiErstInstructions 1527 { 1528 ACPI_ERST_READ_REGISTER = 0, 1529 ACPI_ERST_READ_REGISTER_VALUE = 1, 1530 ACPI_ERST_WRITE_REGISTER = 2, 1531 ACPI_ERST_WRITE_REGISTER_VALUE = 3, 1532 ACPI_ERST_NOOP = 4, 1533 ACPI_ERST_LOAD_VAR1 = 5, 1534 ACPI_ERST_LOAD_VAR2 = 6, 1535 ACPI_ERST_STORE_VAR1 = 7, 1536 ACPI_ERST_ADD = 8, 1537 ACPI_ERST_SUBTRACT = 9, 1538 ACPI_ERST_ADD_VALUE = 10, 1539 ACPI_ERST_SUBTRACT_VALUE = 11, 1540 ACPI_ERST_STALL = 12, 1541 ACPI_ERST_STALL_WHILE_TRUE = 13, 1542 ACPI_ERST_SKIP_NEXT_IF_TRUE = 14, 1543 ACPI_ERST_GOTO = 15, 1544 ACPI_ERST_SET_SRC_ADDRESS_BASE = 16, 1545 ACPI_ERST_SET_DST_ADDRESS_BASE = 17, 1546 ACPI_ERST_MOVE_DATA = 18, 1547 ACPI_ERST_INSTRUCTION_RESERVED = 19 /* 19 and greater are reserved */ 1548 }; 1549 1550 /* Command status return values */ 1551 1552 enum AcpiErstCommandStatus 1553 { 1554 ACPI_ERST_SUCCESS = 0, 1555 ACPI_ERST_NO_SPACE = 1, 1556 ACPI_ERST_NOT_AVAILABLE = 2, 1557 ACPI_ERST_FAILURE = 3, 1558 ACPI_ERST_RECORD_EMPTY = 4, 1559 ACPI_ERST_NOT_FOUND = 5, 1560 ACPI_ERST_STATUS_RESERVED = 6 /* 6 and greater are reserved */ 1561 }; 1562 1563 1564 /* Error Record Serialization Information */ 1565 1566 typedef struct acpi_erst_info 1567 { 1568 UINT16 Signature; /* Should be "ER" */ 1569 UINT8 Data[48]; 1570 1571 } ACPI_ERST_INFO; 1572 1573 1574 /******************************************************************************* 1575 * 1576 * FPDT - Firmware Performance Data Table (ACPI 5.0) 1577 * Version 1 1578 * 1579 ******************************************************************************/ 1580 1581 typedef struct acpi_table_fpdt 1582 { 1583 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1584 1585 } ACPI_TABLE_FPDT; 1586 1587 1588 /* FPDT subtable header (Performance Record Structure) */ 1589 1590 typedef struct acpi_fpdt_header 1591 { 1592 UINT16 Type; 1593 UINT8 Length; 1594 UINT8 Revision; 1595 1596 } ACPI_FPDT_HEADER; 1597 1598 /* Values for Type field above */ 1599 1600 enum AcpiFpdtType 1601 { 1602 ACPI_FPDT_TYPE_BOOT = 0, 1603 ACPI_FPDT_TYPE_S3PERF = 1 1604 }; 1605 1606 1607 /* 1608 * FPDT subtables 1609 */ 1610 1611 /* 0: Firmware Basic Boot Performance Record */ 1612 1613 typedef struct acpi_fpdt_boot_pointer 1614 { 1615 ACPI_FPDT_HEADER Header; 1616 UINT8 Reserved[4]; 1617 UINT64 Address; 1618 1619 } ACPI_FPDT_BOOT_POINTER; 1620 1621 1622 /* 1: S3 Performance Table Pointer Record */ 1623 1624 typedef struct acpi_fpdt_s3pt_pointer 1625 { 1626 ACPI_FPDT_HEADER Header; 1627 UINT8 Reserved[4]; 1628 UINT64 Address; 1629 1630 } ACPI_FPDT_S3PT_POINTER; 1631 1632 1633 /* 1634 * S3PT - S3 Performance Table. This table is pointed to by the 1635 * S3 Pointer Record above. 1636 */ 1637 typedef struct acpi_table_s3pt 1638 { 1639 UINT8 Signature[4]; /* "S3PT" */ 1640 UINT32 Length; 1641 1642 } ACPI_TABLE_S3PT; 1643 1644 1645 /* 1646 * S3PT Subtables (Not part of the actual FPDT) 1647 */ 1648 1649 /* Values for Type field in S3PT header */ 1650 1651 enum AcpiS3ptType 1652 { 1653 ACPI_S3PT_TYPE_RESUME = 0, 1654 ACPI_S3PT_TYPE_SUSPEND = 1, 1655 ACPI_FPDT_BOOT_PERFORMANCE = 2 1656 }; 1657 1658 typedef struct acpi_s3pt_resume 1659 { 1660 ACPI_FPDT_HEADER Header; 1661 UINT32 ResumeCount; 1662 UINT64 FullResume; 1663 UINT64 AverageResume; 1664 1665 } ACPI_S3PT_RESUME; 1666 1667 typedef struct acpi_s3pt_suspend 1668 { 1669 ACPI_FPDT_HEADER Header; 1670 UINT64 SuspendStart; 1671 UINT64 SuspendEnd; 1672 1673 } ACPI_S3PT_SUSPEND; 1674 1675 1676 /* 1677 * FPDT Boot Performance Record (Not part of the actual FPDT) 1678 */ 1679 typedef struct acpi_fpdt_boot 1680 { 1681 ACPI_FPDT_HEADER Header; 1682 UINT8 Reserved[4]; 1683 UINT64 ResetEnd; 1684 UINT64 LoadStart; 1685 UINT64 StartupStart; 1686 UINT64 ExitServicesEntry; 1687 UINT64 ExitServicesExit; 1688 1689 } ACPI_FPDT_BOOT; 1690 1691 1692 /******************************************************************************* 1693 * 1694 * GTDT - Generic Timer Description Table (ACPI 5.1) 1695 * Version 2 1696 * 1697 ******************************************************************************/ 1698 1699 typedef struct acpi_table_gtdt 1700 { 1701 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1702 UINT64 CounterBlockAddresss; 1703 UINT32 Reserved; 1704 UINT32 SecureEl1Interrupt; 1705 UINT32 SecureEl1Flags; 1706 UINT32 NonSecureEl1Interrupt; 1707 UINT32 NonSecureEl1Flags; 1708 UINT32 VirtualTimerInterrupt; 1709 UINT32 VirtualTimerFlags; 1710 UINT32 NonSecureEl2Interrupt; 1711 UINT32 NonSecureEl2Flags; 1712 UINT64 CounterReadBlockAddress; 1713 UINT32 PlatformTimerCount; 1714 UINT32 PlatformTimerOffset; 1715 1716 } ACPI_TABLE_GTDT; 1717 1718 /* Flag Definitions: Timer Block Physical Timers and Virtual timers */ 1719 1720 #define ACPI_GTDT_INTERRUPT_MODE (1) 1721 #define ACPI_GTDT_INTERRUPT_POLARITY (1<<1) 1722 #define ACPI_GTDT_ALWAYS_ON (1<<2) 1723 1724 typedef struct acpi_gtdt_el2 1725 { 1726 UINT32 VirtualEL2TimerGsiv; 1727 UINT32 VirtualEL2TimerFlags; 1728 } ACPI_GTDT_EL2; 1729 1730 1731 /* Common GTDT subtable header */ 1732 1733 typedef struct acpi_gtdt_header 1734 { 1735 UINT8 Type; 1736 UINT16 Length; 1737 1738 } ACPI_GTDT_HEADER; 1739 1740 /* Values for GTDT subtable type above */ 1741 1742 enum AcpiGtdtType 1743 { 1744 ACPI_GTDT_TYPE_TIMER_BLOCK = 0, 1745 ACPI_GTDT_TYPE_WATCHDOG = 1, 1746 ACPI_GTDT_TYPE_RESERVED = 2 /* 2 and greater are reserved */ 1747 }; 1748 1749 1750 /* GTDT Subtables, correspond to Type in acpi_gtdt_header */ 1751 1752 /* 0: Generic Timer Block */ 1753 1754 typedef struct acpi_gtdt_timer_block 1755 { 1756 ACPI_GTDT_HEADER Header; 1757 UINT8 Reserved; 1758 UINT64 BlockAddress; 1759 UINT32 TimerCount; 1760 UINT32 TimerOffset; 1761 1762 } ACPI_GTDT_TIMER_BLOCK; 1763 1764 /* Timer Sub-Structure, one per timer */ 1765 1766 typedef struct acpi_gtdt_timer_entry 1767 { 1768 UINT8 FrameNumber; 1769 UINT8 Reserved[3]; 1770 UINT64 BaseAddress; 1771 UINT64 El0BaseAddress; 1772 UINT32 TimerInterrupt; 1773 UINT32 TimerFlags; 1774 UINT32 VirtualTimerInterrupt; 1775 UINT32 VirtualTimerFlags; 1776 UINT32 CommonFlags; 1777 1778 } ACPI_GTDT_TIMER_ENTRY; 1779 1780 /* Flag Definitions: TimerFlags and VirtualTimerFlags above */ 1781 1782 #define ACPI_GTDT_GT_IRQ_MODE (1) 1783 #define ACPI_GTDT_GT_IRQ_POLARITY (1<<1) 1784 1785 /* Flag Definitions: CommonFlags above */ 1786 1787 #define ACPI_GTDT_GT_IS_SECURE_TIMER (1) 1788 #define ACPI_GTDT_GT_ALWAYS_ON (1<<1) 1789 1790 1791 /* 1: SBSA Generic Watchdog Structure */ 1792 1793 typedef struct acpi_gtdt_watchdog 1794 { 1795 ACPI_GTDT_HEADER Header; 1796 UINT8 Reserved; 1797 UINT64 RefreshFrameAddress; 1798 UINT64 ControlFrameAddress; 1799 UINT32 TimerInterrupt; 1800 UINT32 TimerFlags; 1801 1802 } ACPI_GTDT_WATCHDOG; 1803 1804 /* Flag Definitions: TimerFlags above */ 1805 1806 #define ACPI_GTDT_WATCHDOG_IRQ_MODE (1) 1807 #define ACPI_GTDT_WATCHDOG_IRQ_POLARITY (1<<1) 1808 #define ACPI_GTDT_WATCHDOG_SECURE (1<<2) 1809 1810 1811 /******************************************************************************* 1812 * 1813 * HEST - Hardware Error Source Table (ACPI 4.0) 1814 * Version 1 1815 * 1816 ******************************************************************************/ 1817 1818 typedef struct acpi_table_hest 1819 { 1820 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1821 UINT32 ErrorSourceCount; 1822 1823 } ACPI_TABLE_HEST; 1824 1825 1826 /* HEST subtable header */ 1827 1828 typedef struct acpi_hest_header 1829 { 1830 UINT16 Type; 1831 UINT16 SourceId; 1832 1833 } ACPI_HEST_HEADER; 1834 1835 1836 /* Values for Type field above for subtables */ 1837 1838 enum AcpiHestTypes 1839 { 1840 ACPI_HEST_TYPE_IA32_CHECK = 0, 1841 ACPI_HEST_TYPE_IA32_CORRECTED_CHECK = 1, 1842 ACPI_HEST_TYPE_IA32_NMI = 2, 1843 ACPI_HEST_TYPE_NOT_USED3 = 3, 1844 ACPI_HEST_TYPE_NOT_USED4 = 4, 1845 ACPI_HEST_TYPE_NOT_USED5 = 5, 1846 ACPI_HEST_TYPE_AER_ROOT_PORT = 6, 1847 ACPI_HEST_TYPE_AER_ENDPOINT = 7, 1848 ACPI_HEST_TYPE_AER_BRIDGE = 8, 1849 ACPI_HEST_TYPE_GENERIC_ERROR = 9, 1850 ACPI_HEST_TYPE_GENERIC_ERROR_V2 = 10, 1851 ACPI_HEST_TYPE_IA32_DEFERRED_CHECK = 11, 1852 ACPI_HEST_TYPE_RESERVED = 12 /* 12 and greater are reserved */ 1853 }; 1854 1855 1856 /* 1857 * HEST substructures contained in subtables 1858 */ 1859 1860 /* 1861 * IA32 Error Bank(s) - Follows the ACPI_HEST_IA_MACHINE_CHECK and 1862 * ACPI_HEST_IA_CORRECTED structures. 1863 */ 1864 typedef struct acpi_hest_ia_error_bank 1865 { 1866 UINT8 BankNumber; 1867 UINT8 ClearStatusOnInit; 1868 UINT8 StatusFormat; 1869 UINT8 Reserved; 1870 UINT32 ControlRegister; 1871 UINT64 ControlData; 1872 UINT32 StatusRegister; 1873 UINT32 AddressRegister; 1874 UINT32 MiscRegister; 1875 1876 } ACPI_HEST_IA_ERROR_BANK; 1877 1878 1879 /* Common HEST sub-structure for PCI/AER structures below (6,7,8) */ 1880 1881 typedef struct acpi_hest_aer_common 1882 { 1883 UINT16 Reserved1; 1884 UINT8 Flags; 1885 UINT8 Enabled; 1886 UINT32 RecordsToPreallocate; 1887 UINT32 MaxSectionsPerRecord; 1888 UINT32 Bus; /* Bus and Segment numbers */ 1889 UINT16 Device; 1890 UINT16 Function; 1891 UINT16 DeviceControl; 1892 UINT16 Reserved2; 1893 UINT32 UncorrectableMask; 1894 UINT32 UncorrectableSeverity; 1895 UINT32 CorrectableMask; 1896 UINT32 AdvancedCapabilities; 1897 1898 } ACPI_HEST_AER_COMMON; 1899 1900 /* Masks for HEST Flags fields */ 1901 1902 #define ACPI_HEST_FIRMWARE_FIRST (1) 1903 #define ACPI_HEST_GLOBAL (1<<1) 1904 #define ACPI_HEST_GHES_ASSIST (1<<2) 1905 1906 /* 1907 * Macros to access the bus/segment numbers in Bus field above: 1908 * Bus number is encoded in bits 7:0 1909 * Segment number is encoded in bits 23:8 1910 */ 1911 #define ACPI_HEST_BUS(Bus) ((Bus) & 0xFF) 1912 #define ACPI_HEST_SEGMENT(Bus) (((Bus) >> 8) & 0xFFFF) 1913 1914 1915 /* Hardware Error Notification */ 1916 1917 typedef struct acpi_hest_notify 1918 { 1919 UINT8 Type; 1920 UINT8 Length; 1921 UINT16 ConfigWriteEnable; 1922 UINT32 PollInterval; 1923 UINT32 Vector; 1924 UINT32 PollingThresholdValue; 1925 UINT32 PollingThresholdWindow; 1926 UINT32 ErrorThresholdValue; 1927 UINT32 ErrorThresholdWindow; 1928 1929 } ACPI_HEST_NOTIFY; 1930 1931 /* Values for Notify Type field above */ 1932 1933 enum AcpiHestNotifyTypes 1934 { 1935 ACPI_HEST_NOTIFY_POLLED = 0, 1936 ACPI_HEST_NOTIFY_EXTERNAL = 1, 1937 ACPI_HEST_NOTIFY_LOCAL = 2, 1938 ACPI_HEST_NOTIFY_SCI = 3, 1939 ACPI_HEST_NOTIFY_NMI = 4, 1940 ACPI_HEST_NOTIFY_CMCI = 5, /* ACPI 5.0 */ 1941 ACPI_HEST_NOTIFY_MCE = 6, /* ACPI 5.0 */ 1942 ACPI_HEST_NOTIFY_GPIO = 7, /* ACPI 6.0 */ 1943 ACPI_HEST_NOTIFY_SEA = 8, /* ACPI 6.1 */ 1944 ACPI_HEST_NOTIFY_SEI = 9, /* ACPI 6.1 */ 1945 ACPI_HEST_NOTIFY_GSIV = 10, /* ACPI 6.1 */ 1946 ACPI_HEST_NOTIFY_SOFTWARE_DELEGATED = 11, /* ACPI 6.2 */ 1947 ACPI_HEST_NOTIFY_RESERVED = 12 /* 12 and greater are reserved */ 1948 }; 1949 1950 /* Values for ConfigWriteEnable bitfield above */ 1951 1952 #define ACPI_HEST_TYPE (1) 1953 #define ACPI_HEST_POLL_INTERVAL (1<<1) 1954 #define ACPI_HEST_POLL_THRESHOLD_VALUE (1<<2) 1955 #define ACPI_HEST_POLL_THRESHOLD_WINDOW (1<<3) 1956 #define ACPI_HEST_ERR_THRESHOLD_VALUE (1<<4) 1957 #define ACPI_HEST_ERR_THRESHOLD_WINDOW (1<<5) 1958 1959 1960 /* 1961 * HEST subtables 1962 */ 1963 1964 /* 0: IA32 Machine Check Exception */ 1965 1966 typedef struct acpi_hest_ia_machine_check 1967 { 1968 ACPI_HEST_HEADER Header; 1969 UINT16 Reserved1; 1970 UINT8 Flags; /* See flags ACPI_HEST_GLOBAL, etc. above */ 1971 UINT8 Enabled; 1972 UINT32 RecordsToPreallocate; 1973 UINT32 MaxSectionsPerRecord; 1974 UINT64 GlobalCapabilityData; 1975 UINT64 GlobalControlData; 1976 UINT8 NumHardwareBanks; 1977 UINT8 Reserved3[7]; 1978 1979 } ACPI_HEST_IA_MACHINE_CHECK; 1980 1981 1982 /* 1: IA32 Corrected Machine Check */ 1983 1984 typedef struct acpi_hest_ia_corrected 1985 { 1986 ACPI_HEST_HEADER Header; 1987 UINT16 Reserved1; 1988 UINT8 Flags; /* See flags ACPI_HEST_GLOBAL, etc. above */ 1989 UINT8 Enabled; 1990 UINT32 RecordsToPreallocate; 1991 UINT32 MaxSectionsPerRecord; 1992 ACPI_HEST_NOTIFY Notify; 1993 UINT8 NumHardwareBanks; 1994 UINT8 Reserved2[3]; 1995 1996 } ACPI_HEST_IA_CORRECTED; 1997 1998 1999 /* 2: IA32 Non-Maskable Interrupt */ 2000 2001 typedef struct acpi_hest_ia_nmi 2002 { 2003 ACPI_HEST_HEADER Header; 2004 UINT32 Reserved; 2005 UINT32 RecordsToPreallocate; 2006 UINT32 MaxSectionsPerRecord; 2007 UINT32 MaxRawDataLength; 2008 2009 } ACPI_HEST_IA_NMI; 2010 2011 2012 /* 3,4,5: Not used */ 2013 2014 /* 6: PCI Express Root Port AER */ 2015 2016 typedef struct acpi_hest_aer_root 2017 { 2018 ACPI_HEST_HEADER Header; 2019 ACPI_HEST_AER_COMMON Aer; 2020 UINT32 RootErrorCommand; 2021 2022 } ACPI_HEST_AER_ROOT; 2023 2024 2025 /* 7: PCI Express AER (AER Endpoint) */ 2026 2027 typedef struct acpi_hest_aer 2028 { 2029 ACPI_HEST_HEADER Header; 2030 ACPI_HEST_AER_COMMON Aer; 2031 2032 } ACPI_HEST_AER; 2033 2034 2035 /* 8: PCI Express/PCI-X Bridge AER */ 2036 2037 typedef struct acpi_hest_aer_bridge 2038 { 2039 ACPI_HEST_HEADER Header; 2040 ACPI_HEST_AER_COMMON Aer; 2041 UINT32 UncorrectableMask2; 2042 UINT32 UncorrectableSeverity2; 2043 UINT32 AdvancedCapabilities2; 2044 2045 } ACPI_HEST_AER_BRIDGE; 2046 2047 2048 /* 9: Generic Hardware Error Source */ 2049 2050 typedef struct acpi_hest_generic 2051 { 2052 ACPI_HEST_HEADER Header; 2053 UINT16 RelatedSourceId; 2054 UINT8 Reserved; 2055 UINT8 Enabled; 2056 UINT32 RecordsToPreallocate; 2057 UINT32 MaxSectionsPerRecord; 2058 UINT32 MaxRawDataLength; 2059 ACPI_GENERIC_ADDRESS ErrorStatusAddress; 2060 ACPI_HEST_NOTIFY Notify; 2061 UINT32 ErrorBlockLength; 2062 2063 } ACPI_HEST_GENERIC; 2064 2065 2066 /* 10: Generic Hardware Error Source, version 2 */ 2067 2068 typedef struct acpi_hest_generic_v2 2069 { 2070 ACPI_HEST_HEADER Header; 2071 UINT16 RelatedSourceId; 2072 UINT8 Reserved; 2073 UINT8 Enabled; 2074 UINT32 RecordsToPreallocate; 2075 UINT32 MaxSectionsPerRecord; 2076 UINT32 MaxRawDataLength; 2077 ACPI_GENERIC_ADDRESS ErrorStatusAddress; 2078 ACPI_HEST_NOTIFY Notify; 2079 UINT32 ErrorBlockLength; 2080 ACPI_GENERIC_ADDRESS ReadAckRegister; 2081 UINT64 ReadAckPreserve; 2082 UINT64 ReadAckWrite; 2083 2084 } ACPI_HEST_GENERIC_V2; 2085 2086 2087 /* Generic Error Status block */ 2088 2089 typedef struct acpi_hest_generic_status 2090 { 2091 UINT32 BlockStatus; 2092 UINT32 RawDataOffset; 2093 UINT32 RawDataLength; 2094 UINT32 DataLength; 2095 UINT32 ErrorSeverity; 2096 2097 } ACPI_HEST_GENERIC_STATUS; 2098 2099 /* Values for BlockStatus flags above */ 2100 2101 #define ACPI_HEST_UNCORRECTABLE (1) 2102 #define ACPI_HEST_CORRECTABLE (1<<1) 2103 #define ACPI_HEST_MULTIPLE_UNCORRECTABLE (1<<2) 2104 #define ACPI_HEST_MULTIPLE_CORRECTABLE (1<<3) 2105 #define ACPI_HEST_ERROR_ENTRY_COUNT (0xFF<<4) /* 8 bits, error count */ 2106 2107 2108 /* Generic Error Data entry */ 2109 2110 typedef struct acpi_hest_generic_data 2111 { 2112 UINT8 SectionType[16]; 2113 UINT32 ErrorSeverity; 2114 UINT16 Revision; 2115 UINT8 ValidationBits; 2116 UINT8 Flags; 2117 UINT32 ErrorDataLength; 2118 UINT8 FruId[16]; 2119 UINT8 FruText[20]; 2120 2121 } ACPI_HEST_GENERIC_DATA; 2122 2123 /* Extension for revision 0x0300 */ 2124 2125 typedef struct acpi_hest_generic_data_v300 2126 { 2127 UINT8 SectionType[16]; 2128 UINT32 ErrorSeverity; 2129 UINT16 Revision; 2130 UINT8 ValidationBits; 2131 UINT8 Flags; 2132 UINT32 ErrorDataLength; 2133 UINT8 FruId[16]; 2134 UINT8 FruText[20]; 2135 UINT64 TimeStamp; 2136 2137 } ACPI_HEST_GENERIC_DATA_V300; 2138 2139 /* Values for ErrorSeverity above */ 2140 2141 #define ACPI_HEST_GEN_ERROR_RECOVERABLE 0 2142 #define ACPI_HEST_GEN_ERROR_FATAL 1 2143 #define ACPI_HEST_GEN_ERROR_CORRECTED 2 2144 #define ACPI_HEST_GEN_ERROR_NONE 3 2145 2146 /* Flags for ValidationBits above */ 2147 2148 #define ACPI_HEST_GEN_VALID_FRU_ID (1) 2149 #define ACPI_HEST_GEN_VALID_FRU_STRING (1<<1) 2150 #define ACPI_HEST_GEN_VALID_TIMESTAMP (1<<2) 2151 2152 2153 /* 11: IA32 Deferred Machine Check Exception (ACPI 6.2) */ 2154 2155 typedef struct acpi_hest_ia_deferred_check 2156 { 2157 ACPI_HEST_HEADER Header; 2158 UINT16 Reserved1; 2159 UINT8 Flags; /* See flags ACPI_HEST_GLOBAL, etc. above */ 2160 UINT8 Enabled; 2161 UINT32 RecordsToPreallocate; 2162 UINT32 MaxSectionsPerRecord; 2163 ACPI_HEST_NOTIFY Notify; 2164 UINT8 NumHardwareBanks; 2165 UINT8 Reserved2[3]; 2166 2167 } ACPI_HEST_IA_DEFERRED_CHECK; 2168 2169 2170 /******************************************************************************* 2171 * 2172 * HMAT - Heterogeneous Memory Attributes Table (ACPI 6.3) 2173 * 2174 ******************************************************************************/ 2175 2176 typedef struct acpi_table_hmat 2177 { 2178 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 2179 UINT32 Reserved; 2180 2181 } ACPI_TABLE_HMAT; 2182 2183 2184 /* Values for HMAT structure types */ 2185 2186 enum AcpiHmatType 2187 { 2188 ACPI_HMAT_TYPE_ADDRESS_RANGE = 0, /* Memory subsystem address range */ 2189 ACPI_HMAT_TYPE_LOCALITY = 1, /* System locality latency and bandwidth information */ 2190 ACPI_HMAT_TYPE_CACHE = 2, /* Memory side cache information */ 2191 ACPI_HMAT_TYPE_RESERVED = 3 /* 3 and greater are reserved */ 2192 }; 2193 2194 typedef struct acpi_hmat_structure 2195 { 2196 UINT16 Type; 2197 UINT16 Reserved; 2198 UINT32 Length; 2199 2200 } ACPI_HMAT_STRUCTURE; 2201 2202 2203 /* 2204 * HMAT Structures, correspond to Type in ACPI_HMAT_STRUCTURE 2205 */ 2206 2207 /* 0: Memory proximity domain attributes */ 2208 2209 typedef struct acpi_hmat_proximity_domain 2210 { 2211 ACPI_HMAT_STRUCTURE Header; 2212 UINT16 Flags; 2213 UINT16 Reserved1; 2214 UINT32 InitiatorPD; /* Attached Initiator proximity domain */ 2215 UINT32 MemoryPD; /* Memory proximity domain */ 2216 UINT32 Reserved2; 2217 UINT64 Reserved3; 2218 UINT64 Reserved4; 2219 2220 } ACPI_HMAT_PROXIMITY_DOMAIN; 2221 2222 /* Masks for Flags field above */ 2223 2224 #define ACPI_HMAT_INITIATOR_PD_VALID (1) /* 1: InitiatorPD field is valid */ 2225 2226 2227 /* 1: System locality latency and bandwidth information */ 2228 2229 typedef struct acpi_hmat_locality 2230 { 2231 ACPI_HMAT_STRUCTURE Header; 2232 UINT8 Flags; 2233 UINT8 DataType; 2234 UINT8 MinTransferSize; 2235 UINT8 Reserved1; 2236 UINT32 NumberOfInitiatorPDs; 2237 UINT32 NumberOfTargetPDs; 2238 UINT32 Reserved2; 2239 UINT64 EntryBaseUnit; 2240 2241 } ACPI_HMAT_LOCALITY; 2242 2243 /* Masks for Flags field above */ 2244 2245 #define ACPI_HMAT_MEMORY_HIERARCHY (0x0F) /* Bits 0-3 */ 2246 2247 /* Values for Memory Hierarchy flags */ 2248 2249 #define ACPI_HMAT_MEMORY 0 2250 #define ACPI_HMAT_1ST_LEVEL_CACHE 1 2251 #define ACPI_HMAT_2ND_LEVEL_CACHE 2 2252 #define ACPI_HMAT_3RD_LEVEL_CACHE 3 2253 #define ACPI_HMAT_MINIMUM_XFER_SIZE 0x10 /* Bit 4: ACPI 6.4 */ 2254 #define ACPI_HMAT_NON_SEQUENTIAL_XFERS 0x20 /* Bit 5: ACPI 6.4 */ 2255 2256 2257 /* Values for DataType field above */ 2258 2259 #define ACPI_HMAT_ACCESS_LATENCY 0 2260 #define ACPI_HMAT_READ_LATENCY 1 2261 #define ACPI_HMAT_WRITE_LATENCY 2 2262 #define ACPI_HMAT_ACCESS_BANDWIDTH 3 2263 #define ACPI_HMAT_READ_BANDWIDTH 4 2264 #define ACPI_HMAT_WRITE_BANDWIDTH 5 2265 2266 2267 /* 2: Memory side cache information */ 2268 2269 typedef struct acpi_hmat_cache 2270 { 2271 ACPI_HMAT_STRUCTURE Header; 2272 UINT32 MemoryPD; 2273 UINT32 Reserved1; 2274 UINT64 CacheSize; 2275 UINT32 CacheAttributes; 2276 UINT16 AddressMode; 2277 UINT16 NumberOfSMBIOSHandles; 2278 2279 } ACPI_HMAT_CACHE; 2280 2281 /* Masks for CacheAttributes field above */ 2282 2283 #define ACPI_HMAT_TOTAL_CACHE_LEVEL (0x0000000F) 2284 #define ACPI_HMAT_CACHE_LEVEL (0x000000F0) 2285 #define ACPI_HMAT_CACHE_ASSOCIATIVITY (0x00000F00) 2286 #define ACPI_HMAT_WRITE_POLICY (0x0000F000) 2287 #define ACPI_HMAT_CACHE_LINE_SIZE (0xFFFF0000) 2288 2289 #define ACPI_HMAT_CACHE_MODE_UNKNOWN (0) 2290 #define ACPI_HMAT_CACHE_MODE_EXTENDED_LINEAR (1) 2291 2292 /* Values for cache associativity flag */ 2293 2294 #define ACPI_HMAT_CA_NONE (0) 2295 #define ACPI_HMAT_CA_DIRECT_MAPPED (1) 2296 #define ACPI_HMAT_CA_COMPLEX_CACHE_INDEXING (2) 2297 2298 /* Values for write policy flag */ 2299 2300 #define ACPI_HMAT_CP_NONE (0) 2301 #define ACPI_HMAT_CP_WB (1) 2302 #define ACPI_HMAT_CP_WT (2) 2303 2304 2305 /******************************************************************************* 2306 * 2307 * HPET - High Precision Event Timer table 2308 * Version 1 2309 * 2310 * Conforms to "IA-PC HPET (High Precision Event Timers) Specification", 2311 * Version 1.0a, October 2004 2312 * 2313 ******************************************************************************/ 2314 2315 typedef struct acpi_table_hpet 2316 { 2317 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 2318 UINT32 Id; /* Hardware ID of event timer block */ 2319 ACPI_GENERIC_ADDRESS Address; /* Address of event timer block */ 2320 UINT8 Sequence; /* HPET sequence number */ 2321 UINT16 MinimumTick; /* Main counter min tick, periodic mode */ 2322 UINT8 Flags; 2323 2324 } ACPI_TABLE_HPET; 2325 2326 /* Masks for Flags field above */ 2327 2328 #define ACPI_HPET_PAGE_PROTECT_MASK (3) 2329 2330 /* Values for Page Protect flags */ 2331 2332 enum AcpiHpetPageProtect 2333 { 2334 ACPI_HPET_NO_PAGE_PROTECT = 0, 2335 ACPI_HPET_PAGE_PROTECT4 = 1, 2336 ACPI_HPET_PAGE_PROTECT64 = 2 2337 }; 2338 2339 2340 /******************************************************************************* 2341 * 2342 * IBFT - Boot Firmware Table 2343 * Version 1 2344 * 2345 * Conforms to "iSCSI Boot Firmware Table (iBFT) as Defined in ACPI 3.0b 2346 * Specification", Version 1.01, March 1, 2007 2347 * 2348 * Note: It appears that this table is not intended to appear in the RSDT/XSDT. 2349 * Therefore, it is not currently supported by the disassembler. 2350 * 2351 ******************************************************************************/ 2352 2353 typedef struct acpi_table_ibft 2354 { 2355 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 2356 UINT8 Reserved[12]; 2357 2358 } ACPI_TABLE_IBFT; 2359 2360 2361 /* IBFT common subtable header */ 2362 2363 typedef struct acpi_ibft_header 2364 { 2365 UINT8 Type; 2366 UINT8 Version; 2367 UINT16 Length; 2368 UINT8 Index; 2369 UINT8 Flags; 2370 2371 } ACPI_IBFT_HEADER; 2372 2373 /* Values for Type field above */ 2374 2375 enum AcpiIbftType 2376 { 2377 ACPI_IBFT_TYPE_NOT_USED = 0, 2378 ACPI_IBFT_TYPE_CONTROL = 1, 2379 ACPI_IBFT_TYPE_INITIATOR = 2, 2380 ACPI_IBFT_TYPE_NIC = 3, 2381 ACPI_IBFT_TYPE_TARGET = 4, 2382 ACPI_IBFT_TYPE_EXTENSIONS = 5, 2383 ACPI_IBFT_TYPE_RESERVED = 6 /* 6 and greater are reserved */ 2384 }; 2385 2386 2387 /* IBFT subtables */ 2388 2389 typedef struct acpi_ibft_control 2390 { 2391 ACPI_IBFT_HEADER Header; 2392 UINT16 Extensions; 2393 UINT16 InitiatorOffset; 2394 UINT16 Nic0Offset; 2395 UINT16 Target0Offset; 2396 UINT16 Nic1Offset; 2397 UINT16 Target1Offset; 2398 2399 } ACPI_IBFT_CONTROL; 2400 2401 typedef struct acpi_ibft_initiator 2402 { 2403 ACPI_IBFT_HEADER Header; 2404 UINT8 SnsServer[16]; 2405 UINT8 SlpServer[16]; 2406 UINT8 PrimaryServer[16]; 2407 UINT8 SecondaryServer[16]; 2408 UINT16 NameLength; 2409 UINT16 NameOffset; 2410 2411 } ACPI_IBFT_INITIATOR; 2412 2413 typedef struct acpi_ibft_nic 2414 { 2415 ACPI_IBFT_HEADER Header; 2416 UINT8 IpAddress[16]; 2417 UINT8 SubnetMaskPrefix; 2418 UINT8 Origin; 2419 UINT8 Gateway[16]; 2420 UINT8 PrimaryDns[16]; 2421 UINT8 SecondaryDns[16]; 2422 UINT8 Dhcp[16]; 2423 UINT16 Vlan; 2424 UINT8 MacAddress[6]; 2425 UINT16 PciAddress; 2426 UINT16 NameLength; 2427 UINT16 NameOffset; 2428 2429 } ACPI_IBFT_NIC; 2430 2431 typedef struct acpi_ibft_target 2432 { 2433 ACPI_IBFT_HEADER Header; 2434 UINT8 TargetIpAddress[16]; 2435 UINT16 TargetIpSocket; 2436 UINT8 TargetBootLun[8]; 2437 UINT8 ChapType; 2438 UINT8 NicAssociation; 2439 UINT16 TargetNameLength; 2440 UINT16 TargetNameOffset; 2441 UINT16 ChapNameLength; 2442 UINT16 ChapNameOffset; 2443 UINT16 ChapSecretLength; 2444 UINT16 ChapSecretOffset; 2445 UINT16 ReverseChapNameLength; 2446 UINT16 ReverseChapNameOffset; 2447 UINT16 ReverseChapSecretLength; 2448 UINT16 ReverseChapSecretOffset; 2449 2450 } ACPI_IBFT_TARGET; 2451 2452 2453 /* Reset to default packing */ 2454 2455 #pragma pack() 2456 2457 #endif /* __ACTBL1_H__ */ 2458
Indexes created Thu Oct 23 22:10:10 GMT 2025