actbl1.h revision 1.1.1.24
1 /****************************************************************************** 2 * 3 * Name: actbl1.h - Additional ACPI table definitions 4 * 5 *****************************************************************************/ 6 7 /****************************************************************************** 8 * 9 * 1. Copyright Notice 10 * 11 * Some or all of this work - Copyright (c) 1999 - 2025, Intel Corp. 12 * All rights reserved. 13 * 14 * 2. License 15 * 16 * 2.1. This is your license from Intel Corp. under its intellectual property 17 * rights. You may have additional license terms from the party that provided 18 * you this software, covering your right to use that party's intellectual 19 * property rights. 20 * 21 * 2.2. Intel grants, free of charge, to any person ("Licensee") obtaining a 22 * copy of the source code appearing in this file ("Covered Code") an 23 * irrevocable, perpetual, worldwide license under Intel's copyrights in the 24 * base code distributed originally by Intel ("Original Intel Code") to copy, 25 * make derivatives, distribute, use and display any portion of the Covered 26 * Code in any form, with the right to sublicense such rights; and 27 * 28 * 2.3. Intel grants Licensee a non-exclusive and non-transferable patent 29 * license (with the right to sublicense), under only those claims of Intel 30 * patents that are infringed by the Original Intel Code, to make, use, sell, 31 * offer to sell, and import the Covered Code and derivative works thereof 32 * solely to the minimum extent necessary to exercise the above copyright 33 * license, and in no event shall the patent license extend to any additions 34 * to or modifications of the Original Intel Code. No other license or right 35 * is granted directly or by implication, estoppel or otherwise; 36 * 37 * The above copyright and patent license is granted only if the following 38 * conditions are met: 39 * 40 * 3. Conditions 41 * 42 * 3.1. Redistribution of Source with Rights to Further Distribute Source. 43 * Redistribution of source code of any substantial portion of the Covered 44 * Code or modification with rights to further distribute source must include 45 * the above Copyright Notice, the above License, this list of Conditions, 46 * and the following Disclaimer and Export Compliance provision. In addition, 47 * Licensee must cause all Covered Code to which Licensee contributes to 48 * contain a file documenting the changes Licensee made to create that Covered 49 * Code and the date of any change. Licensee must include in that file the 50 * documentation of any changes made by any predecessor Licensee. Licensee 51 * must include a prominent statement that the modification is derived, 52 * directly or indirectly, from Original Intel Code. 53 * 54 * 3.2. Redistribution of Source with no Rights to Further Distribute Source. 55 * Redistribution of source code of any substantial portion of the Covered 56 * Code or modification without rights to further distribute source must 57 * include the following Disclaimer and Export Compliance provision in the 58 * documentation and/or other materials provided with distribution. In 59 * addition, Licensee may not authorize further sublicense of source of any 60 * portion of the Covered Code, and must include terms to the effect that the 61 * license from Licensee to its licensee is limited to the intellectual 62 * property embodied in the software Licensee provides to its licensee, and 63 * not to intellectual property embodied in modifications its licensee may 64 * make. 65 * 66 * 3.3. Redistribution of Executable. Redistribution in executable form of any 67 * substantial portion of the Covered Code or modification must reproduce the 68 * above Copyright Notice, and the following Disclaimer and Export Compliance 69 * provision in the documentation and/or other materials provided with the 70 * distribution. 71 * 72 * 3.4. Intel retains all right, title, and interest in and to the Original 73 * Intel Code. 74 * 75 * 3.5. Neither the name Intel nor any other trademark owned or controlled by 76 * Intel shall be used in advertising or otherwise to promote the sale, use or 77 * other dealings in products derived from or relating to the Covered Code 78 * without prior written authorization from Intel. 79 * 80 * 4. Disclaimer and Export Compliance 81 * 82 * 4.1. INTEL MAKES NO WARRANTY OF ANY KIND REGARDING ANY SOFTWARE PROVIDED 83 * HERE. ANY SOFTWARE ORIGINATING FROM INTEL OR DERIVED FROM INTEL SOFTWARE 84 * IS PROVIDED "AS IS," AND INTEL WILL NOT PROVIDE ANY SUPPORT, ASSISTANCE, 85 * INSTALLATION, TRAINING OR OTHER SERVICES. INTEL WILL NOT PROVIDE ANY 86 * UPDATES, ENHANCEMENTS OR EXTENSIONS. INTEL SPECIFICALLY DISCLAIMS ANY 87 * IMPLIED WARRANTIES OF MERCHANTABILITY, NONINFRINGEMENT AND FITNESS FOR A 88 * PARTICULAR PURPOSE. 89 * 90 * 4.2. IN NO EVENT SHALL INTEL HAVE ANY LIABILITY TO LICENSEE, ITS LICENSEES 91 * OR ANY OTHER THIRD PARTY, FOR ANY LOST PROFITS, LOST DATA, LOSS OF USE OR 92 * COSTS OF PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES, OR FOR ANY INDIRECT, 93 * SPECIAL OR CONSEQUENTIAL DAMAGES ARISING OUT OF THIS AGREEMENT, UNDER ANY 94 * CAUSE OF ACTION OR THEORY OF LIABILITY, AND IRRESPECTIVE OF WHETHER INTEL 95 * HAS ADVANCE NOTICE OF THE POSSIBILITY OF SUCH DAMAGES. THESE LIMITATIONS 96 * SHALL APPLY NOTWITHSTANDING THE FAILURE OF THE ESSENTIAL PURPOSE OF ANY 97 * LIMITED REMEDY. 98 * 99 * 4.3. Licensee shall not export, either directly or indirectly, any of this 100 * software or system incorporating such software without first obtaining any 101 * required license or other approval from the U. S. Department of Commerce or 102 * any other agency or department of the United States Government. In the 103 * event Licensee exports any such software from the United States or 104 * re-exports any such software from a foreign destination, Licensee shall 105 * ensure that the distribution and export/re-export of the software is in 106 * compliance with all laws, regulations, orders, or other restrictions of the 107 * U.S. Export Administration Regulations. Licensee agrees that neither it nor 108 * any of its subsidiaries will export/re-export any technical data, process, 109 * software, or service, directly or indirectly, to any country for which the 110 * United States government or any agency thereof requires an export license, 111 * other governmental approval, or letter of assurance, without first obtaining 112 * such license, approval or letter. 113 * 114 ***************************************************************************** 115 * 116 * Alternatively, you may choose to be licensed under the terms of the 117 * following license: 118 * 119 * Redistribution and use in source and binary forms, with or without 120 * modification, are permitted provided that the following conditions 121 * are met: 122 * 1. Redistributions of source code must retain the above copyright 123 * notice, this list of conditions, and the following disclaimer, 124 * without modification. 125 * 2. Redistributions in binary form must reproduce at minimum a disclaimer 126 * substantially similar to the "NO WARRANTY" disclaimer below 127 * ("Disclaimer") and any redistribution must be conditioned upon 128 * including a substantially similar Disclaimer requirement for further 129 * binary redistribution. 130 * 3. Neither the names of the above-listed copyright holders nor the names 131 * of any contributors may be used to endorse or promote products derived 132 * from this software without specific prior written permission. 133 * 134 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 135 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 136 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 137 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 138 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 139 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 140 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 141 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 142 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 143 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 144 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 145 * 146 * Alternatively, you may choose to be licensed under the terms of the 147 * GNU General Public License ("GPL") version 2 as published by the Free 148 * Software Foundation. 149 * 150 *****************************************************************************/ 151 152 #ifndef __ACTBL1_H__ 153 #define __ACTBL1_H__ 154 155 156 /******************************************************************************* 157 * 158 * Additional ACPI Tables 159 * 160 * These tables are not consumed directly by the ACPICA subsystem, but are 161 * included here to support device drivers and the AML disassembler. 162 * 163 ******************************************************************************/ 164 165 166 /* 167 * Values for description table header signatures for tables defined in this 168 * file. Useful because they make it more difficult to inadvertently type in 169 * the wrong signature. 170 */ 171 #define ACPI_SIG_AEST "AEST" /* Arm Error Source Table */ 172 #define ACPI_SIG_ASF "ASF!" /* Alert Standard Format table */ 173 #define ACPI_SIG_ASPT "ASPT" /* AMD Secure Processor Table */ 174 #define ACPI_SIG_BERT "BERT" /* Boot Error Record Table */ 175 #define ACPI_SIG_BGRT "BGRT" /* Boot Graphics Resource Table */ 176 #define ACPI_SIG_BOOT "BOOT" /* Simple Boot Flag Table */ 177 #define ACPI_SIG_CEDT "CEDT" /* CXL Early Discovery Table */ 178 #define ACPI_SIG_CPEP "CPEP" /* Corrected Platform Error Polling table */ 179 #define ACPI_SIG_CSRT "CSRT" /* Core System Resource Table */ 180 #define ACPI_SIG_DBG2 "DBG2" /* Debug Port table type 2 */ 181 #define ACPI_SIG_DBGP "DBGP" /* Debug Port table */ 182 #define ACPI_SIG_DMAR "DMAR" /* DMA Remapping table */ 183 #define ACPI_SIG_DRTM "DRTM" /* Dynamic Root of Trust for Measurement table */ 184 #define ACPI_SIG_ECDT "ECDT" /* Embedded Controller Boot Resources Table */ 185 #define ACPI_SIG_EINJ "EINJ" /* Error Injection table */ 186 #define ACPI_SIG_ERST "ERST" /* Error Record Serialization Table */ 187 #define ACPI_SIG_FPDT "FPDT" /* Firmware Performance Data Table */ 188 #define ACPI_SIG_GTDT "GTDT" /* Generic Timer Description Table */ 189 #define ACPI_SIG_HEST "HEST" /* Hardware Error Source Table */ 190 #define ACPI_SIG_HMAT "HMAT" /* Heterogeneous Memory Attributes Table */ 191 #define ACPI_SIG_HPET "HPET" /* High Precision Event Timer table */ 192 #define ACPI_SIG_IBFT "IBFT" /* iSCSI Boot Firmware Table */ 193 #define ACPI_SIG_MSCT "MSCT" /* Maximum System Characteristics Table*/ 194 195 #define ACPI_SIG_S3PT "S3PT" /* S3 Performance (sub)Table */ 196 #define ACPI_SIG_PCCS "PCC" /* PCC Shared Memory Region */ 197 198 199 /* Reserved table signatures */ 200 201 #define ACPI_SIG_MATR "MATR" /* Memory Address Translation Table */ 202 #define ACPI_SIG_MSDM "MSDM" /* Microsoft Data Management Table */ 203 204 /* 205 * These tables have been seen in the field, but no definition has been found 206 */ 207 #ifdef ACPI_UNDEFINED_TABLES 208 #define ACPI_SIG_ATKG "ATKG" 209 #define ACPI_SIG_GSCI "GSCI" /* GMCH SCI table */ 210 #define ACPI_SIG_IEIT "IEIT" 211 #endif 212 213 /* 214 * All tables must be byte-packed to match the ACPI specification, since 215 * the tables are provided by the system BIOS. 216 */ 217 #pragma pack(1) 218 219 /* 220 * Note: C bitfields are not used for this reason: 221 * 222 * "Bitfields are great and easy to read, but unfortunately the C language 223 * does not specify the layout of bitfields in memory, which means they are 224 * essentially useless for dealing with packed data in on-disk formats or 225 * binary wire protocols." (Or ACPI tables and buffers.) "If you ask me, 226 * this decision was a design error in C. Ritchie could have picked an order 227 * and stuck with it." Norman Ramsey. 228 * See http://stackoverflow.com/a/1053662/41661 229 */ 230 231 232 /******************************************************************************* 233 * 234 * Common subtable headers 235 * 236 ******************************************************************************/ 237 238 /* Generic subtable header (used in MADT, SRAT, etc.) */ 239 240 typedef struct acpi_subtable_header 241 { 242 UINT8 Type; 243 UINT8 Length; 244 245 } ACPI_SUBTABLE_HEADER; 246 247 248 /* Subtable header for WHEA tables (EINJ, ERST, WDAT) */ 249 250 typedef struct acpi_whea_header 251 { 252 UINT8 Action; 253 UINT8 Instruction; 254 UINT8 Flags; 255 UINT8 Reserved; 256 ACPI_GENERIC_ADDRESS RegisterRegion; 257 UINT64 Value; /* Value used with Read/Write register */ 258 UINT64 Mask; /* Bitmask required for this register instruction */ 259 260 } ACPI_WHEA_HEADER; 261 262 263 /* Larger subtable header (when Length can exceed 255) */ 264 265 typedef struct acpi_subtbl_hdr_16 266 { 267 UINT16 Type; 268 UINT16 Length; 269 270 } ACPI_SUBTBL_HDR_16; 271 272 273 /******************************************************************************* 274 * 275 * ASF - Alert Standard Format table (Signature "ASF!") 276 * Revision 0x10 277 * 278 * Conforms to the Alert Standard Format Specification V2.0, 23 April 2003 279 * 280 ******************************************************************************/ 281 282 typedef struct acpi_table_asf 283 { 284 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 285 286 } ACPI_TABLE_ASF; 287 288 289 /* ASF subtable header */ 290 291 typedef struct acpi_asf_header 292 { 293 UINT8 Type; 294 UINT8 Reserved; 295 UINT16 Length; 296 297 } ACPI_ASF_HEADER; 298 299 300 /* Values for Type field above */ 301 302 enum AcpiAsfType 303 { 304 ACPI_ASF_TYPE_INFO = 0, 305 ACPI_ASF_TYPE_ALERT = 1, 306 ACPI_ASF_TYPE_CONTROL = 2, 307 ACPI_ASF_TYPE_BOOT = 3, 308 ACPI_ASF_TYPE_ADDRESS = 4, 309 ACPI_ASF_TYPE_RESERVED = 5 310 }; 311 312 /* 313 * ASF subtables 314 */ 315 316 /* 0: ASF Information */ 317 318 typedef struct acpi_asf_info 319 { 320 ACPI_ASF_HEADER Header; 321 UINT8 MinResetValue; 322 UINT8 MinPollInterval; 323 UINT16 SystemId; 324 UINT32 MfgId; 325 UINT8 Flags; 326 UINT8 Reserved2[3]; 327 328 } ACPI_ASF_INFO; 329 330 /* Masks for Flags field above */ 331 332 #define ACPI_ASF_SMBUS_PROTOCOLS (1) 333 334 335 /* 1: ASF Alerts */ 336 337 typedef struct acpi_asf_alert 338 { 339 ACPI_ASF_HEADER Header; 340 UINT8 AssertMask; 341 UINT8 DeassertMask; 342 UINT8 Alerts; 343 UINT8 DataLength; 344 345 } ACPI_ASF_ALERT; 346 347 typedef struct acpi_asf_alert_data 348 { 349 UINT8 Address; 350 UINT8 Command; 351 UINT8 Mask; 352 UINT8 Value; 353 UINT8 SensorType; 354 UINT8 Type; 355 UINT8 Offset; 356 UINT8 SourceType; 357 UINT8 Severity; 358 UINT8 SensorNumber; 359 UINT8 Entity; 360 UINT8 Instance; 361 362 } ACPI_ASF_ALERT_DATA; 363 364 365 /* 2: ASF Remote Control */ 366 367 typedef struct acpi_asf_remote 368 { 369 ACPI_ASF_HEADER Header; 370 UINT8 Controls; 371 UINT8 DataLength; 372 UINT16 Reserved2; 373 374 } ACPI_ASF_REMOTE; 375 376 typedef struct acpi_asf_control_data 377 { 378 UINT8 Function; 379 UINT8 Address; 380 UINT8 Command; 381 UINT8 Value; 382 383 } ACPI_ASF_CONTROL_DATA; 384 385 386 /* 3: ASF RMCP Boot Options */ 387 388 typedef struct acpi_asf_rmcp 389 { 390 ACPI_ASF_HEADER Header; 391 UINT8 Capabilities[7]; 392 UINT8 CompletionCode; 393 UINT32 EnterpriseId; 394 UINT8 Command; 395 UINT16 Parameter; 396 UINT16 BootOptions; 397 UINT16 OemParameters; 398 399 } ACPI_ASF_RMCP; 400 401 402 /* 4: ASF Address */ 403 404 typedef struct acpi_asf_address 405 { 406 ACPI_ASF_HEADER Header; 407 UINT8 EpromAddress; 408 UINT8 Devices; 409 410 } ACPI_ASF_ADDRESS; 411 412 /******************************************************************************* 413 * 414 * ASPT - AMD Secure Processor Table (Signature "ASPT") 415 * Revision 0x1 416 * 417 * Conforms to AMD Socket SP5/SP6 Platform ASPT Rev1 Specification, 418 * 12 September 2022 419 * 420 ******************************************************************************/ 421 422 typedef struct acpi_table_aspt 423 { 424 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 425 UINT32 NumEntries; 426 427 } ACPI_TABLE_ASPT; 428 429 430 /* ASPT subtable header */ 431 432 typedef struct acpi_aspt_header 433 { 434 UINT16 Type; 435 UINT16 Length; 436 437 } ACPI_ASPT_HEADER; 438 439 440 /* Values for Type field above */ 441 442 enum AcpiAsptType 443 { 444 ACPI_ASPT_TYPE_GLOBAL_REGS = 0, 445 ACPI_ASPT_TYPE_SEV_MBOX_REGS = 1, 446 ACPI_ASPT_TYPE_ACPI_MBOX_REGS = 2, 447 ACPI_ASPT_TYPE_UNKNOWN = 3, 448 }; 449 450 /* 451 * ASPT subtables 452 */ 453 454 /* 0: ASPT Global Registers */ 455 456 typedef struct acpi_aspt_global_regs 457 { 458 ACPI_ASPT_HEADER Header; 459 UINT32 Reserved; 460 UINT64 FeatureRegAddr; 461 UINT64 IrqEnRegAddr; 462 UINT64 IrqStRegAddr; 463 464 } ACPI_ASPT_GLOBAL_REGS; 465 466 467 /* 1: ASPT SEV Mailbox Registers */ 468 469 typedef struct acpi_aspt_sev_mbox_regs 470 { 471 ACPI_ASPT_HEADER Header; 472 UINT8 MboxIrqId; 473 UINT8 Reserved[3]; 474 UINT64 CmdRespRegAddr; 475 UINT64 CmdBufLoRegAddr; 476 UINT64 CmdBufHiRegAddr; 477 478 } ACPI_ASPT_SEV_MBOX_REGS; 479 480 481 /* 2: ASPT ACPI Mailbox Registers */ 482 483 typedef struct acpi_aspt_acpi_mbox_regs 484 { 485 ACPI_ASPT_HEADER Header; 486 UINT32 Reserved1; 487 UINT64 CmdRespRegAddr; 488 UINT64 Reserved2[2]; 489 490 } ACPI_ASPT_ACPI_MBOX_REGS; 491 492 493 /******************************************************************************* 494 * 495 * BERT - Boot Error Record Table (ACPI 4.0) 496 * Version 1 497 * 498 ******************************************************************************/ 499 500 typedef struct acpi_table_bert 501 { 502 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 503 UINT32 RegionLength; /* Length of the boot error region */ 504 UINT64 Address; /* Physical address of the error region */ 505 506 } ACPI_TABLE_BERT; 507 508 509 /* Boot Error Region (not a subtable, pointed to by Address field above) */ 510 511 typedef struct acpi_bert_region 512 { 513 UINT32 BlockStatus; /* Type of error information */ 514 UINT32 RawDataOffset; /* Offset to raw error data */ 515 UINT32 RawDataLength; /* Length of raw error data */ 516 UINT32 DataLength; /* Length of generic error data */ 517 UINT32 ErrorSeverity; /* Severity code */ 518 519 } ACPI_BERT_REGION; 520 521 /* Values for BlockStatus flags above */ 522 523 #define ACPI_BERT_UNCORRECTABLE (1) 524 #define ACPI_BERT_CORRECTABLE (1<<1) 525 #define ACPI_BERT_MULTIPLE_UNCORRECTABLE (1<<2) 526 #define ACPI_BERT_MULTIPLE_CORRECTABLE (1<<3) 527 #define ACPI_BERT_ERROR_ENTRY_COUNT (0xFF<<4) /* 8 bits, error count */ 528 529 /* Values for ErrorSeverity above */ 530 531 enum AcpiBertErrorSeverity 532 { 533 ACPI_BERT_ERROR_CORRECTABLE = 0, 534 ACPI_BERT_ERROR_FATAL = 1, 535 ACPI_BERT_ERROR_CORRECTED = 2, 536 ACPI_BERT_ERROR_NONE = 3, 537 ACPI_BERT_ERROR_RESERVED = 4 /* 4 and greater are reserved */ 538 }; 539 540 /* 541 * Note: The generic error data that follows the ErrorSeverity field above 542 * uses the ACPI_HEST_GENERIC_DATA defined under the HEST table below 543 */ 544 545 546 /******************************************************************************* 547 * 548 * BGRT - Boot Graphics Resource Table (ACPI 5.0) 549 * Version 1 550 * 551 ******************************************************************************/ 552 553 typedef struct acpi_table_bgrt 554 { 555 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 556 UINT16 Version; 557 UINT8 Status; 558 UINT8 ImageType; 559 UINT64 ImageAddress; 560 UINT32 ImageOffsetX; 561 UINT32 ImageOffsetY; 562 563 } ACPI_TABLE_BGRT; 564 565 /* Flags for Status field above */ 566 567 #define ACPI_BGRT_DISPLAYED (1) 568 #define ACPI_BGRT_ORIENTATION_OFFSET (3 << 1) 569 570 571 /******************************************************************************* 572 * 573 * BOOT - Simple Boot Flag Table 574 * Version 1 575 * 576 * Conforms to the "Simple Boot Flag Specification", Version 2.1 577 * 578 ******************************************************************************/ 579 580 typedef struct acpi_table_boot 581 { 582 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 583 UINT8 CmosIndex; /* Index in CMOS RAM for the boot register */ 584 UINT8 Reserved[3]; 585 586 } ACPI_TABLE_BOOT; 587 588 589 /******************************************************************************* 590 * 591 * CDAT - Coherent Device Attribute Table 592 * Version 1 593 * 594 * Conforms to the "Coherent Device Attribute Table (CDAT) Specification 595 " (Revision 1.01, October 2020.) 596 * 597 ******************************************************************************/ 598 599 typedef struct acpi_table_cdat 600 { 601 UINT32 Length; /* Length of table in bytes, including this header */ 602 UINT8 Revision; /* ACPI Specification minor version number */ 603 UINT8 Checksum; /* To make sum of entire table == 0 */ 604 UINT8 Reserved[6]; 605 UINT32 Sequence; /* Used to detect runtime CDAT table changes */ 606 607 } ACPI_TABLE_CDAT; 608 609 610 /* CDAT common subtable header */ 611 612 typedef struct acpi_cdat_header 613 { 614 UINT8 Type; 615 UINT8 Reserved; 616 UINT16 Length; 617 618 } ACPI_CDAT_HEADER; 619 620 /* Values for Type field above */ 621 622 enum AcpiCdatType 623 { 624 ACPI_CDAT_TYPE_DSMAS = 0, 625 ACPI_CDAT_TYPE_DSLBIS = 1, 626 ACPI_CDAT_TYPE_DSMSCIS = 2, 627 ACPI_CDAT_TYPE_DSIS = 3, 628 ACPI_CDAT_TYPE_DSEMTS = 4, 629 ACPI_CDAT_TYPE_SSLBIS = 5, 630 ACPI_CDAT_TYPE_RESERVED = 6 /* 6 through 0xFF are reserved */ 631 }; 632 633 634 /* Subtable 0: Device Scoped Memory Affinity Structure (DSMAS) */ 635 636 typedef struct acpi_cdat_dsmas 637 { 638 UINT8 DsmadHandle; 639 UINT8 Flags; 640 UINT16 Reserved; 641 UINT64 DpaBaseAddress; 642 UINT64 DpaLength; 643 644 } ACPI_CDAT_DSMAS; 645 646 /* Flags for subtable above */ 647 648 #define ACPI_CDAT_DSMAS_NON_VOLATILE (1 << 2) 649 #define ACPI_CDAT_DSMAS_SHAREABLE (1 << 3) 650 #define ACPI_CDAT_DSMAS_READ_ONLY (1 << 6) 651 652 653 /* Subtable 1: Device scoped Latency and Bandwidth Information Structure (DSLBIS) */ 654 655 typedef struct acpi_cdat_dslbis 656 { 657 UINT8 Handle; 658 UINT8 Flags; /* If Handle matches a DSMAS handle, the definition of this field matches 659 * Flags field in HMAT System Locality Latency */ 660 UINT8 DataType; 661 UINT8 Reserved; 662 UINT64 EntryBaseUnit; 663 UINT16 Entry[3]; 664 UINT16 Reserved2; 665 666 } ACPI_CDAT_DSLBIS; 667 668 669 /* Subtable 2: Device Scoped Memory Side Cache Information Structure (DSMSCIS) */ 670 671 typedef struct acpi_cdat_dsmscis 672 { 673 UINT8 DsmasHandle; 674 UINT8 Reserved[3]; 675 UINT64 SideCacheSize; 676 UINT32 CacheAttributes; 677 678 } ACPI_CDAT_DSMSCIS; 679 680 681 /* Subtable 3: Device Scoped Initiator Structure (DSIS) */ 682 683 typedef struct acpi_cdat_dsis 684 { 685 UINT8 Flags; 686 UINT8 Handle; 687 UINT16 Reserved; 688 689 } ACPI_CDAT_DSIS; 690 691 /* Flags for above subtable */ 692 693 #define ACPI_CDAT_DSIS_MEM_ATTACHED (1 << 0) 694 695 696 /* Subtable 4: Device Scoped EFI Memory Type Structure (DSEMTS) */ 697 698 typedef struct acpi_cdat_dsemts 699 { 700 UINT8 DsmasHandle; 701 UINT8 MemoryType; 702 UINT16 Reserved; 703 UINT64 DpaOffset; 704 UINT64 RangeLength; 705 706 } ACPI_CDAT_DSEMTS; 707 708 709 /* Subtable 5: Switch Scoped Latency and Bandwidth Information Structure (SSLBIS) */ 710 711 typedef struct acpi_cdat_sslbis 712 { 713 UINT8 DataType; 714 UINT8 Reserved[3]; 715 UINT64 EntryBaseUnit; 716 717 } ACPI_CDAT_SSLBIS; 718 719 720 /* Sub-subtable for above, SslbeEntries field */ 721 722 typedef struct acpi_cdat_sslbe 723 { 724 UINT16 PortxId; 725 UINT16 PortyId; 726 UINT16 LatencyOrBandwidth; 727 UINT16 Reserved; 728 729 } ACPI_CDAT_SSLBE; 730 731 #define ACPI_CDAT_SSLBIS_US_PORT 0x0100 732 #define ACPI_CDAT_SSLBIS_ANY_PORT 0xffff 733 734 /******************************************************************************* 735 * 736 * CEDT - CXL Early Discovery Table 737 * Version 1 738 * 739 * Conforms to the "CXL Early Discovery Table" (CXL 2.0, October 2020) 740 * 741 ******************************************************************************/ 742 743 typedef struct acpi_table_cedt 744 { 745 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 746 747 } ACPI_TABLE_CEDT; 748 749 /* CEDT subtable header (Performance Record Structure) */ 750 751 typedef struct acpi_cedt_header 752 { 753 UINT8 Type; 754 UINT8 Reserved; 755 UINT16 Length; 756 757 } ACPI_CEDT_HEADER; 758 759 /* Values for Type field above */ 760 761 enum AcpiCedtType 762 { 763 ACPI_CEDT_TYPE_CHBS = 0, 764 ACPI_CEDT_TYPE_CFMWS = 1, 765 ACPI_CEDT_TYPE_CXIMS = 2, 766 ACPI_CEDT_TYPE_RDPAS = 3, 767 ACPI_CEDT_TYPE_RESERVED = 4, 768 }; 769 770 /* Values for version field above */ 771 772 #define ACPI_CEDT_CHBS_VERSION_CXL11 (0) 773 #define ACPI_CEDT_CHBS_VERSION_CXL20 (1) 774 775 /* Values for length field above */ 776 777 #define ACPI_CEDT_CHBS_LENGTH_CXL11 (0x2000) 778 #define ACPI_CEDT_CHBS_LENGTH_CXL20 (0x10000) 779 780 /* 781 * CEDT subtables 782 */ 783 784 /* 0: CXL Host Bridge Structure */ 785 786 typedef struct acpi_cedt_chbs 787 { 788 ACPI_CEDT_HEADER Header; 789 UINT32 Uid; 790 UINT32 CxlVersion; 791 UINT32 Reserved; 792 UINT64 Base; 793 UINT64 Length; 794 795 } ACPI_CEDT_CHBS; 796 797 798 /* 1: CXL Fixed Memory Window Structure */ 799 800 typedef struct acpi_cedt_cfmws 801 { 802 ACPI_CEDT_HEADER Header; 803 UINT32 Reserved1; 804 UINT64 BaseHpa; 805 UINT64 WindowSize; 806 UINT8 InterleaveWays; 807 UINT8 InterleaveArithmetic; 808 UINT16 Reserved2; 809 UINT32 Granularity; 810 UINT16 Restrictions; 811 UINT16 QtgId; 812 UINT32 InterleaveTargets[]; 813 814 } ACPI_CEDT_CFMWS; 815 816 typedef struct acpi_cedt_cfmws_target_element 817 { 818 UINT32 InterleaveTarget; 819 820 } ACPI_CEDT_CFMWS_TARGET_ELEMENT; 821 822 /* Values for Interleave Arithmetic field above */ 823 824 #define ACPI_CEDT_CFMWS_ARITHMETIC_MODULO (0) 825 #define ACPI_CEDT_CFMWS_ARITHMETIC_XOR (1) 826 827 /* Values for Restrictions field above */ 828 829 #define ACPI_CEDT_CFMWS_RESTRICT_TYPE2 (1) 830 #define ACPI_CEDT_CFMWS_RESTRICT_TYPE3 (1<<1) 831 #define ACPI_CEDT_CFMWS_RESTRICT_VOLATILE (1<<2) 832 #define ACPI_CEDT_CFMWS_RESTRICT_PMEM (1<<3) 833 #define ACPI_CEDT_CFMWS_RESTRICT_FIXED (1<<4) 834 835 /* 2: CXL XOR Interleave Math Structure */ 836 837 typedef struct acpi_cedt_cxims { 838 ACPI_CEDT_HEADER Header; 839 UINT16 Reserved1; 840 UINT8 Hbig; 841 UINT8 NrXormaps; 842 UINT64 XormapList[]; 843 } ACPI_CEDT_CXIMS; 844 845 typedef struct acpi_cedt_cxims_target_element 846 { 847 UINT64 Xormap; 848 849 } ACPI_CEDT_CXIMS_TARGET_ELEMENT; 850 851 852 /* 3: CXL RCEC Downstream Port Association Structure */ 853 854 struct acpi_cedt_rdpas { 855 ACPI_CEDT_HEADER Header; 856 UINT16 Segment; 857 UINT16 Bdf; 858 UINT8 Protocol; 859 UINT64 Address; 860 }; 861 862 /* Masks for bdf field above */ 863 #define ACPI_CEDT_RDPAS_BUS_MASK 0xff00 864 #define ACPI_CEDT_RDPAS_DEVICE_MASK 0x00f8 865 #define ACPI_CEDT_RDPAS_FUNCTION_MASK 0x0007 866 867 #define ACPI_CEDT_RDPAS_PROTOCOL_IO (0) 868 #define ACPI_CEDT_RDPAS_PROTOCOL_CACHEMEM (1) 869 870 /******************************************************************************* 871 * 872 * CPEP - Corrected Platform Error Polling table (ACPI 4.0) 873 * Version 1 874 * 875 ******************************************************************************/ 876 877 typedef struct acpi_table_cpep 878 { 879 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 880 UINT64 Reserved; 881 882 } ACPI_TABLE_CPEP; 883 884 885 /* Subtable */ 886 887 typedef struct acpi_cpep_polling 888 { 889 ACPI_SUBTABLE_HEADER Header; 890 UINT8 Id; /* Processor ID */ 891 UINT8 Eid; /* Processor EID */ 892 UINT32 Interval; /* Polling interval (msec) */ 893 894 } ACPI_CPEP_POLLING; 895 896 897 /******************************************************************************* 898 * 899 * CSRT - Core System Resource Table 900 * Version 0 901 * 902 * Conforms to the "Core System Resource Table (CSRT)", November 14, 2011 903 * 904 ******************************************************************************/ 905 906 typedef struct acpi_table_csrt 907 { 908 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 909 910 } ACPI_TABLE_CSRT; 911 912 913 /* Resource Group subtable */ 914 915 typedef struct acpi_csrt_group 916 { 917 UINT32 Length; 918 UINT32 VendorId; 919 UINT32 SubvendorId; 920 UINT16 DeviceId; 921 UINT16 SubdeviceId; 922 UINT16 Revision; 923 UINT16 Reserved; 924 UINT32 SharedInfoLength; 925 926 /* Shared data immediately follows (Length = SharedInfoLength) */ 927 928 } ACPI_CSRT_GROUP; 929 930 /* Shared Info subtable */ 931 932 typedef struct acpi_csrt_shared_info 933 { 934 UINT16 MajorVersion; 935 UINT16 MinorVersion; 936 UINT32 MmioBaseLow; 937 UINT32 MmioBaseHigh; 938 UINT32 GsiInterrupt; 939 UINT8 InterruptPolarity; 940 UINT8 InterruptMode; 941 UINT8 NumChannels; 942 UINT8 DmaAddressWidth; 943 UINT16 BaseRequestLine; 944 UINT16 NumHandshakeSignals; 945 UINT32 MaxBlockSize; 946 947 /* Resource descriptors immediately follow (Length = Group Length - SharedInfoLength) */ 948 949 } ACPI_CSRT_SHARED_INFO; 950 951 /* Resource Descriptor subtable */ 952 953 typedef struct acpi_csrt_descriptor 954 { 955 UINT32 Length; 956 UINT16 Type; 957 UINT16 Subtype; 958 UINT32 Uid; 959 960 /* Resource-specific information immediately follows */ 961 962 } ACPI_CSRT_DESCRIPTOR; 963 964 965 /* Resource Types */ 966 967 #define ACPI_CSRT_TYPE_INTERRUPT 0x0001 968 #define ACPI_CSRT_TYPE_TIMER 0x0002 969 #define ACPI_CSRT_TYPE_DMA 0x0003 970 971 /* Resource Subtypes */ 972 973 #define ACPI_CSRT_XRUPT_LINE 0x0000 974 #define ACPI_CSRT_XRUPT_CONTROLLER 0x0001 975 #define ACPI_CSRT_TIMER 0x0000 976 #define ACPI_CSRT_DMA_CHANNEL 0x0000 977 #define ACPI_CSRT_DMA_CONTROLLER 0x0001 978 979 980 /******************************************************************************* 981 * 982 * DBG2 - Debug Port Table 2 983 * Version 0 (Both main table and subtables) 984 * 985 * Conforms to "Microsoft Debug Port Table 2 (DBG2)", September 21, 2020 986 * 987 ******************************************************************************/ 988 989 typedef struct acpi_table_dbg2 990 { 991 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 992 UINT32 InfoOffset; 993 UINT32 InfoCount; 994 995 } ACPI_TABLE_DBG2; 996 997 998 typedef struct acpi_dbg2_header 999 { 1000 UINT32 InfoOffset; 1001 UINT32 InfoCount; 1002 1003 } ACPI_DBG2_HEADER; 1004 1005 1006 /* Debug Device Information Subtable */ 1007 1008 typedef struct acpi_dbg2_device 1009 { 1010 UINT8 Revision; 1011 UINT16 Length; 1012 UINT8 RegisterCount; /* Number of BaseAddress registers */ 1013 UINT16 NamepathLength; 1014 UINT16 NamepathOffset; 1015 UINT16 OemDataLength; 1016 UINT16 OemDataOffset; 1017 UINT16 PortType; 1018 UINT16 PortSubtype; 1019 UINT16 Reserved; 1020 UINT16 BaseAddressOffset; 1021 UINT16 AddressSizeOffset; 1022 /* 1023 * Data that follows: 1024 * BaseAddress (required) - Each in 12-byte Generic Address Structure format. 1025 * AddressSize (required) - Array of UINT32 sizes corresponding to each BaseAddress register. 1026 * Namepath (required) - Null terminated string. Single dot if not supported. 1027 * OemData (optional) - Length is OemDataLength. 1028 */ 1029 } ACPI_DBG2_DEVICE; 1030 1031 /* Types for PortType field above */ 1032 1033 #define ACPI_DBG2_SERIAL_PORT 0x8000 1034 #define ACPI_DBG2_1394_PORT 0x8001 1035 #define ACPI_DBG2_USB_PORT 0x8002 1036 #define ACPI_DBG2_NET_PORT 0x8003 1037 1038 /* Subtypes for PortSubtype field above */ 1039 1040 #define ACPI_DBG2_16550_COMPATIBLE 0x0000 1041 #define ACPI_DBG2_16550_SUBSET 0x0001 1042 #define ACPI_DBG2_MAX311XE_SPI 0x0002 1043 #define ACPI_DBG2_ARM_PL011 0x0003 1044 #define ACPI_DBG2_MSM8X60 0x0004 1045 #define ACPI_DBG2_16550_NVIDIA 0x0005 1046 #define ACPI_DBG2_TI_OMAP 0x0006 1047 #define ACPI_DBG2_APM88XXXX 0x0008 1048 #define ACPI_DBG2_MSM8974 0x0009 1049 #define ACPI_DBG2_SAM5250 0x000A 1050 #define ACPI_DBG2_INTEL_USIF 0x000B 1051 #define ACPI_DBG2_IMX6 0x000C 1052 #define ACPI_DBG2_ARM_SBSA_32BIT 0x000D 1053 #define ACPI_DBG2_ARM_SBSA_GENERIC 0x000E 1054 #define ACPI_DBG2_ARM_DCC 0x000F 1055 #define ACPI_DBG2_BCM2835 0x0010 1056 #define ACPI_DBG2_SDM845_1_8432MHZ 0x0011 1057 #define ACPI_DBG2_16550_WITH_GAS 0x0012 1058 #define ACPI_DBG2_SDM845_7_372MHZ 0x0013 1059 #define ACPI_DBG2_INTEL_LPSS 0x0014 1060 #define ACPI_DBG2_RISCV_SBI_CON 0x0015 1061 1062 #define ACPI_DBG2_1394_STANDARD 0x0000 1063 1064 #define ACPI_DBG2_USB_XHCI 0x0000 1065 #define ACPI_DBG2_USB_EHCI 0x0001 1066 1067 1068 /******************************************************************************* 1069 * 1070 * DBGP - Debug Port table 1071 * Version 1 1072 * 1073 * Conforms to the "Debug Port Specification", Version 1.00, 2/9/2000 1074 * 1075 ******************************************************************************/ 1076 1077 typedef struct acpi_table_dbgp 1078 { 1079 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1080 UINT8 Type; /* 0=full 16550, 1=subset of 16550 */ 1081 UINT8 Reserved[3]; 1082 ACPI_GENERIC_ADDRESS DebugPort; 1083 1084 } ACPI_TABLE_DBGP; 1085 1086 1087 /******************************************************************************* 1088 * 1089 * DMAR - DMA Remapping table 1090 * Version 1 1091 * 1092 * Conforms to "Intel Virtualization Technology for Directed I/O", 1093 * Version 2.3, October 2014 1094 * 1095 ******************************************************************************/ 1096 1097 typedef struct acpi_table_dmar 1098 { 1099 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1100 UINT8 Width; /* Host Address Width */ 1101 UINT8 Flags; 1102 UINT8 Reserved[10]; 1103 1104 } ACPI_TABLE_DMAR; 1105 1106 /* Masks for Flags field above */ 1107 1108 #define ACPI_DMAR_INTR_REMAP (1) 1109 #define ACPI_DMAR_X2APIC_OPT_OUT (1<<1) 1110 #define ACPI_DMAR_X2APIC_MODE (1<<2) 1111 1112 1113 /* DMAR subtable header */ 1114 1115 typedef struct acpi_dmar_header 1116 { 1117 UINT16 Type; 1118 UINT16 Length; 1119 1120 } ACPI_DMAR_HEADER; 1121 1122 /* Values for subtable type in ACPI_DMAR_HEADER */ 1123 1124 enum AcpiDmarType 1125 { 1126 ACPI_DMAR_TYPE_HARDWARE_UNIT = 0, 1127 ACPI_DMAR_TYPE_RESERVED_MEMORY = 1, 1128 ACPI_DMAR_TYPE_ROOT_ATS = 2, 1129 ACPI_DMAR_TYPE_HARDWARE_AFFINITY = 3, 1130 ACPI_DMAR_TYPE_NAMESPACE = 4, 1131 ACPI_DMAR_TYPE_SATC = 5, 1132 ACPI_DMAR_TYPE_SIDP = 6, 1133 ACPI_DMAR_TYPE_RESERVED = 7 /* 7 and greater are reserved */ 1134 }; 1135 1136 1137 /* DMAR Device Scope structure */ 1138 1139 typedef struct acpi_dmar_device_scope 1140 { 1141 UINT8 EntryType; 1142 UINT8 Length; 1143 UINT8 Flags; 1144 UINT8 Reserved; 1145 UINT8 EnumerationId; 1146 UINT8 Bus; 1147 1148 } ACPI_DMAR_DEVICE_SCOPE; 1149 1150 /* Values for EntryType in ACPI_DMAR_DEVICE_SCOPE - device types */ 1151 1152 enum AcpiDmarScopeType 1153 { 1154 ACPI_DMAR_SCOPE_TYPE_NOT_USED = 0, 1155 ACPI_DMAR_SCOPE_TYPE_ENDPOINT = 1, 1156 ACPI_DMAR_SCOPE_TYPE_BRIDGE = 2, 1157 ACPI_DMAR_SCOPE_TYPE_IOAPIC = 3, 1158 ACPI_DMAR_SCOPE_TYPE_HPET = 4, 1159 ACPI_DMAR_SCOPE_TYPE_NAMESPACE = 5, 1160 ACPI_DMAR_SCOPE_TYPE_RESERVED = 6 /* 6 and greater are reserved */ 1161 }; 1162 1163 typedef struct acpi_dmar_pci_path 1164 { 1165 UINT8 Device; 1166 UINT8 Function; 1167 1168 } ACPI_DMAR_PCI_PATH; 1169 1170 1171 /* 1172 * DMAR Subtables, correspond to Type in ACPI_DMAR_HEADER 1173 */ 1174 1175 /* 0: Hardware Unit Definition */ 1176 1177 typedef struct acpi_dmar_hardware_unit 1178 { 1179 ACPI_DMAR_HEADER Header; 1180 UINT8 Flags; 1181 UINT8 Size; 1182 UINT16 Segment; 1183 UINT64 Address; /* Register Base Address */ 1184 1185 } ACPI_DMAR_HARDWARE_UNIT; 1186 1187 /* Masks for Flags field above */ 1188 1189 #define ACPI_DMAR_INCLUDE_ALL (1) 1190 1191 1192 /* 1: Reserved Memory Definition */ 1193 1194 typedef struct acpi_dmar_reserved_memory 1195 { 1196 ACPI_DMAR_HEADER Header; 1197 UINT16 Reserved; 1198 UINT16 Segment; 1199 UINT64 BaseAddress; /* 4K aligned base address */ 1200 UINT64 EndAddress; /* 4K aligned limit address */ 1201 1202 } ACPI_DMAR_RESERVED_MEMORY; 1203 1204 /* Masks for Flags field above */ 1205 1206 #define ACPI_DMAR_ALLOW_ALL (1) 1207 1208 1209 /* 2: Root Port ATS Capability Reporting Structure */ 1210 1211 typedef struct acpi_dmar_atsr 1212 { 1213 ACPI_DMAR_HEADER Header; 1214 UINT8 Flags; 1215 UINT8 Reserved; 1216 UINT16 Segment; 1217 1218 } ACPI_DMAR_ATSR; 1219 1220 /* Masks for Flags field above */ 1221 1222 #define ACPI_DMAR_ALL_PORTS (1) 1223 1224 1225 /* 3: Remapping Hardware Static Affinity Structure */ 1226 1227 typedef struct acpi_dmar_rhsa 1228 { 1229 ACPI_DMAR_HEADER Header; 1230 UINT32 Reserved; 1231 UINT64 BaseAddress; 1232 UINT32 ProximityDomain; 1233 1234 } ACPI_DMAR_RHSA; 1235 1236 1237 /* 4: ACPI Namespace Device Declaration Structure */ 1238 1239 typedef struct acpi_dmar_andd 1240 { 1241 ACPI_DMAR_HEADER Header; 1242 UINT8 Reserved[3]; 1243 UINT8 DeviceNumber; 1244 union { 1245 char __pad; 1246 ACPI_FLEX_ARRAY(char, DeviceName); 1247 }; 1248 1249 } ACPI_DMAR_ANDD; 1250 1251 1252 /* 5: SoC Integrated Address Translation Cache (SATC) */ 1253 1254 typedef struct acpi_dmar_satc 1255 { 1256 ACPI_DMAR_HEADER Header; 1257 UINT8 Flags; 1258 UINT8 Reserved; 1259 UINT16 Segment; 1260 1261 } ACPI_DMAR_SATC; 1262 1263 1264 /* 6: SoC Integrated Device Property Reporting Structure */ 1265 1266 typedef struct acpi_dmar_sidp 1267 { 1268 ACPI_DMAR_HEADER Header; 1269 UINT16 Reserved; 1270 UINT16 Segment; 1271 1272 } ACPI_DMAR_SIDP; 1273 1274 1275 /******************************************************************************* 1276 * 1277 * DRTM - Dynamic Root of Trust for Measurement table 1278 * Conforms to "TCG D-RTM Architecture" June 17 2013, Version 1.0.0 1279 * Table version 1 1280 * 1281 ******************************************************************************/ 1282 1283 typedef struct acpi_table_drtm 1284 { 1285 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1286 UINT64 EntryBaseAddress; 1287 UINT64 EntryLength; 1288 UINT32 EntryAddress32; 1289 UINT64 EntryAddress64; 1290 UINT64 ExitAddress; 1291 UINT64 LogAreaAddress; 1292 UINT32 LogAreaLength; 1293 UINT64 ArchDependentAddress; 1294 UINT32 Flags; 1295 1296 } ACPI_TABLE_DRTM; 1297 1298 /* Flag Definitions for above */ 1299 1300 #define ACPI_DRTM_ACCESS_ALLOWED (1) 1301 #define ACPI_DRTM_ENABLE_GAP_CODE (1<<1) 1302 #define ACPI_DRTM_INCOMPLETE_MEASUREMENTS (1<<2) 1303 #define ACPI_DRTM_AUTHORITY_ORDER (1<<3) 1304 1305 1306 /* 1) Validated Tables List (64-bit addresses) */ 1307 1308 typedef struct acpi_drtm_vtable_list 1309 { 1310 UINT32 ValidatedTableCount; 1311 UINT64 ValidatedTables[]; 1312 1313 } ACPI_DRTM_VTABLE_LIST; 1314 1315 /* 2) Resources List (of Resource Descriptors) */ 1316 1317 /* Resource Descriptor */ 1318 1319 typedef struct acpi_drtm_resource 1320 { 1321 UINT8 Size[7]; 1322 UINT8 Type; 1323 UINT64 Address; 1324 1325 } ACPI_DRTM_RESOURCE; 1326 1327 typedef struct acpi_drtm_resource_list 1328 { 1329 UINT32 ResourceCount; 1330 ACPI_DRTM_RESOURCE Resources[]; 1331 1332 } ACPI_DRTM_RESOURCE_LIST; 1333 1334 /* 3) Platform-specific Identifiers List */ 1335 1336 typedef struct acpi_drtm_dps_id 1337 { 1338 UINT32 DpsIdLength; 1339 UINT8 DpsId[16]; 1340 1341 } ACPI_DRTM_DPS_ID; 1342 1343 1344 /******************************************************************************* 1345 * 1346 * ECDT - Embedded Controller Boot Resources Table 1347 * Version 1 1348 * 1349 ******************************************************************************/ 1350 1351 typedef struct acpi_table_ecdt 1352 { 1353 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1354 ACPI_GENERIC_ADDRESS Control; /* Address of EC command/status register */ 1355 ACPI_GENERIC_ADDRESS Data; /* Address of EC data register */ 1356 UINT32 Uid; /* Unique ID - must be same as the EC _UID method */ 1357 UINT8 Gpe; /* The GPE for the EC */ 1358 UINT8 Id[]; /* Full namepath of the EC in the ACPI namespace */ 1359 1360 } ACPI_TABLE_ECDT; 1361 1362 1363 /******************************************************************************* 1364 * 1365 * EINJ - Error Injection Table (ACPI 4.0) 1366 * Version 1 1367 * 1368 ******************************************************************************/ 1369 1370 typedef struct acpi_table_einj 1371 { 1372 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1373 UINT32 HeaderLength; 1374 UINT8 Flags; 1375 UINT8 Reserved[3]; 1376 UINT32 Entries; 1377 1378 } ACPI_TABLE_EINJ; 1379 1380 1381 /* EINJ Injection Instruction Entries (actions) */ 1382 1383 typedef struct acpi_einj_entry 1384 { 1385 ACPI_WHEA_HEADER WheaHeader; /* Common header for WHEA tables */ 1386 1387 } ACPI_EINJ_ENTRY; 1388 1389 /* Masks for Flags field above */ 1390 1391 #define ACPI_EINJ_PRESERVE (1) 1392 1393 /* Values for Action field above */ 1394 1395 enum AcpiEinjActions 1396 { 1397 ACPI_EINJ_BEGIN_OPERATION = 0x0, 1398 ACPI_EINJ_GET_TRIGGER_TABLE = 0x1, 1399 ACPI_EINJ_SET_ERROR_TYPE = 0x2, 1400 ACPI_EINJ_GET_ERROR_TYPE = 0x3, 1401 ACPI_EINJ_END_OPERATION = 0x4, 1402 ACPI_EINJ_EXECUTE_OPERATION = 0x5, 1403 ACPI_EINJ_CHECK_BUSY_STATUS = 0x6, 1404 ACPI_EINJ_GET_COMMAND_STATUS = 0x7, 1405 ACPI_EINJ_SET_ERROR_TYPE_WITH_ADDRESS = 0x8, 1406 ACPI_EINJ_GET_EXECUTE_TIMINGS = 0x9, 1407 ACPI_EINJV2_GET_ERROR_TYPE = 0x11, 1408 ACPI_EINJ_ACTION_RESERVED = 0x12, /* 0x12 and greater are reserved */ 1409 ACPI_EINJ_TRIGGER_ERROR = 0xFF /* Except for this value */ 1410 }; 1411 1412 /* Values for Instruction field above */ 1413 1414 enum AcpiEinjInstructions 1415 { 1416 ACPI_EINJ_READ_REGISTER = 0, 1417 ACPI_EINJ_READ_REGISTER_VALUE = 1, 1418 ACPI_EINJ_WRITE_REGISTER = 2, 1419 ACPI_EINJ_WRITE_REGISTER_VALUE = 3, 1420 ACPI_EINJ_NOOP = 4, 1421 ACPI_EINJ_FLUSH_CACHELINE = 5, 1422 ACPI_EINJ_INSTRUCTION_RESERVED = 6 /* 6 and greater are reserved */ 1423 }; 1424 1425 typedef struct acpi_einj_error_type_with_addr 1426 { 1427 UINT32 ErrorType; 1428 UINT32 VendorStructOffset; 1429 UINT32 Flags; 1430 UINT32 ApicId; 1431 UINT64 Address; 1432 UINT64 Range; 1433 UINT32 PcieId; 1434 1435 } ACPI_EINJ_ERROR_TYPE_WITH_ADDR; 1436 1437 typedef struct acpi_einj_vendor 1438 { 1439 UINT32 Length; 1440 UINT32 PcieId; 1441 UINT16 VendorId; 1442 UINT16 DeviceId; 1443 UINT8 RevisionId; 1444 UINT8 Reserved[3]; 1445 1446 } ACPI_EINJ_VENDOR; 1447 1448 1449 /* EINJ Trigger Error Action Table */ 1450 1451 typedef struct acpi_einj_trigger 1452 { 1453 UINT32 HeaderSize; 1454 UINT32 Revision; 1455 UINT32 TableSize; 1456 UINT32 EntryCount; 1457 1458 } ACPI_EINJ_TRIGGER; 1459 1460 /* Command status return values */ 1461 1462 enum AcpiEinjCommandStatus 1463 { 1464 ACPI_EINJ_SUCCESS = 0, 1465 ACPI_EINJ_FAILURE = 1, 1466 ACPI_EINJ_INVALID_ACCESS = 2, 1467 ACPI_EINJ_STATUS_RESERVED = 3 /* 3 and greater are reserved */ 1468 }; 1469 1470 1471 /* Error types returned from ACPI_EINJ_GET_ERROR_TYPE (bitfield) */ 1472 1473 #define ACPI_EINJ_PROCESSOR_CORRECTABLE (1) 1474 #define ACPI_EINJ_PROCESSOR_UNCORRECTABLE (1<<1) 1475 #define ACPI_EINJ_PROCESSOR_FATAL (1<<2) 1476 #define ACPI_EINJ_MEMORY_CORRECTABLE (1<<3) 1477 #define ACPI_EINJ_MEMORY_UNCORRECTABLE (1<<4) 1478 #define ACPI_EINJ_MEMORY_FATAL (1<<5) 1479 #define ACPI_EINJ_PCIX_CORRECTABLE (1<<6) 1480 #define ACPI_EINJ_PCIX_UNCORRECTABLE (1<<7) 1481 #define ACPI_EINJ_PCIX_FATAL (1<<8) 1482 #define ACPI_EINJ_PLATFORM_CORRECTABLE (1<<9) 1483 #define ACPI_EINJ_PLATFORM_UNCORRECTABLE (1<<10) 1484 #define ACPI_EINJ_PLATFORM_FATAL (1<<11) 1485 #define ACPI_EINJ_CXL_CACHE_CORRECTABLE (1<<12) 1486 #define ACPI_EINJ_CXL_CACHE_UNCORRECTABLE (1<<13) 1487 #define ACPI_EINJ_CXL_CACHE_FATAL (1<<14) 1488 #define ACPI_EINJ_CXL_MEM_CORRECTABLE (1<<15) 1489 #define ACPI_EINJ_CXL_MEM_UNCORRECTABLE (1<<16) 1490 #define ACPI_EINJ_CXL_MEM_FATAL (1<<17) 1491 #define ACPI_EINJ_VENDOR_DEFINED (1<<31) 1492 1493 1494 /******************************************************************************* 1495 * 1496 * ERST - Error Record Serialization Table (ACPI 4.0) 1497 * Version 1 1498 * 1499 ******************************************************************************/ 1500 1501 typedef struct acpi_table_erst 1502 { 1503 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1504 UINT32 HeaderLength; 1505 UINT32 Reserved; 1506 UINT32 Entries; 1507 1508 } ACPI_TABLE_ERST; 1509 1510 1511 /* ERST Serialization Entries (actions) */ 1512 1513 typedef struct acpi_erst_entry 1514 { 1515 ACPI_WHEA_HEADER WheaHeader; /* Common header for WHEA tables */ 1516 1517 } ACPI_ERST_ENTRY; 1518 1519 /* Masks for Flags field above */ 1520 1521 #define ACPI_ERST_PRESERVE (1) 1522 1523 /* Values for Action field above */ 1524 1525 enum AcpiErstActions 1526 { 1527 ACPI_ERST_BEGIN_WRITE = 0, 1528 ACPI_ERST_BEGIN_READ = 1, 1529 ACPI_ERST_BEGIN_CLEAR = 2, 1530 ACPI_ERST_END = 3, 1531 ACPI_ERST_SET_RECORD_OFFSET = 4, 1532 ACPI_ERST_EXECUTE_OPERATION = 5, 1533 ACPI_ERST_CHECK_BUSY_STATUS = 6, 1534 ACPI_ERST_GET_COMMAND_STATUS = 7, 1535 ACPI_ERST_GET_RECORD_ID = 8, 1536 ACPI_ERST_SET_RECORD_ID = 9, 1537 ACPI_ERST_GET_RECORD_COUNT = 10, 1538 ACPI_ERST_BEGIN_DUMMY_WRIITE = 11, 1539 ACPI_ERST_NOT_USED = 12, 1540 ACPI_ERST_GET_ERROR_RANGE = 13, 1541 ACPI_ERST_GET_ERROR_LENGTH = 14, 1542 ACPI_ERST_GET_ERROR_ATTRIBUTES = 15, 1543 ACPI_ERST_EXECUTE_TIMINGS = 16, 1544 ACPI_ERST_ACTION_RESERVED = 17 /* 17 and greater are reserved */ 1545 }; 1546 1547 /* Values for Instruction field above */ 1548 1549 enum AcpiErstInstructions 1550 { 1551 ACPI_ERST_READ_REGISTER = 0, 1552 ACPI_ERST_READ_REGISTER_VALUE = 1, 1553 ACPI_ERST_WRITE_REGISTER = 2, 1554 ACPI_ERST_WRITE_REGISTER_VALUE = 3, 1555 ACPI_ERST_NOOP = 4, 1556 ACPI_ERST_LOAD_VAR1 = 5, 1557 ACPI_ERST_LOAD_VAR2 = 6, 1558 ACPI_ERST_STORE_VAR1 = 7, 1559 ACPI_ERST_ADD = 8, 1560 ACPI_ERST_SUBTRACT = 9, 1561 ACPI_ERST_ADD_VALUE = 10, 1562 ACPI_ERST_SUBTRACT_VALUE = 11, 1563 ACPI_ERST_STALL = 12, 1564 ACPI_ERST_STALL_WHILE_TRUE = 13, 1565 ACPI_ERST_SKIP_NEXT_IF_TRUE = 14, 1566 ACPI_ERST_GOTO = 15, 1567 ACPI_ERST_SET_SRC_ADDRESS_BASE = 16, 1568 ACPI_ERST_SET_DST_ADDRESS_BASE = 17, 1569 ACPI_ERST_MOVE_DATA = 18, 1570 ACPI_ERST_INSTRUCTION_RESERVED = 19 /* 19 and greater are reserved */ 1571 }; 1572 1573 /* Command status return values */ 1574 1575 enum AcpiErstCommandStatus 1576 { 1577 ACPI_ERST_SUCCESS = 0, 1578 ACPI_ERST_NO_SPACE = 1, 1579 ACPI_ERST_NOT_AVAILABLE = 2, 1580 ACPI_ERST_FAILURE = 3, 1581 ACPI_ERST_RECORD_EMPTY = 4, 1582 ACPI_ERST_NOT_FOUND = 5, 1583 ACPI_ERST_STATUS_RESERVED = 6 /* 6 and greater are reserved */ 1584 }; 1585 1586 1587 /* Error Record Serialization Information */ 1588 1589 typedef struct acpi_erst_info 1590 { 1591 UINT16 Signature; /* Should be "ER" */ 1592 UINT8 Data[48]; 1593 1594 } ACPI_ERST_INFO; 1595 1596 1597 /******************************************************************************* 1598 * 1599 * FPDT - Firmware Performance Data Table (ACPI 5.0) 1600 * Version 1 1601 * 1602 ******************************************************************************/ 1603 1604 typedef struct acpi_table_fpdt 1605 { 1606 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1607 1608 } ACPI_TABLE_FPDT; 1609 1610 1611 /* FPDT subtable header (Performance Record Structure) */ 1612 1613 typedef struct acpi_fpdt_header 1614 { 1615 UINT16 Type; 1616 UINT8 Length; 1617 UINT8 Revision; 1618 1619 } ACPI_FPDT_HEADER; 1620 1621 /* Values for Type field above */ 1622 1623 enum AcpiFpdtType 1624 { 1625 ACPI_FPDT_TYPE_BOOT = 0, 1626 ACPI_FPDT_TYPE_S3PERF = 1 1627 }; 1628 1629 1630 /* 1631 * FPDT subtables 1632 */ 1633 1634 /* 0: Firmware Basic Boot Performance Record */ 1635 1636 typedef struct acpi_fpdt_boot_pointer 1637 { 1638 ACPI_FPDT_HEADER Header; 1639 UINT8 Reserved[4]; 1640 UINT64 Address; 1641 1642 } ACPI_FPDT_BOOT_POINTER; 1643 1644 1645 /* 1: S3 Performance Table Pointer Record */ 1646 1647 typedef struct acpi_fpdt_s3pt_pointer 1648 { 1649 ACPI_FPDT_HEADER Header; 1650 UINT8 Reserved[4]; 1651 UINT64 Address; 1652 1653 } ACPI_FPDT_S3PT_POINTER; 1654 1655 1656 /* 1657 * S3PT - S3 Performance Table. This table is pointed to by the 1658 * S3 Pointer Record above. 1659 */ 1660 typedef struct acpi_table_s3pt 1661 { 1662 UINT8 Signature[4]; /* "S3PT" */ 1663 UINT32 Length; 1664 1665 } ACPI_TABLE_S3PT; 1666 1667 1668 /* 1669 * S3PT Subtables (Not part of the actual FPDT) 1670 */ 1671 1672 /* Values for Type field in S3PT header */ 1673 1674 enum AcpiS3ptType 1675 { 1676 ACPI_S3PT_TYPE_RESUME = 0, 1677 ACPI_S3PT_TYPE_SUSPEND = 1, 1678 ACPI_FPDT_BOOT_PERFORMANCE = 2 1679 }; 1680 1681 typedef struct acpi_s3pt_resume 1682 { 1683 ACPI_FPDT_HEADER Header; 1684 UINT32 ResumeCount; 1685 UINT64 FullResume; 1686 UINT64 AverageResume; 1687 1688 } ACPI_S3PT_RESUME; 1689 1690 typedef struct acpi_s3pt_suspend 1691 { 1692 ACPI_FPDT_HEADER Header; 1693 UINT64 SuspendStart; 1694 UINT64 SuspendEnd; 1695 1696 } ACPI_S3PT_SUSPEND; 1697 1698 1699 /* 1700 * FPDT Boot Performance Record (Not part of the actual FPDT) 1701 */ 1702 typedef struct acpi_fpdt_boot 1703 { 1704 ACPI_FPDT_HEADER Header; 1705 UINT8 Reserved[4]; 1706 UINT64 ResetEnd; 1707 UINT64 LoadStart; 1708 UINT64 StartupStart; 1709 UINT64 ExitServicesEntry; 1710 UINT64 ExitServicesExit; 1711 1712 } ACPI_FPDT_BOOT; 1713 1714 1715 /******************************************************************************* 1716 * 1717 * GTDT - Generic Timer Description Table (ACPI 5.1) 1718 * Version 2 1719 * 1720 ******************************************************************************/ 1721 1722 typedef struct acpi_table_gtdt 1723 { 1724 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1725 UINT64 CounterBlockAddresss; 1726 UINT32 Reserved; 1727 UINT32 SecureEl1Interrupt; 1728 UINT32 SecureEl1Flags; 1729 UINT32 NonSecureEl1Interrupt; 1730 UINT32 NonSecureEl1Flags; 1731 UINT32 VirtualTimerInterrupt; 1732 UINT32 VirtualTimerFlags; 1733 UINT32 NonSecureEl2Interrupt; 1734 UINT32 NonSecureEl2Flags; 1735 UINT64 CounterReadBlockAddress; 1736 UINT32 PlatformTimerCount; 1737 UINT32 PlatformTimerOffset; 1738 1739 } ACPI_TABLE_GTDT; 1740 1741 /* Flag Definitions: Timer Block Physical Timers and Virtual timers */ 1742 1743 #define ACPI_GTDT_INTERRUPT_MODE (1) 1744 #define ACPI_GTDT_INTERRUPT_POLARITY (1<<1) 1745 #define ACPI_GTDT_ALWAYS_ON (1<<2) 1746 1747 typedef struct acpi_gtdt_el2 1748 { 1749 UINT32 VirtualEL2TimerGsiv; 1750 UINT32 VirtualEL2TimerFlags; 1751 } ACPI_GTDT_EL2; 1752 1753 1754 /* Common GTDT subtable header */ 1755 1756 typedef struct acpi_gtdt_header 1757 { 1758 UINT8 Type; 1759 UINT16 Length; 1760 1761 } ACPI_GTDT_HEADER; 1762 1763 /* Values for GTDT subtable type above */ 1764 1765 enum AcpiGtdtType 1766 { 1767 ACPI_GTDT_TYPE_TIMER_BLOCK = 0, 1768 ACPI_GTDT_TYPE_WATCHDOG = 1, 1769 ACPI_GTDT_TYPE_RESERVED = 2 /* 2 and greater are reserved */ 1770 }; 1771 1772 1773 /* GTDT Subtables, correspond to Type in acpi_gtdt_header */ 1774 1775 /* 0: Generic Timer Block */ 1776 1777 typedef struct acpi_gtdt_timer_block 1778 { 1779 ACPI_GTDT_HEADER Header; 1780 UINT8 Reserved; 1781 UINT64 BlockAddress; 1782 UINT32 TimerCount; 1783 UINT32 TimerOffset; 1784 1785 } ACPI_GTDT_TIMER_BLOCK; 1786 1787 /* Timer Sub-Structure, one per timer */ 1788 1789 typedef struct acpi_gtdt_timer_entry 1790 { 1791 UINT8 FrameNumber; 1792 UINT8 Reserved[3]; 1793 UINT64 BaseAddress; 1794 UINT64 El0BaseAddress; 1795 UINT32 TimerInterrupt; 1796 UINT32 TimerFlags; 1797 UINT32 VirtualTimerInterrupt; 1798 UINT32 VirtualTimerFlags; 1799 UINT32 CommonFlags; 1800 1801 } ACPI_GTDT_TIMER_ENTRY; 1802 1803 /* Flag Definitions: TimerFlags and VirtualTimerFlags above */ 1804 1805 #define ACPI_GTDT_GT_IRQ_MODE (1) 1806 #define ACPI_GTDT_GT_IRQ_POLARITY (1<<1) 1807 1808 /* Flag Definitions: CommonFlags above */ 1809 1810 #define ACPI_GTDT_GT_IS_SECURE_TIMER (1) 1811 #define ACPI_GTDT_GT_ALWAYS_ON (1<<1) 1812 1813 1814 /* 1: SBSA Generic Watchdog Structure */ 1815 1816 typedef struct acpi_gtdt_watchdog 1817 { 1818 ACPI_GTDT_HEADER Header; 1819 UINT8 Reserved; 1820 UINT64 RefreshFrameAddress; 1821 UINT64 ControlFrameAddress; 1822 UINT32 TimerInterrupt; 1823 UINT32 TimerFlags; 1824 1825 } ACPI_GTDT_WATCHDOG; 1826 1827 /* Flag Definitions: TimerFlags above */ 1828 1829 #define ACPI_GTDT_WATCHDOG_IRQ_MODE (1) 1830 #define ACPI_GTDT_WATCHDOG_IRQ_POLARITY (1<<1) 1831 #define ACPI_GTDT_WATCHDOG_SECURE (1<<2) 1832 1833 1834 /******************************************************************************* 1835 * 1836 * HEST - Hardware Error Source Table (ACPI 4.0) 1837 * Version 1 1838 * 1839 ******************************************************************************/ 1840 1841 typedef struct acpi_table_hest 1842 { 1843 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1844 UINT32 ErrorSourceCount; 1845 1846 } ACPI_TABLE_HEST; 1847 1848 1849 /* HEST subtable header */ 1850 1851 typedef struct acpi_hest_header 1852 { 1853 UINT16 Type; 1854 UINT16 SourceId; 1855 1856 } ACPI_HEST_HEADER; 1857 1858 1859 /* Values for Type field above for subtables */ 1860 1861 enum AcpiHestTypes 1862 { 1863 ACPI_HEST_TYPE_IA32_CHECK = 0, 1864 ACPI_HEST_TYPE_IA32_CORRECTED_CHECK = 1, 1865 ACPI_HEST_TYPE_IA32_NMI = 2, 1866 ACPI_HEST_TYPE_NOT_USED3 = 3, 1867 ACPI_HEST_TYPE_NOT_USED4 = 4, 1868 ACPI_HEST_TYPE_NOT_USED5 = 5, 1869 ACPI_HEST_TYPE_AER_ROOT_PORT = 6, 1870 ACPI_HEST_TYPE_AER_ENDPOINT = 7, 1871 ACPI_HEST_TYPE_AER_BRIDGE = 8, 1872 ACPI_HEST_TYPE_GENERIC_ERROR = 9, 1873 ACPI_HEST_TYPE_GENERIC_ERROR_V2 = 10, 1874 ACPI_HEST_TYPE_IA32_DEFERRED_CHECK = 11, 1875 ACPI_HEST_TYPE_RESERVED = 12 /* 12 and greater are reserved */ 1876 }; 1877 1878 1879 /* 1880 * HEST substructures contained in subtables 1881 */ 1882 1883 /* 1884 * IA32 Error Bank(s) - Follows the ACPI_HEST_IA_MACHINE_CHECK and 1885 * ACPI_HEST_IA_CORRECTED structures. 1886 */ 1887 typedef struct acpi_hest_ia_error_bank 1888 { 1889 UINT8 BankNumber; 1890 UINT8 ClearStatusOnInit; 1891 UINT8 StatusFormat; 1892 UINT8 Reserved; 1893 UINT32 ControlRegister; 1894 UINT64 ControlData; 1895 UINT32 StatusRegister; 1896 UINT32 AddressRegister; 1897 UINT32 MiscRegister; 1898 1899 } ACPI_HEST_IA_ERROR_BANK; 1900 1901 1902 /* Common HEST sub-structure for PCI/AER structures below (6,7,8) */ 1903 1904 typedef struct acpi_hest_aer_common 1905 { 1906 UINT16 Reserved1; 1907 UINT8 Flags; 1908 UINT8 Enabled; 1909 UINT32 RecordsToPreallocate; 1910 UINT32 MaxSectionsPerRecord; 1911 UINT32 Bus; /* Bus and Segment numbers */ 1912 UINT16 Device; 1913 UINT16 Function; 1914 UINT16 DeviceControl; 1915 UINT16 Reserved2; 1916 UINT32 UncorrectableMask; 1917 UINT32 UncorrectableSeverity; 1918 UINT32 CorrectableMask; 1919 UINT32 AdvancedCapabilities; 1920 1921 } ACPI_HEST_AER_COMMON; 1922 1923 /* Masks for HEST Flags fields */ 1924 1925 #define ACPI_HEST_FIRMWARE_FIRST (1) 1926 #define ACPI_HEST_GLOBAL (1<<1) 1927 #define ACPI_HEST_GHES_ASSIST (1<<2) 1928 1929 /* 1930 * Macros to access the bus/segment numbers in Bus field above: 1931 * Bus number is encoded in bits 7:0 1932 * Segment number is encoded in bits 23:8 1933 */ 1934 #define ACPI_HEST_BUS(Bus) ((Bus) & 0xFF) 1935 #define ACPI_HEST_SEGMENT(Bus) (((Bus) >> 8) & 0xFFFF) 1936 1937 1938 /* Hardware Error Notification */ 1939 1940 typedef struct acpi_hest_notify 1941 { 1942 UINT8 Type; 1943 UINT8 Length; 1944 UINT16 ConfigWriteEnable; 1945 UINT32 PollInterval; 1946 UINT32 Vector; 1947 UINT32 PollingThresholdValue; 1948 UINT32 PollingThresholdWindow; 1949 UINT32 ErrorThresholdValue; 1950 UINT32 ErrorThresholdWindow; 1951 1952 } ACPI_HEST_NOTIFY; 1953 1954 /* Values for Notify Type field above */ 1955 1956 enum AcpiHestNotifyTypes 1957 { 1958 ACPI_HEST_NOTIFY_POLLED = 0, 1959 ACPI_HEST_NOTIFY_EXTERNAL = 1, 1960 ACPI_HEST_NOTIFY_LOCAL = 2, 1961 ACPI_HEST_NOTIFY_SCI = 3, 1962 ACPI_HEST_NOTIFY_NMI = 4, 1963 ACPI_HEST_NOTIFY_CMCI = 5, /* ACPI 5.0 */ 1964 ACPI_HEST_NOTIFY_MCE = 6, /* ACPI 5.0 */ 1965 ACPI_HEST_NOTIFY_GPIO = 7, /* ACPI 6.0 */ 1966 ACPI_HEST_NOTIFY_SEA = 8, /* ACPI 6.1 */ 1967 ACPI_HEST_NOTIFY_SEI = 9, /* ACPI 6.1 */ 1968 ACPI_HEST_NOTIFY_GSIV = 10, /* ACPI 6.1 */ 1969 ACPI_HEST_NOTIFY_SOFTWARE_DELEGATED = 11, /* ACPI 6.2 */ 1970 ACPI_HEST_NOTIFY_RESERVED = 12 /* 12 and greater are reserved */ 1971 }; 1972 1973 /* Values for ConfigWriteEnable bitfield above */ 1974 1975 #define ACPI_HEST_TYPE (1) 1976 #define ACPI_HEST_POLL_INTERVAL (1<<1) 1977 #define ACPI_HEST_POLL_THRESHOLD_VALUE (1<<2) 1978 #define ACPI_HEST_POLL_THRESHOLD_WINDOW (1<<3) 1979 #define ACPI_HEST_ERR_THRESHOLD_VALUE (1<<4) 1980 #define ACPI_HEST_ERR_THRESHOLD_WINDOW (1<<5) 1981 1982 1983 /* 1984 * HEST subtables 1985 */ 1986 1987 /* 0: IA32 Machine Check Exception */ 1988 1989 typedef struct acpi_hest_ia_machine_check 1990 { 1991 ACPI_HEST_HEADER Header; 1992 UINT16 Reserved1; 1993 UINT8 Flags; /* See flags ACPI_HEST_GLOBAL, etc. above */ 1994 UINT8 Enabled; 1995 UINT32 RecordsToPreallocate; 1996 UINT32 MaxSectionsPerRecord; 1997 UINT64 GlobalCapabilityData; 1998 UINT64 GlobalControlData; 1999 UINT8 NumHardwareBanks; 2000 UINT8 Reserved3[7]; 2001 2002 } ACPI_HEST_IA_MACHINE_CHECK; 2003 2004 2005 /* 1: IA32 Corrected Machine Check */ 2006 2007 typedef struct acpi_hest_ia_corrected 2008 { 2009 ACPI_HEST_HEADER Header; 2010 UINT16 Reserved1; 2011 UINT8 Flags; /* See flags ACPI_HEST_GLOBAL, etc. above */ 2012 UINT8 Enabled; 2013 UINT32 RecordsToPreallocate; 2014 UINT32 MaxSectionsPerRecord; 2015 ACPI_HEST_NOTIFY Notify; 2016 UINT8 NumHardwareBanks; 2017 UINT8 Reserved2[3]; 2018 2019 } ACPI_HEST_IA_CORRECTED; 2020 2021 2022 /* 2: IA32 Non-Maskable Interrupt */ 2023 2024 typedef struct acpi_hest_ia_nmi 2025 { 2026 ACPI_HEST_HEADER Header; 2027 UINT32 Reserved; 2028 UINT32 RecordsToPreallocate; 2029 UINT32 MaxSectionsPerRecord; 2030 UINT32 MaxRawDataLength; 2031 2032 } ACPI_HEST_IA_NMI; 2033 2034 2035 /* 3,4,5: Not used */ 2036 2037 /* 6: PCI Express Root Port AER */ 2038 2039 typedef struct acpi_hest_aer_root 2040 { 2041 ACPI_HEST_HEADER Header; 2042 ACPI_HEST_AER_COMMON Aer; 2043 UINT32 RootErrorCommand; 2044 2045 } ACPI_HEST_AER_ROOT; 2046 2047 2048 /* 7: PCI Express AER (AER Endpoint) */ 2049 2050 typedef struct acpi_hest_aer 2051 { 2052 ACPI_HEST_HEADER Header; 2053 ACPI_HEST_AER_COMMON Aer; 2054 2055 } ACPI_HEST_AER; 2056 2057 2058 /* 8: PCI Express/PCI-X Bridge AER */ 2059 2060 typedef struct acpi_hest_aer_bridge 2061 { 2062 ACPI_HEST_HEADER Header; 2063 ACPI_HEST_AER_COMMON Aer; 2064 UINT32 UncorrectableMask2; 2065 UINT32 UncorrectableSeverity2; 2066 UINT32 AdvancedCapabilities2; 2067 2068 } ACPI_HEST_AER_BRIDGE; 2069 2070 2071 /* 9: Generic Hardware Error Source */ 2072 2073 typedef struct acpi_hest_generic 2074 { 2075 ACPI_HEST_HEADER Header; 2076 UINT16 RelatedSourceId; 2077 UINT8 Reserved; 2078 UINT8 Enabled; 2079 UINT32 RecordsToPreallocate; 2080 UINT32 MaxSectionsPerRecord; 2081 UINT32 MaxRawDataLength; 2082 ACPI_GENERIC_ADDRESS ErrorStatusAddress; 2083 ACPI_HEST_NOTIFY Notify; 2084 UINT32 ErrorBlockLength; 2085 2086 } ACPI_HEST_GENERIC; 2087 2088 2089 /* 10: Generic Hardware Error Source, version 2 */ 2090 2091 typedef struct acpi_hest_generic_v2 2092 { 2093 ACPI_HEST_HEADER Header; 2094 UINT16 RelatedSourceId; 2095 UINT8 Reserved; 2096 UINT8 Enabled; 2097 UINT32 RecordsToPreallocate; 2098 UINT32 MaxSectionsPerRecord; 2099 UINT32 MaxRawDataLength; 2100 ACPI_GENERIC_ADDRESS ErrorStatusAddress; 2101 ACPI_HEST_NOTIFY Notify; 2102 UINT32 ErrorBlockLength; 2103 ACPI_GENERIC_ADDRESS ReadAckRegister; 2104 UINT64 ReadAckPreserve; 2105 UINT64 ReadAckWrite; 2106 2107 } ACPI_HEST_GENERIC_V2; 2108 2109 2110 /* Generic Error Status block */ 2111 2112 typedef struct acpi_hest_generic_status 2113 { 2114 UINT32 BlockStatus; 2115 UINT32 RawDataOffset; 2116 UINT32 RawDataLength; 2117 UINT32 DataLength; 2118 UINT32 ErrorSeverity; 2119 2120 } ACPI_HEST_GENERIC_STATUS; 2121 2122 /* Values for BlockStatus flags above */ 2123 2124 #define ACPI_HEST_UNCORRECTABLE (1) 2125 #define ACPI_HEST_CORRECTABLE (1<<1) 2126 #define ACPI_HEST_MULTIPLE_UNCORRECTABLE (1<<2) 2127 #define ACPI_HEST_MULTIPLE_CORRECTABLE (1<<3) 2128 #define ACPI_HEST_ERROR_ENTRY_COUNT (0xFF<<4) /* 8 bits, error count */ 2129 2130 2131 /* Generic Error Data entry */ 2132 2133 typedef struct acpi_hest_generic_data 2134 { 2135 UINT8 SectionType[16]; 2136 UINT32 ErrorSeverity; 2137 UINT16 Revision; 2138 UINT8 ValidationBits; 2139 UINT8 Flags; 2140 UINT32 ErrorDataLength; 2141 UINT8 FruId[16]; 2142 UINT8 FruText[20]; 2143 2144 } ACPI_HEST_GENERIC_DATA; 2145 2146 /* Extension for revision 0x0300 */ 2147 2148 typedef struct acpi_hest_generic_data_v300 2149 { 2150 UINT8 SectionType[16]; 2151 UINT32 ErrorSeverity; 2152 UINT16 Revision; 2153 UINT8 ValidationBits; 2154 UINT8 Flags; 2155 UINT32 ErrorDataLength; 2156 UINT8 FruId[16]; 2157 UINT8 FruText[20]; 2158 UINT64 TimeStamp; 2159 2160 } ACPI_HEST_GENERIC_DATA_V300; 2161 2162 /* Values for ErrorSeverity above */ 2163 2164 #define ACPI_HEST_GEN_ERROR_RECOVERABLE 0 2165 #define ACPI_HEST_GEN_ERROR_FATAL 1 2166 #define ACPI_HEST_GEN_ERROR_CORRECTED 2 2167 #define ACPI_HEST_GEN_ERROR_NONE 3 2168 2169 /* Flags for ValidationBits above */ 2170 2171 #define ACPI_HEST_GEN_VALID_FRU_ID (1) 2172 #define ACPI_HEST_GEN_VALID_FRU_STRING (1<<1) 2173 #define ACPI_HEST_GEN_VALID_TIMESTAMP (1<<2) 2174 2175 2176 /* 11: IA32 Deferred Machine Check Exception (ACPI 6.2) */ 2177 2178 typedef struct acpi_hest_ia_deferred_check 2179 { 2180 ACPI_HEST_HEADER Header; 2181 UINT16 Reserved1; 2182 UINT8 Flags; /* See flags ACPI_HEST_GLOBAL, etc. above */ 2183 UINT8 Enabled; 2184 UINT32 RecordsToPreallocate; 2185 UINT32 MaxSectionsPerRecord; 2186 ACPI_HEST_NOTIFY Notify; 2187 UINT8 NumHardwareBanks; 2188 UINT8 Reserved2[3]; 2189 2190 } ACPI_HEST_IA_DEFERRED_CHECK; 2191 2192 2193 /******************************************************************************* 2194 * 2195 * HMAT - Heterogeneous Memory Attributes Table (ACPI 6.3) 2196 * 2197 ******************************************************************************/ 2198 2199 typedef struct acpi_table_hmat 2200 { 2201 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 2202 UINT32 Reserved; 2203 2204 } ACPI_TABLE_HMAT; 2205 2206 2207 /* Values for HMAT structure types */ 2208 2209 enum AcpiHmatType 2210 { 2211 ACPI_HMAT_TYPE_ADDRESS_RANGE = 0, /* Memory subsystem address range */ 2212 ACPI_HMAT_TYPE_LOCALITY = 1, /* System locality latency and bandwidth information */ 2213 ACPI_HMAT_TYPE_CACHE = 2, /* Memory side cache information */ 2214 ACPI_HMAT_TYPE_RESERVED = 3 /* 3 and greater are reserved */ 2215 }; 2216 2217 typedef struct acpi_hmat_structure 2218 { 2219 UINT16 Type; 2220 UINT16 Reserved; 2221 UINT32 Length; 2222 2223 } ACPI_HMAT_STRUCTURE; 2224 2225 2226 /* 2227 * HMAT Structures, correspond to Type in ACPI_HMAT_STRUCTURE 2228 */ 2229 2230 /* 0: Memory proximity domain attributes */ 2231 2232 typedef struct acpi_hmat_proximity_domain 2233 { 2234 ACPI_HMAT_STRUCTURE Header; 2235 UINT16 Flags; 2236 UINT16 Reserved1; 2237 UINT32 InitiatorPD; /* Attached Initiator proximity domain */ 2238 UINT32 MemoryPD; /* Memory proximity domain */ 2239 UINT32 Reserved2; 2240 UINT64 Reserved3; 2241 UINT64 Reserved4; 2242 2243 } ACPI_HMAT_PROXIMITY_DOMAIN; 2244 2245 /* Masks for Flags field above */ 2246 2247 #define ACPI_HMAT_INITIATOR_PD_VALID (1) /* 1: InitiatorPD field is valid */ 2248 2249 2250 /* 1: System locality latency and bandwidth information */ 2251 2252 typedef struct acpi_hmat_locality 2253 { 2254 ACPI_HMAT_STRUCTURE Header; 2255 UINT8 Flags; 2256 UINT8 DataType; 2257 UINT8 MinTransferSize; 2258 UINT8 Reserved1; 2259 UINT32 NumberOfInitiatorPDs; 2260 UINT32 NumberOfTargetPDs; 2261 UINT32 Reserved2; 2262 UINT64 EntryBaseUnit; 2263 2264 } ACPI_HMAT_LOCALITY; 2265 2266 /* Masks for Flags field above */ 2267 2268 #define ACPI_HMAT_MEMORY_HIERARCHY (0x0F) /* Bits 0-3 */ 2269 2270 /* Values for Memory Hierarchy flags */ 2271 2272 #define ACPI_HMAT_MEMORY 0 2273 #define ACPI_HMAT_1ST_LEVEL_CACHE 1 2274 #define ACPI_HMAT_2ND_LEVEL_CACHE 2 2275 #define ACPI_HMAT_3RD_LEVEL_CACHE 3 2276 #define ACPI_HMAT_MINIMUM_XFER_SIZE 0x10 /* Bit 4: ACPI 6.4 */ 2277 #define ACPI_HMAT_NON_SEQUENTIAL_XFERS 0x20 /* Bit 5: ACPI 6.4 */ 2278 2279 2280 /* Values for DataType field above */ 2281 2282 #define ACPI_HMAT_ACCESS_LATENCY 0 2283 #define ACPI_HMAT_READ_LATENCY 1 2284 #define ACPI_HMAT_WRITE_LATENCY 2 2285 #define ACPI_HMAT_ACCESS_BANDWIDTH 3 2286 #define ACPI_HMAT_READ_BANDWIDTH 4 2287 #define ACPI_HMAT_WRITE_BANDWIDTH 5 2288 2289 2290 /* 2: Memory side cache information */ 2291 2292 typedef struct acpi_hmat_cache 2293 { 2294 ACPI_HMAT_STRUCTURE Header; 2295 UINT32 MemoryPD; 2296 UINT32 Reserved1; 2297 UINT64 CacheSize; 2298 UINT32 CacheAttributes; 2299 UINT16 AddressMode; 2300 UINT16 NumberOfSMBIOSHandles; 2301 2302 } ACPI_HMAT_CACHE; 2303 2304 /* Masks for CacheAttributes field above */ 2305 2306 #define ACPI_HMAT_TOTAL_CACHE_LEVEL (0x0000000F) 2307 #define ACPI_HMAT_CACHE_LEVEL (0x000000F0) 2308 #define ACPI_HMAT_CACHE_ASSOCIATIVITY (0x00000F00) 2309 #define ACPI_HMAT_WRITE_POLICY (0x0000F000) 2310 #define ACPI_HMAT_CACHE_LINE_SIZE (0xFFFF0000) 2311 2312 #define ACPI_HMAT_CACHE_MODE_UNKNOWN (0) 2313 #define ACPI_HMAT_CACHE_MODE_EXTENDED_LINEAR (1) 2314 2315 /* Values for cache associativity flag */ 2316 2317 #define ACPI_HMAT_CA_NONE (0) 2318 #define ACPI_HMAT_CA_DIRECT_MAPPED (1) 2319 #define ACPI_HMAT_CA_COMPLEX_CACHE_INDEXING (2) 2320 2321 /* Values for write policy flag */ 2322 2323 #define ACPI_HMAT_CP_NONE (0) 2324 #define ACPI_HMAT_CP_WB (1) 2325 #define ACPI_HMAT_CP_WT (2) 2326 2327 2328 /******************************************************************************* 2329 * 2330 * HPET - High Precision Event Timer table 2331 * Version 1 2332 * 2333 * Conforms to "IA-PC HPET (High Precision Event Timers) Specification", 2334 * Version 1.0a, October 2004 2335 * 2336 ******************************************************************************/ 2337 2338 typedef struct acpi_table_hpet 2339 { 2340 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 2341 UINT32 Id; /* Hardware ID of event timer block */ 2342 ACPI_GENERIC_ADDRESS Address; /* Address of event timer block */ 2343 UINT8 Sequence; /* HPET sequence number */ 2344 UINT16 MinimumTick; /* Main counter min tick, periodic mode */ 2345 UINT8 Flags; 2346 2347 } ACPI_TABLE_HPET; 2348 2349 /* Masks for Flags field above */ 2350 2351 #define ACPI_HPET_PAGE_PROTECT_MASK (3) 2352 2353 /* Values for Page Protect flags */ 2354 2355 enum AcpiHpetPageProtect 2356 { 2357 ACPI_HPET_NO_PAGE_PROTECT = 0, 2358 ACPI_HPET_PAGE_PROTECT4 = 1, 2359 ACPI_HPET_PAGE_PROTECT64 = 2 2360 }; 2361 2362 2363 /******************************************************************************* 2364 * 2365 * IBFT - Boot Firmware Table 2366 * Version 1 2367 * 2368 * Conforms to "iSCSI Boot Firmware Table (iBFT) as Defined in ACPI 3.0b 2369 * Specification", Version 1.01, March 1, 2007 2370 * 2371 * Note: It appears that this table is not intended to appear in the RSDT/XSDT. 2372 * Therefore, it is not currently supported by the disassembler. 2373 * 2374 ******************************************************************************/ 2375 2376 typedef struct acpi_table_ibft 2377 { 2378 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 2379 UINT8 Reserved[12]; 2380 2381 } ACPI_TABLE_IBFT; 2382 2383 2384 /* IBFT common subtable header */ 2385 2386 typedef struct acpi_ibft_header 2387 { 2388 UINT8 Type; 2389 UINT8 Version; 2390 UINT16 Length; 2391 UINT8 Index; 2392 UINT8 Flags; 2393 2394 } ACPI_IBFT_HEADER; 2395 2396 /* Values for Type field above */ 2397 2398 enum AcpiIbftType 2399 { 2400 ACPI_IBFT_TYPE_NOT_USED = 0, 2401 ACPI_IBFT_TYPE_CONTROL = 1, 2402 ACPI_IBFT_TYPE_INITIATOR = 2, 2403 ACPI_IBFT_TYPE_NIC = 3, 2404 ACPI_IBFT_TYPE_TARGET = 4, 2405 ACPI_IBFT_TYPE_EXTENSIONS = 5, 2406 ACPI_IBFT_TYPE_RESERVED = 6 /* 6 and greater are reserved */ 2407 }; 2408 2409 2410 /* IBFT subtables */ 2411 2412 typedef struct acpi_ibft_control 2413 { 2414 ACPI_IBFT_HEADER Header; 2415 UINT16 Extensions; 2416 UINT16 InitiatorOffset; 2417 UINT16 Nic0Offset; 2418 UINT16 Target0Offset; 2419 UINT16 Nic1Offset; 2420 UINT16 Target1Offset; 2421 2422 } ACPI_IBFT_CONTROL; 2423 2424 typedef struct acpi_ibft_initiator 2425 { 2426 ACPI_IBFT_HEADER Header; 2427 UINT8 SnsServer[16]; 2428 UINT8 SlpServer[16]; 2429 UINT8 PrimaryServer[16]; 2430 UINT8 SecondaryServer[16]; 2431 UINT16 NameLength; 2432 UINT16 NameOffset; 2433 2434 } ACPI_IBFT_INITIATOR; 2435 2436 typedef struct acpi_ibft_nic 2437 { 2438 ACPI_IBFT_HEADER Header; 2439 UINT8 IpAddress[16]; 2440 UINT8 SubnetMaskPrefix; 2441 UINT8 Origin; 2442 UINT8 Gateway[16]; 2443 UINT8 PrimaryDns[16]; 2444 UINT8 SecondaryDns[16]; 2445 UINT8 Dhcp[16]; 2446 UINT16 Vlan; 2447 UINT8 MacAddress[6]; 2448 UINT16 PciAddress; 2449 UINT16 NameLength; 2450 UINT16 NameOffset; 2451 2452 } ACPI_IBFT_NIC; 2453 2454 typedef struct acpi_ibft_target 2455 { 2456 ACPI_IBFT_HEADER Header; 2457 UINT8 TargetIpAddress[16]; 2458 UINT16 TargetIpSocket; 2459 UINT8 TargetBootLun[8]; 2460 UINT8 ChapType; 2461 UINT8 NicAssociation; 2462 UINT16 TargetNameLength; 2463 UINT16 TargetNameOffset; 2464 UINT16 ChapNameLength; 2465 UINT16 ChapNameOffset; 2466 UINT16 ChapSecretLength; 2467 UINT16 ChapSecretOffset; 2468 UINT16 ReverseChapNameLength; 2469 UINT16 ReverseChapNameOffset; 2470 UINT16 ReverseChapSecretLength; 2471 UINT16 ReverseChapSecretOffset; 2472 2473 } ACPI_IBFT_TARGET; 2474 2475 2476 /* Reset to default packing */ 2477 2478 #pragma pack() 2479 2480 #endif /* __ACTBL1_H__ */ 2481
Indexes created Thu Oct 23 22:10:10 GMT 2025