actbl1.h revision 1.23
1 /****************************************************************************** 2 * 3 * Name: actbl1.h - Additional ACPI table definitions 4 * 5 *****************************************************************************/ 6 7 /* 8 * Copyright (C) 2000 - 2023, Intel Corp. 9 * All rights reserved. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions, and the following disclaimer, 16 * without modification. 17 * 2. Redistributions in binary form must reproduce at minimum a disclaimer 18 * substantially similar to the "NO WARRANTY" disclaimer below 19 * ("Disclaimer") and any redistribution must be conditioned upon 20 * including a substantially similar Disclaimer requirement for further 21 * binary redistribution. 22 * 3. Neither the names of the above-listed copyright holders nor the names 23 * of any contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * Alternatively, this software may be distributed under the terms of the 27 * GNU General Public License ("GPL") version 2 as published by the Free 28 * Software Foundation. 29 * 30 * NO WARRANTY 31 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 32 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 33 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 34 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 35 * HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 36 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 37 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 38 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 39 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING 40 * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 41 * POSSIBILITY OF SUCH DAMAGES. 42 */ 43 44 #ifndef __ACTBL1_H__ 45 #define __ACTBL1_H__ 46 47 48 /******************************************************************************* 49 * 50 * Additional ACPI Tables 51 * 52 * These tables are not consumed directly by the ACPICA subsystem, but are 53 * included here to support device drivers and the AML disassembler. 54 * 55 ******************************************************************************/ 56 57 58 /* 59 * Values for description table header signatures for tables defined in this 60 * file. Useful because they make it more difficult to inadvertently type in 61 * the wrong signature. 62 */ 63 #define ACPI_SIG_AEST "AEST" /* Arm Error Source Table */ 64 #define ACPI_SIG_ASF "ASF!" /* Alert Standard Format table */ 65 #define ACPI_SIG_ASPT "ASPT" /* AMD Secure Processor Table */ 66 #define ACPI_SIG_BERT "BERT" /* Boot Error Record Table */ 67 #define ACPI_SIG_BGRT "BGRT" /* Boot Graphics Resource Table */ 68 #define ACPI_SIG_BOOT "BOOT" /* Simple Boot Flag Table */ 69 #define ACPI_SIG_CEDT "CEDT" /* CXL Early Discovery Table */ 70 #define ACPI_SIG_CPEP "CPEP" /* Corrected Platform Error Polling table */ 71 #define ACPI_SIG_CSRT "CSRT" /* Core System Resource Table */ 72 #define ACPI_SIG_DBG2 "DBG2" /* Debug Port table type 2 */ 73 #define ACPI_SIG_DBGP "DBGP" /* Debug Port table */ 74 #define ACPI_SIG_DMAR "DMAR" /* DMA Remapping table */ 75 #define ACPI_SIG_DRTM "DRTM" /* Dynamic Root of Trust for Measurement table */ 76 #define ACPI_SIG_ECDT "ECDT" /* Embedded Controller Boot Resources Table */ 77 #define ACPI_SIG_EINJ "EINJ" /* Error Injection table */ 78 #define ACPI_SIG_ERST "ERST" /* Error Record Serialization Table */ 79 #define ACPI_SIG_FPDT "FPDT" /* Firmware Performance Data Table */ 80 #define ACPI_SIG_GTDT "GTDT" /* Generic Timer Description Table */ 81 #define ACPI_SIG_HEST "HEST" /* Hardware Error Source Table */ 82 #define ACPI_SIG_HMAT "HMAT" /* Heterogeneous Memory Attributes Table */ 83 #define ACPI_SIG_HPET "HPET" /* High Precision Event Timer table */ 84 #define ACPI_SIG_IBFT "IBFT" /* iSCSI Boot Firmware Table */ 85 #define ACPI_SIG_MSCT "MSCT" /* Maximum System Characteristics Table*/ 86 87 #define ACPI_SIG_S3PT "S3PT" /* S3 Performance (sub)Table */ 88 #define ACPI_SIG_PCCS "PCC" /* PCC Shared Memory Region */ 89 90 91 /* Reserved table signatures */ 92 93 #define ACPI_SIG_MATR "MATR" /* Memory Address Translation Table */ 94 #define ACPI_SIG_MSDM "MSDM" /* Microsoft Data Management Table */ 95 96 /* 97 * These tables have been seen in the field, but no definition has been found 98 */ 99 #ifdef ACPI_UNDEFINED_TABLES 100 #define ACPI_SIG_ATKG "ATKG" 101 #define ACPI_SIG_GSCI "GSCI" /* GMCH SCI table */ 102 #define ACPI_SIG_IEIT "IEIT" 103 #endif 104 105 /* 106 * All tables must be byte-packed to match the ACPI specification, since 107 * the tables are provided by the system BIOS. 108 */ 109 #pragma pack(1) 110 111 /* 112 * Note: C bitfields are not used for this reason: 113 * 114 * "Bitfields are great and easy to read, but unfortunately the C language 115 * does not specify the layout of bitfields in memory, which means they are 116 * essentially useless for dealing with packed data in on-disk formats or 117 * binary wire protocols." (Or ACPI tables and buffers.) "If you ask me, 118 * this decision was a design error in C. Ritchie could have picked an order 119 * and stuck with it." Norman Ramsey. 120 * See http://stackoverflow.com/a/1053662/41661 121 */ 122 123 124 /******************************************************************************* 125 * 126 * Common subtable headers 127 * 128 ******************************************************************************/ 129 130 /* Generic subtable header (used in MADT, SRAT, etc.) */ 131 132 typedef struct acpi_subtable_header 133 { 134 UINT8 Type; 135 UINT8 Length; 136 137 } ACPI_SUBTABLE_HEADER; 138 139 140 /* Subtable header for WHEA tables (EINJ, ERST, WDAT) */ 141 142 typedef struct acpi_whea_header 143 { 144 UINT8 Action; 145 UINT8 Instruction; 146 UINT8 Flags; 147 UINT8 Reserved; 148 ACPI_GENERIC_ADDRESS RegisterRegion; 149 UINT64 Value; /* Value used with Read/Write register */ 150 UINT64 Mask; /* Bitmask required for this register instruction */ 151 152 } ACPI_WHEA_HEADER; 153 154 155 /******************************************************************************* 156 * 157 * ASF - Alert Standard Format table (Signature "ASF!") 158 * Revision 0x10 159 * 160 * Conforms to the Alert Standard Format Specification V2.0, 23 April 2003 161 * 162 ******************************************************************************/ 163 164 typedef struct acpi_table_asf 165 { 166 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 167 168 } ACPI_TABLE_ASF; 169 170 171 /* ASF subtable header */ 172 173 typedef struct acpi_asf_header 174 { 175 UINT8 Type; 176 UINT8 Reserved; 177 UINT16 Length; 178 179 } ACPI_ASF_HEADER; 180 181 182 /* Values for Type field above */ 183 184 enum AcpiAsfType 185 { 186 ACPI_ASF_TYPE_INFO = 0, 187 ACPI_ASF_TYPE_ALERT = 1, 188 ACPI_ASF_TYPE_CONTROL = 2, 189 ACPI_ASF_TYPE_BOOT = 3, 190 ACPI_ASF_TYPE_ADDRESS = 4, 191 ACPI_ASF_TYPE_RESERVED = 5 192 }; 193 194 /* 195 * ASF subtables 196 */ 197 198 /* 0: ASF Information */ 199 200 typedef struct acpi_asf_info 201 { 202 ACPI_ASF_HEADER Header; 203 UINT8 MinResetValue; 204 UINT8 MinPollInterval; 205 UINT16 SystemId; 206 UINT32 MfgId; 207 UINT8 Flags; 208 UINT8 Reserved2[3]; 209 210 } ACPI_ASF_INFO; 211 212 /* Masks for Flags field above */ 213 214 #define ACPI_ASF_SMBUS_PROTOCOLS (1) 215 216 217 /* 1: ASF Alerts */ 218 219 typedef struct acpi_asf_alert 220 { 221 ACPI_ASF_HEADER Header; 222 UINT8 AssertMask; 223 UINT8 DeassertMask; 224 UINT8 Alerts; 225 UINT8 DataLength; 226 227 } ACPI_ASF_ALERT; 228 229 typedef struct acpi_asf_alert_data 230 { 231 UINT8 Address; 232 UINT8 Command; 233 UINT8 Mask; 234 UINT8 Value; 235 UINT8 SensorType; 236 UINT8 Type; 237 UINT8 Offset; 238 UINT8 SourceType; 239 UINT8 Severity; 240 UINT8 SensorNumber; 241 UINT8 Entity; 242 UINT8 Instance; 243 244 } ACPI_ASF_ALERT_DATA; 245 246 247 /* 2: ASF Remote Control */ 248 249 typedef struct acpi_asf_remote 250 { 251 ACPI_ASF_HEADER Header; 252 UINT8 Controls; 253 UINT8 DataLength; 254 UINT16 Reserved2; 255 256 } ACPI_ASF_REMOTE; 257 258 typedef struct acpi_asf_control_data 259 { 260 UINT8 Function; 261 UINT8 Address; 262 UINT8 Command; 263 UINT8 Value; 264 265 } ACPI_ASF_CONTROL_DATA; 266 267 268 /* 3: ASF RMCP Boot Options */ 269 270 typedef struct acpi_asf_rmcp 271 { 272 ACPI_ASF_HEADER Header; 273 UINT8 Capabilities[7]; 274 UINT8 CompletionCode; 275 UINT32 EnterpriseId; 276 UINT8 Command; 277 UINT16 Parameter; 278 UINT16 BootOptions; 279 UINT16 OemParameters; 280 281 } ACPI_ASF_RMCP; 282 283 284 /* 4: ASF Address */ 285 286 typedef struct acpi_asf_address 287 { 288 ACPI_ASF_HEADER Header; 289 UINT8 EpromAddress; 290 UINT8 Devices; 291 292 } ACPI_ASF_ADDRESS; 293 294 /******************************************************************************* 295 * 296 * ASPT - AMD Secure Processor Table (Signature "ASPT") 297 * Revision 0x1 298 * 299 * Conforms to AMD Socket SP5/SP6 Platform ASPT Rev1 Specification, 300 * 12 September 2022 301 * 302 ******************************************************************************/ 303 304 typedef struct acpi_table_aspt 305 { 306 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 307 UINT32 NumEntries; 308 309 } ACPI_TABLE_ASPT; 310 311 312 /* ASPT subtable header */ 313 314 typedef struct acpi_aspt_header 315 { 316 UINT16 Type; 317 UINT16 Length; 318 319 } ACPI_ASPT_HEADER; 320 321 322 /* Values for Type field above */ 323 324 enum AcpiAsptType 325 { 326 ACPI_ASPT_TYPE_GLOBAL_REGS = 0, 327 ACPI_ASPT_TYPE_SEV_MBOX_REGS = 1, 328 ACPI_ASPT_TYPE_ACPI_MBOX_REGS = 2, 329 ACPI_ASPT_TYPE_UNKNOWN = 3, 330 }; 331 332 /* 333 * ASPT subtables 334 */ 335 336 /* 0: ASPT Global Registers */ 337 338 typedef struct acpi_aspt_global_regs 339 { 340 ACPI_ASPT_HEADER Header; 341 UINT32 Reserved; 342 UINT64 FeatureRegAddr; 343 UINT64 IrqEnRegAddr; 344 UINT64 IrqStRegAddr; 345 346 } ACPI_ASPT_GLOBAL_REGS; 347 348 349 /* 1: ASPT SEV Mailbox Registers */ 350 351 typedef struct acpi_aspt_sev_mbox_regs 352 { 353 ACPI_ASPT_HEADER Header; 354 UINT8 MboxIrqId; 355 UINT8 Reserved[3]; 356 UINT64 CmdRespRegAddr; 357 UINT64 CmdBufLoRegAddr; 358 UINT64 CmdBufHiRegAddr; 359 360 } ACPI_ASPT_SEV_MBOX_REGS; 361 362 363 /* 2: ASPT ACPI Mailbox Registers */ 364 365 typedef struct acpi_aspt_acpi_mbox_regs 366 { 367 ACPI_ASPT_HEADER Header; 368 UINT32 Reserved1; 369 UINT64 CmdRespRegAddr; 370 UINT64 Reserved2[2]; 371 372 } ACPI_ASPT_ACPI_MBOX_REGS; 373 374 375 /******************************************************************************* 376 * 377 * BERT - Boot Error Record Table (ACPI 4.0) 378 * Version 1 379 * 380 ******************************************************************************/ 381 382 typedef struct acpi_table_bert 383 { 384 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 385 UINT32 RegionLength; /* Length of the boot error region */ 386 UINT64 Address; /* Physical address of the error region */ 387 388 } ACPI_TABLE_BERT; 389 390 391 /* Boot Error Region (not a subtable, pointed to by Address field above) */ 392 393 typedef struct acpi_bert_region 394 { 395 UINT32 BlockStatus; /* Type of error information */ 396 UINT32 RawDataOffset; /* Offset to raw error data */ 397 UINT32 RawDataLength; /* Length of raw error data */ 398 UINT32 DataLength; /* Length of generic error data */ 399 UINT32 ErrorSeverity; /* Severity code */ 400 401 } ACPI_BERT_REGION; 402 403 /* Values for BlockStatus flags above */ 404 405 #define ACPI_BERT_UNCORRECTABLE (1) 406 #define ACPI_BERT_CORRECTABLE (1<<1) 407 #define ACPI_BERT_MULTIPLE_UNCORRECTABLE (1<<2) 408 #define ACPI_BERT_MULTIPLE_CORRECTABLE (1<<3) 409 #define ACPI_BERT_ERROR_ENTRY_COUNT (0xFF<<4) /* 8 bits, error count */ 410 411 /* Values for ErrorSeverity above */ 412 413 enum AcpiBertErrorSeverity 414 { 415 ACPI_BERT_ERROR_CORRECTABLE = 0, 416 ACPI_BERT_ERROR_FATAL = 1, 417 ACPI_BERT_ERROR_CORRECTED = 2, 418 ACPI_BERT_ERROR_NONE = 3, 419 ACPI_BERT_ERROR_RESERVED = 4 /* 4 and greater are reserved */ 420 }; 421 422 /* 423 * Note: The generic error data that follows the ErrorSeverity field above 424 * uses the ACPI_HEST_GENERIC_DATA defined under the HEST table below 425 */ 426 427 428 /******************************************************************************* 429 * 430 * BGRT - Boot Graphics Resource Table (ACPI 5.0) 431 * Version 1 432 * 433 ******************************************************************************/ 434 435 typedef struct acpi_table_bgrt 436 { 437 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 438 UINT16 Version; 439 UINT8 Status; 440 UINT8 ImageType; 441 UINT64 ImageAddress; 442 UINT32 ImageOffsetX; 443 UINT32 ImageOffsetY; 444 445 } ACPI_TABLE_BGRT; 446 447 /* Flags for Status field above */ 448 449 #define ACPI_BGRT_DISPLAYED (1) 450 #define ACPI_BGRT_ORIENTATION_OFFSET (3 << 1) 451 452 453 /******************************************************************************* 454 * 455 * BOOT - Simple Boot Flag Table 456 * Version 1 457 * 458 * Conforms to the "Simple Boot Flag Specification", Version 2.1 459 * 460 ******************************************************************************/ 461 462 typedef struct acpi_table_boot 463 { 464 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 465 UINT8 CmosIndex; /* Index in CMOS RAM for the boot register */ 466 UINT8 Reserved[3]; 467 468 } ACPI_TABLE_BOOT; 469 470 471 /******************************************************************************* 472 * 473 * CDAT - Coherent Device Attribute Table 474 * Version 1 475 * 476 * Conforms to the "Coherent Device Attribute Table (CDAT) Specification 477 " (Revision 1.01, October 2020.) 478 * 479 ******************************************************************************/ 480 481 typedef struct acpi_table_cdat 482 { 483 UINT32 Length; /* Length of table in bytes, including this header */ 484 UINT8 Revision; /* ACPI Specification minor version number */ 485 UINT8 Checksum; /* To make sum of entire table == 0 */ 486 UINT8 Reserved[6]; 487 UINT32 Sequence; /* Used to detect runtime CDAT table changes */ 488 489 } ACPI_TABLE_CDAT; 490 491 492 /* CDAT common subtable header */ 493 494 typedef struct acpi_cdat_header 495 { 496 UINT8 Type; 497 UINT8 Reserved; 498 UINT16 Length; 499 500 } ACPI_CDAT_HEADER; 501 502 /* Values for Type field above */ 503 504 enum AcpiCdatType 505 { 506 ACPI_CDAT_TYPE_DSMAS = 0, 507 ACPI_CDAT_TYPE_DSLBIS = 1, 508 ACPI_CDAT_TYPE_DSMSCIS = 2, 509 ACPI_CDAT_TYPE_DSIS = 3, 510 ACPI_CDAT_TYPE_DSEMTS = 4, 511 ACPI_CDAT_TYPE_SSLBIS = 5, 512 ACPI_CDAT_TYPE_RESERVED = 6 /* 6 through 0xFF are reserved */ 513 }; 514 515 516 /* Subtable 0: Device Scoped Memory Affinity Structure (DSMAS) */ 517 518 typedef struct acpi_cdat_dsmas 519 { 520 UINT8 DsmadHandle; 521 UINT8 Flags; 522 UINT16 Reserved; 523 UINT64 DpaBaseAddress; 524 UINT64 DpaLength; 525 526 } ACPI_CDAT_DSMAS; 527 528 /* Flags for subtable above */ 529 530 #define ACPI_CDAT_DSMAS_NON_VOLATILE (1 << 2) 531 532 533 /* Subtable 1: Device scoped Latency and Bandwidth Information Structure (DSLBIS) */ 534 535 typedef struct acpi_cdat_dslbis 536 { 537 UINT8 Handle; 538 UINT8 Flags; /* If Handle matches a DSMAS handle, the definition of this field matches 539 * Flags field in HMAT System Locality Latency */ 540 UINT8 DataType; 541 UINT8 Reserved; 542 UINT64 EntryBaseUnit; 543 UINT16 Entry[3]; 544 UINT16 Reserved2; 545 546 } ACPI_CDAT_DSLBIS; 547 548 549 /* Subtable 2: Device Scoped Memory Side Cache Information Structure (DSMSCIS) */ 550 551 typedef struct acpi_cdat_dsmscis 552 { 553 UINT8 DsmasHandle; 554 UINT8 Reserved[3]; 555 UINT64 SideCacheSize; 556 UINT32 CacheAttributes; 557 558 } ACPI_CDAT_DSMSCIS; 559 560 561 /* Subtable 3: Device Scoped Initiator Structure (DSIS) */ 562 563 typedef struct acpi_cdat_dsis 564 { 565 UINT8 Flags; 566 UINT8 Handle; 567 UINT16 Reserved; 568 569 } ACPI_CDAT_DSIS; 570 571 /* Flags for above subtable */ 572 573 #define ACPI_CDAT_DSIS_MEM_ATTACHED (1 << 0) 574 575 576 /* Subtable 4: Device Scoped EFI Memory Type Structure (DSEMTS) */ 577 578 typedef struct acpi_cdat_dsemts 579 { 580 UINT8 DsmasHandle; 581 UINT8 MemoryType; 582 UINT16 Reserved; 583 UINT64 DpaOffset; 584 UINT64 RangeLength; 585 586 } ACPI_CDAT_DSEMTS; 587 588 589 /* Subtable 5: Switch Scoped Latency and Bandwidth Information Structure (SSLBIS) */ 590 591 typedef struct acpi_cdat_sslbis 592 { 593 UINT8 DataType; 594 UINT8 Reserved[3]; 595 UINT64 EntryBaseUnit; 596 597 } ACPI_CDAT_SSLBIS; 598 599 600 /* Sub-subtable for above, SslbeEntries field */ 601 602 typedef struct acpi_cdat_sslbe 603 { 604 UINT16 PortxId; 605 UINT16 PortyId; 606 UINT16 LatencyOrBandwidth; 607 UINT16 Reserved; 608 609 } ACPI_CDAT_SSLBE; 610 611 #define ACPI_CDAT_SSLBIS_US_PORT 0x0100 612 #define ACPI_CDAT_SSLBIS_ANY_PORT 0xffff 613 614 /******************************************************************************* 615 * 616 * CEDT - CXL Early Discovery Table 617 * Version 1 618 * 619 * Conforms to the "CXL Early Discovery Table" (CXL 2.0, October 2020) 620 * 621 ******************************************************************************/ 622 623 typedef struct acpi_table_cedt 624 { 625 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 626 627 } ACPI_TABLE_CEDT; 628 629 /* CEDT subtable header (Performance Record Structure) */ 630 631 typedef struct acpi_cedt_header 632 { 633 UINT8 Type; 634 UINT8 Reserved; 635 UINT16 Length; 636 637 } ACPI_CEDT_HEADER; 638 639 /* Values for Type field above */ 640 641 enum AcpiCedtType 642 { 643 ACPI_CEDT_TYPE_CHBS = 0, 644 ACPI_CEDT_TYPE_CFMWS = 1, 645 ACPI_CEDT_TYPE_CXIMS = 2, 646 ACPI_CEDT_TYPE_RDPAS = 3, 647 ACPI_CEDT_TYPE_RESERVED = 4, 648 }; 649 650 /* Values for version field above */ 651 652 #define ACPI_CEDT_CHBS_VERSION_CXL11 (0) 653 #define ACPI_CEDT_CHBS_VERSION_CXL20 (1) 654 655 /* Values for length field above */ 656 657 #define ACPI_CEDT_CHBS_LENGTH_CXL11 (0x2000) 658 #define ACPI_CEDT_CHBS_LENGTH_CXL20 (0x10000) 659 660 /* 661 * CEDT subtables 662 */ 663 664 /* 0: CXL Host Bridge Structure */ 665 666 typedef struct acpi_cedt_chbs 667 { 668 ACPI_CEDT_HEADER Header; 669 UINT32 Uid; 670 UINT32 CxlVersion; 671 UINT32 Reserved; 672 UINT64 Base; 673 UINT64 Length; 674 675 } ACPI_CEDT_CHBS; 676 677 678 /* 1: CXL Fixed Memory Window Structure */ 679 680 typedef struct acpi_cedt_cfmws 681 { 682 ACPI_CEDT_HEADER Header; 683 UINT32 Reserved1; 684 UINT64 BaseHpa; 685 UINT64 WindowSize; 686 UINT8 InterleaveWays; 687 UINT8 InterleaveArithmetic; 688 UINT16 Reserved2; 689 UINT32 Granularity; 690 UINT16 Restrictions; 691 UINT16 QtgId; 692 UINT32 InterleaveTargets[]; 693 694 } ACPI_CEDT_CFMWS; 695 696 typedef struct acpi_cedt_cfmws_target_element 697 { 698 UINT32 InterleaveTarget; 699 700 } ACPI_CEDT_CFMWS_TARGET_ELEMENT; 701 702 /* Values for Interleave Arithmetic field above */ 703 704 #define ACPI_CEDT_CFMWS_ARITHMETIC_MODULO (0) 705 #define ACPI_CEDT_CFMWS_ARITHMETIC_XOR (1) 706 707 /* Values for Restrictions field above */ 708 709 #define ACPI_CEDT_CFMWS_RESTRICT_TYPE2 (1) 710 #define ACPI_CEDT_CFMWS_RESTRICT_TYPE3 (1<<1) 711 #define ACPI_CEDT_CFMWS_RESTRICT_VOLATILE (1<<2) 712 #define ACPI_CEDT_CFMWS_RESTRICT_PMEM (1<<3) 713 #define ACPI_CEDT_CFMWS_RESTRICT_FIXED (1<<4) 714 715 /* 2: CXL XOR Interleave Math Structure */ 716 717 typedef struct acpi_cedt_cxims { 718 ACPI_CEDT_HEADER Header; 719 UINT16 Reserved1; 720 UINT8 Hbig; 721 UINT8 NrXormaps; 722 UINT64 XormapList[]; 723 } ACPI_CEDT_CXIMS; 724 725 typedef struct acpi_cedt_cxims_target_element 726 { 727 UINT64 Xormap; 728 729 } ACPI_CEDT_CXIMS_TARGET_ELEMENT; 730 731 732 /* 3: CXL RCEC Downstream Port Association Structure */ 733 734 struct acpi_cedt_rdpas { 735 ACPI_CEDT_HEADER Header; 736 UINT16 Segment; 737 UINT16 Bdf; 738 UINT8 Protocol; 739 UINT64 Address; 740 }; 741 742 /* Masks for bdf field above */ 743 #define ACPI_CEDT_RDPAS_BUS_MASK 0xff00 744 #define ACPI_CEDT_RDPAS_DEVICE_MASK 0x00f8 745 #define ACPI_CEDT_RDPAS_FUNCTION_MASK 0x0007 746 747 #define ACPI_CEDT_RDPAS_PROTOCOL_IO (0) 748 #define ACPI_CEDT_RDPAS_PROTOCOL_CACHEMEM (1) 749 750 /******************************************************************************* 751 * 752 * CPEP - Corrected Platform Error Polling table (ACPI 4.0) 753 * Version 1 754 * 755 ******************************************************************************/ 756 757 typedef struct acpi_table_cpep 758 { 759 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 760 UINT64 Reserved; 761 762 } ACPI_TABLE_CPEP; 763 764 765 /* Subtable */ 766 767 typedef struct acpi_cpep_polling 768 { 769 ACPI_SUBTABLE_HEADER Header; 770 UINT8 Id; /* Processor ID */ 771 UINT8 Eid; /* Processor EID */ 772 UINT32 Interval; /* Polling interval (msec) */ 773 774 } ACPI_CPEP_POLLING; 775 776 777 /******************************************************************************* 778 * 779 * CSRT - Core System Resource Table 780 * Version 0 781 * 782 * Conforms to the "Core System Resource Table (CSRT)", November 14, 2011 783 * 784 ******************************************************************************/ 785 786 typedef struct acpi_table_csrt 787 { 788 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 789 790 } ACPI_TABLE_CSRT; 791 792 793 /* Resource Group subtable */ 794 795 typedef struct acpi_csrt_group 796 { 797 UINT32 Length; 798 UINT32 VendorId; 799 UINT32 SubvendorId; 800 UINT16 DeviceId; 801 UINT16 SubdeviceId; 802 UINT16 Revision; 803 UINT16 Reserved; 804 UINT32 SharedInfoLength; 805 806 /* Shared data immediately follows (Length = SharedInfoLength) */ 807 808 } ACPI_CSRT_GROUP; 809 810 /* Shared Info subtable */ 811 812 typedef struct acpi_csrt_shared_info 813 { 814 UINT16 MajorVersion; 815 UINT16 MinorVersion; 816 UINT32 MmioBaseLow; 817 UINT32 MmioBaseHigh; 818 UINT32 GsiInterrupt; 819 UINT8 InterruptPolarity; 820 UINT8 InterruptMode; 821 UINT8 NumChannels; 822 UINT8 DmaAddressWidth; 823 UINT16 BaseRequestLine; 824 UINT16 NumHandshakeSignals; 825 UINT32 MaxBlockSize; 826 827 /* Resource descriptors immediately follow (Length = Group Length - SharedInfoLength) */ 828 829 } ACPI_CSRT_SHARED_INFO; 830 831 /* Resource Descriptor subtable */ 832 833 typedef struct acpi_csrt_descriptor 834 { 835 UINT32 Length; 836 UINT16 Type; 837 UINT16 Subtype; 838 UINT32 Uid; 839 840 /* Resource-specific information immediately follows */ 841 842 } ACPI_CSRT_DESCRIPTOR; 843 844 845 /* Resource Types */ 846 847 #define ACPI_CSRT_TYPE_INTERRUPT 0x0001 848 #define ACPI_CSRT_TYPE_TIMER 0x0002 849 #define ACPI_CSRT_TYPE_DMA 0x0003 850 851 /* Resource Subtypes */ 852 853 #define ACPI_CSRT_XRUPT_LINE 0x0000 854 #define ACPI_CSRT_XRUPT_CONTROLLER 0x0001 855 #define ACPI_CSRT_TIMER 0x0000 856 #define ACPI_CSRT_DMA_CHANNEL 0x0000 857 #define ACPI_CSRT_DMA_CONTROLLER 0x0001 858 859 860 /******************************************************************************* 861 * 862 * DBG2 - Debug Port Table 2 863 * Version 0 (Both main table and subtables) 864 * 865 * Conforms to "Microsoft Debug Port Table 2 (DBG2)", September 21, 2020 866 * 867 ******************************************************************************/ 868 869 typedef struct acpi_table_dbg2 870 { 871 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 872 UINT32 InfoOffset; 873 UINT32 InfoCount; 874 875 } ACPI_TABLE_DBG2; 876 877 878 typedef struct acpi_dbg2_header 879 { 880 UINT32 InfoOffset; 881 UINT32 InfoCount; 882 883 } ACPI_DBG2_HEADER; 884 885 886 /* Debug Device Information Subtable */ 887 888 typedef struct acpi_dbg2_device 889 { 890 UINT8 Revision; 891 UINT16 Length; 892 UINT8 RegisterCount; /* Number of BaseAddress registers */ 893 UINT16 NamepathLength; 894 UINT16 NamepathOffset; 895 UINT16 OemDataLength; 896 UINT16 OemDataOffset; 897 UINT16 PortType; 898 UINT16 PortSubtype; 899 UINT16 Reserved; 900 UINT16 BaseAddressOffset; 901 UINT16 AddressSizeOffset; 902 /* 903 * Data that follows: 904 * BaseAddress (required) - Each in 12-byte Generic Address Structure format. 905 * AddressSize (required) - Array of UINT32 sizes corresponding to each BaseAddress register. 906 * Namepath (required) - Null terminated string. Single dot if not supported. 907 * OemData (optional) - Length is OemDataLength. 908 */ 909 } ACPI_DBG2_DEVICE; 910 911 /* Types for PortType field above */ 912 913 #define ACPI_DBG2_SERIAL_PORT 0x8000 914 #define ACPI_DBG2_1394_PORT 0x8001 915 #define ACPI_DBG2_USB_PORT 0x8002 916 #define ACPI_DBG2_NET_PORT 0x8003 917 918 /* Subtypes for PortSubtype field above */ 919 920 #define ACPI_DBG2_16550_COMPATIBLE 0x0000 921 #define ACPI_DBG2_16550_SUBSET 0x0001 922 #define ACPI_DBG2_MAX311XE_SPI 0x0002 923 #define ACPI_DBG2_ARM_PL011 0x0003 924 #define ACPI_DBG2_MSM8X60 0x0004 925 #define ACPI_DBG2_16550_NVIDIA 0x0005 926 #define ACPI_DBG2_TI_OMAP 0x0006 927 #define ACPI_DBG2_APM88XXXX 0x0008 928 #define ACPI_DBG2_MSM8974 0x0009 929 #define ACPI_DBG2_SAM5250 0x000A 930 #define ACPI_DBG2_INTEL_USIF 0x000B 931 #define ACPI_DBG2_IMX6 0x000C 932 #define ACPI_DBG2_ARM_SBSA_32BIT 0x000D 933 #define ACPI_DBG2_ARM_SBSA_GENERIC 0x000E 934 #define ACPI_DBG2_ARM_DCC 0x000F 935 #define ACPI_DBG2_BCM2835 0x0010 936 #define ACPI_DBG2_SDM845_1_8432MHZ 0x0011 937 #define ACPI_DBG2_16550_WITH_GAS 0x0012 938 #define ACPI_DBG2_SDM845_7_372MHZ 0x0013 939 #define ACPI_DBG2_INTEL_LPSS 0x0014 940 #define ACPI_DBG2_RISCV_SBI_CON 0x0015 941 942 #define ACPI_DBG2_1394_STANDARD 0x0000 943 944 #define ACPI_DBG2_USB_XHCI 0x0000 945 #define ACPI_DBG2_USB_EHCI 0x0001 946 947 948 /******************************************************************************* 949 * 950 * DBGP - Debug Port table 951 * Version 1 952 * 953 * Conforms to the "Debug Port Specification", Version 1.00, 2/9/2000 954 * 955 ******************************************************************************/ 956 957 typedef struct acpi_table_dbgp 958 { 959 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 960 UINT8 Type; /* 0=full 16550, 1=subset of 16550 */ 961 UINT8 Reserved[3]; 962 ACPI_GENERIC_ADDRESS DebugPort; 963 964 } ACPI_TABLE_DBGP; 965 966 967 /******************************************************************************* 968 * 969 * DMAR - DMA Remapping table 970 * Version 1 971 * 972 * Conforms to "Intel Virtualization Technology for Directed I/O", 973 * Version 2.3, October 2014 974 * 975 ******************************************************************************/ 976 977 typedef struct acpi_table_dmar 978 { 979 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 980 UINT8 Width; /* Host Address Width */ 981 UINT8 Flags; 982 UINT8 Reserved[10]; 983 984 } ACPI_TABLE_DMAR; 985 986 /* Masks for Flags field above */ 987 988 #define ACPI_DMAR_INTR_REMAP (1) 989 #define ACPI_DMAR_X2APIC_OPT_OUT (1<<1) 990 #define ACPI_DMAR_X2APIC_MODE (1<<2) 991 992 993 /* DMAR subtable header */ 994 995 typedef struct acpi_dmar_header 996 { 997 UINT16 Type; 998 UINT16 Length; 999 1000 } ACPI_DMAR_HEADER; 1001 1002 /* Values for subtable type in ACPI_DMAR_HEADER */ 1003 1004 enum AcpiDmarType 1005 { 1006 ACPI_DMAR_TYPE_HARDWARE_UNIT = 0, 1007 ACPI_DMAR_TYPE_RESERVED_MEMORY = 1, 1008 ACPI_DMAR_TYPE_ROOT_ATS = 2, 1009 ACPI_DMAR_TYPE_HARDWARE_AFFINITY = 3, 1010 ACPI_DMAR_TYPE_NAMESPACE = 4, 1011 ACPI_DMAR_TYPE_SATC = 5, 1012 ACPI_DMAR_TYPE_RESERVED = 6 /* 6 and greater are reserved */ 1013 }; 1014 1015 1016 /* DMAR Device Scope structure */ 1017 1018 typedef struct acpi_dmar_device_scope 1019 { 1020 UINT8 EntryType; 1021 UINT8 Length; 1022 UINT16 Reserved; 1023 UINT8 EnumerationId; 1024 UINT8 Bus; 1025 1026 } ACPI_DMAR_DEVICE_SCOPE; 1027 1028 /* Values for EntryType in ACPI_DMAR_DEVICE_SCOPE - device types */ 1029 1030 enum AcpiDmarScopeType 1031 { 1032 ACPI_DMAR_SCOPE_TYPE_NOT_USED = 0, 1033 ACPI_DMAR_SCOPE_TYPE_ENDPOINT = 1, 1034 ACPI_DMAR_SCOPE_TYPE_BRIDGE = 2, 1035 ACPI_DMAR_SCOPE_TYPE_IOAPIC = 3, 1036 ACPI_DMAR_SCOPE_TYPE_HPET = 4, 1037 ACPI_DMAR_SCOPE_TYPE_NAMESPACE = 5, 1038 ACPI_DMAR_SCOPE_TYPE_RESERVED = 6 /* 6 and greater are reserved */ 1039 }; 1040 1041 typedef struct acpi_dmar_pci_path 1042 { 1043 UINT8 Device; 1044 UINT8 Function; 1045 1046 } ACPI_DMAR_PCI_PATH; 1047 1048 1049 /* 1050 * DMAR Subtables, correspond to Type in ACPI_DMAR_HEADER 1051 */ 1052 1053 /* 0: Hardware Unit Definition */ 1054 1055 typedef struct acpi_dmar_hardware_unit 1056 { 1057 ACPI_DMAR_HEADER Header; 1058 UINT8 Flags; 1059 UINT8 Reserved; 1060 UINT16 Segment; 1061 UINT64 Address; /* Register Base Address */ 1062 1063 } ACPI_DMAR_HARDWARE_UNIT; 1064 1065 /* Masks for Flags field above */ 1066 1067 #define ACPI_DMAR_INCLUDE_ALL (1) 1068 1069 1070 /* 1: Reserved Memory Definition */ 1071 1072 typedef struct acpi_dmar_reserved_memory 1073 { 1074 ACPI_DMAR_HEADER Header; 1075 UINT16 Reserved; 1076 UINT16 Segment; 1077 UINT64 BaseAddress; /* 4K aligned base address */ 1078 UINT64 EndAddress; /* 4K aligned limit address */ 1079 1080 } ACPI_DMAR_RESERVED_MEMORY; 1081 1082 /* Masks for Flags field above */ 1083 1084 #define ACPI_DMAR_ALLOW_ALL (1) 1085 1086 1087 /* 2: Root Port ATS Capability Reporting Structure */ 1088 1089 typedef struct acpi_dmar_atsr 1090 { 1091 ACPI_DMAR_HEADER Header; 1092 UINT8 Flags; 1093 UINT8 Reserved; 1094 UINT16 Segment; 1095 1096 } ACPI_DMAR_ATSR; 1097 1098 /* Masks for Flags field above */ 1099 1100 #define ACPI_DMAR_ALL_PORTS (1) 1101 1102 1103 /* 3: Remapping Hardware Static Affinity Structure */ 1104 1105 typedef struct acpi_dmar_rhsa 1106 { 1107 ACPI_DMAR_HEADER Header; 1108 UINT32 Reserved; 1109 UINT64 BaseAddress; 1110 UINT32 ProximityDomain; 1111 1112 } ACPI_DMAR_RHSA; 1113 1114 1115 /* 4: ACPI Namespace Device Declaration Structure */ 1116 1117 typedef struct acpi_dmar_andd 1118 { 1119 ACPI_DMAR_HEADER Header; 1120 UINT8 Reserved[3]; 1121 UINT8 DeviceNumber; 1122 union { 1123 char __pad; 1124 ACPI_FLEX_ARRAY(char, DeviceName); 1125 }; 1126 1127 } ACPI_DMAR_ANDD; 1128 1129 1130 /* 5: SoC Integrated Address Translation Cache (SATC) */ 1131 1132 typedef struct acpi_dmar_satc 1133 { 1134 ACPI_DMAR_HEADER Header; 1135 UINT8 Flags; 1136 UINT8 Reserved; 1137 UINT16 Segment; 1138 1139 } ACPI_DMAR_SATC 1140 1141 ; 1142 /******************************************************************************* 1143 * 1144 * DRTM - Dynamic Root of Trust for Measurement table 1145 * Conforms to "TCG D-RTM Architecture" June 17 2013, Version 1.0.0 1146 * Table version 1 1147 * 1148 ******************************************************************************/ 1149 1150 typedef struct acpi_table_drtm 1151 { 1152 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1153 UINT64 EntryBaseAddress; 1154 UINT64 EntryLength; 1155 UINT32 EntryAddress32; 1156 UINT64 EntryAddress64; 1157 UINT64 ExitAddress; 1158 UINT64 LogAreaAddress; 1159 UINT32 LogAreaLength; 1160 UINT64 ArchDependentAddress; 1161 UINT32 Flags; 1162 1163 } ACPI_TABLE_DRTM; 1164 1165 /* Flag Definitions for above */ 1166 1167 #define ACPI_DRTM_ACCESS_ALLOWED (1) 1168 #define ACPI_DRTM_ENABLE_GAP_CODE (1<<1) 1169 #define ACPI_DRTM_INCOMPLETE_MEASUREMENTS (1<<2) 1170 #define ACPI_DRTM_AUTHORITY_ORDER (1<<3) 1171 1172 1173 /* 1) Validated Tables List (64-bit addresses) */ 1174 1175 typedef struct acpi_drtm_vtable_list 1176 { 1177 UINT32 ValidatedTableCount; 1178 UINT64 ValidatedTables[]; 1179 1180 } ACPI_DRTM_VTABLE_LIST; 1181 1182 /* 2) Resources List (of Resource Descriptors) */ 1183 1184 /* Resource Descriptor */ 1185 1186 typedef struct acpi_drtm_resource 1187 { 1188 UINT8 Size[7]; 1189 UINT8 Type; 1190 UINT64 Address; 1191 1192 } ACPI_DRTM_RESOURCE; 1193 1194 typedef struct acpi_drtm_resource_list 1195 { 1196 UINT32 ResourceCount; 1197 ACPI_DRTM_RESOURCE Resources[]; 1198 1199 } ACPI_DRTM_RESOURCE_LIST; 1200 1201 /* 3) Platform-specific Identifiers List */ 1202 1203 typedef struct acpi_drtm_dps_id 1204 { 1205 UINT32 DpsIdLength; 1206 UINT8 DpsId[16]; 1207 1208 } ACPI_DRTM_DPS_ID; 1209 1210 1211 /******************************************************************************* 1212 * 1213 * ECDT - Embedded Controller Boot Resources Table 1214 * Version 1 1215 * 1216 ******************************************************************************/ 1217 1218 typedef struct acpi_table_ecdt 1219 { 1220 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1221 ACPI_GENERIC_ADDRESS Control; /* Address of EC command/status register */ 1222 ACPI_GENERIC_ADDRESS Data; /* Address of EC data register */ 1223 UINT32 Uid; /* Unique ID - must be same as the EC _UID method */ 1224 UINT8 Gpe; /* The GPE for the EC */ 1225 UINT8 Id[]; /* Full namepath of the EC in the ACPI namespace */ 1226 1227 } ACPI_TABLE_ECDT; 1228 1229 1230 /******************************************************************************* 1231 * 1232 * EINJ - Error Injection Table (ACPI 4.0) 1233 * Version 1 1234 * 1235 ******************************************************************************/ 1236 1237 typedef struct acpi_table_einj 1238 { 1239 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1240 UINT32 HeaderLength; 1241 UINT8 Flags; 1242 UINT8 Reserved[3]; 1243 UINT32 Entries; 1244 1245 } ACPI_TABLE_EINJ; 1246 1247 1248 /* EINJ Injection Instruction Entries (actions) */ 1249 1250 typedef struct acpi_einj_entry 1251 { 1252 ACPI_WHEA_HEADER WheaHeader; /* Common header for WHEA tables */ 1253 1254 } ACPI_EINJ_ENTRY; 1255 1256 /* Masks for Flags field above */ 1257 1258 #define ACPI_EINJ_PRESERVE (1) 1259 1260 /* Values for Action field above */ 1261 1262 enum AcpiEinjActions 1263 { 1264 ACPI_EINJ_BEGIN_OPERATION = 0, 1265 ACPI_EINJ_GET_TRIGGER_TABLE = 1, 1266 ACPI_EINJ_SET_ERROR_TYPE = 2, 1267 ACPI_EINJ_GET_ERROR_TYPE = 3, 1268 ACPI_EINJ_END_OPERATION = 4, 1269 ACPI_EINJ_EXECUTE_OPERATION = 5, 1270 ACPI_EINJ_CHECK_BUSY_STATUS = 6, 1271 ACPI_EINJ_GET_COMMAND_STATUS = 7, 1272 ACPI_EINJ_SET_ERROR_TYPE_WITH_ADDRESS = 8, 1273 ACPI_EINJ_GET_EXECUTE_TIMINGS = 9, 1274 ACPI_EINJ_ACTION_RESERVED = 10, /* 10 and greater are reserved */ 1275 ACPI_EINJ_TRIGGER_ERROR = 0xFF /* Except for this value */ 1276 }; 1277 1278 /* Values for Instruction field above */ 1279 1280 enum AcpiEinjInstructions 1281 { 1282 ACPI_EINJ_READ_REGISTER = 0, 1283 ACPI_EINJ_READ_REGISTER_VALUE = 1, 1284 ACPI_EINJ_WRITE_REGISTER = 2, 1285 ACPI_EINJ_WRITE_REGISTER_VALUE = 3, 1286 ACPI_EINJ_NOOP = 4, 1287 ACPI_EINJ_FLUSH_CACHELINE = 5, 1288 ACPI_EINJ_INSTRUCTION_RESERVED = 6 /* 6 and greater are reserved */ 1289 }; 1290 1291 typedef struct acpi_einj_error_type_with_addr 1292 { 1293 UINT32 ErrorType; 1294 UINT32 VendorStructOffset; 1295 UINT32 Flags; 1296 UINT32 ApicId; 1297 UINT64 Address; 1298 UINT64 Range; 1299 UINT32 PcieId; 1300 1301 } ACPI_EINJ_ERROR_TYPE_WITH_ADDR; 1302 1303 typedef struct acpi_einj_vendor 1304 { 1305 UINT32 Length; 1306 UINT32 PcieId; 1307 UINT16 VendorId; 1308 UINT16 DeviceId; 1309 UINT8 RevisionId; 1310 UINT8 Reserved[3]; 1311 1312 } ACPI_EINJ_VENDOR; 1313 1314 1315 /* EINJ Trigger Error Action Table */ 1316 1317 typedef struct acpi_einj_trigger 1318 { 1319 UINT32 HeaderSize; 1320 UINT32 Revision; 1321 UINT32 TableSize; 1322 UINT32 EntryCount; 1323 1324 } ACPI_EINJ_TRIGGER; 1325 1326 /* Command status return values */ 1327 1328 enum AcpiEinjCommandStatus 1329 { 1330 ACPI_EINJ_SUCCESS = 0, 1331 ACPI_EINJ_FAILURE = 1, 1332 ACPI_EINJ_INVALID_ACCESS = 2, 1333 ACPI_EINJ_STATUS_RESERVED = 3 /* 3 and greater are reserved */ 1334 }; 1335 1336 1337 /* Error types returned from ACPI_EINJ_GET_ERROR_TYPE (bitfield) */ 1338 1339 #define ACPI_EINJ_PROCESSOR_CORRECTABLE (1) 1340 #define ACPI_EINJ_PROCESSOR_UNCORRECTABLE (1<<1) 1341 #define ACPI_EINJ_PROCESSOR_FATAL (1<<2) 1342 #define ACPI_EINJ_MEMORY_CORRECTABLE (1<<3) 1343 #define ACPI_EINJ_MEMORY_UNCORRECTABLE (1<<4) 1344 #define ACPI_EINJ_MEMORY_FATAL (1<<5) 1345 #define ACPI_EINJ_PCIX_CORRECTABLE (1<<6) 1346 #define ACPI_EINJ_PCIX_UNCORRECTABLE (1<<7) 1347 #define ACPI_EINJ_PCIX_FATAL (1<<8) 1348 #define ACPI_EINJ_PLATFORM_CORRECTABLE (1<<9) 1349 #define ACPI_EINJ_PLATFORM_UNCORRECTABLE (1<<10) 1350 #define ACPI_EINJ_PLATFORM_FATAL (1<<11) 1351 #define ACPI_EINJ_CXL_CACHE_CORRECTABLE (1<<12) 1352 #define ACPI_EINJ_CXL_CACHE_UNCORRECTABLE (1<<13) 1353 #define ACPI_EINJ_CXL_CACHE_FATAL (1<<14) 1354 #define ACPI_EINJ_CXL_MEM_CORRECTABLE (1<<15) 1355 #define ACPI_EINJ_CXL_MEM_UNCORRECTABLE (1<<16) 1356 #define ACPI_EINJ_CXL_MEM_FATAL (1<<17) 1357 #define ACPI_EINJ_VENDOR_DEFINED (1<<31) 1358 1359 1360 /******************************************************************************* 1361 * 1362 * ERST - Error Record Serialization Table (ACPI 4.0) 1363 * Version 1 1364 * 1365 ******************************************************************************/ 1366 1367 typedef struct acpi_table_erst 1368 { 1369 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1370 UINT32 HeaderLength; 1371 UINT32 Reserved; 1372 UINT32 Entries; 1373 1374 } ACPI_TABLE_ERST; 1375 1376 1377 /* ERST Serialization Entries (actions) */ 1378 1379 typedef struct acpi_erst_entry 1380 { 1381 ACPI_WHEA_HEADER WheaHeader; /* Common header for WHEA tables */ 1382 1383 } ACPI_ERST_ENTRY; 1384 1385 /* Masks for Flags field above */ 1386 1387 #define ACPI_ERST_PRESERVE (1) 1388 1389 /* Values for Action field above */ 1390 1391 enum AcpiErstActions 1392 { 1393 ACPI_ERST_BEGIN_WRITE = 0, 1394 ACPI_ERST_BEGIN_READ = 1, 1395 ACPI_ERST_BEGIN_CLEAR = 2, 1396 ACPI_ERST_END = 3, 1397 ACPI_ERST_SET_RECORD_OFFSET = 4, 1398 ACPI_ERST_EXECUTE_OPERATION = 5, 1399 ACPI_ERST_CHECK_BUSY_STATUS = 6, 1400 ACPI_ERST_GET_COMMAND_STATUS = 7, 1401 ACPI_ERST_GET_RECORD_ID = 8, 1402 ACPI_ERST_SET_RECORD_ID = 9, 1403 ACPI_ERST_GET_RECORD_COUNT = 10, 1404 ACPI_ERST_BEGIN_DUMMY_WRIITE = 11, 1405 ACPI_ERST_NOT_USED = 12, 1406 ACPI_ERST_GET_ERROR_RANGE = 13, 1407 ACPI_ERST_GET_ERROR_LENGTH = 14, 1408 ACPI_ERST_GET_ERROR_ATTRIBUTES = 15, 1409 ACPI_ERST_EXECUTE_TIMINGS = 16, 1410 ACPI_ERST_ACTION_RESERVED = 17 /* 17 and greater are reserved */ 1411 }; 1412 1413 /* Values for Instruction field above */ 1414 1415 enum AcpiErstInstructions 1416 { 1417 ACPI_ERST_READ_REGISTER = 0, 1418 ACPI_ERST_READ_REGISTER_VALUE = 1, 1419 ACPI_ERST_WRITE_REGISTER = 2, 1420 ACPI_ERST_WRITE_REGISTER_VALUE = 3, 1421 ACPI_ERST_NOOP = 4, 1422 ACPI_ERST_LOAD_VAR1 = 5, 1423 ACPI_ERST_LOAD_VAR2 = 6, 1424 ACPI_ERST_STORE_VAR1 = 7, 1425 ACPI_ERST_ADD = 8, 1426 ACPI_ERST_SUBTRACT = 9, 1427 ACPI_ERST_ADD_VALUE = 10, 1428 ACPI_ERST_SUBTRACT_VALUE = 11, 1429 ACPI_ERST_STALL = 12, 1430 ACPI_ERST_STALL_WHILE_TRUE = 13, 1431 ACPI_ERST_SKIP_NEXT_IF_TRUE = 14, 1432 ACPI_ERST_GOTO = 15, 1433 ACPI_ERST_SET_SRC_ADDRESS_BASE = 16, 1434 ACPI_ERST_SET_DST_ADDRESS_BASE = 17, 1435 ACPI_ERST_MOVE_DATA = 18, 1436 ACPI_ERST_INSTRUCTION_RESERVED = 19 /* 19 and greater are reserved */ 1437 }; 1438 1439 /* Command status return values */ 1440 1441 enum AcpiErstCommandStatus 1442 { 1443 ACPI_ERST_SUCCESS = 0, 1444 ACPI_ERST_NO_SPACE = 1, 1445 ACPI_ERST_NOT_AVAILABLE = 2, 1446 ACPI_ERST_FAILURE = 3, 1447 ACPI_ERST_RECORD_EMPTY = 4, 1448 ACPI_ERST_NOT_FOUND = 5, 1449 ACPI_ERST_STATUS_RESERVED = 6 /* 6 and greater are reserved */ 1450 }; 1451 1452 1453 /* Error Record Serialization Information */ 1454 1455 typedef struct acpi_erst_info 1456 { 1457 UINT16 Signature; /* Should be "ER" */ 1458 UINT8 Data[48]; 1459 1460 } ACPI_ERST_INFO; 1461 1462 1463 /******************************************************************************* 1464 * 1465 * FPDT - Firmware Performance Data Table (ACPI 5.0) 1466 * Version 1 1467 * 1468 ******************************************************************************/ 1469 1470 typedef struct acpi_table_fpdt 1471 { 1472 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1473 1474 } ACPI_TABLE_FPDT; 1475 1476 1477 /* FPDT subtable header (Performance Record Structure) */ 1478 1479 typedef struct acpi_fpdt_header 1480 { 1481 UINT16 Type; 1482 UINT8 Length; 1483 UINT8 Revision; 1484 1485 } ACPI_FPDT_HEADER; 1486 1487 /* Values for Type field above */ 1488 1489 enum AcpiFpdtType 1490 { 1491 ACPI_FPDT_TYPE_BOOT = 0, 1492 ACPI_FPDT_TYPE_S3PERF = 1 1493 }; 1494 1495 1496 /* 1497 * FPDT subtables 1498 */ 1499 1500 /* 0: Firmware Basic Boot Performance Record */ 1501 1502 typedef struct acpi_fpdt_boot_pointer 1503 { 1504 ACPI_FPDT_HEADER Header; 1505 UINT8 Reserved[4]; 1506 UINT64 Address; 1507 1508 } ACPI_FPDT_BOOT_POINTER; 1509 1510 1511 /* 1: S3 Performance Table Pointer Record */ 1512 1513 typedef struct acpi_fpdt_s3pt_pointer 1514 { 1515 ACPI_FPDT_HEADER Header; 1516 UINT8 Reserved[4]; 1517 UINT64 Address; 1518 1519 } ACPI_FPDT_S3PT_POINTER; 1520 1521 1522 /* 1523 * S3PT - S3 Performance Table. This table is pointed to by the 1524 * S3 Pointer Record above. 1525 */ 1526 typedef struct acpi_table_s3pt 1527 { 1528 UINT8 Signature[4]; /* "S3PT" */ 1529 UINT32 Length; 1530 1531 } ACPI_TABLE_S3PT; 1532 1533 1534 /* 1535 * S3PT Subtables (Not part of the actual FPDT) 1536 */ 1537 1538 /* Values for Type field in S3PT header */ 1539 1540 enum AcpiS3ptType 1541 { 1542 ACPI_S3PT_TYPE_RESUME = 0, 1543 ACPI_S3PT_TYPE_SUSPEND = 1, 1544 ACPI_FPDT_BOOT_PERFORMANCE = 2 1545 }; 1546 1547 typedef struct acpi_s3pt_resume 1548 { 1549 ACPI_FPDT_HEADER Header; 1550 UINT32 ResumeCount; 1551 UINT64 FullResume; 1552 UINT64 AverageResume; 1553 1554 } ACPI_S3PT_RESUME; 1555 1556 typedef struct acpi_s3pt_suspend 1557 { 1558 ACPI_FPDT_HEADER Header; 1559 UINT64 SuspendStart; 1560 UINT64 SuspendEnd; 1561 1562 } ACPI_S3PT_SUSPEND; 1563 1564 1565 /* 1566 * FPDT Boot Performance Record (Not part of the actual FPDT) 1567 */ 1568 typedef struct acpi_fpdt_boot 1569 { 1570 ACPI_FPDT_HEADER Header; 1571 UINT8 Reserved[4]; 1572 UINT64 ResetEnd; 1573 UINT64 LoadStart; 1574 UINT64 StartupStart; 1575 UINT64 ExitServicesEntry; 1576 UINT64 ExitServicesExit; 1577 1578 } ACPI_FPDT_BOOT; 1579 1580 1581 /******************************************************************************* 1582 * 1583 * GTDT - Generic Timer Description Table (ACPI 5.1) 1584 * Version 2 1585 * 1586 ******************************************************************************/ 1587 1588 typedef struct acpi_table_gtdt 1589 { 1590 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1591 UINT64 CounterBlockAddresss; 1592 UINT32 Reserved; 1593 UINT32 SecureEl1Interrupt; 1594 UINT32 SecureEl1Flags; 1595 UINT32 NonSecureEl1Interrupt; 1596 UINT32 NonSecureEl1Flags; 1597 UINT32 VirtualTimerInterrupt; 1598 UINT32 VirtualTimerFlags; 1599 UINT32 NonSecureEl2Interrupt; 1600 UINT32 NonSecureEl2Flags; 1601 UINT64 CounterReadBlockAddress; 1602 UINT32 PlatformTimerCount; 1603 UINT32 PlatformTimerOffset; 1604 1605 } ACPI_TABLE_GTDT; 1606 1607 /* Flag Definitions: Timer Block Physical Timers and Virtual timers */ 1608 1609 #define ACPI_GTDT_INTERRUPT_MODE (1) 1610 #define ACPI_GTDT_INTERRUPT_POLARITY (1<<1) 1611 #define ACPI_GTDT_ALWAYS_ON (1<<2) 1612 1613 typedef struct acpi_gtdt_el2 1614 { 1615 UINT32 VirtualEL2TimerGsiv; 1616 UINT32 VirtualEL2TimerFlags; 1617 } ACPI_GTDT_EL2; 1618 1619 1620 /* Common GTDT subtable header */ 1621 1622 typedef struct acpi_gtdt_header 1623 { 1624 UINT8 Type; 1625 UINT16 Length; 1626 1627 } ACPI_GTDT_HEADER; 1628 1629 /* Values for GTDT subtable type above */ 1630 1631 enum AcpiGtdtType 1632 { 1633 ACPI_GTDT_TYPE_TIMER_BLOCK = 0, 1634 ACPI_GTDT_TYPE_WATCHDOG = 1, 1635 ACPI_GTDT_TYPE_RESERVED = 2 /* 2 and greater are reserved */ 1636 }; 1637 1638 1639 /* GTDT Subtables, correspond to Type in acpi_gtdt_header */ 1640 1641 /* 0: Generic Timer Block */ 1642 1643 typedef struct acpi_gtdt_timer_block 1644 { 1645 ACPI_GTDT_HEADER Header; 1646 UINT8 Reserved; 1647 UINT64 BlockAddress; 1648 UINT32 TimerCount; 1649 UINT32 TimerOffset; 1650 1651 } ACPI_GTDT_TIMER_BLOCK; 1652 1653 /* Timer Sub-Structure, one per timer */ 1654 1655 typedef struct acpi_gtdt_timer_entry 1656 { 1657 UINT8 FrameNumber; 1658 UINT8 Reserved[3]; 1659 UINT64 BaseAddress; 1660 UINT64 El0BaseAddress; 1661 UINT32 TimerInterrupt; 1662 UINT32 TimerFlags; 1663 UINT32 VirtualTimerInterrupt; 1664 UINT32 VirtualTimerFlags; 1665 UINT32 CommonFlags; 1666 1667 } ACPI_GTDT_TIMER_ENTRY; 1668 1669 /* Flag Definitions: TimerFlags and VirtualTimerFlags above */ 1670 1671 #define ACPI_GTDT_GT_IRQ_MODE (1) 1672 #define ACPI_GTDT_GT_IRQ_POLARITY (1<<1) 1673 1674 /* Flag Definitions: CommonFlags above */ 1675 1676 #define ACPI_GTDT_GT_IS_SECURE_TIMER (1) 1677 #define ACPI_GTDT_GT_ALWAYS_ON (1<<1) 1678 1679 1680 /* 1: SBSA Generic Watchdog Structure */ 1681 1682 typedef struct acpi_gtdt_watchdog 1683 { 1684 ACPI_GTDT_HEADER Header; 1685 UINT8 Reserved; 1686 UINT64 RefreshFrameAddress; 1687 UINT64 ControlFrameAddress; 1688 UINT32 TimerInterrupt; 1689 UINT32 TimerFlags; 1690 1691 } ACPI_GTDT_WATCHDOG; 1692 1693 /* Flag Definitions: TimerFlags above */ 1694 1695 #define ACPI_GTDT_WATCHDOG_IRQ_MODE (1) 1696 #define ACPI_GTDT_WATCHDOG_IRQ_POLARITY (1<<1) 1697 #define ACPI_GTDT_WATCHDOG_SECURE (1<<2) 1698 1699 1700 /******************************************************************************* 1701 * 1702 * HEST - Hardware Error Source Table (ACPI 4.0) 1703 * Version 1 1704 * 1705 ******************************************************************************/ 1706 1707 typedef struct acpi_table_hest 1708 { 1709 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1710 UINT32 ErrorSourceCount; 1711 1712 } ACPI_TABLE_HEST; 1713 1714 1715 /* HEST subtable header */ 1716 1717 typedef struct acpi_hest_header 1718 { 1719 UINT16 Type; 1720 UINT16 SourceId; 1721 1722 } ACPI_HEST_HEADER; 1723 1724 1725 /* Values for Type field above for subtables */ 1726 1727 enum AcpiHestTypes 1728 { 1729 ACPI_HEST_TYPE_IA32_CHECK = 0, 1730 ACPI_HEST_TYPE_IA32_CORRECTED_CHECK = 1, 1731 ACPI_HEST_TYPE_IA32_NMI = 2, 1732 ACPI_HEST_TYPE_NOT_USED3 = 3, 1733 ACPI_HEST_TYPE_NOT_USED4 = 4, 1734 ACPI_HEST_TYPE_NOT_USED5 = 5, 1735 ACPI_HEST_TYPE_AER_ROOT_PORT = 6, 1736 ACPI_HEST_TYPE_AER_ENDPOINT = 7, 1737 ACPI_HEST_TYPE_AER_BRIDGE = 8, 1738 ACPI_HEST_TYPE_GENERIC_ERROR = 9, 1739 ACPI_HEST_TYPE_GENERIC_ERROR_V2 = 10, 1740 ACPI_HEST_TYPE_IA32_DEFERRED_CHECK = 11, 1741 ACPI_HEST_TYPE_RESERVED = 12 /* 12 and greater are reserved */ 1742 }; 1743 1744 1745 /* 1746 * HEST substructures contained in subtables 1747 */ 1748 1749 /* 1750 * IA32 Error Bank(s) - Follows the ACPI_HEST_IA_MACHINE_CHECK and 1751 * ACPI_HEST_IA_CORRECTED structures. 1752 */ 1753 typedef struct acpi_hest_ia_error_bank 1754 { 1755 UINT8 BankNumber; 1756 UINT8 ClearStatusOnInit; 1757 UINT8 StatusFormat; 1758 UINT8 Reserved; 1759 UINT32 ControlRegister; 1760 UINT64 ControlData; 1761 UINT32 StatusRegister; 1762 UINT32 AddressRegister; 1763 UINT32 MiscRegister; 1764 1765 } ACPI_HEST_IA_ERROR_BANK; 1766 1767 1768 /* Common HEST sub-structure for PCI/AER structures below (6,7,8) */ 1769 1770 typedef struct acpi_hest_aer_common 1771 { 1772 UINT16 Reserved1; 1773 UINT8 Flags; 1774 UINT8 Enabled; 1775 UINT32 RecordsToPreallocate; 1776 UINT32 MaxSectionsPerRecord; 1777 UINT32 Bus; /* Bus and Segment numbers */ 1778 UINT16 Device; 1779 UINT16 Function; 1780 UINT16 DeviceControl; 1781 UINT16 Reserved2; 1782 UINT32 UncorrectableMask; 1783 UINT32 UncorrectableSeverity; 1784 UINT32 CorrectableMask; 1785 UINT32 AdvancedCapabilities; 1786 1787 } ACPI_HEST_AER_COMMON; 1788 1789 /* Masks for HEST Flags fields */ 1790 1791 #define ACPI_HEST_FIRMWARE_FIRST (1) 1792 #define ACPI_HEST_GLOBAL (1<<1) 1793 #define ACPI_HEST_GHES_ASSIST (1<<2) 1794 1795 /* 1796 * Macros to access the bus/segment numbers in Bus field above: 1797 * Bus number is encoded in bits 7:0 1798 * Segment number is encoded in bits 23:8 1799 */ 1800 #define ACPI_HEST_BUS(Bus) ((Bus) & 0xFF) 1801 #define ACPI_HEST_SEGMENT(Bus) (((Bus) >> 8) & 0xFFFF) 1802 1803 1804 /* Hardware Error Notification */ 1805 1806 typedef struct acpi_hest_notify 1807 { 1808 UINT8 Type; 1809 UINT8 Length; 1810 UINT16 ConfigWriteEnable; 1811 UINT32 PollInterval; 1812 UINT32 Vector; 1813 UINT32 PollingThresholdValue; 1814 UINT32 PollingThresholdWindow; 1815 UINT32 ErrorThresholdValue; 1816 UINT32 ErrorThresholdWindow; 1817 1818 } ACPI_HEST_NOTIFY; 1819 1820 /* Values for Notify Type field above */ 1821 1822 enum AcpiHestNotifyTypes 1823 { 1824 ACPI_HEST_NOTIFY_POLLED = 0, 1825 ACPI_HEST_NOTIFY_EXTERNAL = 1, 1826 ACPI_HEST_NOTIFY_LOCAL = 2, 1827 ACPI_HEST_NOTIFY_SCI = 3, 1828 ACPI_HEST_NOTIFY_NMI = 4, 1829 ACPI_HEST_NOTIFY_CMCI = 5, /* ACPI 5.0 */ 1830 ACPI_HEST_NOTIFY_MCE = 6, /* ACPI 5.0 */ 1831 ACPI_HEST_NOTIFY_GPIO = 7, /* ACPI 6.0 */ 1832 ACPI_HEST_NOTIFY_SEA = 8, /* ACPI 6.1 */ 1833 ACPI_HEST_NOTIFY_SEI = 9, /* ACPI 6.1 */ 1834 ACPI_HEST_NOTIFY_GSIV = 10, /* ACPI 6.1 */ 1835 ACPI_HEST_NOTIFY_SOFTWARE_DELEGATED = 11, /* ACPI 6.2 */ 1836 ACPI_HEST_NOTIFY_RESERVED = 12 /* 12 and greater are reserved */ 1837 }; 1838 1839 /* Values for ConfigWriteEnable bitfield above */ 1840 1841 #define ACPI_HEST_TYPE (1) 1842 #define ACPI_HEST_POLL_INTERVAL (1<<1) 1843 #define ACPI_HEST_POLL_THRESHOLD_VALUE (1<<2) 1844 #define ACPI_HEST_POLL_THRESHOLD_WINDOW (1<<3) 1845 #define ACPI_HEST_ERR_THRESHOLD_VALUE (1<<4) 1846 #define ACPI_HEST_ERR_THRESHOLD_WINDOW (1<<5) 1847 1848 1849 /* 1850 * HEST subtables 1851 */ 1852 1853 /* 0: IA32 Machine Check Exception */ 1854 1855 typedef struct acpi_hest_ia_machine_check 1856 { 1857 ACPI_HEST_HEADER Header; 1858 UINT16 Reserved1; 1859 UINT8 Flags; /* See flags ACPI_HEST_GLOBAL, etc. above */ 1860 UINT8 Enabled; 1861 UINT32 RecordsToPreallocate; 1862 UINT32 MaxSectionsPerRecord; 1863 UINT64 GlobalCapabilityData; 1864 UINT64 GlobalControlData; 1865 UINT8 NumHardwareBanks; 1866 UINT8 Reserved3[7]; 1867 1868 } ACPI_HEST_IA_MACHINE_CHECK; 1869 1870 1871 /* 1: IA32 Corrected Machine Check */ 1872 1873 typedef struct acpi_hest_ia_corrected 1874 { 1875 ACPI_HEST_HEADER Header; 1876 UINT16 Reserved1; 1877 UINT8 Flags; /* See flags ACPI_HEST_GLOBAL, etc. above */ 1878 UINT8 Enabled; 1879 UINT32 RecordsToPreallocate; 1880 UINT32 MaxSectionsPerRecord; 1881 ACPI_HEST_NOTIFY Notify; 1882 UINT8 NumHardwareBanks; 1883 UINT8 Reserved2[3]; 1884 1885 } ACPI_HEST_IA_CORRECTED; 1886 1887 1888 /* 2: IA32 Non-Maskable Interrupt */ 1889 1890 typedef struct acpi_hest_ia_nmi 1891 { 1892 ACPI_HEST_HEADER Header; 1893 UINT32 Reserved; 1894 UINT32 RecordsToPreallocate; 1895 UINT32 MaxSectionsPerRecord; 1896 UINT32 MaxRawDataLength; 1897 1898 } ACPI_HEST_IA_NMI; 1899 1900 1901 /* 3,4,5: Not used */ 1902 1903 /* 6: PCI Express Root Port AER */ 1904 1905 typedef struct acpi_hest_aer_root 1906 { 1907 ACPI_HEST_HEADER Header; 1908 ACPI_HEST_AER_COMMON Aer; 1909 UINT32 RootErrorCommand; 1910 1911 } ACPI_HEST_AER_ROOT; 1912 1913 1914 /* 7: PCI Express AER (AER Endpoint) */ 1915 1916 typedef struct acpi_hest_aer 1917 { 1918 ACPI_HEST_HEADER Header; 1919 ACPI_HEST_AER_COMMON Aer; 1920 1921 } ACPI_HEST_AER; 1922 1923 1924 /* 8: PCI Express/PCI-X Bridge AER */ 1925 1926 typedef struct acpi_hest_aer_bridge 1927 { 1928 ACPI_HEST_HEADER Header; 1929 ACPI_HEST_AER_COMMON Aer; 1930 UINT32 UncorrectableMask2; 1931 UINT32 UncorrectableSeverity2; 1932 UINT32 AdvancedCapabilities2; 1933 1934 } ACPI_HEST_AER_BRIDGE; 1935 1936 1937 /* 9: Generic Hardware Error Source */ 1938 1939 typedef struct acpi_hest_generic 1940 { 1941 ACPI_HEST_HEADER Header; 1942 UINT16 RelatedSourceId; 1943 UINT8 Reserved; 1944 UINT8 Enabled; 1945 UINT32 RecordsToPreallocate; 1946 UINT32 MaxSectionsPerRecord; 1947 UINT32 MaxRawDataLength; 1948 ACPI_GENERIC_ADDRESS ErrorStatusAddress; 1949 ACPI_HEST_NOTIFY Notify; 1950 UINT32 ErrorBlockLength; 1951 1952 } ACPI_HEST_GENERIC; 1953 1954 1955 /* 10: Generic Hardware Error Source, version 2 */ 1956 1957 typedef struct acpi_hest_generic_v2 1958 { 1959 ACPI_HEST_HEADER Header; 1960 UINT16 RelatedSourceId; 1961 UINT8 Reserved; 1962 UINT8 Enabled; 1963 UINT32 RecordsToPreallocate; 1964 UINT32 MaxSectionsPerRecord; 1965 UINT32 MaxRawDataLength; 1966 ACPI_GENERIC_ADDRESS ErrorStatusAddress; 1967 ACPI_HEST_NOTIFY Notify; 1968 UINT32 ErrorBlockLength; 1969 ACPI_GENERIC_ADDRESS ReadAckRegister; 1970 UINT64 ReadAckPreserve; 1971 UINT64 ReadAckWrite; 1972 1973 } ACPI_HEST_GENERIC_V2; 1974 1975 1976 /* Generic Error Status block */ 1977 1978 typedef struct acpi_hest_generic_status 1979 { 1980 UINT32 BlockStatus; 1981 UINT32 RawDataOffset; 1982 UINT32 RawDataLength; 1983 UINT32 DataLength; 1984 UINT32 ErrorSeverity; 1985 1986 } ACPI_HEST_GENERIC_STATUS; 1987 1988 /* Values for BlockStatus flags above */ 1989 1990 #define ACPI_HEST_UNCORRECTABLE (1) 1991 #define ACPI_HEST_CORRECTABLE (1<<1) 1992 #define ACPI_HEST_MULTIPLE_UNCORRECTABLE (1<<2) 1993 #define ACPI_HEST_MULTIPLE_CORRECTABLE (1<<3) 1994 #define ACPI_HEST_ERROR_ENTRY_COUNT (0xFF<<4) /* 8 bits, error count */ 1995 1996 1997 /* Generic Error Data entry */ 1998 1999 typedef struct acpi_hest_generic_data 2000 { 2001 UINT8 SectionType[16]; 2002 UINT32 ErrorSeverity; 2003 UINT16 Revision; 2004 UINT8 ValidationBits; 2005 UINT8 Flags; 2006 UINT32 ErrorDataLength; 2007 UINT8 FruId[16]; 2008 UINT8 FruText[20]; 2009 2010 } ACPI_HEST_GENERIC_DATA; 2011 2012 /* Extension for revision 0x0300 */ 2013 2014 typedef struct acpi_hest_generic_data_v300 2015 { 2016 UINT8 SectionType[16]; 2017 UINT32 ErrorSeverity; 2018 UINT16 Revision; 2019 UINT8 ValidationBits; 2020 UINT8 Flags; 2021 UINT32 ErrorDataLength; 2022 UINT8 FruId[16]; 2023 UINT8 FruText[20]; 2024 UINT64 TimeStamp; 2025 2026 } ACPI_HEST_GENERIC_DATA_V300; 2027 2028 /* Values for ErrorSeverity above */ 2029 2030 #define ACPI_HEST_GEN_ERROR_RECOVERABLE 0 2031 #define ACPI_HEST_GEN_ERROR_FATAL 1 2032 #define ACPI_HEST_GEN_ERROR_CORRECTED 2 2033 #define ACPI_HEST_GEN_ERROR_NONE 3 2034 2035 /* Flags for ValidationBits above */ 2036 2037 #define ACPI_HEST_GEN_VALID_FRU_ID (1) 2038 #define ACPI_HEST_GEN_VALID_FRU_STRING (1<<1) 2039 #define ACPI_HEST_GEN_VALID_TIMESTAMP (1<<2) 2040 2041 2042 /* 11: IA32 Deferred Machine Check Exception (ACPI 6.2) */ 2043 2044 typedef struct acpi_hest_ia_deferred_check 2045 { 2046 ACPI_HEST_HEADER Header; 2047 UINT16 Reserved1; 2048 UINT8 Flags; /* See flags ACPI_HEST_GLOBAL, etc. above */ 2049 UINT8 Enabled; 2050 UINT32 RecordsToPreallocate; 2051 UINT32 MaxSectionsPerRecord; 2052 ACPI_HEST_NOTIFY Notify; 2053 UINT8 NumHardwareBanks; 2054 UINT8 Reserved2[3]; 2055 2056 } ACPI_HEST_IA_DEFERRED_CHECK; 2057 2058 2059 /******************************************************************************* 2060 * 2061 * HMAT - Heterogeneous Memory Attributes Table (ACPI 6.3) 2062 * 2063 ******************************************************************************/ 2064 2065 typedef struct acpi_table_hmat 2066 { 2067 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 2068 UINT32 Reserved; 2069 2070 } ACPI_TABLE_HMAT; 2071 2072 2073 /* Values for HMAT structure types */ 2074 2075 enum AcpiHmatType 2076 { 2077 ACPI_HMAT_TYPE_ADDRESS_RANGE = 0, /* Memory subsystem address range */ 2078 ACPI_HMAT_TYPE_LOCALITY = 1, /* System locality latency and bandwidth information */ 2079 ACPI_HMAT_TYPE_CACHE = 2, /* Memory side cache information */ 2080 ACPI_HMAT_TYPE_RESERVED = 3 /* 3 and greater are reserved */ 2081 }; 2082 2083 typedef struct acpi_hmat_structure 2084 { 2085 UINT16 Type; 2086 UINT16 Reserved; 2087 UINT32 Length; 2088 2089 } ACPI_HMAT_STRUCTURE; 2090 2091 2092 /* 2093 * HMAT Structures, correspond to Type in ACPI_HMAT_STRUCTURE 2094 */ 2095 2096 /* 0: Memory proximity domain attributes */ 2097 2098 typedef struct acpi_hmat_proximity_domain 2099 { 2100 ACPI_HMAT_STRUCTURE Header; 2101 UINT16 Flags; 2102 UINT16 Reserved1; 2103 UINT32 InitiatorPD; /* Attached Initiator proximity domain */ 2104 UINT32 MemoryPD; /* Memory proximity domain */ 2105 UINT32 Reserved2; 2106 UINT64 Reserved3; 2107 UINT64 Reserved4; 2108 2109 } ACPI_HMAT_PROXIMITY_DOMAIN; 2110 2111 /* Masks for Flags field above */ 2112 2113 #define ACPI_HMAT_INITIATOR_PD_VALID (1) /* 1: InitiatorPD field is valid */ 2114 2115 2116 /* 1: System locality latency and bandwidth information */ 2117 2118 typedef struct acpi_hmat_locality 2119 { 2120 ACPI_HMAT_STRUCTURE Header; 2121 UINT8 Flags; 2122 UINT8 DataType; 2123 UINT8 MinTransferSize; 2124 UINT8 Reserved1; 2125 UINT32 NumberOfInitiatorPDs; 2126 UINT32 NumberOfTargetPDs; 2127 UINT32 Reserved2; 2128 UINT64 EntryBaseUnit; 2129 2130 } ACPI_HMAT_LOCALITY; 2131 2132 /* Masks for Flags field above */ 2133 2134 #define ACPI_HMAT_MEMORY_HIERARCHY (0x0F) /* Bits 0-3 */ 2135 2136 /* Values for Memory Hierarchy flags */ 2137 2138 #define ACPI_HMAT_MEMORY 0 2139 #define ACPI_HMAT_1ST_LEVEL_CACHE 1 2140 #define ACPI_HMAT_2ND_LEVEL_CACHE 2 2141 #define ACPI_HMAT_3RD_LEVEL_CACHE 3 2142 #define ACPI_HMAT_MINIMUM_XFER_SIZE 0x10 /* Bit 4: ACPI 6.4 */ 2143 #define ACPI_HMAT_NON_SEQUENTIAL_XFERS 0x20 /* Bit 5: ACPI 6.4 */ 2144 2145 2146 /* Values for DataType field above */ 2147 2148 #define ACPI_HMAT_ACCESS_LATENCY 0 2149 #define ACPI_HMAT_READ_LATENCY 1 2150 #define ACPI_HMAT_WRITE_LATENCY 2 2151 #define ACPI_HMAT_ACCESS_BANDWIDTH 3 2152 #define ACPI_HMAT_READ_BANDWIDTH 4 2153 #define ACPI_HMAT_WRITE_BANDWIDTH 5 2154 2155 2156 /* 2: Memory side cache information */ 2157 2158 typedef struct acpi_hmat_cache 2159 { 2160 ACPI_HMAT_STRUCTURE Header; 2161 UINT32 MemoryPD; 2162 UINT32 Reserved1; 2163 UINT64 CacheSize; 2164 UINT32 CacheAttributes; 2165 UINT16 AddressMode; 2166 UINT16 NumberOfSMBIOSHandles; 2167 2168 } ACPI_HMAT_CACHE; 2169 2170 /* Masks for CacheAttributes field above */ 2171 2172 #define ACPI_HMAT_TOTAL_CACHE_LEVEL (0x0000000F) 2173 #define ACPI_HMAT_CACHE_LEVEL (0x000000F0) 2174 #define ACPI_HMAT_CACHE_ASSOCIATIVITY (0x00000F00) 2175 #define ACPI_HMAT_WRITE_POLICY (0x0000F000) 2176 #define ACPI_HMAT_CACHE_LINE_SIZE (0xFFFF0000) 2177 2178 #define ACPI_HMAT_CACHE_MODE_UNKNOWN (0) 2179 #define ACPI_HMAT_CACHE_MODE_EXTENDED_LINEAR (1) 2180 2181 /* Values for cache associativity flag */ 2182 2183 #define ACPI_HMAT_CA_NONE (0) 2184 #define ACPI_HMAT_CA_DIRECT_MAPPED (1) 2185 #define ACPI_HMAT_CA_COMPLEX_CACHE_INDEXING (2) 2186 2187 /* Values for write policy flag */ 2188 2189 #define ACPI_HMAT_CP_NONE (0) 2190 #define ACPI_HMAT_CP_WB (1) 2191 #define ACPI_HMAT_CP_WT (2) 2192 2193 2194 /******************************************************************************* 2195 * 2196 * HPET - High Precision Event Timer table 2197 * Version 1 2198 * 2199 * Conforms to "IA-PC HPET (High Precision Event Timers) Specification", 2200 * Version 1.0a, October 2004 2201 * 2202 ******************************************************************************/ 2203 2204 typedef struct acpi_table_hpet 2205 { 2206 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 2207 UINT32 Id; /* Hardware ID of event timer block */ 2208 ACPI_GENERIC_ADDRESS Address; /* Address of event timer block */ 2209 UINT8 Sequence; /* HPET sequence number */ 2210 UINT16 MinimumTick; /* Main counter min tick, periodic mode */ 2211 UINT8 Flags; 2212 2213 } ACPI_TABLE_HPET; 2214 2215 /* Masks for Flags field above */ 2216 2217 #define ACPI_HPET_PAGE_PROTECT_MASK (3) 2218 2219 /* Values for Page Protect flags */ 2220 2221 enum AcpiHpetPageProtect 2222 { 2223 ACPI_HPET_NO_PAGE_PROTECT = 0, 2224 ACPI_HPET_PAGE_PROTECT4 = 1, 2225 ACPI_HPET_PAGE_PROTECT64 = 2 2226 }; 2227 2228 2229 /******************************************************************************* 2230 * 2231 * IBFT - Boot Firmware Table 2232 * Version 1 2233 * 2234 * Conforms to "iSCSI Boot Firmware Table (iBFT) as Defined in ACPI 3.0b 2235 * Specification", Version 1.01, March 1, 2007 2236 * 2237 * Note: It appears that this table is not intended to appear in the RSDT/XSDT. 2238 * Therefore, it is not currently supported by the disassembler. 2239 * 2240 ******************************************************************************/ 2241 2242 typedef struct acpi_table_ibft 2243 { 2244 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 2245 UINT8 Reserved[12]; 2246 2247 } ACPI_TABLE_IBFT; 2248 2249 2250 /* IBFT common subtable header */ 2251 2252 typedef struct acpi_ibft_header 2253 { 2254 UINT8 Type; 2255 UINT8 Version; 2256 UINT16 Length; 2257 UINT8 Index; 2258 UINT8 Flags; 2259 2260 } ACPI_IBFT_HEADER; 2261 2262 /* Values for Type field above */ 2263 2264 enum AcpiIbftType 2265 { 2266 ACPI_IBFT_TYPE_NOT_USED = 0, 2267 ACPI_IBFT_TYPE_CONTROL = 1, 2268 ACPI_IBFT_TYPE_INITIATOR = 2, 2269 ACPI_IBFT_TYPE_NIC = 3, 2270 ACPI_IBFT_TYPE_TARGET = 4, 2271 ACPI_IBFT_TYPE_EXTENSIONS = 5, 2272 ACPI_IBFT_TYPE_RESERVED = 6 /* 6 and greater are reserved */ 2273 }; 2274 2275 2276 /* IBFT subtables */ 2277 2278 typedef struct acpi_ibft_control 2279 { 2280 ACPI_IBFT_HEADER Header; 2281 UINT16 Extensions; 2282 UINT16 InitiatorOffset; 2283 UINT16 Nic0Offset; 2284 UINT16 Target0Offset; 2285 UINT16 Nic1Offset; 2286 UINT16 Target1Offset; 2287 2288 } ACPI_IBFT_CONTROL; 2289 2290 typedef struct acpi_ibft_initiator 2291 { 2292 ACPI_IBFT_HEADER Header; 2293 UINT8 SnsServer[16]; 2294 UINT8 SlpServer[16]; 2295 UINT8 PrimaryServer[16]; 2296 UINT8 SecondaryServer[16]; 2297 UINT16 NameLength; 2298 UINT16 NameOffset; 2299 2300 } ACPI_IBFT_INITIATOR; 2301 2302 typedef struct acpi_ibft_nic 2303 { 2304 ACPI_IBFT_HEADER Header; 2305 UINT8 IpAddress[16]; 2306 UINT8 SubnetMaskPrefix; 2307 UINT8 Origin; 2308 UINT8 Gateway[16]; 2309 UINT8 PrimaryDns[16]; 2310 UINT8 SecondaryDns[16]; 2311 UINT8 Dhcp[16]; 2312 UINT16 Vlan; 2313 UINT8 MacAddress[6]; 2314 UINT16 PciAddress; 2315 UINT16 NameLength; 2316 UINT16 NameOffset; 2317 2318 } ACPI_IBFT_NIC; 2319 2320 typedef struct acpi_ibft_target 2321 { 2322 ACPI_IBFT_HEADER Header; 2323 UINT8 TargetIpAddress[16]; 2324 UINT16 TargetIpSocket; 2325 UINT8 TargetBootLun[8]; 2326 UINT8 ChapType; 2327 UINT8 NicAssociation; 2328 UINT16 TargetNameLength; 2329 UINT16 TargetNameOffset; 2330 UINT16 ChapNameLength; 2331 UINT16 ChapNameOffset; 2332 UINT16 ChapSecretLength; 2333 UINT16 ChapSecretOffset; 2334 UINT16 ReverseChapNameLength; 2335 UINT16 ReverseChapNameOffset; 2336 UINT16 ReverseChapSecretLength; 2337 UINT16 ReverseChapSecretOffset; 2338 2339 } ACPI_IBFT_TARGET; 2340 2341 2342 /* Reset to default packing */ 2343 2344 #pragma pack() 2345 2346 #endif /* __ACTBL1_H__ */ 2347
Indexes created Tue Sep 30 20:09:53 GMT 2025