actbl1.h revision 1.24
1 /****************************************************************************** 2 * 3 * Name: actbl1.h - Additional ACPI table definitions 4 * 5 *****************************************************************************/ 6 7 /****************************************************************************** 8 * 9 * 1. Copyright Notice 10 * 11 * Some or all of this work - Copyright (c) 1999 - 2024, Intel Corp. 12 * All rights reserved. 13 * 14 * 2. License 15 * 16 * 2.1. This is your license from Intel Corp. under its intellectual property 17 * rights. You may have additional license terms from the party that provided 18 * you this software, covering your right to use that party's intellectual 19 * property rights. 20 * 21 * 2.2. Intel grants, free of charge, to any person ("Licensee") obtaining a 22 * copy of the source code appearing in this file ("Covered Code") an 23 * irrevocable, perpetual, worldwide license under Intel's copyrights in the 24 * base code distributed originally by Intel ("Original Intel Code") to copy, 25 * make derivatives, distribute, use and display any portion of the Covered 26 * Code in any form, with the right to sublicense such rights; and 27 * 28 * 2.3. Intel grants Licensee a non-exclusive and non-transferable patent 29 * license (with the right to sublicense), under only those claims of Intel 30 * patents that are infringed by the Original Intel Code, to make, use, sell, 31 * offer to sell, and import the Covered Code and derivative works thereof 32 * solely to the minimum extent necessary to exercise the above copyright 33 * license, and in no event shall the patent license extend to any additions 34 * to or modifications of the Original Intel Code. No other license or right 35 * is granted directly or by implication, estoppel or otherwise; 36 * 37 * The above copyright and patent license is granted only if the following 38 * conditions are met: 39 * 40 * 3. Conditions 41 * 42 * 3.1. Redistribution of Source with Rights to Further Distribute Source. 43 * Redistribution of source code of any substantial portion of the Covered 44 * Code or modification with rights to further distribute source must include 45 * the above Copyright Notice, the above License, this list of Conditions, 46 * and the following Disclaimer and Export Compliance provision. In addition, 47 * Licensee must cause all Covered Code to which Licensee contributes to 48 * contain a file documenting the changes Licensee made to create that Covered 49 * Code and the date of any change. Licensee must include in that file the 50 * documentation of any changes made by any predecessor Licensee. Licensee 51 * must include a prominent statement that the modification is derived, 52 * directly or indirectly, from Original Intel Code. 53 * 54 * 3.2. Redistribution of Source with no Rights to Further Distribute Source. 55 * Redistribution of source code of any substantial portion of the Covered 56 * Code or modification without rights to further distribute source must 57 * include the following Disclaimer and Export Compliance provision in the 58 * documentation and/or other materials provided with distribution. In 59 * addition, Licensee may not authorize further sublicense of source of any 60 * portion of the Covered Code, and must include terms to the effect that the 61 * license from Licensee to its licensee is limited to the intellectual 62 * property embodied in the software Licensee provides to its licensee, and 63 * not to intellectual property embodied in modifications its licensee may 64 * make. 65 * 66 * 3.3. Redistribution of Executable. Redistribution in executable form of any 67 * substantial portion of the Covered Code or modification must reproduce the 68 * above Copyright Notice, and the following Disclaimer and Export Compliance 69 * provision in the documentation and/or other materials provided with the 70 * distribution. 71 * 72 * 3.4. Intel retains all right, title, and interest in and to the Original 73 * Intel Code. 74 * 75 * 3.5. Neither the name Intel nor any other trademark owned or controlled by 76 * Intel shall be used in advertising or otherwise to promote the sale, use or 77 * other dealings in products derived from or relating to the Covered Code 78 * without prior written authorization from Intel. 79 * 80 * 4. Disclaimer and Export Compliance 81 * 82 * 4.1. INTEL MAKES NO WARRANTY OF ANY KIND REGARDING ANY SOFTWARE PROVIDED 83 * HERE. ANY SOFTWARE ORIGINATING FROM INTEL OR DERIVED FROM INTEL SOFTWARE 84 * IS PROVIDED "AS IS," AND INTEL WILL NOT PROVIDE ANY SUPPORT, ASSISTANCE, 85 * INSTALLATION, TRAINING OR OTHER SERVICES. INTEL WILL NOT PROVIDE ANY 86 * UPDATES, ENHANCEMENTS OR EXTENSIONS. INTEL SPECIFICALLY DISCLAIMS ANY 87 * IMPLIED WARRANTIES OF MERCHANTABILITY, NONINFRINGEMENT AND FITNESS FOR A 88 * PARTICULAR PURPOSE. 89 * 90 * 4.2. IN NO EVENT SHALL INTEL HAVE ANY LIABILITY TO LICENSEE, ITS LICENSEES 91 * OR ANY OTHER THIRD PARTY, FOR ANY LOST PROFITS, LOST DATA, LOSS OF USE OR 92 * COSTS OF PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES, OR FOR ANY INDIRECT, 93 * SPECIAL OR CONSEQUENTIAL DAMAGES ARISING OUT OF THIS AGREEMENT, UNDER ANY 94 * CAUSE OF ACTION OR THEORY OF LIABILITY, AND IRRESPECTIVE OF WHETHER INTEL 95 * HAS ADVANCE NOTICE OF THE POSSIBILITY OF SUCH DAMAGES. THESE LIMITATIONS 96 * SHALL APPLY NOTWITHSTANDING THE FAILURE OF THE ESSENTIAL PURPOSE OF ANY 97 * LIMITED REMEDY. 98 * 99 * 4.3. Licensee shall not export, either directly or indirectly, any of this 100 * software or system incorporating such software without first obtaining any 101 * required license or other approval from the U. S. Department of Commerce or 102 * any other agency or department of the United States Government. In the 103 * event Licensee exports any such software from the United States or 104 * re-exports any such software from a foreign destination, Licensee shall 105 * ensure that the distribution and export/re-export of the software is in 106 * compliance with all laws, regulations, orders, or other restrictions of the 107 * U.S. Export Administration Regulations. Licensee agrees that neither it nor 108 * any of its subsidiaries will export/re-export any technical data, process, 109 * software, or service, directly or indirectly, to any country for which the 110 * United States government or any agency thereof requires an export license, 111 * other governmental approval, or letter of assurance, without first obtaining 112 * such license, approval or letter. 113 * 114 ***************************************************************************** 115 * 116 * Alternatively, you may choose to be licensed under the terms of the 117 * following license: 118 * 119 * Redistribution and use in source and binary forms, with or without 120 * modification, are permitted provided that the following conditions 121 * are met: 122 * 1. Redistributions of source code must retain the above copyright 123 * notice, this list of conditions, and the following disclaimer, 124 * without modification. 125 * 2. Redistributions in binary form must reproduce at minimum a disclaimer 126 * substantially similar to the "NO WARRANTY" disclaimer below 127 * ("Disclaimer") and any redistribution must be conditioned upon 128 * including a substantially similar Disclaimer requirement for further 129 * binary redistribution. 130 * 3. Neither the names of the above-listed copyright holders nor the names 131 * of any contributors may be used to endorse or promote products derived 132 * from this software without specific prior written permission. 133 * 134 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 135 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 136 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 137 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 138 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 139 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 140 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 141 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 142 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 143 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 144 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 145 * 146 * Alternatively, you may choose to be licensed under the terms of the 147 * GNU General Public License ("GPL") version 2 as published by the Free 148 * Software Foundation. 149 * 150 *****************************************************************************/ 151 152 #ifndef __ACTBL1_H__ 153 #define __ACTBL1_H__ 154 155 156 /******************************************************************************* 157 * 158 * Additional ACPI Tables 159 * 160 * These tables are not consumed directly by the ACPICA subsystem, but are 161 * included here to support device drivers and the AML disassembler. 162 * 163 ******************************************************************************/ 164 165 166 /* 167 * Values for description table header signatures for tables defined in this 168 * file. Useful because they make it more difficult to inadvertently type in 169 * the wrong signature. 170 */ 171 #define ACPI_SIG_AEST "AEST" /* Arm Error Source Table */ 172 #define ACPI_SIG_ASF "ASF!" /* Alert Standard Format table */ 173 #define ACPI_SIG_ASPT "ASPT" /* AMD Secure Processor Table */ 174 #define ACPI_SIG_BERT "BERT" /* Boot Error Record Table */ 175 #define ACPI_SIG_BGRT "BGRT" /* Boot Graphics Resource Table */ 176 #define ACPI_SIG_BOOT "BOOT" /* Simple Boot Flag Table */ 177 #define ACPI_SIG_CEDT "CEDT" /* CXL Early Discovery Table */ 178 #define ACPI_SIG_CPEP "CPEP" /* Corrected Platform Error Polling table */ 179 #define ACPI_SIG_CSRT "CSRT" /* Core System Resource Table */ 180 #define ACPI_SIG_DBG2 "DBG2" /* Debug Port table type 2 */ 181 #define ACPI_SIG_DBGP "DBGP" /* Debug Port table */ 182 #define ACPI_SIG_DMAR "DMAR" /* DMA Remapping table */ 183 #define ACPI_SIG_DRTM "DRTM" /* Dynamic Root of Trust for Measurement table */ 184 #define ACPI_SIG_ECDT "ECDT" /* Embedded Controller Boot Resources Table */ 185 #define ACPI_SIG_EINJ "EINJ" /* Error Injection table */ 186 #define ACPI_SIG_ERST "ERST" /* Error Record Serialization Table */ 187 #define ACPI_SIG_FPDT "FPDT" /* Firmware Performance Data Table */ 188 #define ACPI_SIG_GTDT "GTDT" /* Generic Timer Description Table */ 189 #define ACPI_SIG_HEST "HEST" /* Hardware Error Source Table */ 190 #define ACPI_SIG_HMAT "HMAT" /* Heterogeneous Memory Attributes Table */ 191 #define ACPI_SIG_HPET "HPET" /* High Precision Event Timer table */ 192 #define ACPI_SIG_IBFT "IBFT" /* iSCSI Boot Firmware Table */ 193 #define ACPI_SIG_MSCT "MSCT" /* Maximum System Characteristics Table*/ 194 195 #define ACPI_SIG_S3PT "S3PT" /* S3 Performance (sub)Table */ 196 #define ACPI_SIG_PCCS "PCC" /* PCC Shared Memory Region */ 197 198 199 /* Reserved table signatures */ 200 201 #define ACPI_SIG_MATR "MATR" /* Memory Address Translation Table */ 202 #define ACPI_SIG_MSDM "MSDM" /* Microsoft Data Management Table */ 203 204 /* 205 * These tables have been seen in the field, but no definition has been found 206 */ 207 #ifdef ACPI_UNDEFINED_TABLES 208 #define ACPI_SIG_ATKG "ATKG" 209 #define ACPI_SIG_GSCI "GSCI" /* GMCH SCI table */ 210 #define ACPI_SIG_IEIT "IEIT" 211 #endif 212 213 /* 214 * All tables must be byte-packed to match the ACPI specification, since 215 * the tables are provided by the system BIOS. 216 */ 217 #pragma pack(1) 218 219 /* 220 * Note: C bitfields are not used for this reason: 221 * 222 * "Bitfields are great and easy to read, but unfortunately the C language 223 * does not specify the layout of bitfields in memory, which means they are 224 * essentially useless for dealing with packed data in on-disk formats or 225 * binary wire protocols." (Or ACPI tables and buffers.) "If you ask me, 226 * this decision was a design error in C. Ritchie could have picked an order 227 * and stuck with it." Norman Ramsey. 228 * See http://stackoverflow.com/a/1053662/41661 229 */ 230 231 232 /******************************************************************************* 233 * 234 * Common subtable headers 235 * 236 ******************************************************************************/ 237 238 /* Generic subtable header (used in MADT, SRAT, etc.) */ 239 240 typedef struct acpi_subtable_header 241 { 242 UINT8 Type; 243 UINT8 Length; 244 245 } ACPI_SUBTABLE_HEADER; 246 247 248 /* Subtable header for WHEA tables (EINJ, ERST, WDAT) */ 249 250 typedef struct acpi_whea_header 251 { 252 UINT8 Action; 253 UINT8 Instruction; 254 UINT8 Flags; 255 UINT8 Reserved; 256 ACPI_GENERIC_ADDRESS RegisterRegion; 257 UINT64 Value; /* Value used with Read/Write register */ 258 UINT64 Mask; /* Bitmask required for this register instruction */ 259 260 } ACPI_WHEA_HEADER; 261 262 263 /******************************************************************************* 264 * 265 * ASF - Alert Standard Format table (Signature "ASF!") 266 * Revision 0x10 267 * 268 * Conforms to the Alert Standard Format Specification V2.0, 23 April 2003 269 * 270 ******************************************************************************/ 271 272 typedef struct acpi_table_asf 273 { 274 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 275 276 } ACPI_TABLE_ASF; 277 278 279 /* ASF subtable header */ 280 281 typedef struct acpi_asf_header 282 { 283 UINT8 Type; 284 UINT8 Reserved; 285 UINT16 Length; 286 287 } ACPI_ASF_HEADER; 288 289 290 /* Values for Type field above */ 291 292 enum AcpiAsfType 293 { 294 ACPI_ASF_TYPE_INFO = 0, 295 ACPI_ASF_TYPE_ALERT = 1, 296 ACPI_ASF_TYPE_CONTROL = 2, 297 ACPI_ASF_TYPE_BOOT = 3, 298 ACPI_ASF_TYPE_ADDRESS = 4, 299 ACPI_ASF_TYPE_RESERVED = 5 300 }; 301 302 /* 303 * ASF subtables 304 */ 305 306 /* 0: ASF Information */ 307 308 typedef struct acpi_asf_info 309 { 310 ACPI_ASF_HEADER Header; 311 UINT8 MinResetValue; 312 UINT8 MinPollInterval; 313 UINT16 SystemId; 314 UINT32 MfgId; 315 UINT8 Flags; 316 UINT8 Reserved2[3]; 317 318 } ACPI_ASF_INFO; 319 320 /* Masks for Flags field above */ 321 322 #define ACPI_ASF_SMBUS_PROTOCOLS (1) 323 324 325 /* 1: ASF Alerts */ 326 327 typedef struct acpi_asf_alert 328 { 329 ACPI_ASF_HEADER Header; 330 UINT8 AssertMask; 331 UINT8 DeassertMask; 332 UINT8 Alerts; 333 UINT8 DataLength; 334 335 } ACPI_ASF_ALERT; 336 337 typedef struct acpi_asf_alert_data 338 { 339 UINT8 Address; 340 UINT8 Command; 341 UINT8 Mask; 342 UINT8 Value; 343 UINT8 SensorType; 344 UINT8 Type; 345 UINT8 Offset; 346 UINT8 SourceType; 347 UINT8 Severity; 348 UINT8 SensorNumber; 349 UINT8 Entity; 350 UINT8 Instance; 351 352 } ACPI_ASF_ALERT_DATA; 353 354 355 /* 2: ASF Remote Control */ 356 357 typedef struct acpi_asf_remote 358 { 359 ACPI_ASF_HEADER Header; 360 UINT8 Controls; 361 UINT8 DataLength; 362 UINT16 Reserved2; 363 364 } ACPI_ASF_REMOTE; 365 366 typedef struct acpi_asf_control_data 367 { 368 UINT8 Function; 369 UINT8 Address; 370 UINT8 Command; 371 UINT8 Value; 372 373 } ACPI_ASF_CONTROL_DATA; 374 375 376 /* 3: ASF RMCP Boot Options */ 377 378 typedef struct acpi_asf_rmcp 379 { 380 ACPI_ASF_HEADER Header; 381 UINT8 Capabilities[7]; 382 UINT8 CompletionCode; 383 UINT32 EnterpriseId; 384 UINT8 Command; 385 UINT16 Parameter; 386 UINT16 BootOptions; 387 UINT16 OemParameters; 388 389 } ACPI_ASF_RMCP; 390 391 392 /* 4: ASF Address */ 393 394 typedef struct acpi_asf_address 395 { 396 ACPI_ASF_HEADER Header; 397 UINT8 EpromAddress; 398 UINT8 Devices; 399 400 } ACPI_ASF_ADDRESS; 401 402 /******************************************************************************* 403 * 404 * ASPT - AMD Secure Processor Table (Signature "ASPT") 405 * Revision 0x1 406 * 407 * Conforms to AMD Socket SP5/SP6 Platform ASPT Rev1 Specification, 408 * 12 September 2022 409 * 410 ******************************************************************************/ 411 412 typedef struct acpi_table_aspt 413 { 414 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 415 UINT32 NumEntries; 416 417 } ACPI_TABLE_ASPT; 418 419 420 /* ASPT subtable header */ 421 422 typedef struct acpi_aspt_header 423 { 424 UINT16 Type; 425 UINT16 Length; 426 427 } ACPI_ASPT_HEADER; 428 429 430 /* Values for Type field above */ 431 432 enum AcpiAsptType 433 { 434 ACPI_ASPT_TYPE_GLOBAL_REGS = 0, 435 ACPI_ASPT_TYPE_SEV_MBOX_REGS = 1, 436 ACPI_ASPT_TYPE_ACPI_MBOX_REGS = 2, 437 ACPI_ASPT_TYPE_UNKNOWN = 3, 438 }; 439 440 /* 441 * ASPT subtables 442 */ 443 444 /* 0: ASPT Global Registers */ 445 446 typedef struct acpi_aspt_global_regs 447 { 448 ACPI_ASPT_HEADER Header; 449 UINT32 Reserved; 450 UINT64 FeatureRegAddr; 451 UINT64 IrqEnRegAddr; 452 UINT64 IrqStRegAddr; 453 454 } ACPI_ASPT_GLOBAL_REGS; 455 456 457 /* 1: ASPT SEV Mailbox Registers */ 458 459 typedef struct acpi_aspt_sev_mbox_regs 460 { 461 ACPI_ASPT_HEADER Header; 462 UINT8 MboxIrqId; 463 UINT8 Reserved[3]; 464 UINT64 CmdRespRegAddr; 465 UINT64 CmdBufLoRegAddr; 466 UINT64 CmdBufHiRegAddr; 467 468 } ACPI_ASPT_SEV_MBOX_REGS; 469 470 471 /* 2: ASPT ACPI Mailbox Registers */ 472 473 typedef struct acpi_aspt_acpi_mbox_regs 474 { 475 ACPI_ASPT_HEADER Header; 476 UINT32 Reserved1; 477 UINT64 CmdRespRegAddr; 478 UINT64 Reserved2[2]; 479 480 } ACPI_ASPT_ACPI_MBOX_REGS; 481 482 483 /******************************************************************************* 484 * 485 * BERT - Boot Error Record Table (ACPI 4.0) 486 * Version 1 487 * 488 ******************************************************************************/ 489 490 typedef struct acpi_table_bert 491 { 492 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 493 UINT32 RegionLength; /* Length of the boot error region */ 494 UINT64 Address; /* Physical address of the error region */ 495 496 } ACPI_TABLE_BERT; 497 498 499 /* Boot Error Region (not a subtable, pointed to by Address field above) */ 500 501 typedef struct acpi_bert_region 502 { 503 UINT32 BlockStatus; /* Type of error information */ 504 UINT32 RawDataOffset; /* Offset to raw error data */ 505 UINT32 RawDataLength; /* Length of raw error data */ 506 UINT32 DataLength; /* Length of generic error data */ 507 UINT32 ErrorSeverity; /* Severity code */ 508 509 } ACPI_BERT_REGION; 510 511 /* Values for BlockStatus flags above */ 512 513 #define ACPI_BERT_UNCORRECTABLE (1) 514 #define ACPI_BERT_CORRECTABLE (1<<1) 515 #define ACPI_BERT_MULTIPLE_UNCORRECTABLE (1<<2) 516 #define ACPI_BERT_MULTIPLE_CORRECTABLE (1<<3) 517 #define ACPI_BERT_ERROR_ENTRY_COUNT (0xFF<<4) /* 8 bits, error count */ 518 519 /* Values for ErrorSeverity above */ 520 521 enum AcpiBertErrorSeverity 522 { 523 ACPI_BERT_ERROR_CORRECTABLE = 0, 524 ACPI_BERT_ERROR_FATAL = 1, 525 ACPI_BERT_ERROR_CORRECTED = 2, 526 ACPI_BERT_ERROR_NONE = 3, 527 ACPI_BERT_ERROR_RESERVED = 4 /* 4 and greater are reserved */ 528 }; 529 530 /* 531 * Note: The generic error data that follows the ErrorSeverity field above 532 * uses the ACPI_HEST_GENERIC_DATA defined under the HEST table below 533 */ 534 535 536 /******************************************************************************* 537 * 538 * BGRT - Boot Graphics Resource Table (ACPI 5.0) 539 * Version 1 540 * 541 ******************************************************************************/ 542 543 typedef struct acpi_table_bgrt 544 { 545 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 546 UINT16 Version; 547 UINT8 Status; 548 UINT8 ImageType; 549 UINT64 ImageAddress; 550 UINT32 ImageOffsetX; 551 UINT32 ImageOffsetY; 552 553 } ACPI_TABLE_BGRT; 554 555 /* Flags for Status field above */ 556 557 #define ACPI_BGRT_DISPLAYED (1) 558 #define ACPI_BGRT_ORIENTATION_OFFSET (3 << 1) 559 560 561 /******************************************************************************* 562 * 563 * BOOT - Simple Boot Flag Table 564 * Version 1 565 * 566 * Conforms to the "Simple Boot Flag Specification", Version 2.1 567 * 568 ******************************************************************************/ 569 570 typedef struct acpi_table_boot 571 { 572 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 573 UINT8 CmosIndex; /* Index in CMOS RAM for the boot register */ 574 UINT8 Reserved[3]; 575 576 } ACPI_TABLE_BOOT; 577 578 579 /******************************************************************************* 580 * 581 * CDAT - Coherent Device Attribute Table 582 * Version 1 583 * 584 * Conforms to the "Coherent Device Attribute Table (CDAT) Specification 585 " (Revision 1.01, October 2020.) 586 * 587 ******************************************************************************/ 588 589 typedef struct acpi_table_cdat 590 { 591 UINT32 Length; /* Length of table in bytes, including this header */ 592 UINT8 Revision; /* ACPI Specification minor version number */ 593 UINT8 Checksum; /* To make sum of entire table == 0 */ 594 UINT8 Reserved[6]; 595 UINT32 Sequence; /* Used to detect runtime CDAT table changes */ 596 597 } ACPI_TABLE_CDAT; 598 599 600 /* CDAT common subtable header */ 601 602 typedef struct acpi_cdat_header 603 { 604 UINT8 Type; 605 UINT8 Reserved; 606 UINT16 Length; 607 608 } ACPI_CDAT_HEADER; 609 610 /* Values for Type field above */ 611 612 enum AcpiCdatType 613 { 614 ACPI_CDAT_TYPE_DSMAS = 0, 615 ACPI_CDAT_TYPE_DSLBIS = 1, 616 ACPI_CDAT_TYPE_DSMSCIS = 2, 617 ACPI_CDAT_TYPE_DSIS = 3, 618 ACPI_CDAT_TYPE_DSEMTS = 4, 619 ACPI_CDAT_TYPE_SSLBIS = 5, 620 ACPI_CDAT_TYPE_RESERVED = 6 /* 6 through 0xFF are reserved */ 621 }; 622 623 624 /* Subtable 0: Device Scoped Memory Affinity Structure (DSMAS) */ 625 626 typedef struct acpi_cdat_dsmas 627 { 628 UINT8 DsmadHandle; 629 UINT8 Flags; 630 UINT16 Reserved; 631 UINT64 DpaBaseAddress; 632 UINT64 DpaLength; 633 634 } ACPI_CDAT_DSMAS; 635 636 /* Flags for subtable above */ 637 638 #define ACPI_CDAT_DSMAS_NON_VOLATILE (1 << 2) 639 #define ACPI_CDAT_DSMAS_SHAREABLE (1 << 3) 640 #define ACPI_CDAT_DSMAS_READ_ONLY (1 << 6) 641 642 643 /* Subtable 1: Device scoped Latency and Bandwidth Information Structure (DSLBIS) */ 644 645 typedef struct acpi_cdat_dslbis 646 { 647 UINT8 Handle; 648 UINT8 Flags; /* If Handle matches a DSMAS handle, the definition of this field matches 649 * Flags field in HMAT System Locality Latency */ 650 UINT8 DataType; 651 UINT8 Reserved; 652 UINT64 EntryBaseUnit; 653 UINT16 Entry[3]; 654 UINT16 Reserved2; 655 656 } ACPI_CDAT_DSLBIS; 657 658 659 /* Subtable 2: Device Scoped Memory Side Cache Information Structure (DSMSCIS) */ 660 661 typedef struct acpi_cdat_dsmscis 662 { 663 UINT8 DsmasHandle; 664 UINT8 Reserved[3]; 665 UINT64 SideCacheSize; 666 UINT32 CacheAttributes; 667 668 } ACPI_CDAT_DSMSCIS; 669 670 671 /* Subtable 3: Device Scoped Initiator Structure (DSIS) */ 672 673 typedef struct acpi_cdat_dsis 674 { 675 UINT8 Flags; 676 UINT8 Handle; 677 UINT16 Reserved; 678 679 } ACPI_CDAT_DSIS; 680 681 /* Flags for above subtable */ 682 683 #define ACPI_CDAT_DSIS_MEM_ATTACHED (1 << 0) 684 685 686 /* Subtable 4: Device Scoped EFI Memory Type Structure (DSEMTS) */ 687 688 typedef struct acpi_cdat_dsemts 689 { 690 UINT8 DsmasHandle; 691 UINT8 MemoryType; 692 UINT16 Reserved; 693 UINT64 DpaOffset; 694 UINT64 RangeLength; 695 696 } ACPI_CDAT_DSEMTS; 697 698 699 /* Subtable 5: Switch Scoped Latency and Bandwidth Information Structure (SSLBIS) */ 700 701 typedef struct acpi_cdat_sslbis 702 { 703 UINT8 DataType; 704 UINT8 Reserved[3]; 705 UINT64 EntryBaseUnit; 706 707 } ACPI_CDAT_SSLBIS; 708 709 710 /* Sub-subtable for above, SslbeEntries field */ 711 712 typedef struct acpi_cdat_sslbe 713 { 714 UINT16 PortxId; 715 UINT16 PortyId; 716 UINT16 LatencyOrBandwidth; 717 UINT16 Reserved; 718 719 } ACPI_CDAT_SSLBE; 720 721 #define ACPI_CDAT_SSLBIS_US_PORT 0x0100 722 #define ACPI_CDAT_SSLBIS_ANY_PORT 0xffff 723 724 /******************************************************************************* 725 * 726 * CEDT - CXL Early Discovery Table 727 * Version 1 728 * 729 * Conforms to the "CXL Early Discovery Table" (CXL 2.0, October 2020) 730 * 731 ******************************************************************************/ 732 733 typedef struct acpi_table_cedt 734 { 735 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 736 737 } ACPI_TABLE_CEDT; 738 739 /* CEDT subtable header (Performance Record Structure) */ 740 741 typedef struct acpi_cedt_header 742 { 743 UINT8 Type; 744 UINT8 Reserved; 745 UINT16 Length; 746 747 } ACPI_CEDT_HEADER; 748 749 /* Values for Type field above */ 750 751 enum AcpiCedtType 752 { 753 ACPI_CEDT_TYPE_CHBS = 0, 754 ACPI_CEDT_TYPE_CFMWS = 1, 755 ACPI_CEDT_TYPE_CXIMS = 2, 756 ACPI_CEDT_TYPE_RDPAS = 3, 757 ACPI_CEDT_TYPE_RESERVED = 4, 758 }; 759 760 /* Values for version field above */ 761 762 #define ACPI_CEDT_CHBS_VERSION_CXL11 (0) 763 #define ACPI_CEDT_CHBS_VERSION_CXL20 (1) 764 765 /* Values for length field above */ 766 767 #define ACPI_CEDT_CHBS_LENGTH_CXL11 (0x2000) 768 #define ACPI_CEDT_CHBS_LENGTH_CXL20 (0x10000) 769 770 /* 771 * CEDT subtables 772 */ 773 774 /* 0: CXL Host Bridge Structure */ 775 776 typedef struct acpi_cedt_chbs 777 { 778 ACPI_CEDT_HEADER Header; 779 UINT32 Uid; 780 UINT32 CxlVersion; 781 UINT32 Reserved; 782 UINT64 Base; 783 UINT64 Length; 784 785 } ACPI_CEDT_CHBS; 786 787 788 /* 1: CXL Fixed Memory Window Structure */ 789 790 typedef struct acpi_cedt_cfmws 791 { 792 ACPI_CEDT_HEADER Header; 793 UINT32 Reserved1; 794 UINT64 BaseHpa; 795 UINT64 WindowSize; 796 UINT8 InterleaveWays; 797 UINT8 InterleaveArithmetic; 798 UINT16 Reserved2; 799 UINT32 Granularity; 800 UINT16 Restrictions; 801 UINT16 QtgId; 802 UINT32 InterleaveTargets[]; 803 804 } ACPI_CEDT_CFMWS; 805 806 typedef struct acpi_cedt_cfmws_target_element 807 { 808 UINT32 InterleaveTarget; 809 810 } ACPI_CEDT_CFMWS_TARGET_ELEMENT; 811 812 /* Values for Interleave Arithmetic field above */ 813 814 #define ACPI_CEDT_CFMWS_ARITHMETIC_MODULO (0) 815 #define ACPI_CEDT_CFMWS_ARITHMETIC_XOR (1) 816 817 /* Values for Restrictions field above */ 818 819 #define ACPI_CEDT_CFMWS_RESTRICT_TYPE2 (1) 820 #define ACPI_CEDT_CFMWS_RESTRICT_TYPE3 (1<<1) 821 #define ACPI_CEDT_CFMWS_RESTRICT_VOLATILE (1<<2) 822 #define ACPI_CEDT_CFMWS_RESTRICT_PMEM (1<<3) 823 #define ACPI_CEDT_CFMWS_RESTRICT_FIXED (1<<4) 824 825 /* 2: CXL XOR Interleave Math Structure */ 826 827 typedef struct acpi_cedt_cxims { 828 ACPI_CEDT_HEADER Header; 829 UINT16 Reserved1; 830 UINT8 Hbig; 831 UINT8 NrXormaps; 832 UINT64 XormapList[]; 833 } ACPI_CEDT_CXIMS; 834 835 typedef struct acpi_cedt_cxims_target_element 836 { 837 UINT64 Xormap; 838 839 } ACPI_CEDT_CXIMS_TARGET_ELEMENT; 840 841 842 /* 3: CXL RCEC Downstream Port Association Structure */ 843 844 struct acpi_cedt_rdpas { 845 ACPI_CEDT_HEADER Header; 846 UINT8 Reserved1; 847 UINT16 Length; 848 UINT16 Segment; 849 UINT16 Bdf; 850 UINT8 Protocol; 851 UINT64 Address; 852 }; 853 854 /* Masks for bdf field above */ 855 #define ACPI_CEDT_RDPAS_BUS_MASK 0xff00 856 #define ACPI_CEDT_RDPAS_DEVICE_MASK 0x00f8 857 #define ACPI_CEDT_RDPAS_FUNCTION_MASK 0x0007 858 859 #define ACPI_CEDT_RDPAS_PROTOCOL_IO (0) 860 #define ACPI_CEDT_RDPAS_PROTOCOL_CACHEMEM (1) 861 862 /******************************************************************************* 863 * 864 * CPEP - Corrected Platform Error Polling table (ACPI 4.0) 865 * Version 1 866 * 867 ******************************************************************************/ 868 869 typedef struct acpi_table_cpep 870 { 871 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 872 UINT64 Reserved; 873 874 } ACPI_TABLE_CPEP; 875 876 877 /* Subtable */ 878 879 typedef struct acpi_cpep_polling 880 { 881 ACPI_SUBTABLE_HEADER Header; 882 UINT8 Id; /* Processor ID */ 883 UINT8 Eid; /* Processor EID */ 884 UINT32 Interval; /* Polling interval (msec) */ 885 886 } ACPI_CPEP_POLLING; 887 888 889 /******************************************************************************* 890 * 891 * CSRT - Core System Resource Table 892 * Version 0 893 * 894 * Conforms to the "Core System Resource Table (CSRT)", November 14, 2011 895 * 896 ******************************************************************************/ 897 898 typedef struct acpi_table_csrt 899 { 900 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 901 902 } ACPI_TABLE_CSRT; 903 904 905 /* Resource Group subtable */ 906 907 typedef struct acpi_csrt_group 908 { 909 UINT32 Length; 910 UINT32 VendorId; 911 UINT32 SubvendorId; 912 UINT16 DeviceId; 913 UINT16 SubdeviceId; 914 UINT16 Revision; 915 UINT16 Reserved; 916 UINT32 SharedInfoLength; 917 918 /* Shared data immediately follows (Length = SharedInfoLength) */ 919 920 } ACPI_CSRT_GROUP; 921 922 /* Shared Info subtable */ 923 924 typedef struct acpi_csrt_shared_info 925 { 926 UINT16 MajorVersion; 927 UINT16 MinorVersion; 928 UINT32 MmioBaseLow; 929 UINT32 MmioBaseHigh; 930 UINT32 GsiInterrupt; 931 UINT8 InterruptPolarity; 932 UINT8 InterruptMode; 933 UINT8 NumChannels; 934 UINT8 DmaAddressWidth; 935 UINT16 BaseRequestLine; 936 UINT16 NumHandshakeSignals; 937 UINT32 MaxBlockSize; 938 939 /* Resource descriptors immediately follow (Length = Group Length - SharedInfoLength) */ 940 941 } ACPI_CSRT_SHARED_INFO; 942 943 /* Resource Descriptor subtable */ 944 945 typedef struct acpi_csrt_descriptor 946 { 947 UINT32 Length; 948 UINT16 Type; 949 UINT16 Subtype; 950 UINT32 Uid; 951 952 /* Resource-specific information immediately follows */ 953 954 } ACPI_CSRT_DESCRIPTOR; 955 956 957 /* Resource Types */ 958 959 #define ACPI_CSRT_TYPE_INTERRUPT 0x0001 960 #define ACPI_CSRT_TYPE_TIMER 0x0002 961 #define ACPI_CSRT_TYPE_DMA 0x0003 962 963 /* Resource Subtypes */ 964 965 #define ACPI_CSRT_XRUPT_LINE 0x0000 966 #define ACPI_CSRT_XRUPT_CONTROLLER 0x0001 967 #define ACPI_CSRT_TIMER 0x0000 968 #define ACPI_CSRT_DMA_CHANNEL 0x0000 969 #define ACPI_CSRT_DMA_CONTROLLER 0x0001 970 971 972 /******************************************************************************* 973 * 974 * DBG2 - Debug Port Table 2 975 * Version 0 (Both main table and subtables) 976 * 977 * Conforms to "Microsoft Debug Port Table 2 (DBG2)", September 21, 2020 978 * 979 ******************************************************************************/ 980 981 typedef struct acpi_table_dbg2 982 { 983 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 984 UINT32 InfoOffset; 985 UINT32 InfoCount; 986 987 } ACPI_TABLE_DBG2; 988 989 990 typedef struct acpi_dbg2_header 991 { 992 UINT32 InfoOffset; 993 UINT32 InfoCount; 994 995 } ACPI_DBG2_HEADER; 996 997 998 /* Debug Device Information Subtable */ 999 1000 typedef struct acpi_dbg2_device 1001 { 1002 UINT8 Revision; 1003 UINT16 Length; 1004 UINT8 RegisterCount; /* Number of BaseAddress registers */ 1005 UINT16 NamepathLength; 1006 UINT16 NamepathOffset; 1007 UINT16 OemDataLength; 1008 UINT16 OemDataOffset; 1009 UINT16 PortType; 1010 UINT16 PortSubtype; 1011 UINT16 Reserved; 1012 UINT16 BaseAddressOffset; 1013 UINT16 AddressSizeOffset; 1014 /* 1015 * Data that follows: 1016 * BaseAddress (required) - Each in 12-byte Generic Address Structure format. 1017 * AddressSize (required) - Array of UINT32 sizes corresponding to each BaseAddress register. 1018 * Namepath (required) - Null terminated string. Single dot if not supported. 1019 * OemData (optional) - Length is OemDataLength. 1020 */ 1021 } ACPI_DBG2_DEVICE; 1022 1023 /* Types for PortType field above */ 1024 1025 #define ACPI_DBG2_SERIAL_PORT 0x8000 1026 #define ACPI_DBG2_1394_PORT 0x8001 1027 #define ACPI_DBG2_USB_PORT 0x8002 1028 #define ACPI_DBG2_NET_PORT 0x8003 1029 1030 /* Subtypes for PortSubtype field above */ 1031 1032 #define ACPI_DBG2_16550_COMPATIBLE 0x0000 1033 #define ACPI_DBG2_16550_SUBSET 0x0001 1034 #define ACPI_DBG2_MAX311XE_SPI 0x0002 1035 #define ACPI_DBG2_ARM_PL011 0x0003 1036 #define ACPI_DBG2_MSM8X60 0x0004 1037 #define ACPI_DBG2_16550_NVIDIA 0x0005 1038 #define ACPI_DBG2_TI_OMAP 0x0006 1039 #define ACPI_DBG2_APM88XXXX 0x0008 1040 #define ACPI_DBG2_MSM8974 0x0009 1041 #define ACPI_DBG2_SAM5250 0x000A 1042 #define ACPI_DBG2_INTEL_USIF 0x000B 1043 #define ACPI_DBG2_IMX6 0x000C 1044 #define ACPI_DBG2_ARM_SBSA_32BIT 0x000D 1045 #define ACPI_DBG2_ARM_SBSA_GENERIC 0x000E 1046 #define ACPI_DBG2_ARM_DCC 0x000F 1047 #define ACPI_DBG2_BCM2835 0x0010 1048 #define ACPI_DBG2_SDM845_1_8432MHZ 0x0011 1049 #define ACPI_DBG2_16550_WITH_GAS 0x0012 1050 #define ACPI_DBG2_SDM845_7_372MHZ 0x0013 1051 #define ACPI_DBG2_INTEL_LPSS 0x0014 1052 1053 #define ACPI_DBG2_1394_STANDARD 0x0000 1054 1055 #define ACPI_DBG2_USB_XHCI 0x0000 1056 #define ACPI_DBG2_USB_EHCI 0x0001 1057 1058 1059 /******************************************************************************* 1060 * 1061 * DBGP - Debug Port table 1062 * Version 1 1063 * 1064 * Conforms to the "Debug Port Specification", Version 1.00, 2/9/2000 1065 * 1066 ******************************************************************************/ 1067 1068 typedef struct acpi_table_dbgp 1069 { 1070 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1071 UINT8 Type; /* 0=full 16550, 1=subset of 16550 */ 1072 UINT8 Reserved[3]; 1073 ACPI_GENERIC_ADDRESS DebugPort; 1074 1075 } ACPI_TABLE_DBGP; 1076 1077 1078 /******************************************************************************* 1079 * 1080 * DMAR - DMA Remapping table 1081 * Version 1 1082 * 1083 * Conforms to "Intel Virtualization Technology for Directed I/O", 1084 * Version 2.3, October 2014 1085 * 1086 ******************************************************************************/ 1087 1088 typedef struct acpi_table_dmar 1089 { 1090 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1091 UINT8 Width; /* Host Address Width */ 1092 UINT8 Flags; 1093 UINT8 Reserved[10]; 1094 1095 } ACPI_TABLE_DMAR; 1096 1097 /* Masks for Flags field above */ 1098 1099 #define ACPI_DMAR_INTR_REMAP (1) 1100 #define ACPI_DMAR_X2APIC_OPT_OUT (1<<1) 1101 #define ACPI_DMAR_X2APIC_MODE (1<<2) 1102 1103 1104 /* DMAR subtable header */ 1105 1106 typedef struct acpi_dmar_header 1107 { 1108 UINT16 Type; 1109 UINT16 Length; 1110 1111 } ACPI_DMAR_HEADER; 1112 1113 /* Values for subtable type in ACPI_DMAR_HEADER */ 1114 1115 enum AcpiDmarType 1116 { 1117 ACPI_DMAR_TYPE_HARDWARE_UNIT = 0, 1118 ACPI_DMAR_TYPE_RESERVED_MEMORY = 1, 1119 ACPI_DMAR_TYPE_ROOT_ATS = 2, 1120 ACPI_DMAR_TYPE_HARDWARE_AFFINITY = 3, 1121 ACPI_DMAR_TYPE_NAMESPACE = 4, 1122 ACPI_DMAR_TYPE_SATC = 5, 1123 ACPI_DMAR_TYPE_RESERVED = 6 /* 6 and greater are reserved */ 1124 }; 1125 1126 1127 /* DMAR Device Scope structure */ 1128 1129 typedef struct acpi_dmar_device_scope 1130 { 1131 UINT8 EntryType; 1132 UINT8 Length; 1133 UINT16 Reserved; 1134 UINT8 EnumerationId; 1135 UINT8 Bus; 1136 1137 } ACPI_DMAR_DEVICE_SCOPE; 1138 1139 /* Values for EntryType in ACPI_DMAR_DEVICE_SCOPE - device types */ 1140 1141 enum AcpiDmarScopeType 1142 { 1143 ACPI_DMAR_SCOPE_TYPE_NOT_USED = 0, 1144 ACPI_DMAR_SCOPE_TYPE_ENDPOINT = 1, 1145 ACPI_DMAR_SCOPE_TYPE_BRIDGE = 2, 1146 ACPI_DMAR_SCOPE_TYPE_IOAPIC = 3, 1147 ACPI_DMAR_SCOPE_TYPE_HPET = 4, 1148 ACPI_DMAR_SCOPE_TYPE_NAMESPACE = 5, 1149 ACPI_DMAR_SCOPE_TYPE_RESERVED = 6 /* 6 and greater are reserved */ 1150 }; 1151 1152 typedef struct acpi_dmar_pci_path 1153 { 1154 UINT8 Device; 1155 UINT8 Function; 1156 1157 } ACPI_DMAR_PCI_PATH; 1158 1159 1160 /* 1161 * DMAR Subtables, correspond to Type in ACPI_DMAR_HEADER 1162 */ 1163 1164 /* 0: Hardware Unit Definition */ 1165 1166 typedef struct acpi_dmar_hardware_unit 1167 { 1168 ACPI_DMAR_HEADER Header; 1169 UINT8 Flags; 1170 UINT8 Reserved; 1171 UINT16 Segment; 1172 UINT64 Address; /* Register Base Address */ 1173 1174 } ACPI_DMAR_HARDWARE_UNIT; 1175 1176 /* Masks for Flags field above */ 1177 1178 #define ACPI_DMAR_INCLUDE_ALL (1) 1179 1180 1181 /* 1: Reserved Memory Definition */ 1182 1183 typedef struct acpi_dmar_reserved_memory 1184 { 1185 ACPI_DMAR_HEADER Header; 1186 UINT16 Reserved; 1187 UINT16 Segment; 1188 UINT64 BaseAddress; /* 4K aligned base address */ 1189 UINT64 EndAddress; /* 4K aligned limit address */ 1190 1191 } ACPI_DMAR_RESERVED_MEMORY; 1192 1193 /* Masks for Flags field above */ 1194 1195 #define ACPI_DMAR_ALLOW_ALL (1) 1196 1197 1198 /* 2: Root Port ATS Capability Reporting Structure */ 1199 1200 typedef struct acpi_dmar_atsr 1201 { 1202 ACPI_DMAR_HEADER Header; 1203 UINT8 Flags; 1204 UINT8 Reserved; 1205 UINT16 Segment; 1206 1207 } ACPI_DMAR_ATSR; 1208 1209 /* Masks for Flags field above */ 1210 1211 #define ACPI_DMAR_ALL_PORTS (1) 1212 1213 1214 /* 3: Remapping Hardware Static Affinity Structure */ 1215 1216 typedef struct acpi_dmar_rhsa 1217 { 1218 ACPI_DMAR_HEADER Header; 1219 UINT32 Reserved; 1220 UINT64 BaseAddress; 1221 UINT32 ProximityDomain; 1222 1223 } ACPI_DMAR_RHSA; 1224 1225 1226 /* 4: ACPI Namespace Device Declaration Structure */ 1227 1228 typedef struct acpi_dmar_andd 1229 { 1230 ACPI_DMAR_HEADER Header; 1231 UINT8 Reserved[3]; 1232 UINT8 DeviceNumber; 1233 union { 1234 char __pad; 1235 ACPI_FLEX_ARRAY(char, DeviceName); 1236 }; 1237 1238 } ACPI_DMAR_ANDD; 1239 1240 1241 /* 5: SoC Integrated Address Translation Cache (SATC) */ 1242 1243 typedef struct acpi_dmar_satc 1244 { 1245 ACPI_DMAR_HEADER Header; 1246 UINT8 Flags; 1247 UINT8 Reserved; 1248 UINT16 Segment; 1249 1250 } ACPI_DMAR_SATC 1251 1252 ; 1253 /******************************************************************************* 1254 * 1255 * DRTM - Dynamic Root of Trust for Measurement table 1256 * Conforms to "TCG D-RTM Architecture" June 17 2013, Version 1.0.0 1257 * Table version 1 1258 * 1259 ******************************************************************************/ 1260 1261 typedef struct acpi_table_drtm 1262 { 1263 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1264 UINT64 EntryBaseAddress; 1265 UINT64 EntryLength; 1266 UINT32 EntryAddress32; 1267 UINT64 EntryAddress64; 1268 UINT64 ExitAddress; 1269 UINT64 LogAreaAddress; 1270 UINT32 LogAreaLength; 1271 UINT64 ArchDependentAddress; 1272 UINT32 Flags; 1273 1274 } ACPI_TABLE_DRTM; 1275 1276 /* Flag Definitions for above */ 1277 1278 #define ACPI_DRTM_ACCESS_ALLOWED (1) 1279 #define ACPI_DRTM_ENABLE_GAP_CODE (1<<1) 1280 #define ACPI_DRTM_INCOMPLETE_MEASUREMENTS (1<<2) 1281 #define ACPI_DRTM_AUTHORITY_ORDER (1<<3) 1282 1283 1284 /* 1) Validated Tables List (64-bit addresses) */ 1285 1286 typedef struct acpi_drtm_vtable_list 1287 { 1288 UINT32 ValidatedTableCount; 1289 UINT64 ValidatedTables[]; 1290 1291 } ACPI_DRTM_VTABLE_LIST; 1292 1293 /* 2) Resources List (of Resource Descriptors) */ 1294 1295 /* Resource Descriptor */ 1296 1297 typedef struct acpi_drtm_resource 1298 { 1299 UINT8 Size[7]; 1300 UINT8 Type; 1301 UINT64 Address; 1302 1303 } ACPI_DRTM_RESOURCE; 1304 1305 typedef struct acpi_drtm_resource_list 1306 { 1307 UINT32 ResourceCount; 1308 ACPI_DRTM_RESOURCE Resources[]; 1309 1310 } ACPI_DRTM_RESOURCE_LIST; 1311 1312 /* 3) Platform-specific Identifiers List */ 1313 1314 typedef struct acpi_drtm_dps_id 1315 { 1316 UINT32 DpsIdLength; 1317 UINT8 DpsId[16]; 1318 1319 } ACPI_DRTM_DPS_ID; 1320 1321 1322 /******************************************************************************* 1323 * 1324 * ECDT - Embedded Controller Boot Resources Table 1325 * Version 1 1326 * 1327 ******************************************************************************/ 1328 1329 typedef struct acpi_table_ecdt 1330 { 1331 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1332 ACPI_GENERIC_ADDRESS Control; /* Address of EC command/status register */ 1333 ACPI_GENERIC_ADDRESS Data; /* Address of EC data register */ 1334 UINT32 Uid; /* Unique ID - must be same as the EC _UID method */ 1335 UINT8 Gpe; /* The GPE for the EC */ 1336 UINT8 Id[]; /* Full namepath of the EC in the ACPI namespace */ 1337 1338 } ACPI_TABLE_ECDT; 1339 1340 1341 /******************************************************************************* 1342 * 1343 * EINJ - Error Injection Table (ACPI 4.0) 1344 * Version 1 1345 * 1346 ******************************************************************************/ 1347 1348 typedef struct acpi_table_einj 1349 { 1350 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1351 UINT32 HeaderLength; 1352 UINT8 Flags; 1353 UINT8 Reserved[3]; 1354 UINT32 Entries; 1355 1356 } ACPI_TABLE_EINJ; 1357 1358 1359 /* EINJ Injection Instruction Entries (actions) */ 1360 1361 typedef struct acpi_einj_entry 1362 { 1363 ACPI_WHEA_HEADER WheaHeader; /* Common header for WHEA tables */ 1364 1365 } ACPI_EINJ_ENTRY; 1366 1367 /* Masks for Flags field above */ 1368 1369 #define ACPI_EINJ_PRESERVE (1) 1370 1371 /* Values for Action field above */ 1372 1373 enum AcpiEinjActions 1374 { 1375 ACPI_EINJ_BEGIN_OPERATION = 0x0, 1376 ACPI_EINJ_GET_TRIGGER_TABLE = 0x1, 1377 ACPI_EINJ_SET_ERROR_TYPE = 0x2, 1378 ACPI_EINJ_GET_ERROR_TYPE = 0x3, 1379 ACPI_EINJ_END_OPERATION = 0x4, 1380 ACPI_EINJ_EXECUTE_OPERATION = 0x5, 1381 ACPI_EINJ_CHECK_BUSY_STATUS = 0x6, 1382 ACPI_EINJ_GET_COMMAND_STATUS = 0x7, 1383 ACPI_EINJ_SET_ERROR_TYPE_WITH_ADDRESS = 0x8, 1384 ACPI_EINJ_GET_EXECUTE_TIMINGS = 0x9, 1385 ACPI_EINJV2_GET_ERROR_TYPE = 0x11, 1386 ACPI_EINJ_ACTION_RESERVED = 0x12, /* 0x12 and greater are reserved */ 1387 ACPI_EINJ_TRIGGER_ERROR = 0xFF /* Except for this value */ 1388 }; 1389 1390 /* Values for Instruction field above */ 1391 1392 enum AcpiEinjInstructions 1393 { 1394 ACPI_EINJ_READ_REGISTER = 0, 1395 ACPI_EINJ_READ_REGISTER_VALUE = 1, 1396 ACPI_EINJ_WRITE_REGISTER = 2, 1397 ACPI_EINJ_WRITE_REGISTER_VALUE = 3, 1398 ACPI_EINJ_NOOP = 4, 1399 ACPI_EINJ_FLUSH_CACHELINE = 5, 1400 ACPI_EINJ_INSTRUCTION_RESERVED = 6 /* 6 and greater are reserved */ 1401 }; 1402 1403 typedef struct acpi_einj_error_type_with_addr 1404 { 1405 UINT32 ErrorType; 1406 UINT32 VendorStructOffset; 1407 UINT32 Flags; 1408 UINT32 ApicId; 1409 UINT64 Address; 1410 UINT64 Range; 1411 UINT32 PcieId; 1412 1413 } ACPI_EINJ_ERROR_TYPE_WITH_ADDR; 1414 1415 typedef struct acpi_einj_vendor 1416 { 1417 UINT32 Length; 1418 UINT32 PcieId; 1419 UINT16 VendorId; 1420 UINT16 DeviceId; 1421 UINT8 RevisionId; 1422 UINT8 Reserved[3]; 1423 1424 } ACPI_EINJ_VENDOR; 1425 1426 1427 /* EINJ Trigger Error Action Table */ 1428 1429 typedef struct acpi_einj_trigger 1430 { 1431 UINT32 HeaderSize; 1432 UINT32 Revision; 1433 UINT32 TableSize; 1434 UINT32 EntryCount; 1435 1436 } ACPI_EINJ_TRIGGER; 1437 1438 /* Command status return values */ 1439 1440 enum AcpiEinjCommandStatus 1441 { 1442 ACPI_EINJ_SUCCESS = 0, 1443 ACPI_EINJ_FAILURE = 1, 1444 ACPI_EINJ_INVALID_ACCESS = 2, 1445 ACPI_EINJ_STATUS_RESERVED = 3 /* 3 and greater are reserved */ 1446 }; 1447 1448 1449 /* Error types returned from ACPI_EINJ_GET_ERROR_TYPE (bitfield) */ 1450 1451 #define ACPI_EINJ_PROCESSOR_CORRECTABLE (1) 1452 #define ACPI_EINJ_PROCESSOR_UNCORRECTABLE (1<<1) 1453 #define ACPI_EINJ_PROCESSOR_FATAL (1<<2) 1454 #define ACPI_EINJ_MEMORY_CORRECTABLE (1<<3) 1455 #define ACPI_EINJ_MEMORY_UNCORRECTABLE (1<<4) 1456 #define ACPI_EINJ_MEMORY_FATAL (1<<5) 1457 #define ACPI_EINJ_PCIX_CORRECTABLE (1<<6) 1458 #define ACPI_EINJ_PCIX_UNCORRECTABLE (1<<7) 1459 #define ACPI_EINJ_PCIX_FATAL (1<<8) 1460 #define ACPI_EINJ_PLATFORM_CORRECTABLE (1<<9) 1461 #define ACPI_EINJ_PLATFORM_UNCORRECTABLE (1<<10) 1462 #define ACPI_EINJ_PLATFORM_FATAL (1<<11) 1463 #define ACPI_EINJ_CXL_CACHE_CORRECTABLE (1<<12) 1464 #define ACPI_EINJ_CXL_CACHE_UNCORRECTABLE (1<<13) 1465 #define ACPI_EINJ_CXL_CACHE_FATAL (1<<14) 1466 #define ACPI_EINJ_CXL_MEM_CORRECTABLE (1<<15) 1467 #define ACPI_EINJ_CXL_MEM_UNCORRECTABLE (1<<16) 1468 #define ACPI_EINJ_CXL_MEM_FATAL (1<<17) 1469 #define ACPI_EINJ_VENDOR_DEFINED (1<<31) 1470 1471 1472 /******************************************************************************* 1473 * 1474 * ERST - Error Record Serialization Table (ACPI 4.0) 1475 * Version 1 1476 * 1477 ******************************************************************************/ 1478 1479 typedef struct acpi_table_erst 1480 { 1481 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1482 UINT32 HeaderLength; 1483 UINT32 Reserved; 1484 UINT32 Entries; 1485 1486 } ACPI_TABLE_ERST; 1487 1488 1489 /* ERST Serialization Entries (actions) */ 1490 1491 typedef struct acpi_erst_entry 1492 { 1493 ACPI_WHEA_HEADER WheaHeader; /* Common header for WHEA tables */ 1494 1495 } ACPI_ERST_ENTRY; 1496 1497 /* Masks for Flags field above */ 1498 1499 #define ACPI_ERST_PRESERVE (1) 1500 1501 /* Values for Action field above */ 1502 1503 enum AcpiErstActions 1504 { 1505 ACPI_ERST_BEGIN_WRITE = 0, 1506 ACPI_ERST_BEGIN_READ = 1, 1507 ACPI_ERST_BEGIN_CLEAR = 2, 1508 ACPI_ERST_END = 3, 1509 ACPI_ERST_SET_RECORD_OFFSET = 4, 1510 ACPI_ERST_EXECUTE_OPERATION = 5, 1511 ACPI_ERST_CHECK_BUSY_STATUS = 6, 1512 ACPI_ERST_GET_COMMAND_STATUS = 7, 1513 ACPI_ERST_GET_RECORD_ID = 8, 1514 ACPI_ERST_SET_RECORD_ID = 9, 1515 ACPI_ERST_GET_RECORD_COUNT = 10, 1516 ACPI_ERST_BEGIN_DUMMY_WRIITE = 11, 1517 ACPI_ERST_NOT_USED = 12, 1518 ACPI_ERST_GET_ERROR_RANGE = 13, 1519 ACPI_ERST_GET_ERROR_LENGTH = 14, 1520 ACPI_ERST_GET_ERROR_ATTRIBUTES = 15, 1521 ACPI_ERST_EXECUTE_TIMINGS = 16, 1522 ACPI_ERST_ACTION_RESERVED = 17 /* 17 and greater are reserved */ 1523 }; 1524 1525 /* Values for Instruction field above */ 1526 1527 enum AcpiErstInstructions 1528 { 1529 ACPI_ERST_READ_REGISTER = 0, 1530 ACPI_ERST_READ_REGISTER_VALUE = 1, 1531 ACPI_ERST_WRITE_REGISTER = 2, 1532 ACPI_ERST_WRITE_REGISTER_VALUE = 3, 1533 ACPI_ERST_NOOP = 4, 1534 ACPI_ERST_LOAD_VAR1 = 5, 1535 ACPI_ERST_LOAD_VAR2 = 6, 1536 ACPI_ERST_STORE_VAR1 = 7, 1537 ACPI_ERST_ADD = 8, 1538 ACPI_ERST_SUBTRACT = 9, 1539 ACPI_ERST_ADD_VALUE = 10, 1540 ACPI_ERST_SUBTRACT_VALUE = 11, 1541 ACPI_ERST_STALL = 12, 1542 ACPI_ERST_STALL_WHILE_TRUE = 13, 1543 ACPI_ERST_SKIP_NEXT_IF_TRUE = 14, 1544 ACPI_ERST_GOTO = 15, 1545 ACPI_ERST_SET_SRC_ADDRESS_BASE = 16, 1546 ACPI_ERST_SET_DST_ADDRESS_BASE = 17, 1547 ACPI_ERST_MOVE_DATA = 18, 1548 ACPI_ERST_INSTRUCTION_RESERVED = 19 /* 19 and greater are reserved */ 1549 }; 1550 1551 /* Command status return values */ 1552 1553 enum AcpiErstCommandStatus 1554 { 1555 ACPI_ERST_SUCCESS = 0, 1556 ACPI_ERST_NO_SPACE = 1, 1557 ACPI_ERST_NOT_AVAILABLE = 2, 1558 ACPI_ERST_FAILURE = 3, 1559 ACPI_ERST_RECORD_EMPTY = 4, 1560 ACPI_ERST_NOT_FOUND = 5, 1561 ACPI_ERST_STATUS_RESERVED = 6 /* 6 and greater are reserved */ 1562 }; 1563 1564 1565 /* Error Record Serialization Information */ 1566 1567 typedef struct acpi_erst_info 1568 { 1569 UINT16 Signature; /* Should be "ER" */ 1570 UINT8 Data[48]; 1571 1572 } ACPI_ERST_INFO; 1573 1574 1575 /******************************************************************************* 1576 * 1577 * FPDT - Firmware Performance Data Table (ACPI 5.0) 1578 * Version 1 1579 * 1580 ******************************************************************************/ 1581 1582 typedef struct acpi_table_fpdt 1583 { 1584 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1585 1586 } ACPI_TABLE_FPDT; 1587 1588 1589 /* FPDT subtable header (Performance Record Structure) */ 1590 1591 typedef struct acpi_fpdt_header 1592 { 1593 UINT16 Type; 1594 UINT8 Length; 1595 UINT8 Revision; 1596 1597 } ACPI_FPDT_HEADER; 1598 1599 /* Values for Type field above */ 1600 1601 enum AcpiFpdtType 1602 { 1603 ACPI_FPDT_TYPE_BOOT = 0, 1604 ACPI_FPDT_TYPE_S3PERF = 1 1605 }; 1606 1607 1608 /* 1609 * FPDT subtables 1610 */ 1611 1612 /* 0: Firmware Basic Boot Performance Record */ 1613 1614 typedef struct acpi_fpdt_boot_pointer 1615 { 1616 ACPI_FPDT_HEADER Header; 1617 UINT8 Reserved[4]; 1618 UINT64 Address; 1619 1620 } ACPI_FPDT_BOOT_POINTER; 1621 1622 1623 /* 1: S3 Performance Table Pointer Record */ 1624 1625 typedef struct acpi_fpdt_s3pt_pointer 1626 { 1627 ACPI_FPDT_HEADER Header; 1628 UINT8 Reserved[4]; 1629 UINT64 Address; 1630 1631 } ACPI_FPDT_S3PT_POINTER; 1632 1633 1634 /* 1635 * S3PT - S3 Performance Table. This table is pointed to by the 1636 * S3 Pointer Record above. 1637 */ 1638 typedef struct acpi_table_s3pt 1639 { 1640 UINT8 Signature[4]; /* "S3PT" */ 1641 UINT32 Length; 1642 1643 } ACPI_TABLE_S3PT; 1644 1645 1646 /* 1647 * S3PT Subtables (Not part of the actual FPDT) 1648 */ 1649 1650 /* Values for Type field in S3PT header */ 1651 1652 enum AcpiS3ptType 1653 { 1654 ACPI_S3PT_TYPE_RESUME = 0, 1655 ACPI_S3PT_TYPE_SUSPEND = 1, 1656 ACPI_FPDT_BOOT_PERFORMANCE = 2 1657 }; 1658 1659 typedef struct acpi_s3pt_resume 1660 { 1661 ACPI_FPDT_HEADER Header; 1662 UINT32 ResumeCount; 1663 UINT64 FullResume; 1664 UINT64 AverageResume; 1665 1666 } ACPI_S3PT_RESUME; 1667 1668 typedef struct acpi_s3pt_suspend 1669 { 1670 ACPI_FPDT_HEADER Header; 1671 UINT64 SuspendStart; 1672 UINT64 SuspendEnd; 1673 1674 } ACPI_S3PT_SUSPEND; 1675 1676 1677 /* 1678 * FPDT Boot Performance Record (Not part of the actual FPDT) 1679 */ 1680 typedef struct acpi_fpdt_boot 1681 { 1682 ACPI_FPDT_HEADER Header; 1683 UINT8 Reserved[4]; 1684 UINT64 ResetEnd; 1685 UINT64 LoadStart; 1686 UINT64 StartupStart; 1687 UINT64 ExitServicesEntry; 1688 UINT64 ExitServicesExit; 1689 1690 } ACPI_FPDT_BOOT; 1691 1692 1693 /******************************************************************************* 1694 * 1695 * GTDT - Generic Timer Description Table (ACPI 5.1) 1696 * Version 2 1697 * 1698 ******************************************************************************/ 1699 1700 typedef struct acpi_table_gtdt 1701 { 1702 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1703 UINT64 CounterBlockAddresss; 1704 UINT32 Reserved; 1705 UINT32 SecureEl1Interrupt; 1706 UINT32 SecureEl1Flags; 1707 UINT32 NonSecureEl1Interrupt; 1708 UINT32 NonSecureEl1Flags; 1709 UINT32 VirtualTimerInterrupt; 1710 UINT32 VirtualTimerFlags; 1711 UINT32 NonSecureEl2Interrupt; 1712 UINT32 NonSecureEl2Flags; 1713 UINT64 CounterReadBlockAddress; 1714 UINT32 PlatformTimerCount; 1715 UINT32 PlatformTimerOffset; 1716 1717 } ACPI_TABLE_GTDT; 1718 1719 /* Flag Definitions: Timer Block Physical Timers and Virtual timers */ 1720 1721 #define ACPI_GTDT_INTERRUPT_MODE (1) 1722 #define ACPI_GTDT_INTERRUPT_POLARITY (1<<1) 1723 #define ACPI_GTDT_ALWAYS_ON (1<<2) 1724 1725 typedef struct acpi_gtdt_el2 1726 { 1727 UINT32 VirtualEL2TimerGsiv; 1728 UINT32 VirtualEL2TimerFlags; 1729 } ACPI_GTDT_EL2; 1730 1731 1732 /* Common GTDT subtable header */ 1733 1734 typedef struct acpi_gtdt_header 1735 { 1736 UINT8 Type; 1737 UINT16 Length; 1738 1739 } ACPI_GTDT_HEADER; 1740 1741 /* Values for GTDT subtable type above */ 1742 1743 enum AcpiGtdtType 1744 { 1745 ACPI_GTDT_TYPE_TIMER_BLOCK = 0, 1746 ACPI_GTDT_TYPE_WATCHDOG = 1, 1747 ACPI_GTDT_TYPE_RESERVED = 2 /* 2 and greater are reserved */ 1748 }; 1749 1750 1751 /* GTDT Subtables, correspond to Type in acpi_gtdt_header */ 1752 1753 /* 0: Generic Timer Block */ 1754 1755 typedef struct acpi_gtdt_timer_block 1756 { 1757 ACPI_GTDT_HEADER Header; 1758 UINT8 Reserved; 1759 UINT64 BlockAddress; 1760 UINT32 TimerCount; 1761 UINT32 TimerOffset; 1762 1763 } ACPI_GTDT_TIMER_BLOCK; 1764 1765 /* Timer Sub-Structure, one per timer */ 1766 1767 typedef struct acpi_gtdt_timer_entry 1768 { 1769 UINT8 FrameNumber; 1770 UINT8 Reserved[3]; 1771 UINT64 BaseAddress; 1772 UINT64 El0BaseAddress; 1773 UINT32 TimerInterrupt; 1774 UINT32 TimerFlags; 1775 UINT32 VirtualTimerInterrupt; 1776 UINT32 VirtualTimerFlags; 1777 UINT32 CommonFlags; 1778 1779 } ACPI_GTDT_TIMER_ENTRY; 1780 1781 /* Flag Definitions: TimerFlags and VirtualTimerFlags above */ 1782 1783 #define ACPI_GTDT_GT_IRQ_MODE (1) 1784 #define ACPI_GTDT_GT_IRQ_POLARITY (1<<1) 1785 1786 /* Flag Definitions: CommonFlags above */ 1787 1788 #define ACPI_GTDT_GT_IS_SECURE_TIMER (1) 1789 #define ACPI_GTDT_GT_ALWAYS_ON (1<<1) 1790 1791 1792 /* 1: SBSA Generic Watchdog Structure */ 1793 1794 typedef struct acpi_gtdt_watchdog 1795 { 1796 ACPI_GTDT_HEADER Header; 1797 UINT8 Reserved; 1798 UINT64 RefreshFrameAddress; 1799 UINT64 ControlFrameAddress; 1800 UINT32 TimerInterrupt; 1801 UINT32 TimerFlags; 1802 1803 } ACPI_GTDT_WATCHDOG; 1804 1805 /* Flag Definitions: TimerFlags above */ 1806 1807 #define ACPI_GTDT_WATCHDOG_IRQ_MODE (1) 1808 #define ACPI_GTDT_WATCHDOG_IRQ_POLARITY (1<<1) 1809 #define ACPI_GTDT_WATCHDOG_SECURE (1<<2) 1810 1811 1812 /******************************************************************************* 1813 * 1814 * HEST - Hardware Error Source Table (ACPI 4.0) 1815 * Version 1 1816 * 1817 ******************************************************************************/ 1818 1819 typedef struct acpi_table_hest 1820 { 1821 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1822 UINT32 ErrorSourceCount; 1823 1824 } ACPI_TABLE_HEST; 1825 1826 1827 /* HEST subtable header */ 1828 1829 typedef struct acpi_hest_header 1830 { 1831 UINT16 Type; 1832 UINT16 SourceId; 1833 1834 } ACPI_HEST_HEADER; 1835 1836 1837 /* Values for Type field above for subtables */ 1838 1839 enum AcpiHestTypes 1840 { 1841 ACPI_HEST_TYPE_IA32_CHECK = 0, 1842 ACPI_HEST_TYPE_IA32_CORRECTED_CHECK = 1, 1843 ACPI_HEST_TYPE_IA32_NMI = 2, 1844 ACPI_HEST_TYPE_NOT_USED3 = 3, 1845 ACPI_HEST_TYPE_NOT_USED4 = 4, 1846 ACPI_HEST_TYPE_NOT_USED5 = 5, 1847 ACPI_HEST_TYPE_AER_ROOT_PORT = 6, 1848 ACPI_HEST_TYPE_AER_ENDPOINT = 7, 1849 ACPI_HEST_TYPE_AER_BRIDGE = 8, 1850 ACPI_HEST_TYPE_GENERIC_ERROR = 9, 1851 ACPI_HEST_TYPE_GENERIC_ERROR_V2 = 10, 1852 ACPI_HEST_TYPE_IA32_DEFERRED_CHECK = 11, 1853 ACPI_HEST_TYPE_RESERVED = 12 /* 12 and greater are reserved */ 1854 }; 1855 1856 1857 /* 1858 * HEST substructures contained in subtables 1859 */ 1860 1861 /* 1862 * IA32 Error Bank(s) - Follows the ACPI_HEST_IA_MACHINE_CHECK and 1863 * ACPI_HEST_IA_CORRECTED structures. 1864 */ 1865 typedef struct acpi_hest_ia_error_bank 1866 { 1867 UINT8 BankNumber; 1868 UINT8 ClearStatusOnInit; 1869 UINT8 StatusFormat; 1870 UINT8 Reserved; 1871 UINT32 ControlRegister; 1872 UINT64 ControlData; 1873 UINT32 StatusRegister; 1874 UINT32 AddressRegister; 1875 UINT32 MiscRegister; 1876 1877 } ACPI_HEST_IA_ERROR_BANK; 1878 1879 1880 /* Common HEST sub-structure for PCI/AER structures below (6,7,8) */ 1881 1882 typedef struct acpi_hest_aer_common 1883 { 1884 UINT16 Reserved1; 1885 UINT8 Flags; 1886 UINT8 Enabled; 1887 UINT32 RecordsToPreallocate; 1888 UINT32 MaxSectionsPerRecord; 1889 UINT32 Bus; /* Bus and Segment numbers */ 1890 UINT16 Device; 1891 UINT16 Function; 1892 UINT16 DeviceControl; 1893 UINT16 Reserved2; 1894 UINT32 UncorrectableMask; 1895 UINT32 UncorrectableSeverity; 1896 UINT32 CorrectableMask; 1897 UINT32 AdvancedCapabilities; 1898 1899 } ACPI_HEST_AER_COMMON; 1900 1901 /* Masks for HEST Flags fields */ 1902 1903 #define ACPI_HEST_FIRMWARE_FIRST (1) 1904 #define ACPI_HEST_GLOBAL (1<<1) 1905 #define ACPI_HEST_GHES_ASSIST (1<<2) 1906 1907 /* 1908 * Macros to access the bus/segment numbers in Bus field above: 1909 * Bus number is encoded in bits 7:0 1910 * Segment number is encoded in bits 23:8 1911 */ 1912 #define ACPI_HEST_BUS(Bus) ((Bus) & 0xFF) 1913 #define ACPI_HEST_SEGMENT(Bus) (((Bus) >> 8) & 0xFFFF) 1914 1915 1916 /* Hardware Error Notification */ 1917 1918 typedef struct acpi_hest_notify 1919 { 1920 UINT8 Type; 1921 UINT8 Length; 1922 UINT16 ConfigWriteEnable; 1923 UINT32 PollInterval; 1924 UINT32 Vector; 1925 UINT32 PollingThresholdValue; 1926 UINT32 PollingThresholdWindow; 1927 UINT32 ErrorThresholdValue; 1928 UINT32 ErrorThresholdWindow; 1929 1930 } ACPI_HEST_NOTIFY; 1931 1932 /* Values for Notify Type field above */ 1933 1934 enum AcpiHestNotifyTypes 1935 { 1936 ACPI_HEST_NOTIFY_POLLED = 0, 1937 ACPI_HEST_NOTIFY_EXTERNAL = 1, 1938 ACPI_HEST_NOTIFY_LOCAL = 2, 1939 ACPI_HEST_NOTIFY_SCI = 3, 1940 ACPI_HEST_NOTIFY_NMI = 4, 1941 ACPI_HEST_NOTIFY_CMCI = 5, /* ACPI 5.0 */ 1942 ACPI_HEST_NOTIFY_MCE = 6, /* ACPI 5.0 */ 1943 ACPI_HEST_NOTIFY_GPIO = 7, /* ACPI 6.0 */ 1944 ACPI_HEST_NOTIFY_SEA = 8, /* ACPI 6.1 */ 1945 ACPI_HEST_NOTIFY_SEI = 9, /* ACPI 6.1 */ 1946 ACPI_HEST_NOTIFY_GSIV = 10, /* ACPI 6.1 */ 1947 ACPI_HEST_NOTIFY_SOFTWARE_DELEGATED = 11, /* ACPI 6.2 */ 1948 ACPI_HEST_NOTIFY_RESERVED = 12 /* 12 and greater are reserved */ 1949 }; 1950 1951 /* Values for ConfigWriteEnable bitfield above */ 1952 1953 #define ACPI_HEST_TYPE (1) 1954 #define ACPI_HEST_POLL_INTERVAL (1<<1) 1955 #define ACPI_HEST_POLL_THRESHOLD_VALUE (1<<2) 1956 #define ACPI_HEST_POLL_THRESHOLD_WINDOW (1<<3) 1957 #define ACPI_HEST_ERR_THRESHOLD_VALUE (1<<4) 1958 #define ACPI_HEST_ERR_THRESHOLD_WINDOW (1<<5) 1959 1960 1961 /* 1962 * HEST subtables 1963 */ 1964 1965 /* 0: IA32 Machine Check Exception */ 1966 1967 typedef struct acpi_hest_ia_machine_check 1968 { 1969 ACPI_HEST_HEADER Header; 1970 UINT16 Reserved1; 1971 UINT8 Flags; /* See flags ACPI_HEST_GLOBAL, etc. above */ 1972 UINT8 Enabled; 1973 UINT32 RecordsToPreallocate; 1974 UINT32 MaxSectionsPerRecord; 1975 UINT64 GlobalCapabilityData; 1976 UINT64 GlobalControlData; 1977 UINT8 NumHardwareBanks; 1978 UINT8 Reserved3[7]; 1979 1980 } ACPI_HEST_IA_MACHINE_CHECK; 1981 1982 1983 /* 1: IA32 Corrected Machine Check */ 1984 1985 typedef struct acpi_hest_ia_corrected 1986 { 1987 ACPI_HEST_HEADER Header; 1988 UINT16 Reserved1; 1989 UINT8 Flags; /* See flags ACPI_HEST_GLOBAL, etc. above */ 1990 UINT8 Enabled; 1991 UINT32 RecordsToPreallocate; 1992 UINT32 MaxSectionsPerRecord; 1993 ACPI_HEST_NOTIFY Notify; 1994 UINT8 NumHardwareBanks; 1995 UINT8 Reserved2[3]; 1996 1997 } ACPI_HEST_IA_CORRECTED; 1998 1999 2000 /* 2: IA32 Non-Maskable Interrupt */ 2001 2002 typedef struct acpi_hest_ia_nmi 2003 { 2004 ACPI_HEST_HEADER Header; 2005 UINT32 Reserved; 2006 UINT32 RecordsToPreallocate; 2007 UINT32 MaxSectionsPerRecord; 2008 UINT32 MaxRawDataLength; 2009 2010 } ACPI_HEST_IA_NMI; 2011 2012 2013 /* 3,4,5: Not used */ 2014 2015 /* 6: PCI Express Root Port AER */ 2016 2017 typedef struct acpi_hest_aer_root 2018 { 2019 ACPI_HEST_HEADER Header; 2020 ACPI_HEST_AER_COMMON Aer; 2021 UINT32 RootErrorCommand; 2022 2023 } ACPI_HEST_AER_ROOT; 2024 2025 2026 /* 7: PCI Express AER (AER Endpoint) */ 2027 2028 typedef struct acpi_hest_aer 2029 { 2030 ACPI_HEST_HEADER Header; 2031 ACPI_HEST_AER_COMMON Aer; 2032 2033 } ACPI_HEST_AER; 2034 2035 2036 /* 8: PCI Express/PCI-X Bridge AER */ 2037 2038 typedef struct acpi_hest_aer_bridge 2039 { 2040 ACPI_HEST_HEADER Header; 2041 ACPI_HEST_AER_COMMON Aer; 2042 UINT32 UncorrectableMask2; 2043 UINT32 UncorrectableSeverity2; 2044 UINT32 AdvancedCapabilities2; 2045 2046 } ACPI_HEST_AER_BRIDGE; 2047 2048 2049 /* 9: Generic Hardware Error Source */ 2050 2051 typedef struct acpi_hest_generic 2052 { 2053 ACPI_HEST_HEADER Header; 2054 UINT16 RelatedSourceId; 2055 UINT8 Reserved; 2056 UINT8 Enabled; 2057 UINT32 RecordsToPreallocate; 2058 UINT32 MaxSectionsPerRecord; 2059 UINT32 MaxRawDataLength; 2060 ACPI_GENERIC_ADDRESS ErrorStatusAddress; 2061 ACPI_HEST_NOTIFY Notify; 2062 UINT32 ErrorBlockLength; 2063 2064 } ACPI_HEST_GENERIC; 2065 2066 2067 /* 10: Generic Hardware Error Source, version 2 */ 2068 2069 typedef struct acpi_hest_generic_v2 2070 { 2071 ACPI_HEST_HEADER Header; 2072 UINT16 RelatedSourceId; 2073 UINT8 Reserved; 2074 UINT8 Enabled; 2075 UINT32 RecordsToPreallocate; 2076 UINT32 MaxSectionsPerRecord; 2077 UINT32 MaxRawDataLength; 2078 ACPI_GENERIC_ADDRESS ErrorStatusAddress; 2079 ACPI_HEST_NOTIFY Notify; 2080 UINT32 ErrorBlockLength; 2081 ACPI_GENERIC_ADDRESS ReadAckRegister; 2082 UINT64 ReadAckPreserve; 2083 UINT64 ReadAckWrite; 2084 2085 } ACPI_HEST_GENERIC_V2; 2086 2087 2088 /* Generic Error Status block */ 2089 2090 typedef struct acpi_hest_generic_status 2091 { 2092 UINT32 BlockStatus; 2093 UINT32 RawDataOffset; 2094 UINT32 RawDataLength; 2095 UINT32 DataLength; 2096 UINT32 ErrorSeverity; 2097 2098 } ACPI_HEST_GENERIC_STATUS; 2099 2100 /* Values for BlockStatus flags above */ 2101 2102 #define ACPI_HEST_UNCORRECTABLE (1) 2103 #define ACPI_HEST_CORRECTABLE (1<<1) 2104 #define ACPI_HEST_MULTIPLE_UNCORRECTABLE (1<<2) 2105 #define ACPI_HEST_MULTIPLE_CORRECTABLE (1<<3) 2106 #define ACPI_HEST_ERROR_ENTRY_COUNT (0xFF<<4) /* 8 bits, error count */ 2107 2108 2109 /* Generic Error Data entry */ 2110 2111 typedef struct acpi_hest_generic_data 2112 { 2113 UINT8 SectionType[16]; 2114 UINT32 ErrorSeverity; 2115 UINT16 Revision; 2116 UINT8 ValidationBits; 2117 UINT8 Flags; 2118 UINT32 ErrorDataLength; 2119 UINT8 FruId[16]; 2120 UINT8 FruText[20]; 2121 2122 } ACPI_HEST_GENERIC_DATA; 2123 2124 /* Extension for revision 0x0300 */ 2125 2126 typedef struct acpi_hest_generic_data_v300 2127 { 2128 UINT8 SectionType[16]; 2129 UINT32 ErrorSeverity; 2130 UINT16 Revision; 2131 UINT8 ValidationBits; 2132 UINT8 Flags; 2133 UINT32 ErrorDataLength; 2134 UINT8 FruId[16]; 2135 UINT8 FruText[20]; 2136 UINT64 TimeStamp; 2137 2138 } ACPI_HEST_GENERIC_DATA_V300; 2139 2140 /* Values for ErrorSeverity above */ 2141 2142 #define ACPI_HEST_GEN_ERROR_RECOVERABLE 0 2143 #define ACPI_HEST_GEN_ERROR_FATAL 1 2144 #define ACPI_HEST_GEN_ERROR_CORRECTED 2 2145 #define ACPI_HEST_GEN_ERROR_NONE 3 2146 2147 /* Flags for ValidationBits above */ 2148 2149 #define ACPI_HEST_GEN_VALID_FRU_ID (1) 2150 #define ACPI_HEST_GEN_VALID_FRU_STRING (1<<1) 2151 #define ACPI_HEST_GEN_VALID_TIMESTAMP (1<<2) 2152 2153 2154 /* 11: IA32 Deferred Machine Check Exception (ACPI 6.2) */ 2155 2156 typedef struct acpi_hest_ia_deferred_check 2157 { 2158 ACPI_HEST_HEADER Header; 2159 UINT16 Reserved1; 2160 UINT8 Flags; /* See flags ACPI_HEST_GLOBAL, etc. above */ 2161 UINT8 Enabled; 2162 UINT32 RecordsToPreallocate; 2163 UINT32 MaxSectionsPerRecord; 2164 ACPI_HEST_NOTIFY Notify; 2165 UINT8 NumHardwareBanks; 2166 UINT8 Reserved2[3]; 2167 2168 } ACPI_HEST_IA_DEFERRED_CHECK; 2169 2170 2171 /******************************************************************************* 2172 * 2173 * HMAT - Heterogeneous Memory Attributes Table (ACPI 6.3) 2174 * 2175 ******************************************************************************/ 2176 2177 typedef struct acpi_table_hmat 2178 { 2179 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 2180 UINT32 Reserved; 2181 2182 } ACPI_TABLE_HMAT; 2183 2184 2185 /* Values for HMAT structure types */ 2186 2187 enum AcpiHmatType 2188 { 2189 ACPI_HMAT_TYPE_ADDRESS_RANGE = 0, /* Memory subsystem address range */ 2190 ACPI_HMAT_TYPE_LOCALITY = 1, /* System locality latency and bandwidth information */ 2191 ACPI_HMAT_TYPE_CACHE = 2, /* Memory side cache information */ 2192 ACPI_HMAT_TYPE_RESERVED = 3 /* 3 and greater are reserved */ 2193 }; 2194 2195 typedef struct acpi_hmat_structure 2196 { 2197 UINT16 Type; 2198 UINT16 Reserved; 2199 UINT32 Length; 2200 2201 } ACPI_HMAT_STRUCTURE; 2202 2203 2204 /* 2205 * HMAT Structures, correspond to Type in ACPI_HMAT_STRUCTURE 2206 */ 2207 2208 /* 0: Memory proximity domain attributes */ 2209 2210 typedef struct acpi_hmat_proximity_domain 2211 { 2212 ACPI_HMAT_STRUCTURE Header; 2213 UINT16 Flags; 2214 UINT16 Reserved1; 2215 UINT32 InitiatorPD; /* Attached Initiator proximity domain */ 2216 UINT32 MemoryPD; /* Memory proximity domain */ 2217 UINT32 Reserved2; 2218 UINT64 Reserved3; 2219 UINT64 Reserved4; 2220 2221 } ACPI_HMAT_PROXIMITY_DOMAIN; 2222 2223 /* Masks for Flags field above */ 2224 2225 #define ACPI_HMAT_INITIATOR_PD_VALID (1) /* 1: InitiatorPD field is valid */ 2226 2227 2228 /* 1: System locality latency and bandwidth information */ 2229 2230 typedef struct acpi_hmat_locality 2231 { 2232 ACPI_HMAT_STRUCTURE Header; 2233 UINT8 Flags; 2234 UINT8 DataType; 2235 UINT8 MinTransferSize; 2236 UINT8 Reserved1; 2237 UINT32 NumberOfInitiatorPDs; 2238 UINT32 NumberOfTargetPDs; 2239 UINT32 Reserved2; 2240 UINT64 EntryBaseUnit; 2241 2242 } ACPI_HMAT_LOCALITY; 2243 2244 /* Masks for Flags field above */ 2245 2246 #define ACPI_HMAT_MEMORY_HIERARCHY (0x0F) /* Bits 0-3 */ 2247 2248 /* Values for Memory Hierarchy flags */ 2249 2250 #define ACPI_HMAT_MEMORY 0 2251 #define ACPI_HMAT_1ST_LEVEL_CACHE 1 2252 #define ACPI_HMAT_2ND_LEVEL_CACHE 2 2253 #define ACPI_HMAT_3RD_LEVEL_CACHE 3 2254 #define ACPI_HMAT_MINIMUM_XFER_SIZE 0x10 /* Bit 4: ACPI 6.4 */ 2255 #define ACPI_HMAT_NON_SEQUENTIAL_XFERS 0x20 /* Bit 5: ACPI 6.4 */ 2256 2257 2258 /* Values for DataType field above */ 2259 2260 #define ACPI_HMAT_ACCESS_LATENCY 0 2261 #define ACPI_HMAT_READ_LATENCY 1 2262 #define ACPI_HMAT_WRITE_LATENCY 2 2263 #define ACPI_HMAT_ACCESS_BANDWIDTH 3 2264 #define ACPI_HMAT_READ_BANDWIDTH 4 2265 #define ACPI_HMAT_WRITE_BANDWIDTH 5 2266 2267 2268 /* 2: Memory side cache information */ 2269 2270 typedef struct acpi_hmat_cache 2271 { 2272 ACPI_HMAT_STRUCTURE Header; 2273 UINT32 MemoryPD; 2274 UINT32 Reserved1; 2275 UINT64 CacheSize; 2276 UINT32 CacheAttributes; 2277 UINT16 AddressMode; 2278 UINT16 NumberOfSMBIOSHandles; 2279 2280 } ACPI_HMAT_CACHE; 2281 2282 /* Masks for CacheAttributes field above */ 2283 2284 #define ACPI_HMAT_TOTAL_CACHE_LEVEL (0x0000000F) 2285 #define ACPI_HMAT_CACHE_LEVEL (0x000000F0) 2286 #define ACPI_HMAT_CACHE_ASSOCIATIVITY (0x00000F00) 2287 #define ACPI_HMAT_WRITE_POLICY (0x0000F000) 2288 #define ACPI_HMAT_CACHE_LINE_SIZE (0xFFFF0000) 2289 2290 #define ACPI_HMAT_CACHE_MODE_UNKNOWN (0) 2291 #define ACPI_HMAT_CACHE_MODE_EXTENDED_LINEAR (1) 2292 2293 /* Values for cache associativity flag */ 2294 2295 #define ACPI_HMAT_CA_NONE (0) 2296 #define ACPI_HMAT_CA_DIRECT_MAPPED (1) 2297 #define ACPI_HMAT_CA_COMPLEX_CACHE_INDEXING (2) 2298 2299 /* Values for write policy flag */ 2300 2301 #define ACPI_HMAT_CP_NONE (0) 2302 #define ACPI_HMAT_CP_WB (1) 2303 #define ACPI_HMAT_CP_WT (2) 2304 2305 2306 /******************************************************************************* 2307 * 2308 * HPET - High Precision Event Timer table 2309 * Version 1 2310 * 2311 * Conforms to "IA-PC HPET (High Precision Event Timers) Specification", 2312 * Version 1.0a, October 2004 2313 * 2314 ******************************************************************************/ 2315 2316 typedef struct acpi_table_hpet 2317 { 2318 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 2319 UINT32 Id; /* Hardware ID of event timer block */ 2320 ACPI_GENERIC_ADDRESS Address; /* Address of event timer block */ 2321 UINT8 Sequence; /* HPET sequence number */ 2322 UINT16 MinimumTick; /* Main counter min tick, periodic mode */ 2323 UINT8 Flags; 2324 2325 } ACPI_TABLE_HPET; 2326 2327 /* Masks for Flags field above */ 2328 2329 #define ACPI_HPET_PAGE_PROTECT_MASK (3) 2330 2331 /* Values for Page Protect flags */ 2332 2333 enum AcpiHpetPageProtect 2334 { 2335 ACPI_HPET_NO_PAGE_PROTECT = 0, 2336 ACPI_HPET_PAGE_PROTECT4 = 1, 2337 ACPI_HPET_PAGE_PROTECT64 = 2 2338 }; 2339 2340 2341 /******************************************************************************* 2342 * 2343 * IBFT - Boot Firmware Table 2344 * Version 1 2345 * 2346 * Conforms to "iSCSI Boot Firmware Table (iBFT) as Defined in ACPI 3.0b 2347 * Specification", Version 1.01, March 1, 2007 2348 * 2349 * Note: It appears that this table is not intended to appear in the RSDT/XSDT. 2350 * Therefore, it is not currently supported by the disassembler. 2351 * 2352 ******************************************************************************/ 2353 2354 typedef struct acpi_table_ibft 2355 { 2356 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 2357 UINT8 Reserved[12]; 2358 2359 } ACPI_TABLE_IBFT; 2360 2361 2362 /* IBFT common subtable header */ 2363 2364 typedef struct acpi_ibft_header 2365 { 2366 UINT8 Type; 2367 UINT8 Version; 2368 UINT16 Length; 2369 UINT8 Index; 2370 UINT8 Flags; 2371 2372 } ACPI_IBFT_HEADER; 2373 2374 /* Values for Type field above */ 2375 2376 enum AcpiIbftType 2377 { 2378 ACPI_IBFT_TYPE_NOT_USED = 0, 2379 ACPI_IBFT_TYPE_CONTROL = 1, 2380 ACPI_IBFT_TYPE_INITIATOR = 2, 2381 ACPI_IBFT_TYPE_NIC = 3, 2382 ACPI_IBFT_TYPE_TARGET = 4, 2383 ACPI_IBFT_TYPE_EXTENSIONS = 5, 2384 ACPI_IBFT_TYPE_RESERVED = 6 /* 6 and greater are reserved */ 2385 }; 2386 2387 2388 /* IBFT subtables */ 2389 2390 typedef struct acpi_ibft_control 2391 { 2392 ACPI_IBFT_HEADER Header; 2393 UINT16 Extensions; 2394 UINT16 InitiatorOffset; 2395 UINT16 Nic0Offset; 2396 UINT16 Target0Offset; 2397 UINT16 Nic1Offset; 2398 UINT16 Target1Offset; 2399 2400 } ACPI_IBFT_CONTROL; 2401 2402 typedef struct acpi_ibft_initiator 2403 { 2404 ACPI_IBFT_HEADER Header; 2405 UINT8 SnsServer[16]; 2406 UINT8 SlpServer[16]; 2407 UINT8 PrimaryServer[16]; 2408 UINT8 SecondaryServer[16]; 2409 UINT16 NameLength; 2410 UINT16 NameOffset; 2411 2412 } ACPI_IBFT_INITIATOR; 2413 2414 typedef struct acpi_ibft_nic 2415 { 2416 ACPI_IBFT_HEADER Header; 2417 UINT8 IpAddress[16]; 2418 UINT8 SubnetMaskPrefix; 2419 UINT8 Origin; 2420 UINT8 Gateway[16]; 2421 UINT8 PrimaryDns[16]; 2422 UINT8 SecondaryDns[16]; 2423 UINT8 Dhcp[16]; 2424 UINT16 Vlan; 2425 UINT8 MacAddress[6]; 2426 UINT16 PciAddress; 2427 UINT16 NameLength; 2428 UINT16 NameOffset; 2429 2430 } ACPI_IBFT_NIC; 2431 2432 typedef struct acpi_ibft_target 2433 { 2434 ACPI_IBFT_HEADER Header; 2435 UINT8 TargetIpAddress[16]; 2436 UINT16 TargetIpSocket; 2437 UINT8 TargetBootLun[8]; 2438 UINT8 ChapType; 2439 UINT8 NicAssociation; 2440 UINT16 TargetNameLength; 2441 UINT16 TargetNameOffset; 2442 UINT16 ChapNameLength; 2443 UINT16 ChapNameOffset; 2444 UINT16 ChapSecretLength; 2445 UINT16 ChapSecretOffset; 2446 UINT16 ReverseChapNameLength; 2447 UINT16 ReverseChapNameOffset; 2448 UINT16 ReverseChapSecretLength; 2449 UINT16 ReverseChapSecretOffset; 2450 2451 } ACPI_IBFT_TARGET; 2452 2453 2454 /* Reset to default packing */ 2455 2456 #pragma pack() 2457 2458 #endif /* __ACTBL1_H__ */ 2459
Indexes created Wed Oct 01 18:09:54 GMT 2025