actbl2.h revision 1.1.1.15
1 /****************************************************************************** 2 * 3 * Name: actbl2.h - ACPI Table Definitions (tables not in ACPI spec) 4 * 5 *****************************************************************************/ 6 7 /* 8 * Copyright (C) 2000 - 2018, Intel Corp. 9 * All rights reserved. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions, and the following disclaimer, 16 * without modification. 17 * 2. Redistributions in binary form must reproduce at minimum a disclaimer 18 * substantially similar to the "NO WARRANTY" disclaimer below 19 * ("Disclaimer") and any redistribution must be conditioned upon 20 * including a substantially similar Disclaimer requirement for further 21 * binary redistribution. 22 * 3. Neither the names of the above-listed copyright holders nor the names 23 * of any contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * Alternatively, this software may be distributed under the terms of the 27 * GNU General Public License ("GPL") version 2 as published by the Free 28 * Software Foundation. 29 * 30 * NO WARRANTY 31 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 32 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 33 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR 34 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 35 * HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 36 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 37 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 38 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 39 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING 40 * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 41 * POSSIBILITY OF SUCH DAMAGES. 42 */ 43 44 #ifndef __ACTBL2_H__ 45 #define __ACTBL2_H__ 46 47 48 /******************************************************************************* 49 * 50 * Additional ACPI Tables (2) 51 * 52 * These tables are not consumed directly by the ACPICA subsystem, but are 53 * included here to support device drivers and the AML disassembler. 54 * 55 ******************************************************************************/ 56 57 58 /* 59 * Values for description table header signatures for tables defined in this 60 * file. Useful because they make it more difficult to inadvertently type in 61 * the wrong signature. 62 */ 63 #define ACPI_SIG_IORT "IORT" /* IO Remapping Table */ 64 #define ACPI_SIG_IVRS "IVRS" /* I/O Virtualization Reporting Structure */ 65 #define ACPI_SIG_LPIT "LPIT" /* Low Power Idle Table */ 66 #define ACPI_SIG_MADT "APIC" /* Multiple APIC Description Table */ 67 #define ACPI_SIG_MCFG "MCFG" /* PCI Memory Mapped Configuration table */ 68 #define ACPI_SIG_MCHI "MCHI" /* Management Controller Host Interface table */ 69 #define ACPI_SIG_MPST "MPST" /* Memory Power State Table */ 70 #define ACPI_SIG_MSCT "MSCT" /* Maximum System Characteristics Table */ 71 #define ACPI_SIG_MSDM "MSDM" /* Microsoft Data Management Table */ 72 #define ACPI_SIG_MTMR "MTMR" /* MID Timer table */ 73 #define ACPI_SIG_NFIT "NFIT" /* NVDIMM Firmware Interface Table */ 74 #define ACPI_SIG_PCCT "PCCT" /* Platform Communications Channel Table */ 75 #define ACPI_SIG_PDTT "PDTT" /* Platform Debug Trigger Table */ 76 #define ACPI_SIG_PMTT "PMTT" /* Platform Memory Topology Table */ 77 #define ACPI_SIG_PPTT "PPTT" /* Processor Properties Topology Table */ 78 #define ACPI_SIG_RASF "RASF" /* RAS Feature table */ 79 #define ACPI_SIG_SBST "SBST" /* Smart Battery Specification Table */ 80 #define ACPI_SIG_SDEI "SDEI" /* Software Delegated Exception Interface Table */ 81 #define ACPI_SIG_SDEV "SDEV" /* Secure Devices table */ 82 83 84 /* 85 * All tables must be byte-packed to match the ACPI specification, since 86 * the tables are provided by the system BIOS. 87 */ 88 #pragma pack(1) 89 90 /* 91 * Note: C bitfields are not used for this reason: 92 * 93 * "Bitfields are great and easy to read, but unfortunately the C language 94 * does not specify the layout of bitfields in memory, which means they are 95 * essentially useless for dealing with packed data in on-disk formats or 96 * binary wire protocols." (Or ACPI tables and buffers.) "If you ask me, 97 * this decision was a design error in C. Ritchie could have picked an order 98 * and stuck with it." Norman Ramsey. 99 * See http://stackoverflow.com/a/1053662/41661 100 */ 101 102 103 /******************************************************************************* 104 * 105 * IORT - IO Remapping Table 106 * 107 * Conforms to "IO Remapping Table System Software on ARM Platforms", 108 * Document number: ARM DEN 0049D, March 2018 109 * 110 ******************************************************************************/ 111 112 typedef struct acpi_table_iort 113 { 114 ACPI_TABLE_HEADER Header; 115 UINT32 NodeCount; 116 UINT32 NodeOffset; 117 UINT32 Reserved; 118 119 } ACPI_TABLE_IORT; 120 121 122 /* 123 * IORT subtables 124 */ 125 typedef struct acpi_iort_node 126 { 127 UINT8 Type; 128 UINT16 Length; 129 UINT8 Revision; 130 UINT32 Reserved; 131 UINT32 MappingCount; 132 UINT32 MappingOffset; 133 char NodeData[1]; 134 135 } ACPI_IORT_NODE; 136 137 /* Values for subtable Type above */ 138 139 enum AcpiIortNodeType 140 { 141 ACPI_IORT_NODE_ITS_GROUP = 0x00, 142 ACPI_IORT_NODE_NAMED_COMPONENT = 0x01, 143 ACPI_IORT_NODE_PCI_ROOT_COMPLEX = 0x02, 144 ACPI_IORT_NODE_SMMU = 0x03, 145 ACPI_IORT_NODE_SMMU_V3 = 0x04, 146 ACPI_IORT_NODE_PMCG = 0x05 147 }; 148 149 150 typedef struct acpi_iort_id_mapping 151 { 152 UINT32 InputBase; /* Lowest value in input range */ 153 UINT32 IdCount; /* Number of IDs */ 154 UINT32 OutputBase; /* Lowest value in output range */ 155 UINT32 OutputReference; /* A reference to the output node */ 156 UINT32 Flags; 157 158 } ACPI_IORT_ID_MAPPING; 159 160 /* Masks for Flags field above for IORT subtable */ 161 162 #define ACPI_IORT_ID_SINGLE_MAPPING (1) 163 164 165 typedef struct acpi_iort_memory_access 166 { 167 UINT32 CacheCoherency; 168 UINT8 Hints; 169 UINT16 Reserved; 170 UINT8 MemoryFlags; 171 172 } ACPI_IORT_MEMORY_ACCESS; 173 174 /* Values for CacheCoherency field above */ 175 176 #define ACPI_IORT_NODE_COHERENT 0x00000001 /* The device node is fully coherent */ 177 #define ACPI_IORT_NODE_NOT_COHERENT 0x00000000 /* The device node is not coherent */ 178 179 /* Masks for Hints field above */ 180 181 #define ACPI_IORT_HT_TRANSIENT (1) 182 #define ACPI_IORT_HT_WRITE (1<<1) 183 #define ACPI_IORT_HT_READ (1<<2) 184 #define ACPI_IORT_HT_OVERRIDE (1<<3) 185 186 /* Masks for MemoryFlags field above */ 187 188 #define ACPI_IORT_MF_COHERENCY (1) 189 #define ACPI_IORT_MF_ATTRIBUTES (1<<1) 190 191 192 /* 193 * IORT node specific subtables 194 */ 195 typedef struct acpi_iort_its_group 196 { 197 UINT32 ItsCount; 198 UINT32 Identifiers[1]; /* GIC ITS identifier arrary */ 199 200 } ACPI_IORT_ITS_GROUP; 201 202 203 typedef struct acpi_iort_named_component 204 { 205 UINT32 NodeFlags; 206 UINT64 MemoryProperties; /* Memory access properties */ 207 UINT8 MemoryAddressLimit; /* Memory address size limit */ 208 char DeviceName[1]; /* Path of namespace object */ 209 210 } ACPI_IORT_NAMED_COMPONENT; 211 212 /* Masks for Flags field above */ 213 214 #define ACPI_IORT_NC_STALL_SUPPORTED (1) 215 #define ACPI_IORT_NC_PASID_BITS (31<<1) 216 217 typedef struct acpi_iort_root_complex 218 { 219 UINT64 MemoryProperties; /* Memory access properties */ 220 UINT32 AtsAttribute; 221 UINT32 PciSegmentNumber; 222 UINT8 MemoryAddressLimit; /* Memory address size limit */ 223 UINT8 Reserved[3]; /* Reserved, must be zero */ 224 225 } ACPI_IORT_ROOT_COMPLEX; 226 227 /* Values for AtsAttribute field above */ 228 229 #define ACPI_IORT_ATS_SUPPORTED 0x00000001 /* The root complex supports ATS */ 230 #define ACPI_IORT_ATS_UNSUPPORTED 0x00000000 /* The root complex doesn't support ATS */ 231 232 233 typedef struct acpi_iort_smmu 234 { 235 UINT64 BaseAddress; /* SMMU base address */ 236 UINT64 Span; /* Length of memory range */ 237 UINT32 Model; 238 UINT32 Flags; 239 UINT32 GlobalInterruptOffset; 240 UINT32 ContextInterruptCount; 241 UINT32 ContextInterruptOffset; 242 UINT32 PmuInterruptCount; 243 UINT32 PmuInterruptOffset; 244 UINT64 Interrupts[1]; /* Interrupt array */ 245 246 } ACPI_IORT_SMMU; 247 248 /* Values for Model field above */ 249 250 #define ACPI_IORT_SMMU_V1 0x00000000 /* Generic SMMUv1 */ 251 #define ACPI_IORT_SMMU_V2 0x00000001 /* Generic SMMUv2 */ 252 #define ACPI_IORT_SMMU_CORELINK_MMU400 0x00000002 /* ARM Corelink MMU-400 */ 253 #define ACPI_IORT_SMMU_CORELINK_MMU500 0x00000003 /* ARM Corelink MMU-500 */ 254 #define ACPI_IORT_SMMU_CORELINK_MMU401 0x00000004 /* ARM Corelink MMU-401 */ 255 #define ACPI_IORT_SMMU_CAVIUM_THUNDERX 0x00000005 /* Cavium ThunderX SMMUv2 */ 256 257 /* Masks for Flags field above */ 258 259 #define ACPI_IORT_SMMU_DVM_SUPPORTED (1) 260 #define ACPI_IORT_SMMU_COHERENT_WALK (1<<1) 261 262 /* Global interrupt format */ 263 264 typedef struct acpi_iort_smmu_gsi 265 { 266 UINT32 NSgIrpt; 267 UINT32 NSgIrptFlags; 268 UINT32 NSgCfgIrpt; 269 UINT32 NSgCfgIrptFlags; 270 271 } ACPI_IORT_SMMU_GSI; 272 273 274 typedef struct acpi_iort_smmu_v3 275 { 276 UINT64 BaseAddress; /* SMMUv3 base address */ 277 UINT32 Flags; 278 UINT32 Reserved; 279 UINT64 VatosAddress; 280 UINT32 Model; 281 UINT32 EventGsiv; 282 UINT32 PriGsiv; 283 UINT32 GerrGsiv; 284 UINT32 SyncGsiv; 285 UINT32 Pxm; 286 UINT32 IdMappingIndex; 287 288 } ACPI_IORT_SMMU_V3; 289 290 /* Values for Model field above */ 291 292 #define ACPI_IORT_SMMU_V3_GENERIC 0x00000000 /* Generic SMMUv3 */ 293 #define ACPI_IORT_SMMU_V3_HISILICON_HI161X 0x00000001 /* HiSilicon Hi161x SMMUv3 */ 294 #define ACPI_IORT_SMMU_V3_CAVIUM_CN99XX 0x00000002 /* Cavium CN99xx SMMUv3 */ 295 296 /* Masks for Flags field above */ 297 298 #define ACPI_IORT_SMMU_V3_COHACC_OVERRIDE (1) 299 #define ACPI_IORT_SMMU_V3_HTTU_OVERRIDE (3<<1) 300 #define ACPI_IORT_SMMU_V3_PXM_VALID (1<<3) 301 302 typedef struct acpi_iort_pmcg 303 { 304 UINT64 Page0BaseAddress; 305 UINT32 OverflowGsiv; 306 UINT32 NodeReference; 307 UINT64 Page1BaseAddress; 308 309 } ACPI_IORT_PMCG; 310 311 312 /******************************************************************************* 313 * 314 * IVRS - I/O Virtualization Reporting Structure 315 * Version 1 316 * 317 * Conforms to "AMD I/O Virtualization Technology (IOMMU) Specification", 318 * Revision 1.26, February 2009. 319 * 320 ******************************************************************************/ 321 322 typedef struct acpi_table_ivrs 323 { 324 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 325 UINT32 Info; /* Common virtualization info */ 326 UINT64 Reserved; 327 328 } ACPI_TABLE_IVRS; 329 330 /* Values for Info field above */ 331 332 #define ACPI_IVRS_PHYSICAL_SIZE 0x00007F00 /* 7 bits, physical address size */ 333 #define ACPI_IVRS_VIRTUAL_SIZE 0x003F8000 /* 7 bits, virtual address size */ 334 #define ACPI_IVRS_ATS_RESERVED 0x00400000 /* ATS address translation range reserved */ 335 336 337 /* IVRS subtable header */ 338 339 typedef struct acpi_ivrs_header 340 { 341 UINT8 Type; /* Subtable type */ 342 UINT8 Flags; 343 UINT16 Length; /* Subtable length */ 344 UINT16 DeviceId; /* ID of IOMMU */ 345 346 } ACPI_IVRS_HEADER; 347 348 /* Values for subtable Type above */ 349 350 enum AcpiIvrsType 351 { 352 ACPI_IVRS_TYPE_HARDWARE = 0x10, 353 ACPI_IVRS_TYPE_MEMORY1 = 0x20, 354 ACPI_IVRS_TYPE_MEMORY2 = 0x21, 355 ACPI_IVRS_TYPE_MEMORY3 = 0x22 356 }; 357 358 /* Masks for Flags field above for IVHD subtable */ 359 360 #define ACPI_IVHD_TT_ENABLE (1) 361 #define ACPI_IVHD_PASS_PW (1<<1) 362 #define ACPI_IVHD_RES_PASS_PW (1<<2) 363 #define ACPI_IVHD_ISOC (1<<3) 364 #define ACPI_IVHD_IOTLB (1<<4) 365 366 /* Masks for Flags field above for IVMD subtable */ 367 368 #define ACPI_IVMD_UNITY (1) 369 #define ACPI_IVMD_READ (1<<1) 370 #define ACPI_IVMD_WRITE (1<<2) 371 #define ACPI_IVMD_EXCLUSION_RANGE (1<<3) 372 373 374 /* 375 * IVRS subtables, correspond to Type in ACPI_IVRS_HEADER 376 */ 377 378 /* 0x10: I/O Virtualization Hardware Definition Block (IVHD) */ 379 380 typedef struct acpi_ivrs_hardware 381 { 382 ACPI_IVRS_HEADER Header; 383 UINT16 CapabilityOffset; /* Offset for IOMMU control fields */ 384 UINT64 BaseAddress; /* IOMMU control registers */ 385 UINT16 PciSegmentGroup; 386 UINT16 Info; /* MSI number and unit ID */ 387 UINT32 Reserved; 388 389 } ACPI_IVRS_HARDWARE; 390 391 /* Masks for Info field above */ 392 393 #define ACPI_IVHD_MSI_NUMBER_MASK 0x001F /* 5 bits, MSI message number */ 394 #define ACPI_IVHD_UNIT_ID_MASK 0x1F00 /* 5 bits, UnitID */ 395 396 397 /* 398 * Device Entries for IVHD subtable, appear after ACPI_IVRS_HARDWARE structure. 399 * Upper two bits of the Type field are the (encoded) length of the structure. 400 * Currently, only 4 and 8 byte entries are defined. 16 and 32 byte entries 401 * are reserved for future use but not defined. 402 */ 403 typedef struct acpi_ivrs_de_header 404 { 405 UINT8 Type; 406 UINT16 Id; 407 UINT8 DataSetting; 408 409 } ACPI_IVRS_DE_HEADER; 410 411 /* Length of device entry is in the top two bits of Type field above */ 412 413 #define ACPI_IVHD_ENTRY_LENGTH 0xC0 414 415 /* Values for device entry Type field above */ 416 417 enum AcpiIvrsDeviceEntryType 418 { 419 /* 4-byte device entries, all use ACPI_IVRS_DEVICE4 */ 420 421 ACPI_IVRS_TYPE_PAD4 = 0, 422 ACPI_IVRS_TYPE_ALL = 1, 423 ACPI_IVRS_TYPE_SELECT = 2, 424 ACPI_IVRS_TYPE_START = 3, 425 ACPI_IVRS_TYPE_END = 4, 426 427 /* 8-byte device entries */ 428 429 ACPI_IVRS_TYPE_PAD8 = 64, 430 ACPI_IVRS_TYPE_NOT_USED = 65, 431 ACPI_IVRS_TYPE_ALIAS_SELECT = 66, /* Uses ACPI_IVRS_DEVICE8A */ 432 ACPI_IVRS_TYPE_ALIAS_START = 67, /* Uses ACPI_IVRS_DEVICE8A */ 433 ACPI_IVRS_TYPE_EXT_SELECT = 70, /* Uses ACPI_IVRS_DEVICE8B */ 434 ACPI_IVRS_TYPE_EXT_START = 71, /* Uses ACPI_IVRS_DEVICE8B */ 435 ACPI_IVRS_TYPE_SPECIAL = 72 /* Uses ACPI_IVRS_DEVICE8C */ 436 }; 437 438 /* Values for Data field above */ 439 440 #define ACPI_IVHD_INIT_PASS (1) 441 #define ACPI_IVHD_EINT_PASS (1<<1) 442 #define ACPI_IVHD_NMI_PASS (1<<2) 443 #define ACPI_IVHD_SYSTEM_MGMT (3<<4) 444 #define ACPI_IVHD_LINT0_PASS (1<<6) 445 #define ACPI_IVHD_LINT1_PASS (1<<7) 446 447 448 /* Types 0-4: 4-byte device entry */ 449 450 typedef struct acpi_ivrs_device4 451 { 452 ACPI_IVRS_DE_HEADER Header; 453 454 } ACPI_IVRS_DEVICE4; 455 456 /* Types 66-67: 8-byte device entry */ 457 458 typedef struct acpi_ivrs_device8a 459 { 460 ACPI_IVRS_DE_HEADER Header; 461 UINT8 Reserved1; 462 UINT16 UsedId; 463 UINT8 Reserved2; 464 465 } ACPI_IVRS_DEVICE8A; 466 467 /* Types 70-71: 8-byte device entry */ 468 469 typedef struct acpi_ivrs_device8b 470 { 471 ACPI_IVRS_DE_HEADER Header; 472 UINT32 ExtendedData; 473 474 } ACPI_IVRS_DEVICE8B; 475 476 /* Values for ExtendedData above */ 477 478 #define ACPI_IVHD_ATS_DISABLED (1<<31) 479 480 /* Type 72: 8-byte device entry */ 481 482 typedef struct acpi_ivrs_device8c 483 { 484 ACPI_IVRS_DE_HEADER Header; 485 UINT8 Handle; 486 UINT16 UsedId; 487 UINT8 Variety; 488 489 } ACPI_IVRS_DEVICE8C; 490 491 /* Values for Variety field above */ 492 493 #define ACPI_IVHD_IOAPIC 1 494 #define ACPI_IVHD_HPET 2 495 496 497 /* 0x20, 0x21, 0x22: I/O Virtualization Memory Definition Block (IVMD) */ 498 499 typedef struct acpi_ivrs_memory 500 { 501 ACPI_IVRS_HEADER Header; 502 UINT16 AuxData; 503 UINT64 Reserved; 504 UINT64 StartAddress; 505 UINT64 MemoryLength; 506 507 } ACPI_IVRS_MEMORY; 508 509 510 /******************************************************************************* 511 * 512 * LPIT - Low Power Idle Table 513 * 514 * Conforms to "ACPI Low Power Idle Table (LPIT)" July 2014. 515 * 516 ******************************************************************************/ 517 518 typedef struct acpi_table_lpit 519 { 520 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 521 522 } ACPI_TABLE_LPIT; 523 524 525 /* LPIT subtable header */ 526 527 typedef struct acpi_lpit_header 528 { 529 UINT32 Type; /* Subtable type */ 530 UINT32 Length; /* Subtable length */ 531 UINT16 UniqueId; 532 UINT16 Reserved; 533 UINT32 Flags; 534 535 } ACPI_LPIT_HEADER; 536 537 /* Values for subtable Type above */ 538 539 enum AcpiLpitType 540 { 541 ACPI_LPIT_TYPE_NATIVE_CSTATE = 0x00, 542 ACPI_LPIT_TYPE_RESERVED = 0x01 /* 1 and above are reserved */ 543 }; 544 545 /* Masks for Flags field above */ 546 547 #define ACPI_LPIT_STATE_DISABLED (1) 548 #define ACPI_LPIT_NO_COUNTER (1<<1) 549 550 /* 551 * LPIT subtables, correspond to Type in ACPI_LPIT_HEADER 552 */ 553 554 /* 0x00: Native C-state instruction based LPI structure */ 555 556 typedef struct acpi_lpit_native 557 { 558 ACPI_LPIT_HEADER Header; 559 ACPI_GENERIC_ADDRESS EntryTrigger; 560 UINT32 Residency; 561 UINT32 Latency; 562 ACPI_GENERIC_ADDRESS ResidencyCounter; 563 UINT64 CounterFrequency; 564 565 } ACPI_LPIT_NATIVE; 566 567 568 /******************************************************************************* 569 * 570 * MADT - Multiple APIC Description Table 571 * Version 3 572 * 573 ******************************************************************************/ 574 575 typedef struct acpi_table_madt 576 { 577 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 578 UINT32 Address; /* Physical address of local APIC */ 579 UINT32 Flags; 580 581 } ACPI_TABLE_MADT; 582 583 /* Masks for Flags field above */ 584 585 #define ACPI_MADT_PCAT_COMPAT (1) /* 00: System also has dual 8259s */ 586 587 /* Values for PCATCompat flag */ 588 589 #define ACPI_MADT_DUAL_PIC 1 590 #define ACPI_MADT_MULTIPLE_APIC 0 591 592 593 /* Values for MADT subtable type in ACPI_SUBTABLE_HEADER */ 594 595 enum AcpiMadtType 596 { 597 ACPI_MADT_TYPE_LOCAL_APIC = 0, 598 ACPI_MADT_TYPE_IO_APIC = 1, 599 ACPI_MADT_TYPE_INTERRUPT_OVERRIDE = 2, 600 ACPI_MADT_TYPE_NMI_SOURCE = 3, 601 ACPI_MADT_TYPE_LOCAL_APIC_NMI = 4, 602 ACPI_MADT_TYPE_LOCAL_APIC_OVERRIDE = 5, 603 ACPI_MADT_TYPE_IO_SAPIC = 6, 604 ACPI_MADT_TYPE_LOCAL_SAPIC = 7, 605 ACPI_MADT_TYPE_INTERRUPT_SOURCE = 8, 606 ACPI_MADT_TYPE_LOCAL_X2APIC = 9, 607 ACPI_MADT_TYPE_LOCAL_X2APIC_NMI = 10, 608 ACPI_MADT_TYPE_GENERIC_INTERRUPT = 11, 609 ACPI_MADT_TYPE_GENERIC_DISTRIBUTOR = 12, 610 ACPI_MADT_TYPE_GENERIC_MSI_FRAME = 13, 611 ACPI_MADT_TYPE_GENERIC_REDISTRIBUTOR = 14, 612 ACPI_MADT_TYPE_GENERIC_TRANSLATOR = 15, 613 ACPI_MADT_TYPE_RESERVED = 16 /* 16 and greater are reserved */ 614 }; 615 616 617 /* 618 * MADT Subtables, correspond to Type in ACPI_SUBTABLE_HEADER 619 */ 620 621 /* 0: Processor Local APIC */ 622 623 typedef struct acpi_madt_local_apic 624 { 625 ACPI_SUBTABLE_HEADER Header; 626 UINT8 ProcessorId; /* ACPI processor id */ 627 UINT8 Id; /* Processor's local APIC id */ 628 UINT32 LapicFlags; 629 630 } ACPI_MADT_LOCAL_APIC; 631 632 633 /* 1: IO APIC */ 634 635 typedef struct acpi_madt_io_apic 636 { 637 ACPI_SUBTABLE_HEADER Header; 638 UINT8 Id; /* I/O APIC ID */ 639 UINT8 Reserved; /* Reserved - must be zero */ 640 UINT32 Address; /* APIC physical address */ 641 UINT32 GlobalIrqBase; /* Global system interrupt where INTI lines start */ 642 643 } ACPI_MADT_IO_APIC; 644 645 646 /* 2: Interrupt Override */ 647 648 typedef struct acpi_madt_interrupt_override 649 { 650 ACPI_SUBTABLE_HEADER Header; 651 UINT8 Bus; /* 0 - ISA */ 652 UINT8 SourceIrq; /* Interrupt source (IRQ) */ 653 UINT32 GlobalIrq; /* Global system interrupt */ 654 UINT16 IntiFlags; 655 656 } ACPI_MADT_INTERRUPT_OVERRIDE; 657 658 659 /* 3: NMI Source */ 660 661 typedef struct acpi_madt_nmi_source 662 { 663 ACPI_SUBTABLE_HEADER Header; 664 UINT16 IntiFlags; 665 UINT32 GlobalIrq; /* Global system interrupt */ 666 667 } ACPI_MADT_NMI_SOURCE; 668 669 670 /* 4: Local APIC NMI */ 671 672 typedef struct acpi_madt_local_apic_nmi 673 { 674 ACPI_SUBTABLE_HEADER Header; 675 UINT8 ProcessorId; /* ACPI processor id */ 676 UINT16 IntiFlags; 677 UINT8 Lint; /* LINTn to which NMI is connected */ 678 679 } ACPI_MADT_LOCAL_APIC_NMI; 680 681 682 /* 5: Address Override */ 683 684 typedef struct acpi_madt_local_apic_override 685 { 686 ACPI_SUBTABLE_HEADER Header; 687 UINT16 Reserved; /* Reserved, must be zero */ 688 UINT64 Address; /* APIC physical address */ 689 690 } ACPI_MADT_LOCAL_APIC_OVERRIDE; 691 692 693 /* 6: I/O Sapic */ 694 695 typedef struct acpi_madt_io_sapic 696 { 697 ACPI_SUBTABLE_HEADER Header; 698 UINT8 Id; /* I/O SAPIC ID */ 699 UINT8 Reserved; /* Reserved, must be zero */ 700 UINT32 GlobalIrqBase; /* Global interrupt for SAPIC start */ 701 UINT64 Address; /* SAPIC physical address */ 702 703 } ACPI_MADT_IO_SAPIC; 704 705 706 /* 7: Local Sapic */ 707 708 typedef struct acpi_madt_local_sapic 709 { 710 ACPI_SUBTABLE_HEADER Header; 711 UINT8 ProcessorId; /* ACPI processor id */ 712 UINT8 Id; /* SAPIC ID */ 713 UINT8 Eid; /* SAPIC EID */ 714 UINT8 Reserved[3]; /* Reserved, must be zero */ 715 UINT32 LapicFlags; 716 UINT32 Uid; /* Numeric UID - ACPI 3.0 */ 717 char UidString[1]; /* String UID - ACPI 3.0 */ 718 719 } ACPI_MADT_LOCAL_SAPIC; 720 721 722 /* 8: Platform Interrupt Source */ 723 724 typedef struct acpi_madt_interrupt_source 725 { 726 ACPI_SUBTABLE_HEADER Header; 727 UINT16 IntiFlags; 728 UINT8 Type; /* 1=PMI, 2=INIT, 3=corrected */ 729 UINT8 Id; /* Processor ID */ 730 UINT8 Eid; /* Processor EID */ 731 UINT8 IoSapicVector; /* Vector value for PMI interrupts */ 732 UINT32 GlobalIrq; /* Global system interrupt */ 733 UINT32 Flags; /* Interrupt Source Flags */ 734 735 } ACPI_MADT_INTERRUPT_SOURCE; 736 737 /* Masks for Flags field above */ 738 739 #define ACPI_MADT_CPEI_OVERRIDE (1) 740 741 742 /* 9: Processor Local X2APIC (ACPI 4.0) */ 743 744 typedef struct acpi_madt_local_x2apic 745 { 746 ACPI_SUBTABLE_HEADER Header; 747 UINT16 Reserved; /* Reserved - must be zero */ 748 UINT32 LocalApicId; /* Processor x2APIC ID */ 749 UINT32 LapicFlags; 750 UINT32 Uid; /* ACPI processor UID */ 751 752 } ACPI_MADT_LOCAL_X2APIC; 753 754 755 /* 10: Local X2APIC NMI (ACPI 4.0) */ 756 757 typedef struct acpi_madt_local_x2apic_nmi 758 { 759 ACPI_SUBTABLE_HEADER Header; 760 UINT16 IntiFlags; 761 UINT32 Uid; /* ACPI processor UID */ 762 UINT8 Lint; /* LINTn to which NMI is connected */ 763 UINT8 Reserved[3]; /* Reserved - must be zero */ 764 765 } ACPI_MADT_LOCAL_X2APIC_NMI; 766 767 768 /* 11: Generic Interrupt (ACPI 5.0 + ACPI 6.0 changes) */ 769 770 typedef struct acpi_madt_generic_interrupt 771 { 772 ACPI_SUBTABLE_HEADER Header; 773 UINT16 Reserved; /* Reserved - must be zero */ 774 UINT32 CpuInterfaceNumber; 775 UINT32 Uid; 776 UINT32 Flags; 777 UINT32 ParkingVersion; 778 UINT32 PerformanceInterrupt; 779 UINT64 ParkedAddress; 780 UINT64 BaseAddress; 781 UINT64 GicvBaseAddress; 782 UINT64 GichBaseAddress; 783 UINT32 VgicInterrupt; 784 UINT64 GicrBaseAddress; 785 UINT64 ArmMpidr; 786 UINT8 EfficiencyClass; 787 UINT8 Reserved2[3]; 788 789 } ACPI_MADT_GENERIC_INTERRUPT; 790 791 /* Masks for Flags field above */ 792 793 /* ACPI_MADT_ENABLED (1) Processor is usable if set */ 794 #define ACPI_MADT_PERFORMANCE_IRQ_MODE (1<<1) /* 01: Performance Interrupt Mode */ 795 #define ACPI_MADT_VGIC_IRQ_MODE (1<<2) /* 02: VGIC Maintenance Interrupt mode */ 796 797 798 /* 12: Generic Distributor (ACPI 5.0 + ACPI 6.0 changes) */ 799 800 typedef struct acpi_madt_generic_distributor 801 { 802 ACPI_SUBTABLE_HEADER Header; 803 UINT16 Reserved; /* Reserved - must be zero */ 804 UINT32 GicId; 805 UINT64 BaseAddress; 806 UINT32 GlobalIrqBase; 807 UINT8 Version; 808 UINT8 Reserved2[3]; /* Reserved - must be zero */ 809 810 } ACPI_MADT_GENERIC_DISTRIBUTOR; 811 812 /* Values for Version field above */ 813 814 enum AcpiMadtGicVersion 815 { 816 ACPI_MADT_GIC_VERSION_NONE = 0, 817 ACPI_MADT_GIC_VERSION_V1 = 1, 818 ACPI_MADT_GIC_VERSION_V2 = 2, 819 ACPI_MADT_GIC_VERSION_V3 = 3, 820 ACPI_MADT_GIC_VERSION_V4 = 4, 821 ACPI_MADT_GIC_VERSION_RESERVED = 5 /* 5 and greater are reserved */ 822 }; 823 824 825 /* 13: Generic MSI Frame (ACPI 5.1) */ 826 827 typedef struct acpi_madt_generic_msi_frame 828 { 829 ACPI_SUBTABLE_HEADER Header; 830 UINT16 Reserved; /* Reserved - must be zero */ 831 UINT32 MsiFrameId; 832 UINT64 BaseAddress; 833 UINT32 Flags; 834 UINT16 SpiCount; 835 UINT16 SpiBase; 836 837 } ACPI_MADT_GENERIC_MSI_FRAME; 838 839 /* Masks for Flags field above */ 840 841 #define ACPI_MADT_OVERRIDE_SPI_VALUES (1) 842 843 844 /* 14: Generic Redistributor (ACPI 5.1) */ 845 846 typedef struct acpi_madt_generic_redistributor 847 { 848 ACPI_SUBTABLE_HEADER Header; 849 UINT16 Reserved; /* reserved - must be zero */ 850 UINT64 BaseAddress; 851 UINT32 Length; 852 853 } ACPI_MADT_GENERIC_REDISTRIBUTOR; 854 855 856 /* 15: Generic Translator (ACPI 6.0) */ 857 858 typedef struct acpi_madt_generic_translator 859 { 860 ACPI_SUBTABLE_HEADER Header; 861 UINT16 Reserved; /* reserved - must be zero */ 862 UINT32 TranslationId; 863 UINT64 BaseAddress; 864 UINT32 Reserved2; 865 866 } ACPI_MADT_GENERIC_TRANSLATOR; 867 868 869 /* 870 * Common flags fields for MADT subtables 871 */ 872 873 /* MADT Local APIC flags */ 874 875 #define ACPI_MADT_ENABLED (1) /* 00: Processor is usable if set */ 876 877 /* MADT MPS INTI flags (IntiFlags) */ 878 879 #define ACPI_MADT_POLARITY_MASK (3) /* 00-01: Polarity of APIC I/O input signals */ 880 #define ACPI_MADT_TRIGGER_MASK (3<<2) /* 02-03: Trigger mode of APIC input signals */ 881 882 /* Values for MPS INTI flags */ 883 884 #define ACPI_MADT_POLARITY_CONFORMS 0 885 #define ACPI_MADT_POLARITY_ACTIVE_HIGH 1 886 #define ACPI_MADT_POLARITY_RESERVED 2 887 #define ACPI_MADT_POLARITY_ACTIVE_LOW 3 888 889 #define ACPI_MADT_TRIGGER_CONFORMS (0) 890 #define ACPI_MADT_TRIGGER_EDGE (1<<2) 891 #define ACPI_MADT_TRIGGER_RESERVED (2<<2) 892 #define ACPI_MADT_TRIGGER_LEVEL (3<<2) 893 894 895 /******************************************************************************* 896 * 897 * MCFG - PCI Memory Mapped Configuration table and subtable 898 * Version 1 899 * 900 * Conforms to "PCI Firmware Specification", Revision 3.0, June 20, 2005 901 * 902 ******************************************************************************/ 903 904 typedef struct acpi_table_mcfg 905 { 906 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 907 UINT8 Reserved[8]; 908 909 } ACPI_TABLE_MCFG; 910 911 912 /* Subtable */ 913 914 typedef struct acpi_mcfg_allocation 915 { 916 UINT64 Address; /* Base address, processor-relative */ 917 UINT16 PciSegment; /* PCI segment group number */ 918 UINT8 StartBusNumber; /* Starting PCI Bus number */ 919 UINT8 EndBusNumber; /* Final PCI Bus number */ 920 UINT32 Reserved; 921 922 } ACPI_MCFG_ALLOCATION; 923 924 925 /******************************************************************************* 926 * 927 * MCHI - Management Controller Host Interface Table 928 * Version 1 929 * 930 * Conforms to "Management Component Transport Protocol (MCTP) Host 931 * Interface Specification", Revision 1.0.0a, October 13, 2009 932 * 933 ******************************************************************************/ 934 935 typedef struct acpi_table_mchi 936 { 937 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 938 UINT8 InterfaceType; 939 UINT8 Protocol; 940 UINT64 ProtocolData; 941 UINT8 InterruptType; 942 UINT8 Gpe; 943 UINT8 PciDeviceFlag; 944 UINT32 GlobalInterrupt; 945 ACPI_GENERIC_ADDRESS ControlRegister; 946 UINT8 PciSegment; 947 UINT8 PciBus; 948 UINT8 PciDevice; 949 UINT8 PciFunction; 950 951 } ACPI_TABLE_MCHI; 952 953 954 /******************************************************************************* 955 * 956 * MPST - Memory Power State Table (ACPI 5.0) 957 * Version 1 958 * 959 ******************************************************************************/ 960 961 #define ACPI_MPST_CHANNEL_INFO \ 962 UINT8 ChannelId; \ 963 UINT8 Reserved1[3]; \ 964 UINT16 PowerNodeCount; \ 965 UINT16 Reserved2; 966 967 /* Main table */ 968 969 typedef struct acpi_table_mpst 970 { 971 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 972 ACPI_MPST_CHANNEL_INFO /* Platform Communication Channel */ 973 974 } ACPI_TABLE_MPST; 975 976 977 /* Memory Platform Communication Channel Info */ 978 979 typedef struct acpi_mpst_channel 980 { 981 ACPI_MPST_CHANNEL_INFO /* Platform Communication Channel */ 982 983 } ACPI_MPST_CHANNEL; 984 985 986 /* Memory Power Node Structure */ 987 988 typedef struct acpi_mpst_power_node 989 { 990 UINT8 Flags; 991 UINT8 Reserved1; 992 UINT16 NodeId; 993 UINT32 Length; 994 UINT64 RangeAddress; 995 UINT64 RangeLength; 996 UINT32 NumPowerStates; 997 UINT32 NumPhysicalComponents; 998 999 } ACPI_MPST_POWER_NODE; 1000 1001 /* Values for Flags field above */ 1002 1003 #define ACPI_MPST_ENABLED 1 1004 #define ACPI_MPST_POWER_MANAGED 2 1005 #define ACPI_MPST_HOT_PLUG_CAPABLE 4 1006 1007 1008 /* Memory Power State Structure (follows POWER_NODE above) */ 1009 1010 typedef struct acpi_mpst_power_state 1011 { 1012 UINT8 PowerState; 1013 UINT8 InfoIndex; 1014 1015 } ACPI_MPST_POWER_STATE; 1016 1017 1018 /* Physical Component ID Structure (follows POWER_STATE above) */ 1019 1020 typedef struct acpi_mpst_component 1021 { 1022 UINT16 ComponentId; 1023 1024 } ACPI_MPST_COMPONENT; 1025 1026 1027 /* Memory Power State Characteristics Structure (follows all POWER_NODEs) */ 1028 1029 typedef struct acpi_mpst_data_hdr 1030 { 1031 UINT16 CharacteristicsCount; 1032 UINT16 Reserved; 1033 1034 } ACPI_MPST_DATA_HDR; 1035 1036 typedef struct acpi_mpst_power_data 1037 { 1038 UINT8 StructureId; 1039 UINT8 Flags; 1040 UINT16 Reserved1; 1041 UINT32 AveragePower; 1042 UINT32 PowerSaving; 1043 UINT64 ExitLatency; 1044 UINT64 Reserved2; 1045 1046 } ACPI_MPST_POWER_DATA; 1047 1048 /* Values for Flags field above */ 1049 1050 #define ACPI_MPST_PRESERVE 1 1051 #define ACPI_MPST_AUTOENTRY 2 1052 #define ACPI_MPST_AUTOEXIT 4 1053 1054 1055 /* Shared Memory Region (not part of an ACPI table) */ 1056 1057 typedef struct acpi_mpst_shared 1058 { 1059 UINT32 Signature; 1060 UINT16 PccCommand; 1061 UINT16 PccStatus; 1062 UINT32 CommandRegister; 1063 UINT32 StatusRegister; 1064 UINT32 PowerStateId; 1065 UINT32 PowerNodeId; 1066 UINT64 EnergyConsumed; 1067 UINT64 AveragePower; 1068 1069 } ACPI_MPST_SHARED; 1070 1071 1072 /******************************************************************************* 1073 * 1074 * MSCT - Maximum System Characteristics Table (ACPI 4.0) 1075 * Version 1 1076 * 1077 ******************************************************************************/ 1078 1079 typedef struct acpi_table_msct 1080 { 1081 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1082 UINT32 ProximityOffset; /* Location of proximity info struct(s) */ 1083 UINT32 MaxProximityDomains;/* Max number of proximity domains */ 1084 UINT32 MaxClockDomains; /* Max number of clock domains */ 1085 UINT64 MaxAddress; /* Max physical address in system */ 1086 1087 } ACPI_TABLE_MSCT; 1088 1089 1090 /* Subtable - Maximum Proximity Domain Information. Version 1 */ 1091 1092 typedef struct acpi_msct_proximity 1093 { 1094 UINT8 Revision; 1095 UINT8 Length; 1096 UINT32 RangeStart; /* Start of domain range */ 1097 UINT32 RangeEnd; /* End of domain range */ 1098 UINT32 ProcessorCapacity; 1099 UINT64 MemoryCapacity; /* In bytes */ 1100 1101 } ACPI_MSCT_PROXIMITY; 1102 1103 1104 /******************************************************************************* 1105 * 1106 * MSDM - Microsoft Data Management table 1107 * 1108 * Conforms to "Microsoft Software Licensing Tables (SLIC and MSDM)", 1109 * November 29, 2011. Copyright 2011 Microsoft 1110 * 1111 ******************************************************************************/ 1112 1113 /* Basic MSDM table is only the common ACPI header */ 1114 1115 typedef struct acpi_table_msdm 1116 { 1117 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1118 1119 } ACPI_TABLE_MSDM; 1120 1121 1122 /******************************************************************************* 1123 * 1124 * MTMR - MID Timer Table 1125 * Version 1 1126 * 1127 * Conforms to "Simple Firmware Interface Specification", 1128 * Draft 0.8.2, Oct 19, 2010 1129 * NOTE: The ACPI MTMR is equivalent to the SFI MTMR table. 1130 * 1131 ******************************************************************************/ 1132 1133 typedef struct acpi_table_mtmr 1134 { 1135 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1136 1137 } ACPI_TABLE_MTMR; 1138 1139 /* MTMR entry */ 1140 1141 typedef struct acpi_mtmr_entry 1142 { 1143 ACPI_GENERIC_ADDRESS PhysicalAddress; 1144 UINT32 Frequency; 1145 UINT32 Irq; 1146 1147 } ACPI_MTMR_ENTRY; 1148 1149 1150 /******************************************************************************* 1151 * 1152 * NFIT - NVDIMM Interface Table (ACPI 6.0+) 1153 * Version 1 1154 * 1155 ******************************************************************************/ 1156 1157 typedef struct acpi_table_nfit 1158 { 1159 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1160 UINT32 Reserved; /* Reserved, must be zero */ 1161 1162 } ACPI_TABLE_NFIT; 1163 1164 /* Subtable header for NFIT */ 1165 1166 typedef struct acpi_nfit_header 1167 { 1168 UINT16 Type; 1169 UINT16 Length; 1170 1171 } ACPI_NFIT_HEADER; 1172 1173 1174 /* Values for subtable type in ACPI_NFIT_HEADER */ 1175 1176 enum AcpiNfitType 1177 { 1178 ACPI_NFIT_TYPE_SYSTEM_ADDRESS = 0, 1179 ACPI_NFIT_TYPE_MEMORY_MAP = 1, 1180 ACPI_NFIT_TYPE_INTERLEAVE = 2, 1181 ACPI_NFIT_TYPE_SMBIOS = 3, 1182 ACPI_NFIT_TYPE_CONTROL_REGION = 4, 1183 ACPI_NFIT_TYPE_DATA_REGION = 5, 1184 ACPI_NFIT_TYPE_FLUSH_ADDRESS = 6, 1185 ACPI_NFIT_TYPE_CAPABILITIES = 7, 1186 ACPI_NFIT_TYPE_RESERVED = 8 /* 8 and greater are reserved */ 1187 }; 1188 1189 /* 1190 * NFIT Subtables 1191 */ 1192 1193 /* 0: System Physical Address Range Structure */ 1194 1195 typedef struct acpi_nfit_system_address 1196 { 1197 ACPI_NFIT_HEADER Header; 1198 UINT16 RangeIndex; 1199 UINT16 Flags; 1200 UINT32 Reserved; /* Reserved, must be zero */ 1201 UINT32 ProximityDomain; 1202 UINT8 RangeGuid[16]; 1203 UINT64 Address; 1204 UINT64 Length; 1205 UINT64 MemoryMapping; 1206 1207 } ACPI_NFIT_SYSTEM_ADDRESS; 1208 1209 /* Flags */ 1210 1211 #define ACPI_NFIT_ADD_ONLINE_ONLY (1) /* 00: Add/Online Operation Only */ 1212 #define ACPI_NFIT_PROXIMITY_VALID (1<<1) /* 01: Proximity Domain Valid */ 1213 1214 /* Range Type GUIDs appear in the include/acuuid.h file */ 1215 1216 1217 /* 1: Memory Device to System Address Range Map Structure */ 1218 1219 typedef struct acpi_nfit_memory_map 1220 { 1221 ACPI_NFIT_HEADER Header; 1222 UINT32 DeviceHandle; 1223 UINT16 PhysicalId; 1224 UINT16 RegionId; 1225 UINT16 RangeIndex; 1226 UINT16 RegionIndex; 1227 UINT64 RegionSize; 1228 UINT64 RegionOffset; 1229 UINT64 Address; 1230 UINT16 InterleaveIndex; 1231 UINT16 InterleaveWays; 1232 UINT16 Flags; 1233 UINT16 Reserved; /* Reserved, must be zero */ 1234 1235 } ACPI_NFIT_MEMORY_MAP; 1236 1237 /* Flags */ 1238 1239 #define ACPI_NFIT_MEM_SAVE_FAILED (1) /* 00: Last SAVE to Memory Device failed */ 1240 #define ACPI_NFIT_MEM_RESTORE_FAILED (1<<1) /* 01: Last RESTORE from Memory Device failed */ 1241 #define ACPI_NFIT_MEM_FLUSH_FAILED (1<<2) /* 02: Platform flush failed */ 1242 #define ACPI_NFIT_MEM_NOT_ARMED (1<<3) /* 03: Memory Device is not armed */ 1243 #define ACPI_NFIT_MEM_HEALTH_OBSERVED (1<<4) /* 04: Memory Device observed SMART/health events */ 1244 #define ACPI_NFIT_MEM_HEALTH_ENABLED (1<<5) /* 05: SMART/health events enabled */ 1245 #define ACPI_NFIT_MEM_MAP_FAILED (1<<6) /* 06: Mapping to SPA failed */ 1246 1247 1248 /* 2: Interleave Structure */ 1249 1250 typedef struct acpi_nfit_interleave 1251 { 1252 ACPI_NFIT_HEADER Header; 1253 UINT16 InterleaveIndex; 1254 UINT16 Reserved; /* Reserved, must be zero */ 1255 UINT32 LineCount; 1256 UINT32 LineSize; 1257 UINT32 LineOffset[1]; /* Variable length */ 1258 1259 } ACPI_NFIT_INTERLEAVE; 1260 1261 1262 /* 3: SMBIOS Management Information Structure */ 1263 1264 typedef struct acpi_nfit_smbios 1265 { 1266 ACPI_NFIT_HEADER Header; 1267 UINT32 Reserved; /* Reserved, must be zero */ 1268 UINT8 Data[1]; /* Variable length */ 1269 1270 } ACPI_NFIT_SMBIOS; 1271 1272 1273 /* 4: NVDIMM Control Region Structure */ 1274 1275 typedef struct acpi_nfit_control_region 1276 { 1277 ACPI_NFIT_HEADER Header; 1278 UINT16 RegionIndex; 1279 UINT16 VendorId; 1280 UINT16 DeviceId; 1281 UINT16 RevisionId; 1282 UINT16 SubsystemVendorId; 1283 UINT16 SubsystemDeviceId; 1284 UINT16 SubsystemRevisionId; 1285 UINT8 ValidFields; 1286 UINT8 ManufacturingLocation; 1287 UINT16 ManufacturingDate; 1288 UINT8 Reserved[2]; /* Reserved, must be zero */ 1289 UINT32 SerialNumber; 1290 UINT16 Code; 1291 UINT16 Windows; 1292 UINT64 WindowSize; 1293 UINT64 CommandOffset; 1294 UINT64 CommandSize; 1295 UINT64 StatusOffset; 1296 UINT64 StatusSize; 1297 UINT16 Flags; 1298 UINT8 Reserved1[6]; /* Reserved, must be zero */ 1299 1300 } ACPI_NFIT_CONTROL_REGION; 1301 1302 /* Flags */ 1303 1304 #define ACPI_NFIT_CONTROL_BUFFERED (1) /* Block Data Windows implementation is buffered */ 1305 1306 /* ValidFields bits */ 1307 1308 #define ACPI_NFIT_CONTROL_MFG_INFO_VALID (1) /* Manufacturing fields are valid */ 1309 1310 1311 /* 5: NVDIMM Block Data Window Region Structure */ 1312 1313 typedef struct acpi_nfit_data_region 1314 { 1315 ACPI_NFIT_HEADER Header; 1316 UINT16 RegionIndex; 1317 UINT16 Windows; 1318 UINT64 Offset; 1319 UINT64 Size; 1320 UINT64 Capacity; 1321 UINT64 StartAddress; 1322 1323 } ACPI_NFIT_DATA_REGION; 1324 1325 1326 /* 6: Flush Hint Address Structure */ 1327 1328 typedef struct acpi_nfit_flush_address 1329 { 1330 ACPI_NFIT_HEADER Header; 1331 UINT32 DeviceHandle; 1332 UINT16 HintCount; 1333 UINT8 Reserved[6]; /* Reserved, must be zero */ 1334 UINT64 HintAddress[1]; /* Variable length */ 1335 1336 } ACPI_NFIT_FLUSH_ADDRESS; 1337 1338 1339 /* 7: Platform Capabilities Structure */ 1340 1341 typedef struct acpi_nfit_capabilities 1342 { 1343 ACPI_NFIT_HEADER Header; 1344 UINT8 HighestCapability; 1345 UINT8 Reserved[3]; /* Reserved, must be zero */ 1346 UINT32 Capabilities; 1347 UINT32 Reserved2; 1348 1349 } ACPI_NFIT_CAPABILITIES; 1350 1351 /* Capabilities Flags */ 1352 1353 #define ACPI_NFIT_CAPABILITY_CACHE_FLUSH (1) /* 00: Cache Flush to NVDIMM capable */ 1354 #define ACPI_NFIT_CAPABILITY_MEM_FLUSH (1<<1) /* 01: Memory Flush to NVDIMM capable */ 1355 #define ACPI_NFIT_CAPABILITY_MEM_MIRRORING (1<<2) /* 02: Memory Mirroring capable */ 1356 1357 1358 /* 1359 * NFIT/DVDIMM device handle support - used as the _ADR for each NVDIMM 1360 */ 1361 typedef struct nfit_device_handle 1362 { 1363 UINT32 Handle; 1364 1365 } NFIT_DEVICE_HANDLE; 1366 1367 /* Device handle construction and extraction macros */ 1368 1369 #define ACPI_NFIT_DIMM_NUMBER_MASK 0x0000000F 1370 #define ACPI_NFIT_CHANNEL_NUMBER_MASK 0x000000F0 1371 #define ACPI_NFIT_MEMORY_ID_MASK 0x00000F00 1372 #define ACPI_NFIT_SOCKET_ID_MASK 0x0000F000 1373 #define ACPI_NFIT_NODE_ID_MASK 0x0FFF0000 1374 1375 #define ACPI_NFIT_DIMM_NUMBER_OFFSET 0 1376 #define ACPI_NFIT_CHANNEL_NUMBER_OFFSET 4 1377 #define ACPI_NFIT_MEMORY_ID_OFFSET 8 1378 #define ACPI_NFIT_SOCKET_ID_OFFSET 12 1379 #define ACPI_NFIT_NODE_ID_OFFSET 16 1380 1381 /* Macro to construct a NFIT/NVDIMM device handle */ 1382 1383 #define ACPI_NFIT_BUILD_DEVICE_HANDLE(dimm, channel, memory, socket, node) \ 1384 ((dimm) | \ 1385 ((channel) << ACPI_NFIT_CHANNEL_NUMBER_OFFSET) | \ 1386 ((memory) << ACPI_NFIT_MEMORY_ID_OFFSET) | \ 1387 ((socket) << ACPI_NFIT_SOCKET_ID_OFFSET) | \ 1388 ((node) << ACPI_NFIT_NODE_ID_OFFSET)) 1389 1390 /* Macros to extract individual fields from a NFIT/NVDIMM device handle */ 1391 1392 #define ACPI_NFIT_GET_DIMM_NUMBER(handle) \ 1393 ((handle) & ACPI_NFIT_DIMM_NUMBER_MASK) 1394 1395 #define ACPI_NFIT_GET_CHANNEL_NUMBER(handle) \ 1396 (((handle) & ACPI_NFIT_CHANNEL_NUMBER_MASK) >> ACPI_NFIT_CHANNEL_NUMBER_OFFSET) 1397 1398 #define ACPI_NFIT_GET_MEMORY_ID(handle) \ 1399 (((handle) & ACPI_NFIT_MEMORY_ID_MASK) >> ACPI_NFIT_MEMORY_ID_OFFSET) 1400 1401 #define ACPI_NFIT_GET_SOCKET_ID(handle) \ 1402 (((handle) & ACPI_NFIT_SOCKET_ID_MASK) >> ACPI_NFIT_SOCKET_ID_OFFSET) 1403 1404 #define ACPI_NFIT_GET_NODE_ID(handle) \ 1405 (((handle) & ACPI_NFIT_NODE_ID_MASK) >> ACPI_NFIT_NODE_ID_OFFSET) 1406 1407 1408 /******************************************************************************* 1409 * 1410 * PCCT - Platform Communications Channel Table (ACPI 5.0) 1411 * Version 2 (ACPI 6.2) 1412 * 1413 ******************************************************************************/ 1414 1415 typedef struct acpi_table_pcct 1416 { 1417 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1418 UINT32 Flags; 1419 UINT64 Reserved; 1420 1421 } ACPI_TABLE_PCCT; 1422 1423 /* Values for Flags field above */ 1424 1425 #define ACPI_PCCT_DOORBELL 1 1426 1427 /* Values for subtable type in ACPI_SUBTABLE_HEADER */ 1428 1429 enum AcpiPcctType 1430 { 1431 ACPI_PCCT_TYPE_GENERIC_SUBSPACE = 0, 1432 ACPI_PCCT_TYPE_HW_REDUCED_SUBSPACE = 1, 1433 ACPI_PCCT_TYPE_HW_REDUCED_SUBSPACE_TYPE2 = 2, /* ACPI 6.1 */ 1434 ACPI_PCCT_TYPE_EXT_PCC_MASTER_SUBSPACE = 3, /* ACPI 6.2 */ 1435 ACPI_PCCT_TYPE_EXT_PCC_SLAVE_SUBSPACE = 4, /* ACPI 6.2 */ 1436 ACPI_PCCT_TYPE_RESERVED = 5 /* 5 and greater are reserved */ 1437 }; 1438 1439 /* 1440 * PCCT Subtables, correspond to Type in ACPI_SUBTABLE_HEADER 1441 */ 1442 1443 /* 0: Generic Communications Subspace */ 1444 1445 typedef struct acpi_pcct_subspace 1446 { 1447 ACPI_SUBTABLE_HEADER Header; 1448 UINT8 Reserved[6]; 1449 UINT64 BaseAddress; 1450 UINT64 Length; 1451 ACPI_GENERIC_ADDRESS DoorbellRegister; 1452 UINT64 PreserveMask; 1453 UINT64 WriteMask; 1454 UINT32 Latency; 1455 UINT32 MaxAccessRate; 1456 UINT16 MinTurnaroundTime; 1457 1458 } ACPI_PCCT_SUBSPACE; 1459 1460 1461 /* 1: HW-reduced Communications Subspace (ACPI 5.1) */ 1462 1463 typedef struct acpi_pcct_hw_reduced 1464 { 1465 ACPI_SUBTABLE_HEADER Header; 1466 UINT32 PlatformInterrupt; 1467 UINT8 Flags; 1468 UINT8 Reserved; 1469 UINT64 BaseAddress; 1470 UINT64 Length; 1471 ACPI_GENERIC_ADDRESS DoorbellRegister; 1472 UINT64 PreserveMask; 1473 UINT64 WriteMask; 1474 UINT32 Latency; 1475 UINT32 MaxAccessRate; 1476 UINT16 MinTurnaroundTime; 1477 1478 } ACPI_PCCT_HW_REDUCED; 1479 1480 1481 /* 2: HW-reduced Communications Subspace Type 2 (ACPI 6.1) */ 1482 1483 typedef struct acpi_pcct_hw_reduced_type2 1484 { 1485 ACPI_SUBTABLE_HEADER Header; 1486 UINT32 PlatformInterrupt; 1487 UINT8 Flags; 1488 UINT8 Reserved; 1489 UINT64 BaseAddress; 1490 UINT64 Length; 1491 ACPI_GENERIC_ADDRESS DoorbellRegister; 1492 UINT64 PreserveMask; 1493 UINT64 WriteMask; 1494 UINT32 Latency; 1495 UINT32 MaxAccessRate; 1496 UINT16 MinTurnaroundTime; 1497 ACPI_GENERIC_ADDRESS PlatformAckRegister; 1498 UINT64 AckPreserveMask; 1499 UINT64 AckWriteMask; 1500 1501 } ACPI_PCCT_HW_REDUCED_TYPE2; 1502 1503 1504 /* 3: Extended PCC Master Subspace Type 3 (ACPI 6.2) */ 1505 1506 typedef struct acpi_pcct_ext_pcc_master 1507 { 1508 ACPI_SUBTABLE_HEADER Header; 1509 UINT32 PlatformInterrupt; 1510 UINT8 Flags; 1511 UINT8 Reserved1; 1512 UINT64 BaseAddress; 1513 UINT32 Length; 1514 ACPI_GENERIC_ADDRESS DoorbellRegister; 1515 UINT64 PreserveMask; 1516 UINT64 WriteMask; 1517 UINT32 Latency; 1518 UINT32 MaxAccessRate; 1519 UINT32 MinTurnaroundTime; 1520 ACPI_GENERIC_ADDRESS PlatformAckRegister; 1521 UINT64 AckPreserveMask; 1522 UINT64 AckSetMask; 1523 UINT64 Reserved2; 1524 ACPI_GENERIC_ADDRESS CmdCompleteRegister; 1525 UINT64 CmdCompleteMask; 1526 ACPI_GENERIC_ADDRESS CmdUpdateRegister; 1527 UINT64 CmdUpdatePreserveMask; 1528 UINT64 CmdUpdateSetMask; 1529 ACPI_GENERIC_ADDRESS ErrorStatusRegister; 1530 UINT64 ErrorStatusMask; 1531 1532 } ACPI_PCCT_EXT_PCC_MASTER; 1533 1534 1535 /* 4: Extended PCC Slave Subspace Type 4 (ACPI 6.2) */ 1536 1537 typedef struct acpi_pcct_ext_pcc_slave 1538 { 1539 ACPI_SUBTABLE_HEADER Header; 1540 UINT32 PlatformInterrupt; 1541 UINT8 Flags; 1542 UINT8 Reserved1; 1543 UINT64 BaseAddress; 1544 UINT32 Length; 1545 ACPI_GENERIC_ADDRESS DoorbellRegister; 1546 UINT64 PreserveMask; 1547 UINT64 WriteMask; 1548 UINT32 Latency; 1549 UINT32 MaxAccessRate; 1550 UINT32 MinTurnaroundTime; 1551 ACPI_GENERIC_ADDRESS PlatformAckRegister; 1552 UINT64 AckPreserveMask; 1553 UINT64 AckSetMask; 1554 UINT64 Reserved2; 1555 ACPI_GENERIC_ADDRESS CmdCompleteRegister; 1556 UINT64 CmdCompleteMask; 1557 ACPI_GENERIC_ADDRESS CmdUpdateRegister; 1558 UINT64 CmdUpdatePreserveMask; 1559 UINT64 CmdUpdateSetMask; 1560 ACPI_GENERIC_ADDRESS ErrorStatusRegister; 1561 UINT64 ErrorStatusMask; 1562 1563 } ACPI_PCCT_EXT_PCC_SLAVE; 1564 1565 1566 /* Values for doorbell flags above */ 1567 1568 #define ACPI_PCCT_INTERRUPT_POLARITY (1) 1569 #define ACPI_PCCT_INTERRUPT_MODE (1<<1) 1570 1571 1572 /* 1573 * PCC memory structures (not part of the ACPI table) 1574 */ 1575 1576 /* Shared Memory Region */ 1577 1578 typedef struct acpi_pcct_shared_memory 1579 { 1580 UINT32 Signature; 1581 UINT16 Command; 1582 UINT16 Status; 1583 1584 } ACPI_PCCT_SHARED_MEMORY; 1585 1586 1587 /* Extended PCC Subspace Shared Memory Region (ACPI 6.2) */ 1588 1589 typedef struct acpi_pcct_ext_pcc_shared_memory 1590 { 1591 UINT32 Signature; 1592 UINT32 Flags; 1593 UINT32 Length; 1594 UINT32 Command; 1595 1596 } ACPI_PCCT_EXT_PCC_SHARED_MEMORY; 1597 1598 1599 /******************************************************************************* 1600 * 1601 * PDTT - Platform Debug Trigger Table (ACPI 6.2) 1602 * Version 0 1603 * 1604 ******************************************************************************/ 1605 1606 typedef struct acpi_table_pdtt 1607 { 1608 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1609 UINT8 TriggerCount; 1610 UINT8 Reserved[3]; 1611 UINT32 ArrayOffset; 1612 1613 } ACPI_TABLE_PDTT; 1614 1615 1616 /* 1617 * PDTT Communication Channel Identifier Structure. 1618 * The number of these structures is defined by TriggerCount above, 1619 * starting at ArrayOffset. 1620 */ 1621 typedef struct acpi_pdtt_channel 1622 { 1623 UINT8 SubchannelId; 1624 UINT8 Flags; 1625 1626 } ACPI_PDTT_CHANNEL; 1627 1628 /* Flags for above */ 1629 1630 #define ACPI_PDTT_RUNTIME_TRIGGER (1) 1631 #define ACPI_PDTT_WAIT_COMPLETION (1<<1) 1632 1633 1634 /******************************************************************************* 1635 * 1636 * PMTT - Platform Memory Topology Table (ACPI 5.0) 1637 * Version 1 1638 * 1639 ******************************************************************************/ 1640 1641 typedef struct acpi_table_pmtt 1642 { 1643 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1644 UINT32 Reserved; 1645 1646 } ACPI_TABLE_PMTT; 1647 1648 1649 /* Common header for PMTT subtables that follow main table */ 1650 1651 typedef struct acpi_pmtt_header 1652 { 1653 UINT8 Type; 1654 UINT8 Reserved1; 1655 UINT16 Length; 1656 UINT16 Flags; 1657 UINT16 Reserved2; 1658 1659 } ACPI_PMTT_HEADER; 1660 1661 /* Values for Type field above */ 1662 1663 #define ACPI_PMTT_TYPE_SOCKET 0 1664 #define ACPI_PMTT_TYPE_CONTROLLER 1 1665 #define ACPI_PMTT_TYPE_DIMM 2 1666 #define ACPI_PMTT_TYPE_RESERVED 3 /* 0x03-0xFF are reserved */ 1667 1668 /* Values for Flags field above */ 1669 1670 #define ACPI_PMTT_TOP_LEVEL 0x0001 1671 #define ACPI_PMTT_PHYSICAL 0x0002 1672 #define ACPI_PMTT_MEMORY_TYPE 0x000C 1673 1674 1675 /* 1676 * PMTT subtables, correspond to Type in acpi_pmtt_header 1677 */ 1678 1679 1680 /* 0: Socket Structure */ 1681 1682 typedef struct acpi_pmtt_socket 1683 { 1684 ACPI_PMTT_HEADER Header; 1685 UINT16 SocketId; 1686 UINT16 Reserved; 1687 1688 } ACPI_PMTT_SOCKET; 1689 1690 1691 /* 1: Memory Controller subtable */ 1692 1693 typedef struct acpi_pmtt_controller 1694 { 1695 ACPI_PMTT_HEADER Header; 1696 UINT32 ReadLatency; 1697 UINT32 WriteLatency; 1698 UINT32 ReadBandwidth; 1699 UINT32 WriteBandwidth; 1700 UINT16 AccessWidth; 1701 UINT16 Alignment; 1702 UINT16 Reserved; 1703 UINT16 DomainCount; 1704 1705 } ACPI_PMTT_CONTROLLER; 1706 1707 /* 1a: Proximity Domain substructure */ 1708 1709 typedef struct acpi_pmtt_domain 1710 { 1711 UINT32 ProximityDomain; 1712 1713 } ACPI_PMTT_DOMAIN; 1714 1715 1716 /* 2: Physical Component Identifier (DIMM) */ 1717 1718 typedef struct acpi_pmtt_physical_component 1719 { 1720 ACPI_PMTT_HEADER Header; 1721 UINT16 ComponentId; 1722 UINT16 Reserved; 1723 UINT32 MemorySize; 1724 UINT32 BiosHandle; 1725 1726 } ACPI_PMTT_PHYSICAL_COMPONENT; 1727 1728 1729 /******************************************************************************* 1730 * 1731 * PPTT - Processor Properties Topology Table (ACPI 6.2) 1732 * Version 1 1733 * 1734 ******************************************************************************/ 1735 1736 typedef struct acpi_table_pptt 1737 { 1738 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1739 1740 } ACPI_TABLE_PPTT; 1741 1742 /* Values for Type field above */ 1743 1744 enum AcpiPpttType 1745 { 1746 ACPI_PPTT_TYPE_PROCESSOR = 0, 1747 ACPI_PPTT_TYPE_CACHE = 1, 1748 ACPI_PPTT_TYPE_ID = 2, 1749 ACPI_PPTT_TYPE_RESERVED = 3 1750 }; 1751 1752 1753 /* 0: Processor Hierarchy Node Structure */ 1754 1755 typedef struct acpi_pptt_processor 1756 { 1757 ACPI_SUBTABLE_HEADER Header; 1758 UINT16 Reserved; 1759 UINT32 Flags; 1760 UINT32 Parent; 1761 UINT32 AcpiProcessorId; 1762 UINT32 NumberOfPrivResources; 1763 1764 } ACPI_PPTT_PROCESSOR; 1765 1766 /* Flags */ 1767 1768 #define ACPI_PPTT_PHYSICAL_PACKAGE (1) /* Physical package */ 1769 #define ACPI_PPTT_ACPI_PROCESSOR_ID_VALID (2) /* ACPI Processor ID valid */ 1770 1771 1772 /* 1: Cache Type Structure */ 1773 1774 typedef struct acpi_pptt_cache 1775 { 1776 ACPI_SUBTABLE_HEADER Header; 1777 UINT16 Reserved; 1778 UINT32 Flags; 1779 UINT32 NextLevelOfCache; 1780 UINT32 Size; 1781 UINT32 NumberOfSets; 1782 UINT8 Associativity; 1783 UINT8 Attributes; 1784 UINT16 LineSize; 1785 1786 } ACPI_PPTT_CACHE; 1787 1788 /* Flags */ 1789 1790 #define ACPI_PPTT_SIZE_PROPERTY_VALID (1) /* Physical property valid */ 1791 #define ACPI_PPTT_NUMBER_OF_SETS_VALID (1<<1) /* Number of sets valid */ 1792 #define ACPI_PPTT_ASSOCIATIVITY_VALID (1<<2) /* Associativity valid */ 1793 #define ACPI_PPTT_ALLOCATION_TYPE_VALID (1<<3) /* Allocation type valid */ 1794 #define ACPI_PPTT_CACHE_TYPE_VALID (1<<4) /* Cache type valid */ 1795 #define ACPI_PPTT_WRITE_POLICY_VALID (1<<5) /* Write policy valid */ 1796 #define ACPI_PPTT_LINE_SIZE_VALID (1<<6) /* Line size valid */ 1797 1798 /* Masks for Attributes */ 1799 1800 #define ACPI_PPTT_MASK_ALLOCATION_TYPE (0x03) /* Allocation type */ 1801 #define ACPI_PPTT_MASK_CACHE_TYPE (0x0C) /* Cache type */ 1802 #define ACPI_PPTT_MASK_WRITE_POLICY (0x10) /* Write policy */ 1803 1804 /* Attributes describing cache */ 1805 #define ACPI_PPTT_CACHE_READ_ALLOCATE (0x0) /* Cache line is allocated on read */ 1806 #define ACPI_PPTT_CACHE_WRITE_ALLOCATE (0x01) /* Cache line is allocated on write */ 1807 #define ACPI_PPTT_CACHE_RW_ALLOCATE (0x02) /* Cache line is allocated on read and write */ 1808 #define ACPI_PPTT_CACHE_RW_ALLOCATE_ALT (0x03) /* Alternate representation of above */ 1809 1810 #define ACPI_PPTT_CACHE_TYPE_DATA (0x0) /* Data cache */ 1811 #define ACPI_PPTT_CACHE_TYPE_INSTR (1<<2) /* Instruction cache */ 1812 #define ACPI_PPTT_CACHE_TYPE_UNIFIED (2<<2) /* Unified I & D cache */ 1813 #define ACPI_PPTT_CACHE_TYPE_UNIFIED_ALT (3<<2) /* Alternate representation of above */ 1814 1815 #define ACPI_PPTT_CACHE_POLICY_WB (0x0) /* Cache is write back */ 1816 #define ACPI_PPTT_CACHE_POLICY_WT (1<<4) /* Cache is write through */ 1817 1818 /* 2: ID Structure */ 1819 1820 typedef struct acpi_pptt_id 1821 { 1822 ACPI_SUBTABLE_HEADER Header; 1823 UINT16 Reserved; 1824 UINT32 VendorId; 1825 UINT64 Level1Id; 1826 UINT64 Level2Id; 1827 UINT16 MajorRev; 1828 UINT16 MinorRev; 1829 UINT16 SpinRev; 1830 1831 } ACPI_PPTT_ID; 1832 1833 1834 /******************************************************************************* 1835 * 1836 * RASF - RAS Feature Table (ACPI 5.0) 1837 * Version 1 1838 * 1839 ******************************************************************************/ 1840 1841 typedef struct acpi_table_rasf 1842 { 1843 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1844 UINT8 ChannelId[12]; 1845 1846 } ACPI_TABLE_RASF; 1847 1848 /* RASF Platform Communication Channel Shared Memory Region */ 1849 1850 typedef struct acpi_rasf_shared_memory 1851 { 1852 UINT32 Signature; 1853 UINT16 Command; 1854 UINT16 Status; 1855 UINT16 Version; 1856 UINT8 Capabilities[16]; 1857 UINT8 SetCapabilities[16]; 1858 UINT16 NumParameterBlocks; 1859 UINT32 SetCapabilitiesStatus; 1860 1861 } ACPI_RASF_SHARED_MEMORY; 1862 1863 /* RASF Parameter Block Structure Header */ 1864 1865 typedef struct acpi_rasf_parameter_block 1866 { 1867 UINT16 Type; 1868 UINT16 Version; 1869 UINT16 Length; 1870 1871 } ACPI_RASF_PARAMETER_BLOCK; 1872 1873 /* RASF Parameter Block Structure for PATROL_SCRUB */ 1874 1875 typedef struct acpi_rasf_patrol_scrub_parameter 1876 { 1877 ACPI_RASF_PARAMETER_BLOCK Header; 1878 UINT16 PatrolScrubCommand; 1879 UINT64 RequestedAddressRange[2]; 1880 UINT64 ActualAddressRange[2]; 1881 UINT16 Flags; 1882 UINT8 RequestedSpeed; 1883 1884 } ACPI_RASF_PATROL_SCRUB_PARAMETER; 1885 1886 /* Masks for Flags and Speed fields above */ 1887 1888 #define ACPI_RASF_SCRUBBER_RUNNING 1 1889 #define ACPI_RASF_SPEED (7<<1) 1890 #define ACPI_RASF_SPEED_SLOW (0<<1) 1891 #define ACPI_RASF_SPEED_MEDIUM (4<<1) 1892 #define ACPI_RASF_SPEED_FAST (7<<1) 1893 1894 /* Channel Commands */ 1895 1896 enum AcpiRasfCommands 1897 { 1898 ACPI_RASF_EXECUTE_RASF_COMMAND = 1 1899 }; 1900 1901 /* Platform RAS Capabilities */ 1902 1903 enum AcpiRasfCapabiliities 1904 { 1905 ACPI_HW_PATROL_SCRUB_SUPPORTED = 0, 1906 ACPI_SW_PATROL_SCRUB_EXPOSED = 1 1907 }; 1908 1909 /* Patrol Scrub Commands */ 1910 1911 enum AcpiRasfPatrolScrubCommands 1912 { 1913 ACPI_RASF_GET_PATROL_PARAMETERS = 1, 1914 ACPI_RASF_START_PATROL_SCRUBBER = 2, 1915 ACPI_RASF_STOP_PATROL_SCRUBBER = 3 1916 }; 1917 1918 /* Channel Command flags */ 1919 1920 #define ACPI_RASF_GENERATE_SCI (1<<15) 1921 1922 /* Status values */ 1923 1924 enum AcpiRasfStatus 1925 { 1926 ACPI_RASF_SUCCESS = 0, 1927 ACPI_RASF_NOT_VALID = 1, 1928 ACPI_RASF_NOT_SUPPORTED = 2, 1929 ACPI_RASF_BUSY = 3, 1930 ACPI_RASF_FAILED = 4, 1931 ACPI_RASF_ABORTED = 5, 1932 ACPI_RASF_INVALID_DATA = 6 1933 }; 1934 1935 /* Status flags */ 1936 1937 #define ACPI_RASF_COMMAND_COMPLETE (1) 1938 #define ACPI_RASF_SCI_DOORBELL (1<<1) 1939 #define ACPI_RASF_ERROR (1<<2) 1940 #define ACPI_RASF_STATUS (0x1F<<3) 1941 1942 1943 /******************************************************************************* 1944 * 1945 * SBST - Smart Battery Specification Table 1946 * Version 1 1947 * 1948 ******************************************************************************/ 1949 1950 typedef struct acpi_table_sbst 1951 { 1952 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1953 UINT32 WarningLevel; 1954 UINT32 LowLevel; 1955 UINT32 CriticalLevel; 1956 1957 } ACPI_TABLE_SBST; 1958 1959 1960 /******************************************************************************* 1961 * 1962 * SDEI - Software Delegated Exception Interface Descriptor Table 1963 * 1964 * Conforms to "Software Delegated Exception Interface (SDEI)" ARM DEN0054A, 1965 * May 8th, 2017. Copyright 2017 ARM Ltd. 1966 * 1967 ******************************************************************************/ 1968 1969 typedef struct acpi_table_sdei 1970 { 1971 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1972 1973 } ACPI_TABLE_SDEI; 1974 1975 1976 /******************************************************************************* 1977 * 1978 * SDEV - Secure Devices Table (ACPI 6.2) 1979 * Version 1 1980 * 1981 ******************************************************************************/ 1982 1983 typedef struct acpi_table_sdev 1984 { 1985 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1986 1987 } ACPI_TABLE_SDEV; 1988 1989 1990 typedef struct acpi_sdev_header 1991 { 1992 UINT8 Type; 1993 UINT8 Flags; 1994 UINT16 Length; 1995 1996 } ACPI_SDEV_HEADER; 1997 1998 1999 /* Values for subtable type above */ 2000 2001 enum AcpiSdevType 2002 { 2003 ACPI_SDEV_TYPE_NAMESPACE_DEVICE = 0, 2004 ACPI_SDEV_TYPE_PCIE_ENDPOINT_DEVICE = 1, 2005 ACPI_SDEV_TYPE_RESERVED = 2 /* 2 and greater are reserved */ 2006 }; 2007 2008 /* Values for flags above */ 2009 2010 #define ACPI_SDEV_HANDOFF_TO_UNSECURE_OS (1) 2011 2012 /* 2013 * SDEV subtables 2014 */ 2015 2016 /* 0: Namespace Device Based Secure Device Structure */ 2017 2018 typedef struct acpi_sdev_namespace 2019 { 2020 ACPI_SDEV_HEADER Header; 2021 UINT16 DeviceIdOffset; 2022 UINT16 DeviceIdLength; 2023 UINT16 VendorDataOffset; 2024 UINT16 VendorDataLength; 2025 2026 } ACPI_SDEV_NAMESPACE; 2027 2028 /* 1: PCIe Endpoint Device Based Device Structure */ 2029 2030 typedef struct acpi_sdev_pcie 2031 { 2032 ACPI_SDEV_HEADER Header; 2033 UINT16 Segment; 2034 UINT16 StartBus; 2035 UINT16 PathOffset; 2036 UINT16 PathLength; 2037 UINT16 VendorDataOffset; 2038 UINT16 VendorDataLength; 2039 2040 } ACPI_SDEV_PCIE; 2041 2042 /* 1a: PCIe Endpoint path entry */ 2043 2044 typedef struct acpi_sdev_pcie_path 2045 { 2046 UINT8 Device; 2047 UINT8 Function; 2048 2049 } ACPI_SDEV_PCIE_PATH; 2050 2051 2052 /* Reset to default packing */ 2053 2054 #pragma pack() 2055 2056 #endif /* __ACTBL2_H__ */ 2057
Indexes created Tue Sep 30 20:09:53 GMT 2025