actbl2.h revision 1.1.1.17
1 /****************************************************************************** 2 * 3 * Name: actbl2.h - ACPI Table Definitions (tables not in ACPI spec) 4 * 5 *****************************************************************************/ 6 7 /* 8 * Copyright (C) 2000 - 2020, Intel Corp. 9 * All rights reserved. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions, and the following disclaimer, 16 * without modification. 17 * 2. Redistributions in binary form must reproduce at minimum a disclaimer 18 * substantially similar to the "NO WARRANTY" disclaimer below 19 * ("Disclaimer") and any redistribution must be conditioned upon 20 * including a substantially similar Disclaimer requirement for further 21 * binary redistribution. 22 * 3. Neither the names of the above-listed copyright holders nor the names 23 * of any contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * Alternatively, this software may be distributed under the terms of the 27 * GNU General Public License ("GPL") version 2 as published by the Free 28 * Software Foundation. 29 * 30 * NO WARRANTY 31 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 32 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 33 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR 34 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 35 * HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 36 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 37 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 38 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 39 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING 40 * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 41 * POSSIBILITY OF SUCH DAMAGES. 42 */ 43 44 #ifndef __ACTBL2_H__ 45 #define __ACTBL2_H__ 46 47 48 /******************************************************************************* 49 * 50 * Additional ACPI Tables (2) 51 * 52 * These tables are not consumed directly by the ACPICA subsystem, but are 53 * included here to support device drivers and the AML disassembler. 54 * 55 ******************************************************************************/ 56 57 58 /* 59 * Values for description table header signatures for tables defined in this 60 * file. Useful because they make it more difficult to inadvertently type in 61 * the wrong signature. 62 */ 63 #define ACPI_SIG_IORT "IORT" /* IO Remapping Table */ 64 #define ACPI_SIG_IVRS "IVRS" /* I/O Virtualization Reporting Structure */ 65 #define ACPI_SIG_LPIT "LPIT" /* Low Power Idle Table */ 66 #define ACPI_SIG_MADT "APIC" /* Multiple APIC Description Table */ 67 #define ACPI_SIG_MCFG "MCFG" /* PCI Memory Mapped Configuration table */ 68 #define ACPI_SIG_MCHI "MCHI" /* Management Controller Host Interface table */ 69 #define ACPI_SIG_MPST "MPST" /* Memory Power State Table */ 70 #define ACPI_SIG_MSCT "MSCT" /* Maximum System Characteristics Table */ 71 #define ACPI_SIG_MSDM "MSDM" /* Microsoft Data Management Table */ 72 #define ACPI_SIG_MTMR "MTMR" /* MID Timer table */ 73 #define ACPI_SIG_NFIT "NFIT" /* NVDIMM Firmware Interface Table */ 74 #define ACPI_SIG_PCCT "PCCT" /* Platform Communications Channel Table */ 75 #define ACPI_SIG_PDTT "PDTT" /* Platform Debug Trigger Table */ 76 #define ACPI_SIG_PMTT "PMTT" /* Platform Memory Topology Table */ 77 #define ACPI_SIG_PPTT "PPTT" /* Processor Properties Topology Table */ 78 #define ACPI_SIG_RASF "RASF" /* RAS Feature table */ 79 #define ACPI_SIG_SBST "SBST" /* Smart Battery Specification Table */ 80 #define ACPI_SIG_SDEI "SDEI" /* Software Delegated Exception Interface Table */ 81 #define ACPI_SIG_SDEV "SDEV" /* Secure Devices table */ 82 #define ACPI_SIG_NHLT "NHLT" /* Non-HDAudio Link Table */ 83 84 85 /* 86 * All tables must be byte-packed to match the ACPI specification, since 87 * the tables are provided by the system BIOS. 88 */ 89 #pragma pack(1) 90 91 /* 92 * Note: C bitfields are not used for this reason: 93 * 94 * "Bitfields are great and easy to read, but unfortunately the C language 95 * does not specify the layout of bitfields in memory, which means they are 96 * essentially useless for dealing with packed data in on-disk formats or 97 * binary wire protocols." (Or ACPI tables and buffers.) "If you ask me, 98 * this decision was a design error in C. Ritchie could have picked an order 99 * and stuck with it." Norman Ramsey. 100 * See http://stackoverflow.com/a/1053662/41661 101 */ 102 103 104 /******************************************************************************* 105 * 106 * IORT - IO Remapping Table 107 * 108 * Conforms to "IO Remapping Table System Software on ARM Platforms", 109 * Document number: ARM DEN 0049D, March 2018 110 * 111 ******************************************************************************/ 112 113 typedef struct acpi_table_iort 114 { 115 ACPI_TABLE_HEADER Header; 116 UINT32 NodeCount; 117 UINT32 NodeOffset; 118 UINT32 Reserved; 119 120 } ACPI_TABLE_IORT; 121 122 123 /* 124 * IORT subtables 125 */ 126 typedef struct acpi_iort_node 127 { 128 UINT8 Type; 129 UINT16 Length; 130 UINT8 Revision; 131 UINT32 Reserved; 132 UINT32 MappingCount; 133 UINT32 MappingOffset; 134 char NodeData[1]; 135 136 } ACPI_IORT_NODE; 137 138 /* Values for subtable Type above */ 139 140 enum AcpiIortNodeType 141 { 142 ACPI_IORT_NODE_ITS_GROUP = 0x00, 143 ACPI_IORT_NODE_NAMED_COMPONENT = 0x01, 144 ACPI_IORT_NODE_PCI_ROOT_COMPLEX = 0x02, 145 ACPI_IORT_NODE_SMMU = 0x03, 146 ACPI_IORT_NODE_SMMU_V3 = 0x04, 147 ACPI_IORT_NODE_PMCG = 0x05 148 }; 149 150 151 typedef struct acpi_iort_id_mapping 152 { 153 UINT32 InputBase; /* Lowest value in input range */ 154 UINT32 IdCount; /* Number of IDs */ 155 UINT32 OutputBase; /* Lowest value in output range */ 156 UINT32 OutputReference; /* A reference to the output node */ 157 UINT32 Flags; 158 159 } ACPI_IORT_ID_MAPPING; 160 161 /* Masks for Flags field above for IORT subtable */ 162 163 #define ACPI_IORT_ID_SINGLE_MAPPING (1) 164 165 166 typedef struct acpi_iort_memory_access 167 { 168 UINT32 CacheCoherency; 169 UINT8 Hints; 170 UINT16 Reserved; 171 UINT8 MemoryFlags; 172 173 } ACPI_IORT_MEMORY_ACCESS; 174 175 /* Values for CacheCoherency field above */ 176 177 #define ACPI_IORT_NODE_COHERENT 0x00000001 /* The device node is fully coherent */ 178 #define ACPI_IORT_NODE_NOT_COHERENT 0x00000000 /* The device node is not coherent */ 179 180 /* Masks for Hints field above */ 181 182 #define ACPI_IORT_HT_TRANSIENT (1) 183 #define ACPI_IORT_HT_WRITE (1<<1) 184 #define ACPI_IORT_HT_READ (1<<2) 185 #define ACPI_IORT_HT_OVERRIDE (1<<3) 186 187 /* Masks for MemoryFlags field above */ 188 189 #define ACPI_IORT_MF_COHERENCY (1) 190 #define ACPI_IORT_MF_ATTRIBUTES (1<<1) 191 192 193 /* 194 * IORT node specific subtables 195 */ 196 typedef struct acpi_iort_its_group 197 { 198 UINT32 ItsCount; 199 UINT32 Identifiers[1]; /* GIC ITS identifier array */ 200 201 } ACPI_IORT_ITS_GROUP; 202 203 204 typedef struct acpi_iort_named_component 205 { 206 UINT32 NodeFlags; 207 UINT64 MemoryProperties; /* Memory access properties */ 208 UINT8 MemoryAddressLimit; /* Memory address size limit */ 209 char DeviceName[1]; /* Path of namespace object */ 210 211 } ACPI_IORT_NAMED_COMPONENT; 212 213 /* Masks for Flags field above */ 214 215 #define ACPI_IORT_NC_STALL_SUPPORTED (1) 216 #define ACPI_IORT_NC_PASID_BITS (31<<1) 217 218 typedef struct acpi_iort_root_complex 219 { 220 UINT64 MemoryProperties; /* Memory access properties */ 221 UINT32 AtsAttribute; 222 UINT32 PciSegmentNumber; 223 UINT8 MemoryAddressLimit; /* Memory address size limit */ 224 UINT8 Reserved[3]; /* Reserved, must be zero */ 225 226 } ACPI_IORT_ROOT_COMPLEX; 227 228 /* Values for AtsAttribute field above */ 229 230 #define ACPI_IORT_ATS_SUPPORTED 0x00000001 /* The root complex supports ATS */ 231 #define ACPI_IORT_ATS_UNSUPPORTED 0x00000000 /* The root complex doesn't support ATS */ 232 233 234 typedef struct acpi_iort_smmu 235 { 236 UINT64 BaseAddress; /* SMMU base address */ 237 UINT64 Span; /* Length of memory range */ 238 UINT32 Model; 239 UINT32 Flags; 240 UINT32 GlobalInterruptOffset; 241 UINT32 ContextInterruptCount; 242 UINT32 ContextInterruptOffset; 243 UINT32 PmuInterruptCount; 244 UINT32 PmuInterruptOffset; 245 UINT64 Interrupts[1]; /* Interrupt array */ 246 247 } ACPI_IORT_SMMU; 248 249 /* Values for Model field above */ 250 251 #define ACPI_IORT_SMMU_V1 0x00000000 /* Generic SMMUv1 */ 252 #define ACPI_IORT_SMMU_V2 0x00000001 /* Generic SMMUv2 */ 253 #define ACPI_IORT_SMMU_CORELINK_MMU400 0x00000002 /* ARM Corelink MMU-400 */ 254 #define ACPI_IORT_SMMU_CORELINK_MMU500 0x00000003 /* ARM Corelink MMU-500 */ 255 #define ACPI_IORT_SMMU_CORELINK_MMU401 0x00000004 /* ARM Corelink MMU-401 */ 256 #define ACPI_IORT_SMMU_CAVIUM_THUNDERX 0x00000005 /* Cavium ThunderX SMMUv2 */ 257 258 /* Masks for Flags field above */ 259 260 #define ACPI_IORT_SMMU_DVM_SUPPORTED (1) 261 #define ACPI_IORT_SMMU_COHERENT_WALK (1<<1) 262 263 /* Global interrupt format */ 264 265 typedef struct acpi_iort_smmu_gsi 266 { 267 UINT32 NSgIrpt; 268 UINT32 NSgIrptFlags; 269 UINT32 NSgCfgIrpt; 270 UINT32 NSgCfgIrptFlags; 271 272 } ACPI_IORT_SMMU_GSI; 273 274 275 typedef struct acpi_iort_smmu_v3 276 { 277 UINT64 BaseAddress; /* SMMUv3 base address */ 278 UINT32 Flags; 279 UINT32 Reserved; 280 UINT64 VatosAddress; 281 UINT32 Model; 282 UINT32 EventGsiv; 283 UINT32 PriGsiv; 284 UINT32 GerrGsiv; 285 UINT32 SyncGsiv; 286 UINT32 Pxm; 287 UINT32 IdMappingIndex; 288 289 } ACPI_IORT_SMMU_V3; 290 291 /* Values for Model field above */ 292 293 #define ACPI_IORT_SMMU_V3_GENERIC 0x00000000 /* Generic SMMUv3 */ 294 #define ACPI_IORT_SMMU_V3_HISILICON_HI161X 0x00000001 /* HiSilicon Hi161x SMMUv3 */ 295 #define ACPI_IORT_SMMU_V3_CAVIUM_CN99XX 0x00000002 /* Cavium CN99xx SMMUv3 */ 296 297 /* Masks for Flags field above */ 298 299 #define ACPI_IORT_SMMU_V3_COHACC_OVERRIDE (1) 300 #define ACPI_IORT_SMMU_V3_HTTU_OVERRIDE (3<<1) 301 #define ACPI_IORT_SMMU_V3_PXM_VALID (1<<3) 302 303 typedef struct acpi_iort_pmcg 304 { 305 UINT64 Page0BaseAddress; 306 UINT32 OverflowGsiv; 307 UINT32 NodeReference; 308 UINT64 Page1BaseAddress; 309 310 } ACPI_IORT_PMCG; 311 312 313 /******************************************************************************* 314 * 315 * IVRS - I/O Virtualization Reporting Structure 316 * Version 1 317 * 318 * Conforms to "AMD I/O Virtualization Technology (IOMMU) Specification", 319 * Revision 1.26, February 2009. 320 * 321 ******************************************************************************/ 322 323 typedef struct acpi_table_ivrs 324 { 325 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 326 UINT32 Info; /* Common virtualization info */ 327 UINT64 Reserved; 328 329 } ACPI_TABLE_IVRS; 330 331 /* Values for Info field above */ 332 333 #define ACPI_IVRS_PHYSICAL_SIZE 0x00007F00 /* 7 bits, physical address size */ 334 #define ACPI_IVRS_VIRTUAL_SIZE 0x003F8000 /* 7 bits, virtual address size */ 335 #define ACPI_IVRS_ATS_RESERVED 0x00400000 /* ATS address translation range reserved */ 336 337 338 /* IVRS subtable header */ 339 340 typedef struct acpi_ivrs_header 341 { 342 UINT8 Type; /* Subtable type */ 343 UINT8 Flags; 344 UINT16 Length; /* Subtable length */ 345 UINT16 DeviceId; /* ID of IOMMU */ 346 347 } ACPI_IVRS_HEADER; 348 349 /* Values for subtable Type above */ 350 351 enum AcpiIvrsType 352 { 353 ACPI_IVRS_TYPE_HARDWARE1 = 0x10, 354 ACPI_IVRS_TYPE_HARDWARE2 = 0x11, 355 ACPI_IVRS_TYPE_MEMORY1 = 0x20, 356 ACPI_IVRS_TYPE_MEMORY2 = 0x21, 357 ACPI_IVRS_TYPE_MEMORY3 = 0x22 358 }; 359 360 /* Masks for Flags field above for IVHD subtable */ 361 362 #define ACPI_IVHD_TT_ENABLE (1) 363 #define ACPI_IVHD_PASS_PW (1<<1) 364 #define ACPI_IVHD_RES_PASS_PW (1<<2) 365 #define ACPI_IVHD_ISOC (1<<3) 366 #define ACPI_IVHD_IOTLB (1<<4) 367 368 /* Masks for Flags field above for IVMD subtable */ 369 370 #define ACPI_IVMD_UNITY (1) 371 #define ACPI_IVMD_READ (1<<1) 372 #define ACPI_IVMD_WRITE (1<<2) 373 #define ACPI_IVMD_EXCLUSION_RANGE (1<<3) 374 375 376 /* 377 * IVRS subtables, correspond to Type in ACPI_IVRS_HEADER 378 */ 379 380 /* 0x10: I/O Virtualization Hardware Definition Block (IVHD) */ 381 382 typedef struct acpi_ivrs_hardware_10 383 { 384 ACPI_IVRS_HEADER Header; 385 UINT16 CapabilityOffset; /* Offset for IOMMU control fields */ 386 UINT64 BaseAddress; /* IOMMU control registers */ 387 UINT16 PciSegmentGroup; 388 UINT16 Info; /* MSI number and unit ID */ 389 UINT32 FeatureReporting; 390 391 } ACPI_IVRS_HARDWARE1; 392 393 /* 0x11: I/O Virtualization Hardware Definition Block (IVHD) */ 394 395 typedef struct acpi_ivrs_hardware_11 396 { 397 ACPI_IVRS_HEADER Header; 398 UINT16 CapabilityOffset; /* Offset for IOMMU control fields */ 399 UINT64 BaseAddress; /* IOMMU control registers */ 400 UINT16 PciSegmentGroup; 401 UINT16 Info; /* MSI number and unit ID */ 402 UINT32 Attributes; 403 UINT64 EfrRegisterImage; 404 UINT64 Reserved; 405 } ACPI_IVRS_HARDWARE2; 406 407 /* Masks for Info field above */ 408 409 #define ACPI_IVHD_MSI_NUMBER_MASK 0x001F /* 5 bits, MSI message number */ 410 #define ACPI_IVHD_UNIT_ID_MASK 0x1F00 /* 5 bits, UnitID */ 411 412 413 /* 414 * Device Entries for IVHD subtable, appear after ACPI_IVRS_HARDWARE structure. 415 * Upper two bits of the Type field are the (encoded) length of the structure. 416 * Currently, only 4 and 8 byte entries are defined. 16 and 32 byte entries 417 * are reserved for future use but not defined. 418 */ 419 typedef struct acpi_ivrs_de_header 420 { 421 UINT8 Type; 422 UINT16 Id; 423 UINT8 DataSetting; 424 425 } ACPI_IVRS_DE_HEADER; 426 427 /* Length of device entry is in the top two bits of Type field above */ 428 429 #define ACPI_IVHD_ENTRY_LENGTH 0xC0 430 431 /* Values for device entry Type field above */ 432 433 enum AcpiIvrsDeviceEntryType 434 { 435 /* 4-byte device entries, all use ACPI_IVRS_DEVICE4 */ 436 437 ACPI_IVRS_TYPE_PAD4 = 0, 438 ACPI_IVRS_TYPE_ALL = 1, 439 ACPI_IVRS_TYPE_SELECT = 2, 440 ACPI_IVRS_TYPE_START = 3, 441 ACPI_IVRS_TYPE_END = 4, 442 443 /* 8-byte device entries */ 444 445 ACPI_IVRS_TYPE_PAD8 = 64, 446 ACPI_IVRS_TYPE_NOT_USED = 65, 447 ACPI_IVRS_TYPE_ALIAS_SELECT = 66, /* Uses ACPI_IVRS_DEVICE8A */ 448 ACPI_IVRS_TYPE_ALIAS_START = 67, /* Uses ACPI_IVRS_DEVICE8A */ 449 ACPI_IVRS_TYPE_EXT_SELECT = 70, /* Uses ACPI_IVRS_DEVICE8B */ 450 ACPI_IVRS_TYPE_EXT_START = 71, /* Uses ACPI_IVRS_DEVICE8B */ 451 ACPI_IVRS_TYPE_SPECIAL = 72 /* Uses ACPI_IVRS_DEVICE8C */ 452 }; 453 454 /* Values for Data field above */ 455 456 #define ACPI_IVHD_INIT_PASS (1) 457 #define ACPI_IVHD_EINT_PASS (1<<1) 458 #define ACPI_IVHD_NMI_PASS (1<<2) 459 #define ACPI_IVHD_SYSTEM_MGMT (3<<4) 460 #define ACPI_IVHD_LINT0_PASS (1<<6) 461 #define ACPI_IVHD_LINT1_PASS (1<<7) 462 463 464 /* Types 0-4: 4-byte device entry */ 465 466 typedef struct acpi_ivrs_device4 467 { 468 ACPI_IVRS_DE_HEADER Header; 469 470 } ACPI_IVRS_DEVICE4; 471 472 /* Types 66-67: 8-byte device entry */ 473 474 typedef struct acpi_ivrs_device8a 475 { 476 ACPI_IVRS_DE_HEADER Header; 477 UINT8 Reserved1; 478 UINT16 UsedId; 479 UINT8 Reserved2; 480 481 } ACPI_IVRS_DEVICE8A; 482 483 /* Types 70-71: 8-byte device entry */ 484 485 typedef struct acpi_ivrs_device8b 486 { 487 ACPI_IVRS_DE_HEADER Header; 488 UINT32 ExtendedData; 489 490 } ACPI_IVRS_DEVICE8B; 491 492 /* Values for ExtendedData above */ 493 494 #define ACPI_IVHD_ATS_DISABLED (1<<31) 495 496 /* Type 72: 8-byte device entry */ 497 498 typedef struct acpi_ivrs_device8c 499 { 500 ACPI_IVRS_DE_HEADER Header; 501 UINT8 Handle; 502 UINT16 UsedId; 503 UINT8 Variety; 504 505 } ACPI_IVRS_DEVICE8C; 506 507 /* Values for Variety field above */ 508 509 #define ACPI_IVHD_IOAPIC 1 510 #define ACPI_IVHD_HPET 2 511 512 513 /* 0x20, 0x21, 0x22: I/O Virtualization Memory Definition Block (IVMD) */ 514 515 typedef struct acpi_ivrs_memory 516 { 517 ACPI_IVRS_HEADER Header; 518 UINT16 AuxData; 519 UINT64 Reserved; 520 UINT64 StartAddress; 521 UINT64 MemoryLength; 522 523 } ACPI_IVRS_MEMORY; 524 525 526 /******************************************************************************* 527 * 528 * LPIT - Low Power Idle Table 529 * 530 * Conforms to "ACPI Low Power Idle Table (LPIT)" July 2014. 531 * 532 ******************************************************************************/ 533 534 typedef struct acpi_table_lpit 535 { 536 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 537 538 } ACPI_TABLE_LPIT; 539 540 541 /* LPIT subtable header */ 542 543 typedef struct acpi_lpit_header 544 { 545 UINT32 Type; /* Subtable type */ 546 UINT32 Length; /* Subtable length */ 547 UINT16 UniqueId; 548 UINT16 Reserved; 549 UINT32 Flags; 550 551 } ACPI_LPIT_HEADER; 552 553 /* Values for subtable Type above */ 554 555 enum AcpiLpitType 556 { 557 ACPI_LPIT_TYPE_NATIVE_CSTATE = 0x00, 558 ACPI_LPIT_TYPE_RESERVED = 0x01 /* 1 and above are reserved */ 559 }; 560 561 /* Masks for Flags field above */ 562 563 #define ACPI_LPIT_STATE_DISABLED (1) 564 #define ACPI_LPIT_NO_COUNTER (1<<1) 565 566 /* 567 * LPIT subtables, correspond to Type in ACPI_LPIT_HEADER 568 */ 569 570 /* 0x00: Native C-state instruction based LPI structure */ 571 572 typedef struct acpi_lpit_native 573 { 574 ACPI_LPIT_HEADER Header; 575 ACPI_GENERIC_ADDRESS EntryTrigger; 576 UINT32 Residency; 577 UINT32 Latency; 578 ACPI_GENERIC_ADDRESS ResidencyCounter; 579 UINT64 CounterFrequency; 580 581 } ACPI_LPIT_NATIVE; 582 583 584 /******************************************************************************* 585 * 586 * MADT - Multiple APIC Description Table 587 * Version 3 588 * 589 ******************************************************************************/ 590 591 typedef struct acpi_table_madt 592 { 593 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 594 UINT32 Address; /* Physical address of local APIC */ 595 UINT32 Flags; 596 597 } ACPI_TABLE_MADT; 598 599 /* Masks for Flags field above */ 600 601 #define ACPI_MADT_PCAT_COMPAT (1) /* 00: System also has dual 8259s */ 602 603 /* Values for PCATCompat flag */ 604 605 #define ACPI_MADT_DUAL_PIC 1 606 #define ACPI_MADT_MULTIPLE_APIC 0 607 608 609 /* Values for MADT subtable type in ACPI_SUBTABLE_HEADER */ 610 611 enum AcpiMadtType 612 { 613 ACPI_MADT_TYPE_LOCAL_APIC = 0, 614 ACPI_MADT_TYPE_IO_APIC = 1, 615 ACPI_MADT_TYPE_INTERRUPT_OVERRIDE = 2, 616 ACPI_MADT_TYPE_NMI_SOURCE = 3, 617 ACPI_MADT_TYPE_LOCAL_APIC_NMI = 4, 618 ACPI_MADT_TYPE_LOCAL_APIC_OVERRIDE = 5, 619 ACPI_MADT_TYPE_IO_SAPIC = 6, 620 ACPI_MADT_TYPE_LOCAL_SAPIC = 7, 621 ACPI_MADT_TYPE_INTERRUPT_SOURCE = 8, 622 ACPI_MADT_TYPE_LOCAL_X2APIC = 9, 623 ACPI_MADT_TYPE_LOCAL_X2APIC_NMI = 10, 624 ACPI_MADT_TYPE_GENERIC_INTERRUPT = 11, 625 ACPI_MADT_TYPE_GENERIC_DISTRIBUTOR = 12, 626 ACPI_MADT_TYPE_GENERIC_MSI_FRAME = 13, 627 ACPI_MADT_TYPE_GENERIC_REDISTRIBUTOR = 14, 628 ACPI_MADT_TYPE_GENERIC_TRANSLATOR = 15, 629 ACPI_MADT_TYPE_RESERVED = 16 /* 16 and greater are reserved */ 630 }; 631 632 633 /* 634 * MADT Subtables, correspond to Type in ACPI_SUBTABLE_HEADER 635 */ 636 637 /* 0: Processor Local APIC */ 638 639 typedef struct acpi_madt_local_apic 640 { 641 ACPI_SUBTABLE_HEADER Header; 642 UINT8 ProcessorId; /* ACPI processor id */ 643 UINT8 Id; /* Processor's local APIC id */ 644 UINT32 LapicFlags; 645 646 } ACPI_MADT_LOCAL_APIC; 647 648 649 /* 1: IO APIC */ 650 651 typedef struct acpi_madt_io_apic 652 { 653 ACPI_SUBTABLE_HEADER Header; 654 UINT8 Id; /* I/O APIC ID */ 655 UINT8 Reserved; /* Reserved - must be zero */ 656 UINT32 Address; /* APIC physical address */ 657 UINT32 GlobalIrqBase; /* Global system interrupt where INTI lines start */ 658 659 } ACPI_MADT_IO_APIC; 660 661 662 /* 2: Interrupt Override */ 663 664 typedef struct acpi_madt_interrupt_override 665 { 666 ACPI_SUBTABLE_HEADER Header; 667 UINT8 Bus; /* 0 - ISA */ 668 UINT8 SourceIrq; /* Interrupt source (IRQ) */ 669 UINT32 GlobalIrq; /* Global system interrupt */ 670 UINT16 IntiFlags; 671 672 } ACPI_MADT_INTERRUPT_OVERRIDE; 673 674 675 /* 3: NMI Source */ 676 677 typedef struct acpi_madt_nmi_source 678 { 679 ACPI_SUBTABLE_HEADER Header; 680 UINT16 IntiFlags; 681 UINT32 GlobalIrq; /* Global system interrupt */ 682 683 } ACPI_MADT_NMI_SOURCE; 684 685 686 /* 4: Local APIC NMI */ 687 688 typedef struct acpi_madt_local_apic_nmi 689 { 690 ACPI_SUBTABLE_HEADER Header; 691 UINT8 ProcessorId; /* ACPI processor id */ 692 UINT16 IntiFlags; 693 UINT8 Lint; /* LINTn to which NMI is connected */ 694 695 } ACPI_MADT_LOCAL_APIC_NMI; 696 697 698 /* 5: Address Override */ 699 700 typedef struct acpi_madt_local_apic_override 701 { 702 ACPI_SUBTABLE_HEADER Header; 703 UINT16 Reserved; /* Reserved, must be zero */ 704 UINT64 Address; /* APIC physical address */ 705 706 } ACPI_MADT_LOCAL_APIC_OVERRIDE; 707 708 709 /* 6: I/O Sapic */ 710 711 typedef struct acpi_madt_io_sapic 712 { 713 ACPI_SUBTABLE_HEADER Header; 714 UINT8 Id; /* I/O SAPIC ID */ 715 UINT8 Reserved; /* Reserved, must be zero */ 716 UINT32 GlobalIrqBase; /* Global interrupt for SAPIC start */ 717 UINT64 Address; /* SAPIC physical address */ 718 719 } ACPI_MADT_IO_SAPIC; 720 721 722 /* 7: Local Sapic */ 723 724 typedef struct acpi_madt_local_sapic 725 { 726 ACPI_SUBTABLE_HEADER Header; 727 UINT8 ProcessorId; /* ACPI processor id */ 728 UINT8 Id; /* SAPIC ID */ 729 UINT8 Eid; /* SAPIC EID */ 730 UINT8 Reserved[3]; /* Reserved, must be zero */ 731 UINT32 LapicFlags; 732 UINT32 Uid; /* Numeric UID - ACPI 3.0 */ 733 char UidString[1]; /* String UID - ACPI 3.0 */ 734 735 } ACPI_MADT_LOCAL_SAPIC; 736 737 738 /* 8: Platform Interrupt Source */ 739 740 typedef struct acpi_madt_interrupt_source 741 { 742 ACPI_SUBTABLE_HEADER Header; 743 UINT16 IntiFlags; 744 UINT8 Type; /* 1=PMI, 2=INIT, 3=corrected */ 745 UINT8 Id; /* Processor ID */ 746 UINT8 Eid; /* Processor EID */ 747 UINT8 IoSapicVector; /* Vector value for PMI interrupts */ 748 UINT32 GlobalIrq; /* Global system interrupt */ 749 UINT32 Flags; /* Interrupt Source Flags */ 750 751 } ACPI_MADT_INTERRUPT_SOURCE; 752 753 /* Masks for Flags field above */ 754 755 #define ACPI_MADT_CPEI_OVERRIDE (1) 756 757 758 /* 9: Processor Local X2APIC (ACPI 4.0) */ 759 760 typedef struct acpi_madt_local_x2apic 761 { 762 ACPI_SUBTABLE_HEADER Header; 763 UINT16 Reserved; /* Reserved - must be zero */ 764 UINT32 LocalApicId; /* Processor x2APIC ID */ 765 UINT32 LapicFlags; 766 UINT32 Uid; /* ACPI processor UID */ 767 768 } ACPI_MADT_LOCAL_X2APIC; 769 770 771 /* 10: Local X2APIC NMI (ACPI 4.0) */ 772 773 typedef struct acpi_madt_local_x2apic_nmi 774 { 775 ACPI_SUBTABLE_HEADER Header; 776 UINT16 IntiFlags; 777 UINT32 Uid; /* ACPI processor UID */ 778 UINT8 Lint; /* LINTn to which NMI is connected */ 779 UINT8 Reserved[3]; /* Reserved - must be zero */ 780 781 } ACPI_MADT_LOCAL_X2APIC_NMI; 782 783 784 /* 11: Generic Interrupt - GICC (ACPI 5.0 + ACPI 6.0 + ACPI 6.3 changes) */ 785 786 typedef struct acpi_madt_generic_interrupt 787 { 788 ACPI_SUBTABLE_HEADER Header; 789 UINT16 Reserved; /* Reserved - must be zero */ 790 UINT32 CpuInterfaceNumber; 791 UINT32 Uid; 792 UINT32 Flags; 793 UINT32 ParkingVersion; 794 UINT32 PerformanceInterrupt; 795 UINT64 ParkedAddress; 796 UINT64 BaseAddress; 797 UINT64 GicvBaseAddress; 798 UINT64 GichBaseAddress; 799 UINT32 VgicInterrupt; 800 UINT64 GicrBaseAddress; 801 UINT64 ArmMpidr; 802 UINT8 EfficiencyClass; 803 UINT8 Reserved2[1]; 804 UINT16 SpeInterrupt; /* ACPI 6.3 */ 805 806 } ACPI_MADT_GENERIC_INTERRUPT; 807 808 /* Masks for Flags field above */ 809 810 /* ACPI_MADT_ENABLED (1) Processor is usable if set */ 811 #define ACPI_MADT_PERFORMANCE_IRQ_MODE (1<<1) /* 01: Performance Interrupt Mode */ 812 #define ACPI_MADT_VGIC_IRQ_MODE (1<<2) /* 02: VGIC Maintenance Interrupt mode */ 813 814 815 /* 12: Generic Distributor (ACPI 5.0 + ACPI 6.0 changes) */ 816 817 typedef struct acpi_madt_generic_distributor 818 { 819 ACPI_SUBTABLE_HEADER Header; 820 UINT16 Reserved; /* Reserved - must be zero */ 821 UINT32 GicId; 822 UINT64 BaseAddress; 823 UINT32 GlobalIrqBase; 824 UINT8 Version; 825 UINT8 Reserved2[3]; /* Reserved - must be zero */ 826 827 } ACPI_MADT_GENERIC_DISTRIBUTOR; 828 829 /* Values for Version field above */ 830 831 enum AcpiMadtGicVersion 832 { 833 ACPI_MADT_GIC_VERSION_NONE = 0, 834 ACPI_MADT_GIC_VERSION_V1 = 1, 835 ACPI_MADT_GIC_VERSION_V2 = 2, 836 ACPI_MADT_GIC_VERSION_V3 = 3, 837 ACPI_MADT_GIC_VERSION_V4 = 4, 838 ACPI_MADT_GIC_VERSION_RESERVED = 5 /* 5 and greater are reserved */ 839 }; 840 841 842 /* 13: Generic MSI Frame (ACPI 5.1) */ 843 844 typedef struct acpi_madt_generic_msi_frame 845 { 846 ACPI_SUBTABLE_HEADER Header; 847 UINT16 Reserved; /* Reserved - must be zero */ 848 UINT32 MsiFrameId; 849 UINT64 BaseAddress; 850 UINT32 Flags; 851 UINT16 SpiCount; 852 UINT16 SpiBase; 853 854 } ACPI_MADT_GENERIC_MSI_FRAME; 855 856 /* Masks for Flags field above */ 857 858 #define ACPI_MADT_OVERRIDE_SPI_VALUES (1) 859 860 861 /* 14: Generic Redistributor (ACPI 5.1) */ 862 863 typedef struct acpi_madt_generic_redistributor 864 { 865 ACPI_SUBTABLE_HEADER Header; 866 UINT16 Reserved; /* reserved - must be zero */ 867 UINT64 BaseAddress; 868 UINT32 Length; 869 870 } ACPI_MADT_GENERIC_REDISTRIBUTOR; 871 872 873 /* 15: Generic Translator (ACPI 6.0) */ 874 875 typedef struct acpi_madt_generic_translator 876 { 877 ACPI_SUBTABLE_HEADER Header; 878 UINT16 Reserved; /* reserved - must be zero */ 879 UINT32 TranslationId; 880 UINT64 BaseAddress; 881 UINT32 Reserved2; 882 883 } ACPI_MADT_GENERIC_TRANSLATOR; 884 885 886 /* 887 * Common flags fields for MADT subtables 888 */ 889 890 /* MADT Local APIC flags */ 891 892 #define ACPI_MADT_ENABLED (1) /* 00: Processor is usable if set */ 893 894 /* MADT MPS INTI flags (IntiFlags) */ 895 896 #define ACPI_MADT_POLARITY_MASK (3) /* 00-01: Polarity of APIC I/O input signals */ 897 #define ACPI_MADT_TRIGGER_MASK (3<<2) /* 02-03: Trigger mode of APIC input signals */ 898 899 /* Values for MPS INTI flags */ 900 901 #define ACPI_MADT_POLARITY_CONFORMS 0 902 #define ACPI_MADT_POLARITY_ACTIVE_HIGH 1 903 #define ACPI_MADT_POLARITY_RESERVED 2 904 #define ACPI_MADT_POLARITY_ACTIVE_LOW 3 905 906 #define ACPI_MADT_TRIGGER_CONFORMS (0) 907 #define ACPI_MADT_TRIGGER_EDGE (1<<2) 908 #define ACPI_MADT_TRIGGER_RESERVED (2<<2) 909 #define ACPI_MADT_TRIGGER_LEVEL (3<<2) 910 911 912 /******************************************************************************* 913 * 914 * MCFG - PCI Memory Mapped Configuration table and subtable 915 * Version 1 916 * 917 * Conforms to "PCI Firmware Specification", Revision 3.0, June 20, 2005 918 * 919 ******************************************************************************/ 920 921 typedef struct acpi_table_mcfg 922 { 923 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 924 UINT8 Reserved[8]; 925 926 } ACPI_TABLE_MCFG; 927 928 929 /* Subtable */ 930 931 typedef struct acpi_mcfg_allocation 932 { 933 UINT64 Address; /* Base address, processor-relative */ 934 UINT16 PciSegment; /* PCI segment group number */ 935 UINT8 StartBusNumber; /* Starting PCI Bus number */ 936 UINT8 EndBusNumber; /* Final PCI Bus number */ 937 UINT32 Reserved; 938 939 } ACPI_MCFG_ALLOCATION; 940 941 942 /******************************************************************************* 943 * 944 * MCHI - Management Controller Host Interface Table 945 * Version 1 946 * 947 * Conforms to "Management Component Transport Protocol (MCTP) Host 948 * Interface Specification", Revision 1.0.0a, October 13, 2009 949 * 950 ******************************************************************************/ 951 952 typedef struct acpi_table_mchi 953 { 954 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 955 UINT8 InterfaceType; 956 UINT8 Protocol; 957 UINT64 ProtocolData; 958 UINT8 InterruptType; 959 UINT8 Gpe; 960 UINT8 PciDeviceFlag; 961 UINT32 GlobalInterrupt; 962 ACPI_GENERIC_ADDRESS ControlRegister; 963 UINT8 PciSegment; 964 UINT8 PciBus; 965 UINT8 PciDevice; 966 UINT8 PciFunction; 967 968 } ACPI_TABLE_MCHI; 969 970 971 /******************************************************************************* 972 * 973 * MPST - Memory Power State Table (ACPI 5.0) 974 * Version 1 975 * 976 ******************************************************************************/ 977 978 #define ACPI_MPST_CHANNEL_INFO \ 979 UINT8 ChannelId; \ 980 UINT8 Reserved1[3]; \ 981 UINT16 PowerNodeCount; \ 982 UINT16 Reserved2; 983 984 /* Main table */ 985 986 typedef struct acpi_table_mpst 987 { 988 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 989 ACPI_MPST_CHANNEL_INFO /* Platform Communication Channel */ 990 991 } ACPI_TABLE_MPST; 992 993 994 /* Memory Platform Communication Channel Info */ 995 996 typedef struct acpi_mpst_channel 997 { 998 ACPI_MPST_CHANNEL_INFO /* Platform Communication Channel */ 999 1000 } ACPI_MPST_CHANNEL; 1001 1002 1003 /* Memory Power Node Structure */ 1004 1005 typedef struct acpi_mpst_power_node 1006 { 1007 UINT8 Flags; 1008 UINT8 Reserved1; 1009 UINT16 NodeId; 1010 UINT32 Length; 1011 UINT64 RangeAddress; 1012 UINT64 RangeLength; 1013 UINT32 NumPowerStates; 1014 UINT32 NumPhysicalComponents; 1015 1016 } ACPI_MPST_POWER_NODE; 1017 1018 /* Values for Flags field above */ 1019 1020 #define ACPI_MPST_ENABLED 1 1021 #define ACPI_MPST_POWER_MANAGED 2 1022 #define ACPI_MPST_HOT_PLUG_CAPABLE 4 1023 1024 1025 /* Memory Power State Structure (follows POWER_NODE above) */ 1026 1027 typedef struct acpi_mpst_power_state 1028 { 1029 UINT8 PowerState; 1030 UINT8 InfoIndex; 1031 1032 } ACPI_MPST_POWER_STATE; 1033 1034 1035 /* Physical Component ID Structure (follows POWER_STATE above) */ 1036 1037 typedef struct acpi_mpst_component 1038 { 1039 UINT16 ComponentId; 1040 1041 } ACPI_MPST_COMPONENT; 1042 1043 1044 /* Memory Power State Characteristics Structure (follows all POWER_NODEs) */ 1045 1046 typedef struct acpi_mpst_data_hdr 1047 { 1048 UINT16 CharacteristicsCount; 1049 UINT16 Reserved; 1050 1051 } ACPI_MPST_DATA_HDR; 1052 1053 typedef struct acpi_mpst_power_data 1054 { 1055 UINT8 StructureId; 1056 UINT8 Flags; 1057 UINT16 Reserved1; 1058 UINT32 AveragePower; 1059 UINT32 PowerSaving; 1060 UINT64 ExitLatency; 1061 UINT64 Reserved2; 1062 1063 } ACPI_MPST_POWER_DATA; 1064 1065 /* Values for Flags field above */ 1066 1067 #define ACPI_MPST_PRESERVE 1 1068 #define ACPI_MPST_AUTOENTRY 2 1069 #define ACPI_MPST_AUTOEXIT 4 1070 1071 1072 /* Shared Memory Region (not part of an ACPI table) */ 1073 1074 typedef struct acpi_mpst_shared 1075 { 1076 UINT32 Signature; 1077 UINT16 PccCommand; 1078 UINT16 PccStatus; 1079 UINT32 CommandRegister; 1080 UINT32 StatusRegister; 1081 UINT32 PowerStateId; 1082 UINT32 PowerNodeId; 1083 UINT64 EnergyConsumed; 1084 UINT64 AveragePower; 1085 1086 } ACPI_MPST_SHARED; 1087 1088 1089 /******************************************************************************* 1090 * 1091 * MSCT - Maximum System Characteristics Table (ACPI 4.0) 1092 * Version 1 1093 * 1094 ******************************************************************************/ 1095 1096 typedef struct acpi_table_msct 1097 { 1098 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1099 UINT32 ProximityOffset; /* Location of proximity info struct(s) */ 1100 UINT32 MaxProximityDomains;/* Max number of proximity domains */ 1101 UINT32 MaxClockDomains; /* Max number of clock domains */ 1102 UINT64 MaxAddress; /* Max physical address in system */ 1103 1104 } ACPI_TABLE_MSCT; 1105 1106 1107 /* Subtable - Maximum Proximity Domain Information. Version 1 */ 1108 1109 typedef struct acpi_msct_proximity 1110 { 1111 UINT8 Revision; 1112 UINT8 Length; 1113 UINT32 RangeStart; /* Start of domain range */ 1114 UINT32 RangeEnd; /* End of domain range */ 1115 UINT32 ProcessorCapacity; 1116 UINT64 MemoryCapacity; /* In bytes */ 1117 1118 } ACPI_MSCT_PROXIMITY; 1119 1120 1121 /******************************************************************************* 1122 * 1123 * MSDM - Microsoft Data Management table 1124 * 1125 * Conforms to "Microsoft Software Licensing Tables (SLIC and MSDM)", 1126 * November 29, 2011. Copyright 2011 Microsoft 1127 * 1128 ******************************************************************************/ 1129 1130 /* Basic MSDM table is only the common ACPI header */ 1131 1132 typedef struct acpi_table_msdm 1133 { 1134 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1135 1136 } ACPI_TABLE_MSDM; 1137 1138 1139 /******************************************************************************* 1140 * 1141 * MTMR - MID Timer Table 1142 * Version 1 1143 * 1144 * Conforms to "Simple Firmware Interface Specification", 1145 * Draft 0.8.2, Oct 19, 2010 1146 * NOTE: The ACPI MTMR is equivalent to the SFI MTMR table. 1147 * 1148 ******************************************************************************/ 1149 1150 typedef struct acpi_table_mtmr 1151 { 1152 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1153 1154 } ACPI_TABLE_MTMR; 1155 1156 /* MTMR entry */ 1157 1158 typedef struct acpi_mtmr_entry 1159 { 1160 ACPI_GENERIC_ADDRESS PhysicalAddress; 1161 UINT32 Frequency; 1162 UINT32 Irq; 1163 1164 } ACPI_MTMR_ENTRY; 1165 1166 1167 /******************************************************************************* 1168 * 1169 * NFIT - NVDIMM Interface Table (ACPI 6.0+) 1170 * Version 1 1171 * 1172 ******************************************************************************/ 1173 1174 typedef struct acpi_table_nfit 1175 { 1176 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1177 UINT32 Reserved; /* Reserved, must be zero */ 1178 1179 } ACPI_TABLE_NFIT; 1180 1181 /* Subtable header for NFIT */ 1182 1183 typedef struct acpi_nfit_header 1184 { 1185 UINT16 Type; 1186 UINT16 Length; 1187 1188 } ACPI_NFIT_HEADER; 1189 1190 1191 /* Values for subtable type in ACPI_NFIT_HEADER */ 1192 1193 enum AcpiNfitType 1194 { 1195 ACPI_NFIT_TYPE_SYSTEM_ADDRESS = 0, 1196 ACPI_NFIT_TYPE_MEMORY_MAP = 1, 1197 ACPI_NFIT_TYPE_INTERLEAVE = 2, 1198 ACPI_NFIT_TYPE_SMBIOS = 3, 1199 ACPI_NFIT_TYPE_CONTROL_REGION = 4, 1200 ACPI_NFIT_TYPE_DATA_REGION = 5, 1201 ACPI_NFIT_TYPE_FLUSH_ADDRESS = 6, 1202 ACPI_NFIT_TYPE_CAPABILITIES = 7, 1203 ACPI_NFIT_TYPE_RESERVED = 8 /* 8 and greater are reserved */ 1204 }; 1205 1206 /* 1207 * NFIT Subtables 1208 */ 1209 1210 /* 0: System Physical Address Range Structure */ 1211 1212 typedef struct acpi_nfit_system_address 1213 { 1214 ACPI_NFIT_HEADER Header; 1215 UINT16 RangeIndex; 1216 UINT16 Flags; 1217 UINT32 Reserved; /* Reserved, must be zero */ 1218 UINT32 ProximityDomain; 1219 UINT8 RangeGuid[16]; 1220 UINT64 Address; 1221 UINT64 Length; 1222 UINT64 MemoryMapping; 1223 1224 } ACPI_NFIT_SYSTEM_ADDRESS; 1225 1226 /* Flags */ 1227 1228 #define ACPI_NFIT_ADD_ONLINE_ONLY (1) /* 00: Add/Online Operation Only */ 1229 #define ACPI_NFIT_PROXIMITY_VALID (1<<1) /* 01: Proximity Domain Valid */ 1230 1231 /* Range Type GUIDs appear in the include/acuuid.h file */ 1232 1233 1234 /* 1: Memory Device to System Address Range Map Structure */ 1235 1236 typedef struct acpi_nfit_memory_map 1237 { 1238 ACPI_NFIT_HEADER Header; 1239 UINT32 DeviceHandle; 1240 UINT16 PhysicalId; 1241 UINT16 RegionId; 1242 UINT16 RangeIndex; 1243 UINT16 RegionIndex; 1244 UINT64 RegionSize; 1245 UINT64 RegionOffset; 1246 UINT64 Address; 1247 UINT16 InterleaveIndex; 1248 UINT16 InterleaveWays; 1249 UINT16 Flags; 1250 UINT16 Reserved; /* Reserved, must be zero */ 1251 1252 } ACPI_NFIT_MEMORY_MAP; 1253 1254 /* Flags */ 1255 1256 #define ACPI_NFIT_MEM_SAVE_FAILED (1) /* 00: Last SAVE to Memory Device failed */ 1257 #define ACPI_NFIT_MEM_RESTORE_FAILED (1<<1) /* 01: Last RESTORE from Memory Device failed */ 1258 #define ACPI_NFIT_MEM_FLUSH_FAILED (1<<2) /* 02: Platform flush failed */ 1259 #define ACPI_NFIT_MEM_NOT_ARMED (1<<3) /* 03: Memory Device is not armed */ 1260 #define ACPI_NFIT_MEM_HEALTH_OBSERVED (1<<4) /* 04: Memory Device observed SMART/health events */ 1261 #define ACPI_NFIT_MEM_HEALTH_ENABLED (1<<5) /* 05: SMART/health events enabled */ 1262 #define ACPI_NFIT_MEM_MAP_FAILED (1<<6) /* 06: Mapping to SPA failed */ 1263 1264 1265 /* 2: Interleave Structure */ 1266 1267 typedef struct acpi_nfit_interleave 1268 { 1269 ACPI_NFIT_HEADER Header; 1270 UINT16 InterleaveIndex; 1271 UINT16 Reserved; /* Reserved, must be zero */ 1272 UINT32 LineCount; 1273 UINT32 LineSize; 1274 UINT32 LineOffset[1]; /* Variable length */ 1275 1276 } ACPI_NFIT_INTERLEAVE; 1277 1278 1279 /* 3: SMBIOS Management Information Structure */ 1280 1281 typedef struct acpi_nfit_smbios 1282 { 1283 ACPI_NFIT_HEADER Header; 1284 UINT32 Reserved; /* Reserved, must be zero */ 1285 UINT8 Data[1]; /* Variable length */ 1286 1287 } ACPI_NFIT_SMBIOS; 1288 1289 1290 /* 4: NVDIMM Control Region Structure */ 1291 1292 typedef struct acpi_nfit_control_region 1293 { 1294 ACPI_NFIT_HEADER Header; 1295 UINT16 RegionIndex; 1296 UINT16 VendorId; 1297 UINT16 DeviceId; 1298 UINT16 RevisionId; 1299 UINT16 SubsystemVendorId; 1300 UINT16 SubsystemDeviceId; 1301 UINT16 SubsystemRevisionId; 1302 UINT8 ValidFields; 1303 UINT8 ManufacturingLocation; 1304 UINT16 ManufacturingDate; 1305 UINT8 Reserved[2]; /* Reserved, must be zero */ 1306 UINT32 SerialNumber; 1307 UINT16 Code; 1308 UINT16 Windows; 1309 UINT64 WindowSize; 1310 UINT64 CommandOffset; 1311 UINT64 CommandSize; 1312 UINT64 StatusOffset; 1313 UINT64 StatusSize; 1314 UINT16 Flags; 1315 UINT8 Reserved1[6]; /* Reserved, must be zero */ 1316 1317 } ACPI_NFIT_CONTROL_REGION; 1318 1319 /* Flags */ 1320 1321 #define ACPI_NFIT_CONTROL_BUFFERED (1) /* Block Data Windows implementation is buffered */ 1322 1323 /* ValidFields bits */ 1324 1325 #define ACPI_NFIT_CONTROL_MFG_INFO_VALID (1) /* Manufacturing fields are valid */ 1326 1327 1328 /* 5: NVDIMM Block Data Window Region Structure */ 1329 1330 typedef struct acpi_nfit_data_region 1331 { 1332 ACPI_NFIT_HEADER Header; 1333 UINT16 RegionIndex; 1334 UINT16 Windows; 1335 UINT64 Offset; 1336 UINT64 Size; 1337 UINT64 Capacity; 1338 UINT64 StartAddress; 1339 1340 } ACPI_NFIT_DATA_REGION; 1341 1342 1343 /* 6: Flush Hint Address Structure */ 1344 1345 typedef struct acpi_nfit_flush_address 1346 { 1347 ACPI_NFIT_HEADER Header; 1348 UINT32 DeviceHandle; 1349 UINT16 HintCount; 1350 UINT8 Reserved[6]; /* Reserved, must be zero */ 1351 UINT64 HintAddress[1]; /* Variable length */ 1352 1353 } ACPI_NFIT_FLUSH_ADDRESS; 1354 1355 1356 /* 7: Platform Capabilities Structure */ 1357 1358 typedef struct acpi_nfit_capabilities 1359 { 1360 ACPI_NFIT_HEADER Header; 1361 UINT8 HighestCapability; 1362 UINT8 Reserved[3]; /* Reserved, must be zero */ 1363 UINT32 Capabilities; 1364 UINT32 Reserved2; 1365 1366 } ACPI_NFIT_CAPABILITIES; 1367 1368 /* Capabilities Flags */ 1369 1370 #define ACPI_NFIT_CAPABILITY_CACHE_FLUSH (1) /* 00: Cache Flush to NVDIMM capable */ 1371 #define ACPI_NFIT_CAPABILITY_MEM_FLUSH (1<<1) /* 01: Memory Flush to NVDIMM capable */ 1372 #define ACPI_NFIT_CAPABILITY_MEM_MIRRORING (1<<2) /* 02: Memory Mirroring capable */ 1373 1374 1375 /* 1376 * NFIT/DVDIMM device handle support - used as the _ADR for each NVDIMM 1377 */ 1378 typedef struct nfit_device_handle 1379 { 1380 UINT32 Handle; 1381 1382 } NFIT_DEVICE_HANDLE; 1383 1384 /* Device handle construction and extraction macros */ 1385 1386 #define ACPI_NFIT_DIMM_NUMBER_MASK 0x0000000F 1387 #define ACPI_NFIT_CHANNEL_NUMBER_MASK 0x000000F0 1388 #define ACPI_NFIT_MEMORY_ID_MASK 0x00000F00 1389 #define ACPI_NFIT_SOCKET_ID_MASK 0x0000F000 1390 #define ACPI_NFIT_NODE_ID_MASK 0x0FFF0000 1391 1392 #define ACPI_NFIT_DIMM_NUMBER_OFFSET 0 1393 #define ACPI_NFIT_CHANNEL_NUMBER_OFFSET 4 1394 #define ACPI_NFIT_MEMORY_ID_OFFSET 8 1395 #define ACPI_NFIT_SOCKET_ID_OFFSET 12 1396 #define ACPI_NFIT_NODE_ID_OFFSET 16 1397 1398 /* Macro to construct a NFIT/NVDIMM device handle */ 1399 1400 #define ACPI_NFIT_BUILD_DEVICE_HANDLE(dimm, channel, memory, socket, node) \ 1401 ((dimm) | \ 1402 ((channel) << ACPI_NFIT_CHANNEL_NUMBER_OFFSET) | \ 1403 ((memory) << ACPI_NFIT_MEMORY_ID_OFFSET) | \ 1404 ((socket) << ACPI_NFIT_SOCKET_ID_OFFSET) | \ 1405 ((node) << ACPI_NFIT_NODE_ID_OFFSET)) 1406 1407 /* Macros to extract individual fields from a NFIT/NVDIMM device handle */ 1408 1409 #define ACPI_NFIT_GET_DIMM_NUMBER(handle) \ 1410 ((handle) & ACPI_NFIT_DIMM_NUMBER_MASK) 1411 1412 #define ACPI_NFIT_GET_CHANNEL_NUMBER(handle) \ 1413 (((handle) & ACPI_NFIT_CHANNEL_NUMBER_MASK) >> ACPI_NFIT_CHANNEL_NUMBER_OFFSET) 1414 1415 #define ACPI_NFIT_GET_MEMORY_ID(handle) \ 1416 (((handle) & ACPI_NFIT_MEMORY_ID_MASK) >> ACPI_NFIT_MEMORY_ID_OFFSET) 1417 1418 #define ACPI_NFIT_GET_SOCKET_ID(handle) \ 1419 (((handle) & ACPI_NFIT_SOCKET_ID_MASK) >> ACPI_NFIT_SOCKET_ID_OFFSET) 1420 1421 #define ACPI_NFIT_GET_NODE_ID(handle) \ 1422 (((handle) & ACPI_NFIT_NODE_ID_MASK) >> ACPI_NFIT_NODE_ID_OFFSET) 1423 1424 1425 /******************************************************************************* 1426 * 1427 * PCCT - Platform Communications Channel Table (ACPI 5.0) 1428 * Version 2 (ACPI 6.2) 1429 * 1430 ******************************************************************************/ 1431 1432 typedef struct acpi_table_pcct 1433 { 1434 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1435 UINT32 Flags; 1436 UINT64 Reserved; 1437 1438 } ACPI_TABLE_PCCT; 1439 1440 /* Values for Flags field above */ 1441 1442 #define ACPI_PCCT_DOORBELL 1 1443 1444 /* Values for subtable type in ACPI_SUBTABLE_HEADER */ 1445 1446 enum AcpiPcctType 1447 { 1448 ACPI_PCCT_TYPE_GENERIC_SUBSPACE = 0, 1449 ACPI_PCCT_TYPE_HW_REDUCED_SUBSPACE = 1, 1450 ACPI_PCCT_TYPE_HW_REDUCED_SUBSPACE_TYPE2 = 2, /* ACPI 6.1 */ 1451 ACPI_PCCT_TYPE_EXT_PCC_MASTER_SUBSPACE = 3, /* ACPI 6.2 */ 1452 ACPI_PCCT_TYPE_EXT_PCC_SLAVE_SUBSPACE = 4, /* ACPI 6.2 */ 1453 ACPI_PCCT_TYPE_RESERVED = 5 /* 5 and greater are reserved */ 1454 }; 1455 1456 /* 1457 * PCCT Subtables, correspond to Type in ACPI_SUBTABLE_HEADER 1458 */ 1459 1460 /* 0: Generic Communications Subspace */ 1461 1462 typedef struct acpi_pcct_subspace 1463 { 1464 ACPI_SUBTABLE_HEADER Header; 1465 UINT8 Reserved[6]; 1466 UINT64 BaseAddress; 1467 UINT64 Length; 1468 ACPI_GENERIC_ADDRESS DoorbellRegister; 1469 UINT64 PreserveMask; 1470 UINT64 WriteMask; 1471 UINT32 Latency; 1472 UINT32 MaxAccessRate; 1473 UINT16 MinTurnaroundTime; 1474 1475 } ACPI_PCCT_SUBSPACE; 1476 1477 1478 /* 1: HW-reduced Communications Subspace (ACPI 5.1) */ 1479 1480 typedef struct acpi_pcct_hw_reduced 1481 { 1482 ACPI_SUBTABLE_HEADER Header; 1483 UINT32 PlatformInterrupt; 1484 UINT8 Flags; 1485 UINT8 Reserved; 1486 UINT64 BaseAddress; 1487 UINT64 Length; 1488 ACPI_GENERIC_ADDRESS DoorbellRegister; 1489 UINT64 PreserveMask; 1490 UINT64 WriteMask; 1491 UINT32 Latency; 1492 UINT32 MaxAccessRate; 1493 UINT16 MinTurnaroundTime; 1494 1495 } ACPI_PCCT_HW_REDUCED; 1496 1497 1498 /* 2: HW-reduced Communications Subspace Type 2 (ACPI 6.1) */ 1499 1500 typedef struct acpi_pcct_hw_reduced_type2 1501 { 1502 ACPI_SUBTABLE_HEADER Header; 1503 UINT32 PlatformInterrupt; 1504 UINT8 Flags; 1505 UINT8 Reserved; 1506 UINT64 BaseAddress; 1507 UINT64 Length; 1508 ACPI_GENERIC_ADDRESS DoorbellRegister; 1509 UINT64 PreserveMask; 1510 UINT64 WriteMask; 1511 UINT32 Latency; 1512 UINT32 MaxAccessRate; 1513 UINT16 MinTurnaroundTime; 1514 ACPI_GENERIC_ADDRESS PlatformAckRegister; 1515 UINT64 AckPreserveMask; 1516 UINT64 AckWriteMask; 1517 1518 } ACPI_PCCT_HW_REDUCED_TYPE2; 1519 1520 1521 /* 3: Extended PCC Master Subspace Type 3 (ACPI 6.2) */ 1522 1523 typedef struct acpi_pcct_ext_pcc_master 1524 { 1525 ACPI_SUBTABLE_HEADER Header; 1526 UINT32 PlatformInterrupt; 1527 UINT8 Flags; 1528 UINT8 Reserved1; 1529 UINT64 BaseAddress; 1530 UINT32 Length; 1531 ACPI_GENERIC_ADDRESS DoorbellRegister; 1532 UINT64 PreserveMask; 1533 UINT64 WriteMask; 1534 UINT32 Latency; 1535 UINT32 MaxAccessRate; 1536 UINT32 MinTurnaroundTime; 1537 ACPI_GENERIC_ADDRESS PlatformAckRegister; 1538 UINT64 AckPreserveMask; 1539 UINT64 AckSetMask; 1540 UINT64 Reserved2; 1541 ACPI_GENERIC_ADDRESS CmdCompleteRegister; 1542 UINT64 CmdCompleteMask; 1543 ACPI_GENERIC_ADDRESS CmdUpdateRegister; 1544 UINT64 CmdUpdatePreserveMask; 1545 UINT64 CmdUpdateSetMask; 1546 ACPI_GENERIC_ADDRESS ErrorStatusRegister; 1547 UINT64 ErrorStatusMask; 1548 1549 } ACPI_PCCT_EXT_PCC_MASTER; 1550 1551 1552 /* 4: Extended PCC Slave Subspace Type 4 (ACPI 6.2) */ 1553 1554 typedef struct acpi_pcct_ext_pcc_slave 1555 { 1556 ACPI_SUBTABLE_HEADER Header; 1557 UINT32 PlatformInterrupt; 1558 UINT8 Flags; 1559 UINT8 Reserved1; 1560 UINT64 BaseAddress; 1561 UINT32 Length; 1562 ACPI_GENERIC_ADDRESS DoorbellRegister; 1563 UINT64 PreserveMask; 1564 UINT64 WriteMask; 1565 UINT32 Latency; 1566 UINT32 MaxAccessRate; 1567 UINT32 MinTurnaroundTime; 1568 ACPI_GENERIC_ADDRESS PlatformAckRegister; 1569 UINT64 AckPreserveMask; 1570 UINT64 AckSetMask; 1571 UINT64 Reserved2; 1572 ACPI_GENERIC_ADDRESS CmdCompleteRegister; 1573 UINT64 CmdCompleteMask; 1574 ACPI_GENERIC_ADDRESS CmdUpdateRegister; 1575 UINT64 CmdUpdatePreserveMask; 1576 UINT64 CmdUpdateSetMask; 1577 ACPI_GENERIC_ADDRESS ErrorStatusRegister; 1578 UINT64 ErrorStatusMask; 1579 1580 } ACPI_PCCT_EXT_PCC_SLAVE; 1581 1582 1583 /* Values for doorbell flags above */ 1584 1585 #define ACPI_PCCT_INTERRUPT_POLARITY (1) 1586 #define ACPI_PCCT_INTERRUPT_MODE (1<<1) 1587 1588 1589 /* 1590 * PCC memory structures (not part of the ACPI table) 1591 */ 1592 1593 /* Shared Memory Region */ 1594 1595 typedef struct acpi_pcct_shared_memory 1596 { 1597 UINT32 Signature; 1598 UINT16 Command; 1599 UINT16 Status; 1600 1601 } ACPI_PCCT_SHARED_MEMORY; 1602 1603 1604 /* Extended PCC Subspace Shared Memory Region (ACPI 6.2) */ 1605 1606 typedef struct acpi_pcct_ext_pcc_shared_memory 1607 { 1608 UINT32 Signature; 1609 UINT32 Flags; 1610 UINT32 Length; 1611 UINT32 Command; 1612 1613 } ACPI_PCCT_EXT_PCC_SHARED_MEMORY; 1614 1615 1616 /******************************************************************************* 1617 * 1618 * PDTT - Platform Debug Trigger Table (ACPI 6.2) 1619 * Version 0 1620 * 1621 ******************************************************************************/ 1622 1623 typedef struct acpi_table_pdtt 1624 { 1625 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1626 UINT8 TriggerCount; 1627 UINT8 Reserved[3]; 1628 UINT32 ArrayOffset; 1629 1630 } ACPI_TABLE_PDTT; 1631 1632 1633 /* 1634 * PDTT Communication Channel Identifier Structure. 1635 * The number of these structures is defined by TriggerCount above, 1636 * starting at ArrayOffset. 1637 */ 1638 typedef struct acpi_pdtt_channel 1639 { 1640 UINT8 SubchannelId; 1641 UINT8 Flags; 1642 1643 } ACPI_PDTT_CHANNEL; 1644 1645 /* Flags for above */ 1646 1647 #define ACPI_PDTT_RUNTIME_TRIGGER (1) 1648 #define ACPI_PDTT_WAIT_COMPLETION (1<<1) 1649 #define ACPI_PDTT_TRIGGER_ORDER (1<<2) 1650 1651 1652 /******************************************************************************* 1653 * 1654 * PMTT - Platform Memory Topology Table (ACPI 5.0) 1655 * Version 1 1656 * 1657 ******************************************************************************/ 1658 1659 typedef struct acpi_table_pmtt 1660 { 1661 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1662 UINT32 Reserved; 1663 1664 } ACPI_TABLE_PMTT; 1665 1666 1667 /* Common header for PMTT subtables that follow main table */ 1668 1669 typedef struct acpi_pmtt_header 1670 { 1671 UINT8 Type; 1672 UINT8 Reserved1; 1673 UINT16 Length; 1674 UINT16 Flags; 1675 UINT16 Reserved2; 1676 1677 } ACPI_PMTT_HEADER; 1678 1679 /* Values for Type field above */ 1680 1681 #define ACPI_PMTT_TYPE_SOCKET 0 1682 #define ACPI_PMTT_TYPE_CONTROLLER 1 1683 #define ACPI_PMTT_TYPE_DIMM 2 1684 #define ACPI_PMTT_TYPE_RESERVED 3 /* 0x03-0xFF are reserved */ 1685 1686 /* Values for Flags field above */ 1687 1688 #define ACPI_PMTT_TOP_LEVEL 0x0001 1689 #define ACPI_PMTT_PHYSICAL 0x0002 1690 #define ACPI_PMTT_MEMORY_TYPE 0x000C 1691 1692 1693 /* 1694 * PMTT subtables, correspond to Type in acpi_pmtt_header 1695 */ 1696 1697 1698 /* 0: Socket Structure */ 1699 1700 typedef struct acpi_pmtt_socket 1701 { 1702 ACPI_PMTT_HEADER Header; 1703 UINT16 SocketId; 1704 UINT16 Reserved; 1705 1706 } ACPI_PMTT_SOCKET; 1707 1708 1709 /* 1: Memory Controller subtable */ 1710 1711 typedef struct acpi_pmtt_controller 1712 { 1713 ACPI_PMTT_HEADER Header; 1714 UINT32 ReadLatency; 1715 UINT32 WriteLatency; 1716 UINT32 ReadBandwidth; 1717 UINT32 WriteBandwidth; 1718 UINT16 AccessWidth; 1719 UINT16 Alignment; 1720 UINT16 Reserved; 1721 UINT16 DomainCount; 1722 1723 } ACPI_PMTT_CONTROLLER; 1724 1725 /* 1a: Proximity Domain substructure */ 1726 1727 typedef struct acpi_pmtt_domain 1728 { 1729 UINT32 ProximityDomain; 1730 1731 } ACPI_PMTT_DOMAIN; 1732 1733 1734 /* 2: Physical Component Identifier (DIMM) */ 1735 1736 typedef struct acpi_pmtt_physical_component 1737 { 1738 ACPI_PMTT_HEADER Header; 1739 UINT16 ComponentId; 1740 UINT16 Reserved; 1741 UINT32 MemorySize; 1742 UINT32 BiosHandle; 1743 1744 } ACPI_PMTT_PHYSICAL_COMPONENT; 1745 1746 1747 /******************************************************************************* 1748 * 1749 * PPTT - Processor Properties Topology Table (ACPI 6.2) 1750 * Version 1 1751 * 1752 ******************************************************************************/ 1753 1754 typedef struct acpi_table_pptt 1755 { 1756 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1757 1758 } ACPI_TABLE_PPTT; 1759 1760 /* Values for Type field above */ 1761 1762 enum AcpiPpttType 1763 { 1764 ACPI_PPTT_TYPE_PROCESSOR = 0, 1765 ACPI_PPTT_TYPE_CACHE = 1, 1766 ACPI_PPTT_TYPE_ID = 2, 1767 ACPI_PPTT_TYPE_RESERVED = 3 1768 }; 1769 1770 1771 /* 0: Processor Hierarchy Node Structure */ 1772 1773 typedef struct acpi_pptt_processor 1774 { 1775 ACPI_SUBTABLE_HEADER Header; 1776 UINT16 Reserved; 1777 UINT32 Flags; 1778 UINT32 Parent; 1779 UINT32 AcpiProcessorId; 1780 UINT32 NumberOfPrivResources; 1781 1782 } ACPI_PPTT_PROCESSOR; 1783 1784 /* Flags */ 1785 1786 #define ACPI_PPTT_PHYSICAL_PACKAGE (1) 1787 #define ACPI_PPTT_ACPI_PROCESSOR_ID_VALID (1<<1) 1788 #define ACPI_PPTT_ACPI_PROCESSOR_IS_THREAD (1<<2) /* ACPI 6.3 */ 1789 #define ACPI_PPTT_ACPI_LEAF_NODE (1<<3) /* ACPI 6.3 */ 1790 #define ACPI_PPTT_ACPI_IDENTICAL (1<<4) /* ACPI 6.3 */ 1791 1792 1793 /* 1: Cache Type Structure */ 1794 1795 typedef struct acpi_pptt_cache 1796 { 1797 ACPI_SUBTABLE_HEADER Header; 1798 UINT16 Reserved; 1799 UINT32 Flags; 1800 UINT32 NextLevelOfCache; 1801 UINT32 Size; 1802 UINT32 NumberOfSets; 1803 UINT8 Associativity; 1804 UINT8 Attributes; 1805 UINT16 LineSize; 1806 1807 } ACPI_PPTT_CACHE; 1808 1809 /* Flags */ 1810 1811 #define ACPI_PPTT_SIZE_PROPERTY_VALID (1) /* Physical property valid */ 1812 #define ACPI_PPTT_NUMBER_OF_SETS_VALID (1<<1) /* Number of sets valid */ 1813 #define ACPI_PPTT_ASSOCIATIVITY_VALID (1<<2) /* Associativity valid */ 1814 #define ACPI_PPTT_ALLOCATION_TYPE_VALID (1<<3) /* Allocation type valid */ 1815 #define ACPI_PPTT_CACHE_TYPE_VALID (1<<4) /* Cache type valid */ 1816 #define ACPI_PPTT_WRITE_POLICY_VALID (1<<5) /* Write policy valid */ 1817 #define ACPI_PPTT_LINE_SIZE_VALID (1<<6) /* Line size valid */ 1818 1819 /* Masks for Attributes */ 1820 1821 #define ACPI_PPTT_MASK_ALLOCATION_TYPE (0x03) /* Allocation type */ 1822 #define ACPI_PPTT_MASK_CACHE_TYPE (0x0C) /* Cache type */ 1823 #define ACPI_PPTT_MASK_WRITE_POLICY (0x10) /* Write policy */ 1824 1825 /* Attributes describing cache */ 1826 #define ACPI_PPTT_CACHE_READ_ALLOCATE (0x0) /* Cache line is allocated on read */ 1827 #define ACPI_PPTT_CACHE_WRITE_ALLOCATE (0x01) /* Cache line is allocated on write */ 1828 #define ACPI_PPTT_CACHE_RW_ALLOCATE (0x02) /* Cache line is allocated on read and write */ 1829 #define ACPI_PPTT_CACHE_RW_ALLOCATE_ALT (0x03) /* Alternate representation of above */ 1830 1831 #define ACPI_PPTT_CACHE_TYPE_DATA (0x0) /* Data cache */ 1832 #define ACPI_PPTT_CACHE_TYPE_INSTR (1<<2) /* Instruction cache */ 1833 #define ACPI_PPTT_CACHE_TYPE_UNIFIED (2<<2) /* Unified I & D cache */ 1834 #define ACPI_PPTT_CACHE_TYPE_UNIFIED_ALT (3<<2) /* Alternate representation of above */ 1835 1836 #define ACPI_PPTT_CACHE_POLICY_WB (0x0) /* Cache is write back */ 1837 #define ACPI_PPTT_CACHE_POLICY_WT (1<<4) /* Cache is write through */ 1838 1839 /* 2: ID Structure */ 1840 1841 typedef struct acpi_pptt_id 1842 { 1843 ACPI_SUBTABLE_HEADER Header; 1844 UINT16 Reserved; 1845 UINT32 VendorId; 1846 UINT64 Level1Id; 1847 UINT64 Level2Id; 1848 UINT16 MajorRev; 1849 UINT16 MinorRev; 1850 UINT16 SpinRev; 1851 1852 } ACPI_PPTT_ID; 1853 1854 1855 /******************************************************************************* 1856 * 1857 * RASF - RAS Feature Table (ACPI 5.0) 1858 * Version 1 1859 * 1860 ******************************************************************************/ 1861 1862 typedef struct acpi_table_rasf 1863 { 1864 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1865 UINT8 ChannelId[12]; 1866 1867 } ACPI_TABLE_RASF; 1868 1869 /* RASF Platform Communication Channel Shared Memory Region */ 1870 1871 typedef struct acpi_rasf_shared_memory 1872 { 1873 UINT32 Signature; 1874 UINT16 Command; 1875 UINT16 Status; 1876 UINT16 Version; 1877 UINT8 Capabilities[16]; 1878 UINT8 SetCapabilities[16]; 1879 UINT16 NumParameterBlocks; 1880 UINT32 SetCapabilitiesStatus; 1881 1882 } ACPI_RASF_SHARED_MEMORY; 1883 1884 /* RASF Parameter Block Structure Header */ 1885 1886 typedef struct acpi_rasf_parameter_block 1887 { 1888 UINT16 Type; 1889 UINT16 Version; 1890 UINT16 Length; 1891 1892 } ACPI_RASF_PARAMETER_BLOCK; 1893 1894 /* RASF Parameter Block Structure for PATROL_SCRUB */ 1895 1896 typedef struct acpi_rasf_patrol_scrub_parameter 1897 { 1898 ACPI_RASF_PARAMETER_BLOCK Header; 1899 UINT16 PatrolScrubCommand; 1900 UINT64 RequestedAddressRange[2]; 1901 UINT64 ActualAddressRange[2]; 1902 UINT16 Flags; 1903 UINT8 RequestedSpeed; 1904 1905 } ACPI_RASF_PATROL_SCRUB_PARAMETER; 1906 1907 /* Masks for Flags and Speed fields above */ 1908 1909 #define ACPI_RASF_SCRUBBER_RUNNING 1 1910 #define ACPI_RASF_SPEED (7<<1) 1911 #define ACPI_RASF_SPEED_SLOW (0<<1) 1912 #define ACPI_RASF_SPEED_MEDIUM (4<<1) 1913 #define ACPI_RASF_SPEED_FAST (7<<1) 1914 1915 /* Channel Commands */ 1916 1917 enum AcpiRasfCommands 1918 { 1919 ACPI_RASF_EXECUTE_RASF_COMMAND = 1 1920 }; 1921 1922 /* Platform RAS Capabilities */ 1923 1924 enum AcpiRasfCapabiliities 1925 { 1926 ACPI_HW_PATROL_SCRUB_SUPPORTED = 0, 1927 ACPI_SW_PATROL_SCRUB_EXPOSED = 1 1928 }; 1929 1930 /* Patrol Scrub Commands */ 1931 1932 enum AcpiRasfPatrolScrubCommands 1933 { 1934 ACPI_RASF_GET_PATROL_PARAMETERS = 1, 1935 ACPI_RASF_START_PATROL_SCRUBBER = 2, 1936 ACPI_RASF_STOP_PATROL_SCRUBBER = 3 1937 }; 1938 1939 /* Channel Command flags */ 1940 1941 #define ACPI_RASF_GENERATE_SCI (1<<15) 1942 1943 /* Status values */ 1944 1945 enum AcpiRasfStatus 1946 { 1947 ACPI_RASF_SUCCESS = 0, 1948 ACPI_RASF_NOT_VALID = 1, 1949 ACPI_RASF_NOT_SUPPORTED = 2, 1950 ACPI_RASF_BUSY = 3, 1951 ACPI_RASF_FAILED = 4, 1952 ACPI_RASF_ABORTED = 5, 1953 ACPI_RASF_INVALID_DATA = 6 1954 }; 1955 1956 /* Status flags */ 1957 1958 #define ACPI_RASF_COMMAND_COMPLETE (1) 1959 #define ACPI_RASF_SCI_DOORBELL (1<<1) 1960 #define ACPI_RASF_ERROR (1<<2) 1961 #define ACPI_RASF_STATUS (0x1F<<3) 1962 1963 1964 /******************************************************************************* 1965 * 1966 * SBST - Smart Battery Specification Table 1967 * Version 1 1968 * 1969 ******************************************************************************/ 1970 1971 typedef struct acpi_table_sbst 1972 { 1973 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1974 UINT32 WarningLevel; 1975 UINT32 LowLevel; 1976 UINT32 CriticalLevel; 1977 1978 } ACPI_TABLE_SBST; 1979 1980 1981 /******************************************************************************* 1982 * 1983 * SDEI - Software Delegated Exception Interface Descriptor Table 1984 * 1985 * Conforms to "Software Delegated Exception Interface (SDEI)" ARM DEN0054A, 1986 * May 8th, 2017. Copyright 2017 ARM Ltd. 1987 * 1988 ******************************************************************************/ 1989 1990 typedef struct acpi_table_sdei 1991 { 1992 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1993 1994 } ACPI_TABLE_SDEI; 1995 1996 1997 /******************************************************************************* 1998 * 1999 * SDEV - Secure Devices Table (ACPI 6.2) 2000 * Version 1 2001 * 2002 ******************************************************************************/ 2003 2004 typedef struct acpi_table_sdev 2005 { 2006 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 2007 2008 } ACPI_TABLE_SDEV; 2009 2010 2011 typedef struct acpi_sdev_header 2012 { 2013 UINT8 Type; 2014 UINT8 Flags; 2015 UINT16 Length; 2016 2017 } ACPI_SDEV_HEADER; 2018 2019 2020 /* Values for subtable type above */ 2021 2022 enum AcpiSdevType 2023 { 2024 ACPI_SDEV_TYPE_NAMESPACE_DEVICE = 0, 2025 ACPI_SDEV_TYPE_PCIE_ENDPOINT_DEVICE = 1, 2026 ACPI_SDEV_TYPE_RESERVED = 2 /* 2 and greater are reserved */ 2027 }; 2028 2029 /* Values for flags above */ 2030 2031 #define ACPI_SDEV_HANDOFF_TO_UNSECURE_OS (1) 2032 2033 /* 2034 * SDEV subtables 2035 */ 2036 2037 /* 0: Namespace Device Based Secure Device Structure */ 2038 2039 typedef struct acpi_sdev_namespace 2040 { 2041 ACPI_SDEV_HEADER Header; 2042 UINT16 DeviceIdOffset; 2043 UINT16 DeviceIdLength; 2044 UINT16 VendorDataOffset; 2045 UINT16 VendorDataLength; 2046 2047 } ACPI_SDEV_NAMESPACE; 2048 2049 /* 1: PCIe Endpoint Device Based Device Structure */ 2050 2051 typedef struct acpi_sdev_pcie 2052 { 2053 ACPI_SDEV_HEADER Header; 2054 UINT16 Segment; 2055 UINT16 StartBus; 2056 UINT16 PathOffset; 2057 UINT16 PathLength; 2058 UINT16 VendorDataOffset; 2059 UINT16 VendorDataLength; 2060 2061 } ACPI_SDEV_PCIE; 2062 2063 /* 1a: PCIe Endpoint path entry */ 2064 2065 typedef struct acpi_sdev_pcie_path 2066 { 2067 UINT8 Device; 2068 UINT8 Function; 2069 2070 } ACPI_SDEV_PCIE_PATH; 2071 2072 2073 /* Reset to default packing */ 2074 2075 #pragma pack() 2076 2077 #endif /* __ACTBL2_H__ */ 2078
Indexes created Tue Sep 30 17:09:57 GMT 2025