actbl2.h revision 1.1.1.18
1 /****************************************************************************** 2 * 3 * Name: actbl2.h - ACPI Table Definitions (tables not in ACPI spec) 4 * 5 *****************************************************************************/ 6 7 /* 8 * Copyright (C) 2000 - 2021, Intel Corp. 9 * All rights reserved. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions, and the following disclaimer, 16 * without modification. 17 * 2. Redistributions in binary form must reproduce at minimum a disclaimer 18 * substantially similar to the "NO WARRANTY" disclaimer below 19 * ("Disclaimer") and any redistribution must be conditioned upon 20 * including a substantially similar Disclaimer requirement for further 21 * binary redistribution. 22 * 3. Neither the names of the above-listed copyright holders nor the names 23 * of any contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * Alternatively, this software may be distributed under the terms of the 27 * GNU General Public License ("GPL") version 2 as published by the Free 28 * Software Foundation. 29 * 30 * NO WARRANTY 31 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 32 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 33 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 34 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 35 * HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 36 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 37 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 38 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 39 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING 40 * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 41 * POSSIBILITY OF SUCH DAMAGES. 42 */ 43 44 #ifndef __ACTBL2_H__ 45 #define __ACTBL2_H__ 46 47 48 /******************************************************************************* 49 * 50 * Additional ACPI Tables (2) 51 * 52 * These tables are not consumed directly by the ACPICA subsystem, but are 53 * included here to support device drivers and the AML disassembler. 54 * 55 ******************************************************************************/ 56 57 58 /* 59 * Values for description table header signatures for tables defined in this 60 * file. Useful because they make it more difficult to inadvertently type in 61 * the wrong signature. 62 */ 63 #define ACPI_SIG_IORT "IORT" /* IO Remapping Table */ 64 #define ACPI_SIG_IVRS "IVRS" /* I/O Virtualization Reporting Structure */ 65 #define ACPI_SIG_LPIT "LPIT" /* Low Power Idle Table */ 66 #define ACPI_SIG_MADT "APIC" /* Multiple APIC Description Table */ 67 #define ACPI_SIG_MCFG "MCFG" /* PCI Memory Mapped Configuration table */ 68 #define ACPI_SIG_MCHI "MCHI" /* Management Controller Host Interface table */ 69 #define ACPI_SIG_MPST "MPST" /* Memory Power State Table */ 70 #define ACPI_SIG_MSCT "MSCT" /* Maximum System Characteristics Table */ 71 #define ACPI_SIG_MSDM "MSDM" /* Microsoft Data Management Table */ 72 #define ACPI_SIG_NFIT "NFIT" /* NVDIMM Firmware Interface Table */ 73 #define ACPI_SIG_PCCT "PCCT" /* Platform Communications Channel Table */ 74 #define ACPI_SIG_PDTT "PDTT" /* Platform Debug Trigger Table */ 75 #define ACPI_SIG_PHAT "PHAT" /* Platform Health Assessment Table */ 76 #define ACPI_SIG_PMTT "PMTT" /* Platform Memory Topology Table */ 77 #define ACPI_SIG_PPTT "PPTT" /* Processor Properties Topology Table */ 78 #define ACPI_SIG_RASF "RASF" /* RAS Feature table */ 79 #define ACPI_SIG_SBST "SBST" /* Smart Battery Specification Table */ 80 #define ACPI_SIG_SDEI "SDEI" /* Software Delegated Exception Interface Table */ 81 #define ACPI_SIG_SDEV "SDEV" /* Secure Devices table */ 82 #define ACPI_SIG_NHLT "NHLT" /* Non-HDAudio Link Table */ 83 84 85 /* 86 * All tables must be byte-packed to match the ACPI specification, since 87 * the tables are provided by the system BIOS. 88 */ 89 #pragma pack(1) 90 91 /* 92 * Note: C bitfields are not used for this reason: 93 * 94 * "Bitfields are great and easy to read, but unfortunately the C language 95 * does not specify the layout of bitfields in memory, which means they are 96 * essentially useless for dealing with packed data in on-disk formats or 97 * binary wire protocols." (Or ACPI tables and buffers.) "If you ask me, 98 * this decision was a design error in C. Ritchie could have picked an order 99 * and stuck with it." Norman Ramsey. 100 * See http://stackoverflow.com/a/1053662/41661 101 */ 102 103 104 /******************************************************************************* 105 * 106 * IORT - IO Remapping Table 107 * 108 * Conforms to "IO Remapping Table System Software on ARM Platforms", 109 * Document number: ARM DEN 0049E.b, Feb 2021 110 * 111 ******************************************************************************/ 112 113 typedef struct acpi_table_iort 114 { 115 ACPI_TABLE_HEADER Header; 116 UINT32 NodeCount; 117 UINT32 NodeOffset; 118 UINT32 Reserved; 119 120 } ACPI_TABLE_IORT; 121 122 123 /* 124 * IORT subtables 125 */ 126 typedef struct acpi_iort_node 127 { 128 UINT8 Type; 129 UINT16 Length; 130 UINT8 Revision; 131 UINT32 Identifier; 132 UINT32 MappingCount; 133 UINT32 MappingOffset; 134 char NodeData[1]; 135 136 } ACPI_IORT_NODE; 137 138 /* Values for subtable Type above */ 139 140 enum AcpiIortNodeType 141 { 142 ACPI_IORT_NODE_ITS_GROUP = 0x00, 143 ACPI_IORT_NODE_NAMED_COMPONENT = 0x01, 144 ACPI_IORT_NODE_PCI_ROOT_COMPLEX = 0x02, 145 ACPI_IORT_NODE_SMMU = 0x03, 146 ACPI_IORT_NODE_SMMU_V3 = 0x04, 147 ACPI_IORT_NODE_PMCG = 0x05, 148 ACPI_IORT_NODE_RMR = 0x06, 149 }; 150 151 152 typedef struct acpi_iort_id_mapping 153 { 154 UINT32 InputBase; /* Lowest value in input range */ 155 UINT32 IdCount; /* Number of IDs */ 156 UINT32 OutputBase; /* Lowest value in output range */ 157 UINT32 OutputReference; /* A reference to the output node */ 158 UINT32 Flags; 159 160 } ACPI_IORT_ID_MAPPING; 161 162 /* Masks for Flags field above for IORT subtable */ 163 164 #define ACPI_IORT_ID_SINGLE_MAPPING (1) 165 166 167 typedef struct acpi_iort_memory_access 168 { 169 UINT32 CacheCoherency; 170 UINT8 Hints; 171 UINT16 Reserved; 172 UINT8 MemoryFlags; 173 174 } ACPI_IORT_MEMORY_ACCESS; 175 176 /* Values for CacheCoherency field above */ 177 178 #define ACPI_IORT_NODE_COHERENT 0x00000001 /* The device node is fully coherent */ 179 #define ACPI_IORT_NODE_NOT_COHERENT 0x00000000 /* The device node is not coherent */ 180 181 /* Masks for Hints field above */ 182 183 #define ACPI_IORT_HT_TRANSIENT (1) 184 #define ACPI_IORT_HT_WRITE (1<<1) 185 #define ACPI_IORT_HT_READ (1<<2) 186 #define ACPI_IORT_HT_OVERRIDE (1<<3) 187 188 /* Masks for MemoryFlags field above */ 189 190 #define ACPI_IORT_MF_COHERENCY (1) 191 #define ACPI_IORT_MF_ATTRIBUTES (1<<1) 192 193 194 /* 195 * IORT node specific subtables 196 */ 197 typedef struct acpi_iort_its_group 198 { 199 UINT32 ItsCount; 200 UINT32 Identifiers[1]; /* GIC ITS identifier array */ 201 202 } ACPI_IORT_ITS_GROUP; 203 204 205 typedef struct acpi_iort_named_component 206 { 207 UINT32 NodeFlags; 208 UINT64 MemoryProperties; /* Memory access properties */ 209 UINT8 MemoryAddressLimit; /* Memory address size limit */ 210 char DeviceName[1]; /* Path of namespace object */ 211 212 } ACPI_IORT_NAMED_COMPONENT; 213 214 /* Masks for Flags field above */ 215 216 #define ACPI_IORT_NC_STALL_SUPPORTED (1) 217 #define ACPI_IORT_NC_PASID_BITS (31<<1) 218 219 typedef struct acpi_iort_root_complex 220 { 221 UINT64 MemoryProperties; /* Memory access properties */ 222 UINT32 AtsAttribute; 223 UINT32 PciSegmentNumber; 224 UINT8 MemoryAddressLimit; /* Memory address size limit */ 225 UINT8 Reserved[3]; /* Reserved, must be zero */ 226 227 } ACPI_IORT_ROOT_COMPLEX; 228 229 /* Masks for AtsAttribute field above */ 230 231 #define ACPI_IORT_ATS_SUPPORTED (1) /* The root complex ATS support */ 232 #define ACPI_IORT_PRI_SUPPORTED (1<<1) /* The root complex PRI support */ 233 #define ACPI_IORT_PASID_FWD_SUPPORTED (1<<2) /* The root complex PASID forward support */ 234 235 236 typedef struct acpi_iort_smmu 237 { 238 UINT64 BaseAddress; /* SMMU base address */ 239 UINT64 Span; /* Length of memory range */ 240 UINT32 Model; 241 UINT32 Flags; 242 UINT32 GlobalInterruptOffset; 243 UINT32 ContextInterruptCount; 244 UINT32 ContextInterruptOffset; 245 UINT32 PmuInterruptCount; 246 UINT32 PmuInterruptOffset; 247 UINT64 Interrupts[1]; /* Interrupt array */ 248 249 } ACPI_IORT_SMMU; 250 251 /* Values for Model field above */ 252 253 #define ACPI_IORT_SMMU_V1 0x00000000 /* Generic SMMUv1 */ 254 #define ACPI_IORT_SMMU_V2 0x00000001 /* Generic SMMUv2 */ 255 #define ACPI_IORT_SMMU_CORELINK_MMU400 0x00000002 /* ARM Corelink MMU-400 */ 256 #define ACPI_IORT_SMMU_CORELINK_MMU500 0x00000003 /* ARM Corelink MMU-500 */ 257 #define ACPI_IORT_SMMU_CORELINK_MMU401 0x00000004 /* ARM Corelink MMU-401 */ 258 #define ACPI_IORT_SMMU_CAVIUM_THUNDERX 0x00000005 /* Cavium ThunderX SMMUv2 */ 259 260 /* Masks for Flags field above */ 261 262 #define ACPI_IORT_SMMU_DVM_SUPPORTED (1) 263 #define ACPI_IORT_SMMU_COHERENT_WALK (1<<1) 264 265 /* Global interrupt format */ 266 267 typedef struct acpi_iort_smmu_gsi 268 { 269 UINT32 NSgIrpt; 270 UINT32 NSgIrptFlags; 271 UINT32 NSgCfgIrpt; 272 UINT32 NSgCfgIrptFlags; 273 274 } ACPI_IORT_SMMU_GSI; 275 276 277 typedef struct acpi_iort_smmu_v3 278 { 279 UINT64 BaseAddress; /* SMMUv3 base address */ 280 UINT32 Flags; 281 UINT32 Reserved; 282 UINT64 VatosAddress; 283 UINT32 Model; 284 UINT32 EventGsiv; 285 UINT32 PriGsiv; 286 UINT32 GerrGsiv; 287 UINT32 SyncGsiv; 288 UINT32 Pxm; 289 UINT32 IdMappingIndex; 290 291 } ACPI_IORT_SMMU_V3; 292 293 /* Values for Model field above */ 294 295 #define ACPI_IORT_SMMU_V3_GENERIC 0x00000000 /* Generic SMMUv3 */ 296 #define ACPI_IORT_SMMU_V3_HISILICON_HI161X 0x00000001 /* HiSilicon Hi161x SMMUv3 */ 297 #define ACPI_IORT_SMMU_V3_CAVIUM_CN99XX 0x00000002 /* Cavium CN99xx SMMUv3 */ 298 299 /* Masks for Flags field above */ 300 301 #define ACPI_IORT_SMMU_V3_COHACC_OVERRIDE (1) 302 #define ACPI_IORT_SMMU_V3_HTTU_OVERRIDE (3<<1) 303 #define ACPI_IORT_SMMU_V3_PXM_VALID (1<<3) 304 305 typedef struct acpi_iort_pmcg 306 { 307 UINT64 Page0BaseAddress; 308 UINT32 OverflowGsiv; 309 UINT32 NodeReference; 310 UINT64 Page1BaseAddress; 311 312 } ACPI_IORT_PMCG; 313 314 typedef struct acpi_iort_rmr { 315 UINT32 Flags; 316 UINT32 RmrCount; 317 UINT32 RmrOffset; 318 319 } ACPI_IORT_RMR; 320 321 typedef struct acpi_iort_rmr_desc { 322 UINT64 BaseAddress; 323 UINT64 Length; 324 UINT32 Reserved; 325 326 } ACPI_IORT_RMR_DESC; 327 328 /******************************************************************************* 329 * 330 * IVRS - I/O Virtualization Reporting Structure 331 * Version 1 332 * 333 * Conforms to "AMD I/O Virtualization Technology (IOMMU) Specification", 334 * Revision 1.26, February 2009. 335 * 336 ******************************************************************************/ 337 338 typedef struct acpi_table_ivrs 339 { 340 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 341 UINT32 Info; /* Common virtualization info */ 342 UINT64 Reserved; 343 344 } ACPI_TABLE_IVRS; 345 346 /* Values for Info field above */ 347 348 #define ACPI_IVRS_PHYSICAL_SIZE 0x00007F00 /* 7 bits, physical address size */ 349 #define ACPI_IVRS_VIRTUAL_SIZE 0x003F8000 /* 7 bits, virtual address size */ 350 #define ACPI_IVRS_ATS_RESERVED 0x00400000 /* ATS address translation range reserved */ 351 352 353 /* IVRS subtable header */ 354 355 typedef struct acpi_ivrs_header 356 { 357 UINT8 Type; /* Subtable type */ 358 UINT8 Flags; 359 UINT16 Length; /* Subtable length */ 360 UINT16 DeviceId; /* ID of IOMMU */ 361 362 } ACPI_IVRS_HEADER; 363 364 /* Values for subtable Type above */ 365 366 enum AcpiIvrsType 367 { 368 ACPI_IVRS_TYPE_HARDWARE1 = 0x10, 369 ACPI_IVRS_TYPE_HARDWARE2 = 0x11, 370 ACPI_IVRS_TYPE_HARDWARE3 = 0x40, 371 ACPI_IVRS_TYPE_MEMORY1 = 0x20, 372 ACPI_IVRS_TYPE_MEMORY2 = 0x21, 373 ACPI_IVRS_TYPE_MEMORY3 = 0x22 374 }; 375 376 /* Masks for Flags field above for IVHD subtable */ 377 378 #define ACPI_IVHD_TT_ENABLE (1) 379 #define ACPI_IVHD_PASS_PW (1<<1) 380 #define ACPI_IVHD_RES_PASS_PW (1<<2) 381 #define ACPI_IVHD_ISOC (1<<3) 382 #define ACPI_IVHD_IOTLB (1<<4) 383 384 /* Masks for Flags field above for IVMD subtable */ 385 386 #define ACPI_IVMD_UNITY (1) 387 #define ACPI_IVMD_READ (1<<1) 388 #define ACPI_IVMD_WRITE (1<<2) 389 #define ACPI_IVMD_EXCLUSION_RANGE (1<<3) 390 391 392 /* 393 * IVRS subtables, correspond to Type in ACPI_IVRS_HEADER 394 */ 395 396 /* 0x10: I/O Virtualization Hardware Definition Block (IVHD) */ 397 398 typedef struct acpi_ivrs_hardware_10 399 { 400 ACPI_IVRS_HEADER Header; 401 UINT16 CapabilityOffset; /* Offset for IOMMU control fields */ 402 UINT64 BaseAddress; /* IOMMU control registers */ 403 UINT16 PciSegmentGroup; 404 UINT16 Info; /* MSI number and unit ID */ 405 UINT32 FeatureReporting; 406 407 } ACPI_IVRS_HARDWARE1; 408 409 /* 0x11: I/O Virtualization Hardware Definition Block (IVHD) */ 410 411 typedef struct acpi_ivrs_hardware_11 412 { 413 ACPI_IVRS_HEADER Header; 414 UINT16 CapabilityOffset; /* Offset for IOMMU control fields */ 415 UINT64 BaseAddress; /* IOMMU control registers */ 416 UINT16 PciSegmentGroup; 417 UINT16 Info; /* MSI number and unit ID */ 418 UINT32 Attributes; 419 UINT64 EfrRegisterImage; 420 UINT64 Reserved; 421 } ACPI_IVRS_HARDWARE2; 422 423 /* Masks for Info field above */ 424 425 #define ACPI_IVHD_MSI_NUMBER_MASK 0x001F /* 5 bits, MSI message number */ 426 #define ACPI_IVHD_UNIT_ID_MASK 0x1F00 /* 5 bits, UnitID */ 427 428 429 /* 430 * Device Entries for IVHD subtable, appear after ACPI_IVRS_HARDWARE structure. 431 * Upper two bits of the Type field are the (encoded) length of the structure. 432 * Currently, only 4 and 8 byte entries are defined. 16 and 32 byte entries 433 * are reserved for future use but not defined. 434 */ 435 typedef struct acpi_ivrs_de_header 436 { 437 UINT8 Type; 438 UINT16 Id; 439 UINT8 DataSetting; 440 441 } ACPI_IVRS_DE_HEADER; 442 443 /* Length of device entry is in the top two bits of Type field above */ 444 445 #define ACPI_IVHD_ENTRY_LENGTH 0xC0 446 447 /* Values for device entry Type field above */ 448 449 enum AcpiIvrsDeviceEntryType 450 { 451 /* 4-byte device entries, all use ACPI_IVRS_DEVICE4 */ 452 453 ACPI_IVRS_TYPE_PAD4 = 0, 454 ACPI_IVRS_TYPE_ALL = 1, 455 ACPI_IVRS_TYPE_SELECT = 2, 456 ACPI_IVRS_TYPE_START = 3, 457 ACPI_IVRS_TYPE_END = 4, 458 459 /* 8-byte device entries */ 460 461 ACPI_IVRS_TYPE_PAD8 = 64, 462 ACPI_IVRS_TYPE_NOT_USED = 65, 463 ACPI_IVRS_TYPE_ALIAS_SELECT = 66, /* Uses ACPI_IVRS_DEVICE8A */ 464 ACPI_IVRS_TYPE_ALIAS_START = 67, /* Uses ACPI_IVRS_DEVICE8A */ 465 ACPI_IVRS_TYPE_EXT_SELECT = 70, /* Uses ACPI_IVRS_DEVICE8B */ 466 ACPI_IVRS_TYPE_EXT_START = 71, /* Uses ACPI_IVRS_DEVICE8B */ 467 ACPI_IVRS_TYPE_SPECIAL = 72, /* Uses ACPI_IVRS_DEVICE8C */ 468 469 /* Variable-length device entries */ 470 471 ACPI_IVRS_TYPE_HID = 240 /* Uses ACPI_IVRS_DEVICE_HID */ 472 }; 473 474 /* Values for Data field above */ 475 476 #define ACPI_IVHD_INIT_PASS (1) 477 #define ACPI_IVHD_EINT_PASS (1<<1) 478 #define ACPI_IVHD_NMI_PASS (1<<2) 479 #define ACPI_IVHD_SYSTEM_MGMT (3<<4) 480 #define ACPI_IVHD_LINT0_PASS (1<<6) 481 #define ACPI_IVHD_LINT1_PASS (1<<7) 482 483 484 /* Types 0-4: 4-byte device entry */ 485 486 typedef struct acpi_ivrs_device4 487 { 488 ACPI_IVRS_DE_HEADER Header; 489 490 } ACPI_IVRS_DEVICE4; 491 492 /* Types 66-67: 8-byte device entry */ 493 494 typedef struct acpi_ivrs_device8a 495 { 496 ACPI_IVRS_DE_HEADER Header; 497 UINT8 Reserved1; 498 UINT16 UsedId; 499 UINT8 Reserved2; 500 501 } ACPI_IVRS_DEVICE8A; 502 503 /* Types 70-71: 8-byte device entry */ 504 505 typedef struct acpi_ivrs_device8b 506 { 507 ACPI_IVRS_DE_HEADER Header; 508 UINT32 ExtendedData; 509 510 } ACPI_IVRS_DEVICE8B; 511 512 /* Values for ExtendedData above */ 513 514 #define ACPI_IVHD_ATS_DISABLED (1<<31) 515 516 /* Type 72: 8-byte device entry */ 517 518 typedef struct acpi_ivrs_device8c 519 { 520 ACPI_IVRS_DE_HEADER Header; 521 UINT8 Handle; 522 UINT16 UsedId; 523 UINT8 Variety; 524 525 } ACPI_IVRS_DEVICE8C; 526 527 /* Values for Variety field above */ 528 529 #define ACPI_IVHD_IOAPIC 1 530 #define ACPI_IVHD_HPET 2 531 532 /* Type 240: variable-length device entry */ 533 534 typedef struct acpi_ivrs_device_hid 535 { 536 ACPI_IVRS_DE_HEADER Header; 537 UINT64 AcpiHid; 538 UINT64 AcpiCid; 539 UINT8 UidType; 540 UINT8 UidLength; 541 542 } ACPI_IVRS_DEVICE_HID; 543 544 545 /* 0x20, 0x21, 0x22: I/O Virtualization Memory Definition Block (IVMD) */ 546 547 typedef struct acpi_ivrs_memory 548 { 549 ACPI_IVRS_HEADER Header; 550 UINT16 AuxData; 551 UINT64 Reserved; 552 UINT64 StartAddress; 553 UINT64 MemoryLength; 554 555 } ACPI_IVRS_MEMORY; 556 557 558 /******************************************************************************* 559 * 560 * LPIT - Low Power Idle Table 561 * 562 * Conforms to "ACPI Low Power Idle Table (LPIT)" July 2014. 563 * 564 ******************************************************************************/ 565 566 typedef struct acpi_table_lpit 567 { 568 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 569 570 } ACPI_TABLE_LPIT; 571 572 573 /* LPIT subtable header */ 574 575 typedef struct acpi_lpit_header 576 { 577 UINT32 Type; /* Subtable type */ 578 UINT32 Length; /* Subtable length */ 579 UINT16 UniqueId; 580 UINT16 Reserved; 581 UINT32 Flags; 582 583 } ACPI_LPIT_HEADER; 584 585 /* Values for subtable Type above */ 586 587 enum AcpiLpitType 588 { 589 ACPI_LPIT_TYPE_NATIVE_CSTATE = 0x00, 590 ACPI_LPIT_TYPE_RESERVED = 0x01 /* 1 and above are reserved */ 591 }; 592 593 /* Masks for Flags field above */ 594 595 #define ACPI_LPIT_STATE_DISABLED (1) 596 #define ACPI_LPIT_NO_COUNTER (1<<1) 597 598 /* 599 * LPIT subtables, correspond to Type in ACPI_LPIT_HEADER 600 */ 601 602 /* 0x00: Native C-state instruction based LPI structure */ 603 604 typedef struct acpi_lpit_native 605 { 606 ACPI_LPIT_HEADER Header; 607 ACPI_GENERIC_ADDRESS EntryTrigger; 608 UINT32 Residency; 609 UINT32 Latency; 610 ACPI_GENERIC_ADDRESS ResidencyCounter; 611 UINT64 CounterFrequency; 612 613 } ACPI_LPIT_NATIVE; 614 615 616 /******************************************************************************* 617 * 618 * MADT - Multiple APIC Description Table 619 * Version 3 620 * 621 ******************************************************************************/ 622 623 typedef struct acpi_table_madt 624 { 625 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 626 UINT32 Address; /* Physical address of local APIC */ 627 UINT32 Flags; 628 629 } ACPI_TABLE_MADT; 630 631 /* Masks for Flags field above */ 632 633 #define ACPI_MADT_PCAT_COMPAT (1) /* 00: System also has dual 8259s */ 634 635 /* Values for PCATCompat flag */ 636 637 #define ACPI_MADT_DUAL_PIC 1 638 #define ACPI_MADT_MULTIPLE_APIC 0 639 640 641 /* Values for MADT subtable type in ACPI_SUBTABLE_HEADER */ 642 643 enum AcpiMadtType 644 { 645 ACPI_MADT_TYPE_LOCAL_APIC = 0, 646 ACPI_MADT_TYPE_IO_APIC = 1, 647 ACPI_MADT_TYPE_INTERRUPT_OVERRIDE = 2, 648 ACPI_MADT_TYPE_NMI_SOURCE = 3, 649 ACPI_MADT_TYPE_LOCAL_APIC_NMI = 4, 650 ACPI_MADT_TYPE_LOCAL_APIC_OVERRIDE = 5, 651 ACPI_MADT_TYPE_IO_SAPIC = 6, 652 ACPI_MADT_TYPE_LOCAL_SAPIC = 7, 653 ACPI_MADT_TYPE_INTERRUPT_SOURCE = 8, 654 ACPI_MADT_TYPE_LOCAL_X2APIC = 9, 655 ACPI_MADT_TYPE_LOCAL_X2APIC_NMI = 10, 656 ACPI_MADT_TYPE_GENERIC_INTERRUPT = 11, 657 ACPI_MADT_TYPE_GENERIC_DISTRIBUTOR = 12, 658 ACPI_MADT_TYPE_GENERIC_MSI_FRAME = 13, 659 ACPI_MADT_TYPE_GENERIC_REDISTRIBUTOR = 14, 660 ACPI_MADT_TYPE_GENERIC_TRANSLATOR = 15, 661 ACPI_MADT_TYPE_MULTIPROC_WAKEUP = 16, 662 ACPI_MADT_TYPE_RESERVED = 17 /* 17 and greater are reserved */ 663 }; 664 665 666 /* 667 * MADT Subtables, correspond to Type in ACPI_SUBTABLE_HEADER 668 */ 669 670 /* 0: Processor Local APIC */ 671 672 typedef struct acpi_madt_local_apic 673 { 674 ACPI_SUBTABLE_HEADER Header; 675 UINT8 ProcessorId; /* ACPI processor id */ 676 UINT8 Id; /* Processor's local APIC id */ 677 UINT32 LapicFlags; 678 679 } ACPI_MADT_LOCAL_APIC; 680 681 682 /* 1: IO APIC */ 683 684 typedef struct acpi_madt_io_apic 685 { 686 ACPI_SUBTABLE_HEADER Header; 687 UINT8 Id; /* I/O APIC ID */ 688 UINT8 Reserved; /* Reserved - must be zero */ 689 UINT32 Address; /* APIC physical address */ 690 UINT32 GlobalIrqBase; /* Global system interrupt where INTI lines start */ 691 692 } ACPI_MADT_IO_APIC; 693 694 695 /* 2: Interrupt Override */ 696 697 typedef struct acpi_madt_interrupt_override 698 { 699 ACPI_SUBTABLE_HEADER Header; 700 UINT8 Bus; /* 0 - ISA */ 701 UINT8 SourceIrq; /* Interrupt source (IRQ) */ 702 UINT32 GlobalIrq; /* Global system interrupt */ 703 UINT16 IntiFlags; 704 705 } ACPI_MADT_INTERRUPT_OVERRIDE; 706 707 708 /* 3: NMI Source */ 709 710 typedef struct acpi_madt_nmi_source 711 { 712 ACPI_SUBTABLE_HEADER Header; 713 UINT16 IntiFlags; 714 UINT32 GlobalIrq; /* Global system interrupt */ 715 716 } ACPI_MADT_NMI_SOURCE; 717 718 719 /* 4: Local APIC NMI */ 720 721 typedef struct acpi_madt_local_apic_nmi 722 { 723 ACPI_SUBTABLE_HEADER Header; 724 UINT8 ProcessorId; /* ACPI processor id */ 725 UINT16 IntiFlags; 726 UINT8 Lint; /* LINTn to which NMI is connected */ 727 728 } ACPI_MADT_LOCAL_APIC_NMI; 729 730 731 /* 5: Address Override */ 732 733 typedef struct acpi_madt_local_apic_override 734 { 735 ACPI_SUBTABLE_HEADER Header; 736 UINT16 Reserved; /* Reserved, must be zero */ 737 UINT64 Address; /* APIC physical address */ 738 739 } ACPI_MADT_LOCAL_APIC_OVERRIDE; 740 741 742 /* 6: I/O Sapic */ 743 744 typedef struct acpi_madt_io_sapic 745 { 746 ACPI_SUBTABLE_HEADER Header; 747 UINT8 Id; /* I/O SAPIC ID */ 748 UINT8 Reserved; /* Reserved, must be zero */ 749 UINT32 GlobalIrqBase; /* Global interrupt for SAPIC start */ 750 UINT64 Address; /* SAPIC physical address */ 751 752 } ACPI_MADT_IO_SAPIC; 753 754 755 /* 7: Local Sapic */ 756 757 typedef struct acpi_madt_local_sapic 758 { 759 ACPI_SUBTABLE_HEADER Header; 760 UINT8 ProcessorId; /* ACPI processor id */ 761 UINT8 Id; /* SAPIC ID */ 762 UINT8 Eid; /* SAPIC EID */ 763 UINT8 Reserved[3]; /* Reserved, must be zero */ 764 UINT32 LapicFlags; 765 UINT32 Uid; /* Numeric UID - ACPI 3.0 */ 766 char UidString[1]; /* String UID - ACPI 3.0 */ 767 768 } ACPI_MADT_LOCAL_SAPIC; 769 770 771 /* 8: Platform Interrupt Source */ 772 773 typedef struct acpi_madt_interrupt_source 774 { 775 ACPI_SUBTABLE_HEADER Header; 776 UINT16 IntiFlags; 777 UINT8 Type; /* 1=PMI, 2=INIT, 3=corrected */ 778 UINT8 Id; /* Processor ID */ 779 UINT8 Eid; /* Processor EID */ 780 UINT8 IoSapicVector; /* Vector value for PMI interrupts */ 781 UINT32 GlobalIrq; /* Global system interrupt */ 782 UINT32 Flags; /* Interrupt Source Flags */ 783 784 } ACPI_MADT_INTERRUPT_SOURCE; 785 786 /* Masks for Flags field above */ 787 788 #define ACPI_MADT_CPEI_OVERRIDE (1) 789 790 791 /* 9: Processor Local X2APIC (ACPI 4.0) */ 792 793 typedef struct acpi_madt_local_x2apic 794 { 795 ACPI_SUBTABLE_HEADER Header; 796 UINT16 Reserved; /* Reserved - must be zero */ 797 UINT32 LocalApicId; /* Processor x2APIC ID */ 798 UINT32 LapicFlags; 799 UINT32 Uid; /* ACPI processor UID */ 800 801 } ACPI_MADT_LOCAL_X2APIC; 802 803 804 /* 10: Local X2APIC NMI (ACPI 4.0) */ 805 806 typedef struct acpi_madt_local_x2apic_nmi 807 { 808 ACPI_SUBTABLE_HEADER Header; 809 UINT16 IntiFlags; 810 UINT32 Uid; /* ACPI processor UID */ 811 UINT8 Lint; /* LINTn to which NMI is connected */ 812 UINT8 Reserved[3]; /* Reserved - must be zero */ 813 814 } ACPI_MADT_LOCAL_X2APIC_NMI; 815 816 817 /* 11: Generic Interrupt - GICC (ACPI 5.0 + ACPI 6.0 + ACPI 6.3 changes) */ 818 819 typedef struct acpi_madt_generic_interrupt 820 { 821 ACPI_SUBTABLE_HEADER Header; 822 UINT16 Reserved; /* Reserved - must be zero */ 823 UINT32 CpuInterfaceNumber; 824 UINT32 Uid; 825 UINT32 Flags; 826 UINT32 ParkingVersion; 827 UINT32 PerformanceInterrupt; 828 UINT64 ParkedAddress; 829 UINT64 BaseAddress; 830 UINT64 GicvBaseAddress; 831 UINT64 GichBaseAddress; 832 UINT32 VgicInterrupt; 833 UINT64 GicrBaseAddress; 834 UINT64 ArmMpidr; 835 UINT8 EfficiencyClass; 836 UINT8 Reserved2[1]; 837 UINT16 SpeInterrupt; /* ACPI 6.3 */ 838 839 } ACPI_MADT_GENERIC_INTERRUPT; 840 841 /* Masks for Flags field above */ 842 843 /* ACPI_MADT_ENABLED (1) Processor is usable if set */ 844 #define ACPI_MADT_PERFORMANCE_IRQ_MODE (1<<1) /* 01: Performance Interrupt Mode */ 845 #define ACPI_MADT_VGIC_IRQ_MODE (1<<2) /* 02: VGIC Maintenance Interrupt mode */ 846 847 848 /* 12: Generic Distributor (ACPI 5.0 + ACPI 6.0 changes) */ 849 850 typedef struct acpi_madt_generic_distributor 851 { 852 ACPI_SUBTABLE_HEADER Header; 853 UINT16 Reserved; /* Reserved - must be zero */ 854 UINT32 GicId; 855 UINT64 BaseAddress; 856 UINT32 GlobalIrqBase; 857 UINT8 Version; 858 UINT8 Reserved2[3]; /* Reserved - must be zero */ 859 860 } ACPI_MADT_GENERIC_DISTRIBUTOR; 861 862 /* Values for Version field above */ 863 864 enum AcpiMadtGicVersion 865 { 866 ACPI_MADT_GIC_VERSION_NONE = 0, 867 ACPI_MADT_GIC_VERSION_V1 = 1, 868 ACPI_MADT_GIC_VERSION_V2 = 2, 869 ACPI_MADT_GIC_VERSION_V3 = 3, 870 ACPI_MADT_GIC_VERSION_V4 = 4, 871 ACPI_MADT_GIC_VERSION_RESERVED = 5 /* 5 and greater are reserved */ 872 }; 873 874 875 /* 13: Generic MSI Frame (ACPI 5.1) */ 876 877 typedef struct acpi_madt_generic_msi_frame 878 { 879 ACPI_SUBTABLE_HEADER Header; 880 UINT16 Reserved; /* Reserved - must be zero */ 881 UINT32 MsiFrameId; 882 UINT64 BaseAddress; 883 UINT32 Flags; 884 UINT16 SpiCount; 885 UINT16 SpiBase; 886 887 } ACPI_MADT_GENERIC_MSI_FRAME; 888 889 /* Masks for Flags field above */ 890 891 #define ACPI_MADT_OVERRIDE_SPI_VALUES (1) 892 893 894 /* 14: Generic Redistributor (ACPI 5.1) */ 895 896 typedef struct acpi_madt_generic_redistributor 897 { 898 ACPI_SUBTABLE_HEADER Header; 899 UINT16 Reserved; /* reserved - must be zero */ 900 UINT64 BaseAddress; 901 UINT32 Length; 902 903 } ACPI_MADT_GENERIC_REDISTRIBUTOR; 904 905 906 /* 15: Generic Translator (ACPI 6.0) */ 907 908 typedef struct acpi_madt_generic_translator 909 { 910 ACPI_SUBTABLE_HEADER Header; 911 UINT16 Reserved; /* reserved - must be zero */ 912 UINT32 TranslationId; 913 UINT64 BaseAddress; 914 UINT32 Reserved2; 915 916 } ACPI_MADT_GENERIC_TRANSLATOR; 917 918 /* 16: Multiprocessor wakeup (ACPI 6.4) */ 919 920 typedef struct acpi_madt_multiproc_wakeup 921 { 922 ACPI_SUBTABLE_HEADER Header; 923 UINT16 MailboxVersion; 924 UINT32 Reserved; /* reserved - must be zero */ 925 UINT64 BaseAddress; 926 927 } ACPI_MADT_MULTIPROC_WAKEUP; 928 929 930 /* 931 * Common flags fields for MADT subtables 932 */ 933 934 /* MADT Local APIC flags */ 935 936 #define ACPI_MADT_ENABLED (1) /* 00: Processor is usable if set */ 937 938 /* MADT MPS INTI flags (IntiFlags) */ 939 940 #define ACPI_MADT_POLARITY_MASK (3) /* 00-01: Polarity of APIC I/O input signals */ 941 #define ACPI_MADT_TRIGGER_MASK (3<<2) /* 02-03: Trigger mode of APIC input signals */ 942 943 /* Values for MPS INTI flags */ 944 945 #define ACPI_MADT_POLARITY_CONFORMS 0 946 #define ACPI_MADT_POLARITY_ACTIVE_HIGH 1 947 #define ACPI_MADT_POLARITY_RESERVED 2 948 #define ACPI_MADT_POLARITY_ACTIVE_LOW 3 949 950 #define ACPI_MADT_TRIGGER_CONFORMS (0) 951 #define ACPI_MADT_TRIGGER_EDGE (1<<2) 952 #define ACPI_MADT_TRIGGER_RESERVED (2<<2) 953 #define ACPI_MADT_TRIGGER_LEVEL (3<<2) 954 955 956 /******************************************************************************* 957 * 958 * MCFG - PCI Memory Mapped Configuration table and subtable 959 * Version 1 960 * 961 * Conforms to "PCI Firmware Specification", Revision 3.0, June 20, 2005 962 * 963 ******************************************************************************/ 964 965 typedef struct acpi_table_mcfg 966 { 967 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 968 UINT8 Reserved[8]; 969 970 } ACPI_TABLE_MCFG; 971 972 973 /* Subtable */ 974 975 typedef struct acpi_mcfg_allocation 976 { 977 UINT64 Address; /* Base address, processor-relative */ 978 UINT16 PciSegment; /* PCI segment group number */ 979 UINT8 StartBusNumber; /* Starting PCI Bus number */ 980 UINT8 EndBusNumber; /* Final PCI Bus number */ 981 UINT32 Reserved; 982 983 } ACPI_MCFG_ALLOCATION; 984 985 986 /******************************************************************************* 987 * 988 * MCHI - Management Controller Host Interface Table 989 * Version 1 990 * 991 * Conforms to "Management Component Transport Protocol (MCTP) Host 992 * Interface Specification", Revision 1.0.0a, October 13, 2009 993 * 994 ******************************************************************************/ 995 996 typedef struct acpi_table_mchi 997 { 998 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 999 UINT8 InterfaceType; 1000 UINT8 Protocol; 1001 UINT64 ProtocolData; 1002 UINT8 InterruptType; 1003 UINT8 Gpe; 1004 UINT8 PciDeviceFlag; 1005 UINT32 GlobalInterrupt; 1006 ACPI_GENERIC_ADDRESS ControlRegister; 1007 UINT8 PciSegment; 1008 UINT8 PciBus; 1009 UINT8 PciDevice; 1010 UINT8 PciFunction; 1011 1012 } ACPI_TABLE_MCHI; 1013 1014 1015 /******************************************************************************* 1016 * 1017 * MPST - Memory Power State Table (ACPI 5.0) 1018 * Version 1 1019 * 1020 ******************************************************************************/ 1021 1022 #define ACPI_MPST_CHANNEL_INFO \ 1023 UINT8 ChannelId; \ 1024 UINT8 Reserved1[3]; \ 1025 UINT16 PowerNodeCount; \ 1026 UINT16 Reserved2; 1027 1028 /* Main table */ 1029 1030 typedef struct acpi_table_mpst 1031 { 1032 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1033 ACPI_MPST_CHANNEL_INFO /* Platform Communication Channel */ 1034 1035 } ACPI_TABLE_MPST; 1036 1037 1038 /* Memory Platform Communication Channel Info */ 1039 1040 typedef struct acpi_mpst_channel 1041 { 1042 ACPI_MPST_CHANNEL_INFO /* Platform Communication Channel */ 1043 1044 } ACPI_MPST_CHANNEL; 1045 1046 1047 /* Memory Power Node Structure */ 1048 1049 typedef struct acpi_mpst_power_node 1050 { 1051 UINT8 Flags; 1052 UINT8 Reserved1; 1053 UINT16 NodeId; 1054 UINT32 Length; 1055 UINT64 RangeAddress; 1056 UINT64 RangeLength; 1057 UINT32 NumPowerStates; 1058 UINT32 NumPhysicalComponents; 1059 1060 } ACPI_MPST_POWER_NODE; 1061 1062 /* Values for Flags field above */ 1063 1064 #define ACPI_MPST_ENABLED 1 1065 #define ACPI_MPST_POWER_MANAGED 2 1066 #define ACPI_MPST_HOT_PLUG_CAPABLE 4 1067 1068 1069 /* Memory Power State Structure (follows POWER_NODE above) */ 1070 1071 typedef struct acpi_mpst_power_state 1072 { 1073 UINT8 PowerState; 1074 UINT8 InfoIndex; 1075 1076 } ACPI_MPST_POWER_STATE; 1077 1078 1079 /* Physical Component ID Structure (follows POWER_STATE above) */ 1080 1081 typedef struct acpi_mpst_component 1082 { 1083 UINT16 ComponentId; 1084 1085 } ACPI_MPST_COMPONENT; 1086 1087 1088 /* Memory Power State Characteristics Structure (follows all POWER_NODEs) */ 1089 1090 typedef struct acpi_mpst_data_hdr 1091 { 1092 UINT16 CharacteristicsCount; 1093 UINT16 Reserved; 1094 1095 } ACPI_MPST_DATA_HDR; 1096 1097 typedef struct acpi_mpst_power_data 1098 { 1099 UINT8 StructureId; 1100 UINT8 Flags; 1101 UINT16 Reserved1; 1102 UINT32 AveragePower; 1103 UINT32 PowerSaving; 1104 UINT64 ExitLatency; 1105 UINT64 Reserved2; 1106 1107 } ACPI_MPST_POWER_DATA; 1108 1109 /* Values for Flags field above */ 1110 1111 #define ACPI_MPST_PRESERVE 1 1112 #define ACPI_MPST_AUTOENTRY 2 1113 #define ACPI_MPST_AUTOEXIT 4 1114 1115 1116 /* Shared Memory Region (not part of an ACPI table) */ 1117 1118 typedef struct acpi_mpst_shared 1119 { 1120 UINT32 Signature; 1121 UINT16 PccCommand; 1122 UINT16 PccStatus; 1123 UINT32 CommandRegister; 1124 UINT32 StatusRegister; 1125 UINT32 PowerStateId; 1126 UINT32 PowerNodeId; 1127 UINT64 EnergyConsumed; 1128 UINT64 AveragePower; 1129 1130 } ACPI_MPST_SHARED; 1131 1132 1133 /******************************************************************************* 1134 * 1135 * MSCT - Maximum System Characteristics Table (ACPI 4.0) 1136 * Version 1 1137 * 1138 ******************************************************************************/ 1139 1140 typedef struct acpi_table_msct 1141 { 1142 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1143 UINT32 ProximityOffset; /* Location of proximity info struct(s) */ 1144 UINT32 MaxProximityDomains;/* Max number of proximity domains */ 1145 UINT32 MaxClockDomains; /* Max number of clock domains */ 1146 UINT64 MaxAddress; /* Max physical address in system */ 1147 1148 } ACPI_TABLE_MSCT; 1149 1150 1151 /* Subtable - Maximum Proximity Domain Information. Version 1 */ 1152 1153 typedef struct acpi_msct_proximity 1154 { 1155 UINT8 Revision; 1156 UINT8 Length; 1157 UINT32 RangeStart; /* Start of domain range */ 1158 UINT32 RangeEnd; /* End of domain range */ 1159 UINT32 ProcessorCapacity; 1160 UINT64 MemoryCapacity; /* In bytes */ 1161 1162 } ACPI_MSCT_PROXIMITY; 1163 1164 1165 /******************************************************************************* 1166 * 1167 * MSDM - Microsoft Data Management table 1168 * 1169 * Conforms to "Microsoft Software Licensing Tables (SLIC and MSDM)", 1170 * November 29, 2011. Copyright 2011 Microsoft 1171 * 1172 ******************************************************************************/ 1173 1174 /* Basic MSDM table is only the common ACPI header */ 1175 1176 typedef struct acpi_table_msdm 1177 { 1178 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1179 1180 } ACPI_TABLE_MSDM; 1181 1182 1183 /******************************************************************************* 1184 * 1185 * NFIT - NVDIMM Interface Table (ACPI 6.0+) 1186 * Version 1 1187 * 1188 ******************************************************************************/ 1189 1190 typedef struct acpi_table_nfit 1191 { 1192 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1193 UINT32 Reserved; /* Reserved, must be zero */ 1194 1195 } ACPI_TABLE_NFIT; 1196 1197 /* Subtable header for NFIT */ 1198 1199 typedef struct acpi_nfit_header 1200 { 1201 UINT16 Type; 1202 UINT16 Length; 1203 1204 } ACPI_NFIT_HEADER; 1205 1206 1207 /* Values for subtable type in ACPI_NFIT_HEADER */ 1208 1209 enum AcpiNfitType 1210 { 1211 ACPI_NFIT_TYPE_SYSTEM_ADDRESS = 0, 1212 ACPI_NFIT_TYPE_MEMORY_MAP = 1, 1213 ACPI_NFIT_TYPE_INTERLEAVE = 2, 1214 ACPI_NFIT_TYPE_SMBIOS = 3, 1215 ACPI_NFIT_TYPE_CONTROL_REGION = 4, 1216 ACPI_NFIT_TYPE_DATA_REGION = 5, 1217 ACPI_NFIT_TYPE_FLUSH_ADDRESS = 6, 1218 ACPI_NFIT_TYPE_CAPABILITIES = 7, 1219 ACPI_NFIT_TYPE_RESERVED = 8 /* 8 and greater are reserved */ 1220 }; 1221 1222 /* 1223 * NFIT Subtables 1224 */ 1225 1226 /* 0: System Physical Address Range Structure */ 1227 1228 typedef struct acpi_nfit_system_address 1229 { 1230 ACPI_NFIT_HEADER Header; 1231 UINT16 RangeIndex; 1232 UINT16 Flags; 1233 UINT32 Reserved; /* Reserved, must be zero */ 1234 UINT32 ProximityDomain; 1235 UINT8 RangeGuid[16]; 1236 UINT64 Address; 1237 UINT64 Length; 1238 UINT64 MemoryMapping; 1239 UINT64 LocationCookie; /* ACPI 6.4 */ 1240 1241 } ACPI_NFIT_SYSTEM_ADDRESS; 1242 1243 /* Flags */ 1244 1245 #define ACPI_NFIT_ADD_ONLINE_ONLY (1) /* 00: Add/Online Operation Only */ 1246 #define ACPI_NFIT_PROXIMITY_VALID (1<<1) /* 01: Proximity Domain Valid */ 1247 #define ACPI_NFIT_LOCATION_COOKIE_VALID (1<<2) /* 02: SPA location cookie valid (ACPI 6.4) */ 1248 1249 /* Range Type GUIDs appear in the include/acuuid.h file */ 1250 1251 1252 /* 1: Memory Device to System Address Range Map Structure */ 1253 1254 typedef struct acpi_nfit_memory_map 1255 { 1256 ACPI_NFIT_HEADER Header; 1257 UINT32 DeviceHandle; 1258 UINT16 PhysicalId; 1259 UINT16 RegionId; 1260 UINT16 RangeIndex; 1261 UINT16 RegionIndex; 1262 UINT64 RegionSize; 1263 UINT64 RegionOffset; 1264 UINT64 Address; 1265 UINT16 InterleaveIndex; 1266 UINT16 InterleaveWays; 1267 UINT16 Flags; 1268 UINT16 Reserved; /* Reserved, must be zero */ 1269 1270 } ACPI_NFIT_MEMORY_MAP; 1271 1272 /* Flags */ 1273 1274 #define ACPI_NFIT_MEM_SAVE_FAILED (1) /* 00: Last SAVE to Memory Device failed */ 1275 #define ACPI_NFIT_MEM_RESTORE_FAILED (1<<1) /* 01: Last RESTORE from Memory Device failed */ 1276 #define ACPI_NFIT_MEM_FLUSH_FAILED (1<<2) /* 02: Platform flush failed */ 1277 #define ACPI_NFIT_MEM_NOT_ARMED (1<<3) /* 03: Memory Device is not armed */ 1278 #define ACPI_NFIT_MEM_HEALTH_OBSERVED (1<<4) /* 04: Memory Device observed SMART/health events */ 1279 #define ACPI_NFIT_MEM_HEALTH_ENABLED (1<<5) /* 05: SMART/health events enabled */ 1280 #define ACPI_NFIT_MEM_MAP_FAILED (1<<6) /* 06: Mapping to SPA failed */ 1281 1282 1283 /* 2: Interleave Structure */ 1284 1285 typedef struct acpi_nfit_interleave 1286 { 1287 ACPI_NFIT_HEADER Header; 1288 UINT16 InterleaveIndex; 1289 UINT16 Reserved; /* Reserved, must be zero */ 1290 UINT32 LineCount; 1291 UINT32 LineSize; 1292 UINT32 LineOffset[1]; /* Variable length */ 1293 1294 } ACPI_NFIT_INTERLEAVE; 1295 1296 1297 /* 3: SMBIOS Management Information Structure */ 1298 1299 typedef struct acpi_nfit_smbios 1300 { 1301 ACPI_NFIT_HEADER Header; 1302 UINT32 Reserved; /* Reserved, must be zero */ 1303 UINT8 Data[1]; /* Variable length */ 1304 1305 } ACPI_NFIT_SMBIOS; 1306 1307 1308 /* 4: NVDIMM Control Region Structure */ 1309 1310 typedef struct acpi_nfit_control_region 1311 { 1312 ACPI_NFIT_HEADER Header; 1313 UINT16 RegionIndex; 1314 UINT16 VendorId; 1315 UINT16 DeviceId; 1316 UINT16 RevisionId; 1317 UINT16 SubsystemVendorId; 1318 UINT16 SubsystemDeviceId; 1319 UINT16 SubsystemRevisionId; 1320 UINT8 ValidFields; 1321 UINT8 ManufacturingLocation; 1322 UINT16 ManufacturingDate; 1323 UINT8 Reserved[2]; /* Reserved, must be zero */ 1324 UINT32 SerialNumber; 1325 UINT16 Code; 1326 UINT16 Windows; 1327 UINT64 WindowSize; 1328 UINT64 CommandOffset; 1329 UINT64 CommandSize; 1330 UINT64 StatusOffset; 1331 UINT64 StatusSize; 1332 UINT16 Flags; 1333 UINT8 Reserved1[6]; /* Reserved, must be zero */ 1334 1335 } ACPI_NFIT_CONTROL_REGION; 1336 1337 /* Flags */ 1338 1339 #define ACPI_NFIT_CONTROL_BUFFERED (1) /* Block Data Windows implementation is buffered */ 1340 1341 /* ValidFields bits */ 1342 1343 #define ACPI_NFIT_CONTROL_MFG_INFO_VALID (1) /* Manufacturing fields are valid */ 1344 1345 1346 /* 5: NVDIMM Block Data Window Region Structure */ 1347 1348 typedef struct acpi_nfit_data_region 1349 { 1350 ACPI_NFIT_HEADER Header; 1351 UINT16 RegionIndex; 1352 UINT16 Windows; 1353 UINT64 Offset; 1354 UINT64 Size; 1355 UINT64 Capacity; 1356 UINT64 StartAddress; 1357 1358 } ACPI_NFIT_DATA_REGION; 1359 1360 1361 /* 6: Flush Hint Address Structure */ 1362 1363 typedef struct acpi_nfit_flush_address 1364 { 1365 ACPI_NFIT_HEADER Header; 1366 UINT32 DeviceHandle; 1367 UINT16 HintCount; 1368 UINT8 Reserved[6]; /* Reserved, must be zero */ 1369 UINT64 HintAddress[1]; /* Variable length */ 1370 1371 } ACPI_NFIT_FLUSH_ADDRESS; 1372 1373 1374 /* 7: Platform Capabilities Structure */ 1375 1376 typedef struct acpi_nfit_capabilities 1377 { 1378 ACPI_NFIT_HEADER Header; 1379 UINT8 HighestCapability; 1380 UINT8 Reserved[3]; /* Reserved, must be zero */ 1381 UINT32 Capabilities; 1382 UINT32 Reserved2; 1383 1384 } ACPI_NFIT_CAPABILITIES; 1385 1386 /* Capabilities Flags */ 1387 1388 #define ACPI_NFIT_CAPABILITY_CACHE_FLUSH (1) /* 00: Cache Flush to NVDIMM capable */ 1389 #define ACPI_NFIT_CAPABILITY_MEM_FLUSH (1<<1) /* 01: Memory Flush to NVDIMM capable */ 1390 #define ACPI_NFIT_CAPABILITY_MEM_MIRRORING (1<<2) /* 02: Memory Mirroring capable */ 1391 1392 1393 /* 1394 * NFIT/DVDIMM device handle support - used as the _ADR for each NVDIMM 1395 */ 1396 typedef struct nfit_device_handle 1397 { 1398 UINT32 Handle; 1399 1400 } NFIT_DEVICE_HANDLE; 1401 1402 /* Device handle construction and extraction macros */ 1403 1404 #define ACPI_NFIT_DIMM_NUMBER_MASK 0x0000000F 1405 #define ACPI_NFIT_CHANNEL_NUMBER_MASK 0x000000F0 1406 #define ACPI_NFIT_MEMORY_ID_MASK 0x00000F00 1407 #define ACPI_NFIT_SOCKET_ID_MASK 0x0000F000 1408 #define ACPI_NFIT_NODE_ID_MASK 0x0FFF0000 1409 1410 #define ACPI_NFIT_DIMM_NUMBER_OFFSET 0 1411 #define ACPI_NFIT_CHANNEL_NUMBER_OFFSET 4 1412 #define ACPI_NFIT_MEMORY_ID_OFFSET 8 1413 #define ACPI_NFIT_SOCKET_ID_OFFSET 12 1414 #define ACPI_NFIT_NODE_ID_OFFSET 16 1415 1416 /* Macro to construct a NFIT/NVDIMM device handle */ 1417 1418 #define ACPI_NFIT_BUILD_DEVICE_HANDLE(dimm, channel, memory, socket, node) \ 1419 ((dimm) | \ 1420 ((channel) << ACPI_NFIT_CHANNEL_NUMBER_OFFSET) | \ 1421 ((memory) << ACPI_NFIT_MEMORY_ID_OFFSET) | \ 1422 ((socket) << ACPI_NFIT_SOCKET_ID_OFFSET) | \ 1423 ((node) << ACPI_NFIT_NODE_ID_OFFSET)) 1424 1425 /* Macros to extract individual fields from a NFIT/NVDIMM device handle */ 1426 1427 #define ACPI_NFIT_GET_DIMM_NUMBER(handle) \ 1428 ((handle) & ACPI_NFIT_DIMM_NUMBER_MASK) 1429 1430 #define ACPI_NFIT_GET_CHANNEL_NUMBER(handle) \ 1431 (((handle) & ACPI_NFIT_CHANNEL_NUMBER_MASK) >> ACPI_NFIT_CHANNEL_NUMBER_OFFSET) 1432 1433 #define ACPI_NFIT_GET_MEMORY_ID(handle) \ 1434 (((handle) & ACPI_NFIT_MEMORY_ID_MASK) >> ACPI_NFIT_MEMORY_ID_OFFSET) 1435 1436 #define ACPI_NFIT_GET_SOCKET_ID(handle) \ 1437 (((handle) & ACPI_NFIT_SOCKET_ID_MASK) >> ACPI_NFIT_SOCKET_ID_OFFSET) 1438 1439 #define ACPI_NFIT_GET_NODE_ID(handle) \ 1440 (((handle) & ACPI_NFIT_NODE_ID_MASK) >> ACPI_NFIT_NODE_ID_OFFSET) 1441 1442 1443 /******************************************************************************* 1444 * 1445 * PCCT - Platform Communications Channel Table (ACPI 5.0) 1446 * Version 2 (ACPI 6.2) 1447 * 1448 ******************************************************************************/ 1449 1450 typedef struct acpi_table_pcct 1451 { 1452 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1453 UINT32 Flags; 1454 UINT64 Reserved; 1455 1456 } ACPI_TABLE_PCCT; 1457 1458 /* Values for Flags field above */ 1459 1460 #define ACPI_PCCT_DOORBELL 1 1461 1462 /* Values for subtable type in ACPI_SUBTABLE_HEADER */ 1463 1464 enum AcpiPcctType 1465 { 1466 ACPI_PCCT_TYPE_GENERIC_SUBSPACE = 0, 1467 ACPI_PCCT_TYPE_HW_REDUCED_SUBSPACE = 1, 1468 ACPI_PCCT_TYPE_HW_REDUCED_SUBSPACE_TYPE2 = 2, /* ACPI 6.1 */ 1469 ACPI_PCCT_TYPE_EXT_PCC_MASTER_SUBSPACE = 3, /* ACPI 6.2 */ 1470 ACPI_PCCT_TYPE_EXT_PCC_SLAVE_SUBSPACE = 4, /* ACPI 6.2 */ 1471 ACPI_PCCT_TYPE_HW_REG_COMM_SUBSPACE = 5, /* ACPI 6.4 */ 1472 ACPI_PCCT_TYPE_RESERVED = 6 /* 6 and greater are reserved */ 1473 }; 1474 1475 /* 1476 * PCCT Subtables, correspond to Type in ACPI_SUBTABLE_HEADER 1477 */ 1478 1479 /* 0: Generic Communications Subspace */ 1480 1481 typedef struct acpi_pcct_subspace 1482 { 1483 ACPI_SUBTABLE_HEADER Header; 1484 UINT8 Reserved[6]; 1485 UINT64 BaseAddress; 1486 UINT64 Length; 1487 ACPI_GENERIC_ADDRESS DoorbellRegister; 1488 UINT64 PreserveMask; 1489 UINT64 WriteMask; 1490 UINT32 Latency; 1491 UINT32 MaxAccessRate; 1492 UINT16 MinTurnaroundTime; 1493 1494 } ACPI_PCCT_SUBSPACE; 1495 1496 1497 /* 1: HW-reduced Communications Subspace (ACPI 5.1) */ 1498 1499 typedef struct acpi_pcct_hw_reduced 1500 { 1501 ACPI_SUBTABLE_HEADER Header; 1502 UINT32 PlatformInterrupt; 1503 UINT8 Flags; 1504 UINT8 Reserved; 1505 UINT64 BaseAddress; 1506 UINT64 Length; 1507 ACPI_GENERIC_ADDRESS DoorbellRegister; 1508 UINT64 PreserveMask; 1509 UINT64 WriteMask; 1510 UINT32 Latency; 1511 UINT32 MaxAccessRate; 1512 UINT16 MinTurnaroundTime; 1513 1514 } ACPI_PCCT_HW_REDUCED; 1515 1516 1517 /* 2: HW-reduced Communications Subspace Type 2 (ACPI 6.1) */ 1518 1519 typedef struct acpi_pcct_hw_reduced_type2 1520 { 1521 ACPI_SUBTABLE_HEADER Header; 1522 UINT32 PlatformInterrupt; 1523 UINT8 Flags; 1524 UINT8 Reserved; 1525 UINT64 BaseAddress; 1526 UINT64 Length; 1527 ACPI_GENERIC_ADDRESS DoorbellRegister; 1528 UINT64 PreserveMask; 1529 UINT64 WriteMask; 1530 UINT32 Latency; 1531 UINT32 MaxAccessRate; 1532 UINT16 MinTurnaroundTime; 1533 ACPI_GENERIC_ADDRESS PlatformAckRegister; 1534 UINT64 AckPreserveMask; 1535 UINT64 AckWriteMask; 1536 1537 } ACPI_PCCT_HW_REDUCED_TYPE2; 1538 1539 1540 /* 3: Extended PCC Master Subspace Type 3 (ACPI 6.2) */ 1541 1542 typedef struct acpi_pcct_ext_pcc_master 1543 { 1544 ACPI_SUBTABLE_HEADER Header; 1545 UINT32 PlatformInterrupt; 1546 UINT8 Flags; 1547 UINT8 Reserved1; 1548 UINT64 BaseAddress; 1549 UINT32 Length; 1550 ACPI_GENERIC_ADDRESS DoorbellRegister; 1551 UINT64 PreserveMask; 1552 UINT64 WriteMask; 1553 UINT32 Latency; 1554 UINT32 MaxAccessRate; 1555 UINT32 MinTurnaroundTime; 1556 ACPI_GENERIC_ADDRESS PlatformAckRegister; 1557 UINT64 AckPreserveMask; 1558 UINT64 AckSetMask; 1559 UINT64 Reserved2; 1560 ACPI_GENERIC_ADDRESS CmdCompleteRegister; 1561 UINT64 CmdCompleteMask; 1562 ACPI_GENERIC_ADDRESS CmdUpdateRegister; 1563 UINT64 CmdUpdatePreserveMask; 1564 UINT64 CmdUpdateSetMask; 1565 ACPI_GENERIC_ADDRESS ErrorStatusRegister; 1566 UINT64 ErrorStatusMask; 1567 1568 } ACPI_PCCT_EXT_PCC_MASTER; 1569 1570 1571 /* 4: Extended PCC Slave Subspace Type 4 (ACPI 6.2) */ 1572 1573 typedef struct acpi_pcct_ext_pcc_slave 1574 { 1575 ACPI_SUBTABLE_HEADER Header; 1576 UINT32 PlatformInterrupt; 1577 UINT8 Flags; 1578 UINT8 Reserved1; 1579 UINT64 BaseAddress; 1580 UINT32 Length; 1581 ACPI_GENERIC_ADDRESS DoorbellRegister; 1582 UINT64 PreserveMask; 1583 UINT64 WriteMask; 1584 UINT32 Latency; 1585 UINT32 MaxAccessRate; 1586 UINT32 MinTurnaroundTime; 1587 ACPI_GENERIC_ADDRESS PlatformAckRegister; 1588 UINT64 AckPreserveMask; 1589 UINT64 AckSetMask; 1590 UINT64 Reserved2; 1591 ACPI_GENERIC_ADDRESS CmdCompleteRegister; 1592 UINT64 CmdCompleteMask; 1593 ACPI_GENERIC_ADDRESS CmdUpdateRegister; 1594 UINT64 CmdUpdatePreserveMask; 1595 UINT64 CmdUpdateSetMask; 1596 ACPI_GENERIC_ADDRESS ErrorStatusRegister; 1597 UINT64 ErrorStatusMask; 1598 1599 } ACPI_PCCT_EXT_PCC_SLAVE; 1600 1601 /* 5: HW Registers based Communications Subspace */ 1602 1603 typedef struct acpi_pcct_hw_reg 1604 { 1605 ACPI_SUBTABLE_HEADER Header; 1606 UINT16 Version; 1607 UINT64 BaseAddress; 1608 UINT64 Length; 1609 ACPI_GENERIC_ADDRESS DoorbellRegister; 1610 UINT64 DoorbellPreserve; 1611 UINT64 DoorbellWrite; 1612 ACPI_GENERIC_ADDRESS CmdCompleteRegister; 1613 UINT64 CmdCompleteMask; 1614 ACPI_GENERIC_ADDRESS ErrorStatusRegister; 1615 UINT64 ErrorStatusMask; 1616 UINT32 NominalLatency; 1617 UINT32 MinTurnaroundTime; 1618 1619 } ACPI_PCCT_HW_REG; 1620 1621 1622 /* Values for doorbell flags above */ 1623 1624 #define ACPI_PCCT_INTERRUPT_POLARITY (1) 1625 #define ACPI_PCCT_INTERRUPT_MODE (1<<1) 1626 1627 1628 /* 1629 * PCC memory structures (not part of the ACPI table) 1630 */ 1631 1632 /* Shared Memory Region */ 1633 1634 typedef struct acpi_pcct_shared_memory 1635 { 1636 UINT32 Signature; 1637 UINT16 Command; 1638 UINT16 Status; 1639 1640 } ACPI_PCCT_SHARED_MEMORY; 1641 1642 1643 /* Extended PCC Subspace Shared Memory Region (ACPI 6.2) */ 1644 1645 typedef struct acpi_pcct_ext_pcc_shared_memory 1646 { 1647 UINT32 Signature; 1648 UINT32 Flags; 1649 UINT32 Length; 1650 UINT32 Command; 1651 1652 } ACPI_PCCT_EXT_PCC_SHARED_MEMORY; 1653 1654 1655 /******************************************************************************* 1656 * 1657 * PDTT - Platform Debug Trigger Table (ACPI 6.2) 1658 * Version 0 1659 * 1660 ******************************************************************************/ 1661 1662 typedef struct acpi_table_pdtt 1663 { 1664 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1665 UINT8 TriggerCount; 1666 UINT8 Reserved[3]; 1667 UINT32 ArrayOffset; 1668 1669 } ACPI_TABLE_PDTT; 1670 1671 1672 /* 1673 * PDTT Communication Channel Identifier Structure. 1674 * The number of these structures is defined by TriggerCount above, 1675 * starting at ArrayOffset. 1676 */ 1677 typedef struct acpi_pdtt_channel 1678 { 1679 UINT8 SubchannelId; 1680 UINT8 Flags; 1681 1682 } ACPI_PDTT_CHANNEL; 1683 1684 /* Flags for above */ 1685 1686 #define ACPI_PDTT_RUNTIME_TRIGGER (1) 1687 #define ACPI_PDTT_WAIT_COMPLETION (1<<1) 1688 #define ACPI_PDTT_TRIGGER_ORDER (1<<2) 1689 1690 1691 /******************************************************************************* 1692 * 1693 * PHAT - Platform Health Assessment Table (ACPI 6.4) 1694 * Version 1 1695 * 1696 ******************************************************************************/ 1697 1698 typedef struct acpi_table_phat 1699 { 1700 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1701 1702 } ACPI_TABLE_PHAT; 1703 1704 /* Common header for PHAT subtables that follow main table */ 1705 1706 typedef struct acpi_phat_header 1707 { 1708 UINT16 Type; 1709 UINT16 Length; 1710 UINT8 Revision; 1711 1712 } ACPI_PHAT_HEADER; 1713 1714 1715 /* Values for Type field above */ 1716 1717 #define ACPI_PHAT_TYPE_FW_VERSION_DATA 0 1718 #define ACPI_PHAT_TYPE_FW_HEALTH_DATA 1 1719 #define ACPI_PHAT_TYPE_RESERVED 2 /* 0x02-0xFFFF are reserved */ 1720 1721 /* 1722 * PHAT subtables, correspond to Type in ACPI_PHAT_HEADER 1723 */ 1724 1725 /* 0: Firmware Version Data Record */ 1726 1727 typedef struct acpi_phat_version_data 1728 { 1729 ACPI_PHAT_HEADER Header; 1730 UINT8 Reserved[3]; 1731 UINT32 ElementCount; 1732 1733 } ACPI_PHAT_VERSION_DATA; 1734 1735 typedef struct acpi_phat_version_element 1736 { 1737 UINT8 Guid[16]; 1738 UINT64 VersionValue; 1739 UINT32 ProducerId; 1740 1741 } ACPI_PHAT_VERSION_ELEMENT; 1742 1743 1744 /* 1: Firmware Health Data Record */ 1745 1746 typedef struct acpi_phat_health_data 1747 { 1748 ACPI_PHAT_HEADER Header; 1749 UINT8 Reserved[2]; 1750 UINT8 Health; 1751 UINT8 DeviceGuid[16]; 1752 UINT32 DeviceSpecificOffset; /* Zero if no Device-specific data */ 1753 1754 } ACPI_PHAT_HEALTH_DATA; 1755 1756 /* Values for Health field above */ 1757 1758 #define ACPI_PHAT_ERRORS_FOUND 0 1759 #define ACPI_PHAT_NO_ERRORS 1 1760 #define ACPI_PHAT_UNKNOWN_ERRORS 2 1761 #define ACPI_PHAT_ADVISORY 3 1762 1763 1764 /******************************************************************************* 1765 * 1766 * PMTT - Platform Memory Topology Table (ACPI 5.0) 1767 * Version 1 1768 * 1769 ******************************************************************************/ 1770 1771 typedef struct acpi_table_pmtt 1772 { 1773 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1774 UINT32 MemoryDeviceCount; 1775 /* 1776 * Immediately followed by: 1777 * MEMORY_DEVICE MemoryDeviceStruct[MemoryDeviceCount]; 1778 */ 1779 1780 } ACPI_TABLE_PMTT; 1781 1782 1783 /* Common header for PMTT subtables that follow main table */ 1784 1785 typedef struct acpi_pmtt_header 1786 { 1787 UINT8 Type; 1788 UINT8 Reserved1; 1789 UINT16 Length; 1790 UINT16 Flags; 1791 UINT16 Reserved2; 1792 UINT32 MemoryDeviceCount; /* Zero means no memory device structs follow */ 1793 /* 1794 * Immediately followed by: 1795 * UINT8 TypeSpecificData[] 1796 * MEMORY_DEVICE MemoryDeviceStruct[MemoryDeviceCount]; 1797 */ 1798 1799 } ACPI_PMTT_HEADER; 1800 1801 /* Values for Type field above */ 1802 1803 #define ACPI_PMTT_TYPE_SOCKET 0 1804 #define ACPI_PMTT_TYPE_CONTROLLER 1 1805 #define ACPI_PMTT_TYPE_DIMM 2 1806 #define ACPI_PMTT_TYPE_RESERVED 3 /* 0x03-0xFE are reserved */ 1807 #define ACPI_PMTT_TYPE_VENDOR 0xFF 1808 1809 /* Values for Flags field above */ 1810 1811 #define ACPI_PMTT_TOP_LEVEL 0x0001 1812 #define ACPI_PMTT_PHYSICAL 0x0002 1813 #define ACPI_PMTT_MEMORY_TYPE 0x000C 1814 1815 1816 /* 1817 * PMTT subtables, correspond to Type in acpi_pmtt_header 1818 */ 1819 1820 1821 /* 0: Socket Structure */ 1822 1823 typedef struct acpi_pmtt_socket 1824 { 1825 ACPI_PMTT_HEADER Header; 1826 UINT16 SocketId; 1827 UINT16 Reserved; 1828 1829 } ACPI_PMTT_SOCKET; 1830 /* 1831 * Immediately followed by: 1832 * MEMORY_DEVICE MemoryDeviceStruct[MemoryDeviceCount]; 1833 */ 1834 1835 1836 /* 1: Memory Controller subtable */ 1837 1838 typedef struct acpi_pmtt_controller 1839 { 1840 ACPI_PMTT_HEADER Header; 1841 UINT16 ControllerId; 1842 UINT16 Reserved; 1843 1844 } ACPI_PMTT_CONTROLLER; 1845 /* 1846 * Immediately followed by: 1847 * MEMORY_DEVICE MemoryDeviceStruct[MemoryDeviceCount]; 1848 */ 1849 1850 1851 /* 2: Physical Component Identifier (DIMM) */ 1852 1853 typedef struct acpi_pmtt_physical_component 1854 { 1855 ACPI_PMTT_HEADER Header; 1856 UINT32 BiosHandle; 1857 1858 } ACPI_PMTT_PHYSICAL_COMPONENT; 1859 1860 1861 /* 0xFF: Vendor Specific Data */ 1862 1863 typedef struct acpi_pmtt_vendor_specific 1864 { 1865 ACPI_PMTT_HEADER Header; 1866 UINT8 TypeUuid[16]; 1867 UINT8 Specific[]; 1868 /* 1869 * Immediately followed by: 1870 * UINT8 VendorSpecificData[]; 1871 * MEMORY_DEVICE MemoryDeviceStruct[MemoryDeviceCount]; 1872 */ 1873 1874 } ACPI_PMTT_VENDOR_SPECIFIC; 1875 1876 1877 /******************************************************************************* 1878 * 1879 * PPTT - Processor Properties Topology Table (ACPI 6.2) 1880 * Version 1 1881 * 1882 ******************************************************************************/ 1883 1884 typedef struct acpi_table_pptt 1885 { 1886 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1887 1888 } ACPI_TABLE_PPTT; 1889 1890 /* Values for Type field above */ 1891 1892 enum AcpiPpttType 1893 { 1894 ACPI_PPTT_TYPE_PROCESSOR = 0, 1895 ACPI_PPTT_TYPE_CACHE = 1, 1896 ACPI_PPTT_TYPE_ID = 2, 1897 ACPI_PPTT_TYPE_RESERVED = 3 1898 }; 1899 1900 1901 /* 0: Processor Hierarchy Node Structure */ 1902 1903 typedef struct acpi_pptt_processor 1904 { 1905 ACPI_SUBTABLE_HEADER Header; 1906 UINT16 Reserved; 1907 UINT32 Flags; 1908 UINT32 Parent; 1909 UINT32 AcpiProcessorId; 1910 UINT32 NumberOfPrivResources; 1911 1912 } ACPI_PPTT_PROCESSOR; 1913 1914 /* Flags */ 1915 1916 #define ACPI_PPTT_PHYSICAL_PACKAGE (1) 1917 #define ACPI_PPTT_ACPI_PROCESSOR_ID_VALID (1<<1) 1918 #define ACPI_PPTT_ACPI_PROCESSOR_IS_THREAD (1<<2) /* ACPI 6.3 */ 1919 #define ACPI_PPTT_ACPI_LEAF_NODE (1<<3) /* ACPI 6.3 */ 1920 #define ACPI_PPTT_ACPI_IDENTICAL (1<<4) /* ACPI 6.3 */ 1921 1922 1923 /* 1: Cache Type Structure */ 1924 1925 typedef struct acpi_pptt_cache 1926 { 1927 ACPI_SUBTABLE_HEADER Header; 1928 UINT16 Reserved; 1929 UINT32 Flags; 1930 UINT32 NextLevelOfCache; 1931 UINT32 Size; 1932 UINT32 NumberOfSets; 1933 UINT8 Associativity; 1934 UINT8 Attributes; 1935 UINT16 LineSize; 1936 1937 } ACPI_PPTT_CACHE; 1938 1939 /* 1: Cache Type Structure for PPTT version 3 */ 1940 1941 typedef struct acpi_pptt_cache_v1 1942 { 1943 UINT32 CacheId; 1944 1945 } ACPI_PPTT_CACHE_V1; 1946 1947 1948 /* Flags */ 1949 1950 #define ACPI_PPTT_SIZE_PROPERTY_VALID (1) /* Physical property valid */ 1951 #define ACPI_PPTT_NUMBER_OF_SETS_VALID (1<<1) /* Number of sets valid */ 1952 #define ACPI_PPTT_ASSOCIATIVITY_VALID (1<<2) /* Associativity valid */ 1953 #define ACPI_PPTT_ALLOCATION_TYPE_VALID (1<<3) /* Allocation type valid */ 1954 #define ACPI_PPTT_CACHE_TYPE_VALID (1<<4) /* Cache type valid */ 1955 #define ACPI_PPTT_WRITE_POLICY_VALID (1<<5) /* Write policy valid */ 1956 #define ACPI_PPTT_LINE_SIZE_VALID (1<<6) /* Line size valid */ 1957 #define ACPI_PPTT_CACHE_ID_VALID (1<<7) /* Cache ID valid */ 1958 1959 /* Masks for Attributes */ 1960 1961 #define ACPI_PPTT_MASK_ALLOCATION_TYPE (0x03) /* Allocation type */ 1962 #define ACPI_PPTT_MASK_CACHE_TYPE (0x0C) /* Cache type */ 1963 #define ACPI_PPTT_MASK_WRITE_POLICY (0x10) /* Write policy */ 1964 1965 /* Attributes describing cache */ 1966 #define ACPI_PPTT_CACHE_READ_ALLOCATE (0x0) /* Cache line is allocated on read */ 1967 #define ACPI_PPTT_CACHE_WRITE_ALLOCATE (0x01) /* Cache line is allocated on write */ 1968 #define ACPI_PPTT_CACHE_RW_ALLOCATE (0x02) /* Cache line is allocated on read and write */ 1969 #define ACPI_PPTT_CACHE_RW_ALLOCATE_ALT (0x03) /* Alternate representation of above */ 1970 1971 #define ACPI_PPTT_CACHE_TYPE_DATA (0x0) /* Data cache */ 1972 #define ACPI_PPTT_CACHE_TYPE_INSTR (1<<2) /* Instruction cache */ 1973 #define ACPI_PPTT_CACHE_TYPE_UNIFIED (2<<2) /* Unified I & D cache */ 1974 #define ACPI_PPTT_CACHE_TYPE_UNIFIED_ALT (3<<2) /* Alternate representation of above */ 1975 1976 #define ACPI_PPTT_CACHE_POLICY_WB (0x0) /* Cache is write back */ 1977 #define ACPI_PPTT_CACHE_POLICY_WT (1<<4) /* Cache is write through */ 1978 1979 /* 2: ID Structure */ 1980 1981 typedef struct acpi_pptt_id 1982 { 1983 ACPI_SUBTABLE_HEADER Header; 1984 UINT16 Reserved; 1985 UINT32 VendorId; 1986 UINT64 Level1Id; 1987 UINT64 Level2Id; 1988 UINT16 MajorRev; 1989 UINT16 MinorRev; 1990 UINT16 SpinRev; 1991 1992 } ACPI_PPTT_ID; 1993 1994 1995 /******************************************************************************* 1996 * 1997 * RASF - RAS Feature Table (ACPI 5.0) 1998 * Version 1 1999 * 2000 ******************************************************************************/ 2001 2002 typedef struct acpi_table_rasf 2003 { 2004 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 2005 UINT8 ChannelId[12]; 2006 2007 } ACPI_TABLE_RASF; 2008 2009 /* RASF Platform Communication Channel Shared Memory Region */ 2010 2011 typedef struct acpi_rasf_shared_memory 2012 { 2013 UINT32 Signature; 2014 UINT16 Command; 2015 UINT16 Status; 2016 UINT16 Version; 2017 UINT8 Capabilities[16]; 2018 UINT8 SetCapabilities[16]; 2019 UINT16 NumParameterBlocks; 2020 UINT32 SetCapabilitiesStatus; 2021 2022 } ACPI_RASF_SHARED_MEMORY; 2023 2024 /* RASF Parameter Block Structure Header */ 2025 2026 typedef struct acpi_rasf_parameter_block 2027 { 2028 UINT16 Type; 2029 UINT16 Version; 2030 UINT16 Length; 2031 2032 } ACPI_RASF_PARAMETER_BLOCK; 2033 2034 /* RASF Parameter Block Structure for PATROL_SCRUB */ 2035 2036 typedef struct acpi_rasf_patrol_scrub_parameter 2037 { 2038 ACPI_RASF_PARAMETER_BLOCK Header; 2039 UINT16 PatrolScrubCommand; 2040 UINT64 RequestedAddressRange[2]; 2041 UINT64 ActualAddressRange[2]; 2042 UINT16 Flags; 2043 UINT8 RequestedSpeed; 2044 2045 } ACPI_RASF_PATROL_SCRUB_PARAMETER; 2046 2047 /* Masks for Flags and Speed fields above */ 2048 2049 #define ACPI_RASF_SCRUBBER_RUNNING 1 2050 #define ACPI_RASF_SPEED (7<<1) 2051 #define ACPI_RASF_SPEED_SLOW (0<<1) 2052 #define ACPI_RASF_SPEED_MEDIUM (4<<1) 2053 #define ACPI_RASF_SPEED_FAST (7<<1) 2054 2055 /* Channel Commands */ 2056 2057 enum AcpiRasfCommands 2058 { 2059 ACPI_RASF_EXECUTE_RASF_COMMAND = 1 2060 }; 2061 2062 /* Platform RAS Capabilities */ 2063 2064 enum AcpiRasfCapabiliities 2065 { 2066 ACPI_HW_PATROL_SCRUB_SUPPORTED = 0, 2067 ACPI_SW_PATROL_SCRUB_EXPOSED = 1 2068 }; 2069 2070 /* Patrol Scrub Commands */ 2071 2072 enum AcpiRasfPatrolScrubCommands 2073 { 2074 ACPI_RASF_GET_PATROL_PARAMETERS = 1, 2075 ACPI_RASF_START_PATROL_SCRUBBER = 2, 2076 ACPI_RASF_STOP_PATROL_SCRUBBER = 3 2077 }; 2078 2079 /* Channel Command flags */ 2080 2081 #define ACPI_RASF_GENERATE_SCI (1<<15) 2082 2083 /* Status values */ 2084 2085 enum AcpiRasfStatus 2086 { 2087 ACPI_RASF_SUCCESS = 0, 2088 ACPI_RASF_NOT_VALID = 1, 2089 ACPI_RASF_NOT_SUPPORTED = 2, 2090 ACPI_RASF_BUSY = 3, 2091 ACPI_RASF_FAILED = 4, 2092 ACPI_RASF_ABORTED = 5, 2093 ACPI_RASF_INVALID_DATA = 6 2094 }; 2095 2096 /* Status flags */ 2097 2098 #define ACPI_RASF_COMMAND_COMPLETE (1) 2099 #define ACPI_RASF_SCI_DOORBELL (1<<1) 2100 #define ACPI_RASF_ERROR (1<<2) 2101 #define ACPI_RASF_STATUS (0x1F<<3) 2102 2103 2104 /******************************************************************************* 2105 * 2106 * SBST - Smart Battery Specification Table 2107 * Version 1 2108 * 2109 ******************************************************************************/ 2110 2111 typedef struct acpi_table_sbst 2112 { 2113 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 2114 UINT32 WarningLevel; 2115 UINT32 LowLevel; 2116 UINT32 CriticalLevel; 2117 2118 } ACPI_TABLE_SBST; 2119 2120 2121 /******************************************************************************* 2122 * 2123 * SDEI - Software Delegated Exception Interface Descriptor Table 2124 * 2125 * Conforms to "Software Delegated Exception Interface (SDEI)" ARM DEN0054A, 2126 * May 8th, 2017. Copyright 2017 ARM Ltd. 2127 * 2128 ******************************************************************************/ 2129 2130 typedef struct acpi_table_sdei 2131 { 2132 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 2133 2134 } ACPI_TABLE_SDEI; 2135 2136 2137 /******************************************************************************* 2138 * 2139 * SDEV - Secure Devices Table (ACPI 6.2) 2140 * Version 1 2141 * 2142 ******************************************************************************/ 2143 2144 typedef struct acpi_table_sdev 2145 { 2146 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 2147 2148 } ACPI_TABLE_SDEV; 2149 2150 2151 typedef struct acpi_sdev_header 2152 { 2153 UINT8 Type; 2154 UINT8 Flags; 2155 UINT16 Length; 2156 2157 } ACPI_SDEV_HEADER; 2158 2159 2160 /* Values for subtable type above */ 2161 2162 enum AcpiSdevType 2163 { 2164 ACPI_SDEV_TYPE_NAMESPACE_DEVICE = 0, 2165 ACPI_SDEV_TYPE_PCIE_ENDPOINT_DEVICE = 1, 2166 ACPI_SDEV_TYPE_RESERVED = 2 /* 2 and greater are reserved */ 2167 }; 2168 2169 /* Values for flags above */ 2170 2171 #define ACPI_SDEV_HANDOFF_TO_UNSECURE_OS (1) 2172 #define ACPI_SDEV_SECURE_COMPONENTS_PRESENT (1<<1) 2173 2174 /* 2175 * SDEV subtables 2176 */ 2177 2178 /* 0: Namespace Device Based Secure Device Structure */ 2179 2180 typedef struct acpi_sdev_namespace 2181 { 2182 ACPI_SDEV_HEADER Header; 2183 UINT16 DeviceIdOffset; 2184 UINT16 DeviceIdLength; 2185 UINT16 VendorDataOffset; 2186 UINT16 VendorDataLength; 2187 2188 } ACPI_SDEV_NAMESPACE; 2189 2190 typedef struct acpi_sdev_secure_component 2191 { 2192 UINT16 SecureComponentOffset; 2193 UINT16 SecureComponentLength; 2194 2195 } ACPI_SDEV_SECURE_COMPONENT; 2196 2197 2198 /* 2199 * SDEV sub-subtables ("Components") for above 2200 */ 2201 typedef struct acpi_sdev_component 2202 { 2203 ACPI_SDEV_HEADER Header; 2204 2205 } ACPI_SDEV_COMPONENT; 2206 2207 2208 /* Values for sub-subtable type above */ 2209 2210 enum AcpiSacType 2211 { 2212 ACPI_SDEV_TYPE_ID_COMPONENT = 0, 2213 ACPI_SDEV_TYPE_MEM_COMPONENT = 1 2214 }; 2215 2216 typedef struct acpi_sdev_id_component 2217 { 2218 ACPI_SDEV_HEADER Header; 2219 UINT16 HardwareIdOffset; 2220 UINT16 HardwareIdLength; 2221 UINT16 SubsystemIdOffset; 2222 UINT16 SubsystemIdLength; 2223 UINT16 HardwareRevision; 2224 UINT8 HardwareRevPresent; 2225 UINT8 ClassCodePresent; 2226 UINT8 PciBaseClass; 2227 UINT8 PciSubClass; 2228 UINT8 PciProgrammingXface; 2229 2230 } ACPI_SDEV_ID_COMPONENT; 2231 2232 typedef struct acpi_sdev_mem_component 2233 { 2234 ACPI_SDEV_HEADER Header; 2235 UINT32 Reserved; 2236 UINT64 MemoryBaseAddress; 2237 UINT64 MemoryLength; 2238 2239 } ACPI_SDEV_MEM_COMPONENT; 2240 2241 2242 /* 1: PCIe Endpoint Device Based Device Structure */ 2243 2244 typedef struct acpi_sdev_pcie 2245 { 2246 ACPI_SDEV_HEADER Header; 2247 UINT16 Segment; 2248 UINT16 StartBus; 2249 UINT16 PathOffset; 2250 UINT16 PathLength; 2251 UINT16 VendorDataOffset; 2252 UINT16 VendorDataLength; 2253 2254 } ACPI_SDEV_PCIE; 2255 2256 /* 1a: PCIe Endpoint path entry */ 2257 2258 typedef struct acpi_sdev_pcie_path 2259 { 2260 UINT8 Device; 2261 UINT8 Function; 2262 2263 } ACPI_SDEV_PCIE_PATH; 2264 2265 2266 /* Reset to default packing */ 2267 2268 #pragma pack() 2269 2270 #endif /* __ACTBL2_H__ */ 2271
Indexes created Wed Oct 01 07:09:59 GMT 2025