actbl2.h revision 1.1.1.19
1 /****************************************************************************** 2 * 3 * Name: actbl2.h - ACPI Table Definitions (tables not in ACPI spec) 4 * 5 *****************************************************************************/ 6 7 /* 8 * Copyright (C) 2000 - 2021, Intel Corp. 9 * All rights reserved. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions, and the following disclaimer, 16 * without modification. 17 * 2. Redistributions in binary form must reproduce at minimum a disclaimer 18 * substantially similar to the "NO WARRANTY" disclaimer below 19 * ("Disclaimer") and any redistribution must be conditioned upon 20 * including a substantially similar Disclaimer requirement for further 21 * binary redistribution. 22 * 3. Neither the names of the above-listed copyright holders nor the names 23 * of any contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * Alternatively, this software may be distributed under the terms of the 27 * GNU General Public License ("GPL") version 2 as published by the Free 28 * Software Foundation. 29 * 30 * NO WARRANTY 31 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 32 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 33 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 34 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 35 * HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 36 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 37 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 38 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 39 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING 40 * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 41 * POSSIBILITY OF SUCH DAMAGES. 42 */ 43 44 #ifndef __ACTBL2_H__ 45 #define __ACTBL2_H__ 46 47 48 /******************************************************************************* 49 * 50 * Additional ACPI Tables (2) 51 * 52 * These tables are not consumed directly by the ACPICA subsystem, but are 53 * included here to support device drivers and the AML disassembler. 54 * 55 ******************************************************************************/ 56 57 58 /* 59 * Values for description table header signatures for tables defined in this 60 * file. Useful because they make it more difficult to inadvertently type in 61 * the wrong signature. 62 */ 63 #define ACPI_SIG_BDAT "BDAT" /* BIOS Data ACPI Table */ 64 #define ACPI_SIG_IORT "IORT" /* IO Remapping Table */ 65 #define ACPI_SIG_IVRS "IVRS" /* I/O Virtualization Reporting Structure */ 66 #define ACPI_SIG_LPIT "LPIT" /* Low Power Idle Table */ 67 #define ACPI_SIG_MADT "APIC" /* Multiple APIC Description Table */ 68 #define ACPI_SIG_MCFG "MCFG" /* PCI Memory Mapped Configuration table */ 69 #define ACPI_SIG_MCHI "MCHI" /* Management Controller Host Interface table */ 70 #define ACPI_SIG_MPST "MPST" /* Memory Power State Table */ 71 #define ACPI_SIG_MSCT "MSCT" /* Maximum System Characteristics Table */ 72 #define ACPI_SIG_MSDM "MSDM" /* Microsoft Data Management Table */ 73 #define ACPI_SIG_NFIT "NFIT" /* NVDIMM Firmware Interface Table */ 74 #define ACPI_SIG_PCCT "PCCT" /* Platform Communications Channel Table */ 75 #define ACPI_SIG_PDTT "PDTT" /* Platform Debug Trigger Table */ 76 #define ACPI_SIG_PHAT "PHAT" /* Platform Health Assessment Table */ 77 #define ACPI_SIG_PMTT "PMTT" /* Platform Memory Topology Table */ 78 #define ACPI_SIG_PPTT "PPTT" /* Processor Properties Topology Table */ 79 #define ACPI_SIG_PRMT "PRMT" /* Platform Runtime Mechanism Table */ 80 #define ACPI_SIG_RASF "RASF" /* RAS Feature table */ 81 #define ACPI_SIG_RGRT "RGRT" /* Regulatory Graphics Resource Table */ 82 #define ACPI_SIG_SBST "SBST" /* Smart Battery Specification Table */ 83 #define ACPI_SIG_SDEI "SDEI" /* Software Delegated Exception Interface Table */ 84 #define ACPI_SIG_SDEV "SDEV" /* Secure Devices table */ 85 #define ACPI_SIG_NHLT "NHLT" /* Non-HDAudio Link Table */ 86 #define ACPI_SIG_SVKL "SVKL" /* Storage Volume Key Location Table */ 87 88 89 /* 90 * All tables must be byte-packed to match the ACPI specification, since 91 * the tables are provided by the system BIOS. 92 */ 93 #pragma pack(1) 94 95 /* 96 * Note: C bitfields are not used for this reason: 97 * 98 * "Bitfields are great and easy to read, but unfortunately the C language 99 * does not specify the layout of bitfields in memory, which means they are 100 * essentially useless for dealing with packed data in on-disk formats or 101 * binary wire protocols." (Or ACPI tables and buffers.) "If you ask me, 102 * this decision was a design error in C. Ritchie could have picked an order 103 * and stuck with it." Norman Ramsey. 104 * See http://stackoverflow.com/a/1053662/41661 105 */ 106 107 108 /******************************************************************************* 109 * 110 * BDAT - BIOS Data ACPI Table 111 * 112 * Conforms to "BIOS Data ACPI Table", Interface Specification v4.0 Draft 5 113 * Nov 2020 114 * 115 ******************************************************************************/ 116 117 typedef struct acpi_table_bdat 118 { 119 ACPI_TABLE_HEADER Header; 120 ACPI_GENERIC_ADDRESS Gas; 121 122 } ACPI_TABLE_BDAT; 123 124 125 /******************************************************************************* 126 * 127 * IORT - IO Remapping Table 128 * 129 * Conforms to "IO Remapping Table System Software on ARM Platforms", 130 * Document number: ARM DEN 0049E.b, Feb 2021 131 * 132 ******************************************************************************/ 133 134 typedef struct acpi_table_iort 135 { 136 ACPI_TABLE_HEADER Header; 137 UINT32 NodeCount; 138 UINT32 NodeOffset; 139 UINT32 Reserved; 140 141 } ACPI_TABLE_IORT; 142 143 144 /* 145 * IORT subtables 146 */ 147 typedef struct acpi_iort_node 148 { 149 UINT8 Type; 150 UINT16 Length; 151 UINT8 Revision; 152 UINT32 Identifier; 153 UINT32 MappingCount; 154 UINT32 MappingOffset; 155 char NodeData[1]; 156 157 } ACPI_IORT_NODE; 158 159 /* Values for subtable Type above */ 160 161 enum AcpiIortNodeType 162 { 163 ACPI_IORT_NODE_ITS_GROUP = 0x00, 164 ACPI_IORT_NODE_NAMED_COMPONENT = 0x01, 165 ACPI_IORT_NODE_PCI_ROOT_COMPLEX = 0x02, 166 ACPI_IORT_NODE_SMMU = 0x03, 167 ACPI_IORT_NODE_SMMU_V3 = 0x04, 168 ACPI_IORT_NODE_PMCG = 0x05, 169 ACPI_IORT_NODE_RMR = 0x06, 170 }; 171 172 173 typedef struct acpi_iort_id_mapping 174 { 175 UINT32 InputBase; /* Lowest value in input range */ 176 UINT32 IdCount; /* Number of IDs */ 177 UINT32 OutputBase; /* Lowest value in output range */ 178 UINT32 OutputReference; /* A reference to the output node */ 179 UINT32 Flags; 180 181 } ACPI_IORT_ID_MAPPING; 182 183 /* Masks for Flags field above for IORT subtable */ 184 185 #define ACPI_IORT_ID_SINGLE_MAPPING (1) 186 187 188 typedef struct acpi_iort_memory_access 189 { 190 UINT32 CacheCoherency; 191 UINT8 Hints; 192 UINT16 Reserved; 193 UINT8 MemoryFlags; 194 195 } ACPI_IORT_MEMORY_ACCESS; 196 197 /* Values for CacheCoherency field above */ 198 199 #define ACPI_IORT_NODE_COHERENT 0x00000001 /* The device node is fully coherent */ 200 #define ACPI_IORT_NODE_NOT_COHERENT 0x00000000 /* The device node is not coherent */ 201 202 /* Masks for Hints field above */ 203 204 #define ACPI_IORT_HT_TRANSIENT (1) 205 #define ACPI_IORT_HT_WRITE (1<<1) 206 #define ACPI_IORT_HT_READ (1<<2) 207 #define ACPI_IORT_HT_OVERRIDE (1<<3) 208 209 /* Masks for MemoryFlags field above */ 210 211 #define ACPI_IORT_MF_COHERENCY (1) 212 #define ACPI_IORT_MF_ATTRIBUTES (1<<1) 213 214 215 /* 216 * IORT node specific subtables 217 */ 218 typedef struct acpi_iort_its_group 219 { 220 UINT32 ItsCount; 221 UINT32 Identifiers[1]; /* GIC ITS identifier array */ 222 223 } ACPI_IORT_ITS_GROUP; 224 225 226 typedef struct acpi_iort_named_component 227 { 228 UINT32 NodeFlags; 229 UINT64 MemoryProperties; /* Memory access properties */ 230 UINT8 MemoryAddressLimit; /* Memory address size limit */ 231 char DeviceName[1]; /* Path of namespace object */ 232 233 } ACPI_IORT_NAMED_COMPONENT; 234 235 /* Masks for Flags field above */ 236 237 #define ACPI_IORT_NC_STALL_SUPPORTED (1) 238 #define ACPI_IORT_NC_PASID_BITS (31<<1) 239 240 typedef struct acpi_iort_root_complex 241 { 242 UINT64 MemoryProperties; /* Memory access properties */ 243 UINT32 AtsAttribute; 244 UINT32 PciSegmentNumber; 245 UINT8 MemoryAddressLimit; /* Memory address size limit */ 246 UINT8 Reserved[3]; /* Reserved, must be zero */ 247 248 } ACPI_IORT_ROOT_COMPLEX; 249 250 /* Masks for AtsAttribute field above */ 251 252 #define ACPI_IORT_ATS_SUPPORTED (1) /* The root complex ATS support */ 253 #define ACPI_IORT_PRI_SUPPORTED (1<<1) /* The root complex PRI support */ 254 #define ACPI_IORT_PASID_FWD_SUPPORTED (1<<2) /* The root complex PASID forward support */ 255 256 257 typedef struct acpi_iort_smmu 258 { 259 UINT64 BaseAddress; /* SMMU base address */ 260 UINT64 Span; /* Length of memory range */ 261 UINT32 Model; 262 UINT32 Flags; 263 UINT32 GlobalInterruptOffset; 264 UINT32 ContextInterruptCount; 265 UINT32 ContextInterruptOffset; 266 UINT32 PmuInterruptCount; 267 UINT32 PmuInterruptOffset; 268 UINT64 Interrupts[1]; /* Interrupt array */ 269 270 } ACPI_IORT_SMMU; 271 272 /* Values for Model field above */ 273 274 #define ACPI_IORT_SMMU_V1 0x00000000 /* Generic SMMUv1 */ 275 #define ACPI_IORT_SMMU_V2 0x00000001 /* Generic SMMUv2 */ 276 #define ACPI_IORT_SMMU_CORELINK_MMU400 0x00000002 /* ARM Corelink MMU-400 */ 277 #define ACPI_IORT_SMMU_CORELINK_MMU500 0x00000003 /* ARM Corelink MMU-500 */ 278 #define ACPI_IORT_SMMU_CORELINK_MMU401 0x00000004 /* ARM Corelink MMU-401 */ 279 #define ACPI_IORT_SMMU_CAVIUM_THUNDERX 0x00000005 /* Cavium ThunderX SMMUv2 */ 280 281 /* Masks for Flags field above */ 282 283 #define ACPI_IORT_SMMU_DVM_SUPPORTED (1) 284 #define ACPI_IORT_SMMU_COHERENT_WALK (1<<1) 285 286 /* Global interrupt format */ 287 288 typedef struct acpi_iort_smmu_gsi 289 { 290 UINT32 NSgIrpt; 291 UINT32 NSgIrptFlags; 292 UINT32 NSgCfgIrpt; 293 UINT32 NSgCfgIrptFlags; 294 295 } ACPI_IORT_SMMU_GSI; 296 297 298 typedef struct acpi_iort_smmu_v3 299 { 300 UINT64 BaseAddress; /* SMMUv3 base address */ 301 UINT32 Flags; 302 UINT32 Reserved; 303 UINT64 VatosAddress; 304 UINT32 Model; 305 UINT32 EventGsiv; 306 UINT32 PriGsiv; 307 UINT32 GerrGsiv; 308 UINT32 SyncGsiv; 309 UINT32 Pxm; 310 UINT32 IdMappingIndex; 311 312 } ACPI_IORT_SMMU_V3; 313 314 /* Values for Model field above */ 315 316 #define ACPI_IORT_SMMU_V3_GENERIC 0x00000000 /* Generic SMMUv3 */ 317 #define ACPI_IORT_SMMU_V3_HISILICON_HI161X 0x00000001 /* HiSilicon Hi161x SMMUv3 */ 318 #define ACPI_IORT_SMMU_V3_CAVIUM_CN99XX 0x00000002 /* Cavium CN99xx SMMUv3 */ 319 320 /* Masks for Flags field above */ 321 322 #define ACPI_IORT_SMMU_V3_COHACC_OVERRIDE (1) 323 #define ACPI_IORT_SMMU_V3_HTTU_OVERRIDE (3<<1) 324 #define ACPI_IORT_SMMU_V3_PXM_VALID (1<<3) 325 326 typedef struct acpi_iort_pmcg 327 { 328 UINT64 Page0BaseAddress; 329 UINT32 OverflowGsiv; 330 UINT32 NodeReference; 331 UINT64 Page1BaseAddress; 332 333 } ACPI_IORT_PMCG; 334 335 typedef struct acpi_iort_rmr { 336 UINT32 Flags; 337 UINT32 RmrCount; 338 UINT32 RmrOffset; 339 340 } ACPI_IORT_RMR; 341 342 typedef struct acpi_iort_rmr_desc { 343 UINT64 BaseAddress; 344 UINT64 Length; 345 UINT32 Reserved; 346 347 } ACPI_IORT_RMR_DESC; 348 349 /******************************************************************************* 350 * 351 * IVRS - I/O Virtualization Reporting Structure 352 * Version 1 353 * 354 * Conforms to "AMD I/O Virtualization Technology (IOMMU) Specification", 355 * Revision 1.26, February 2009. 356 * 357 ******************************************************************************/ 358 359 typedef struct acpi_table_ivrs 360 { 361 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 362 UINT32 Info; /* Common virtualization info */ 363 UINT64 Reserved; 364 365 } ACPI_TABLE_IVRS; 366 367 /* Values for Info field above */ 368 369 #define ACPI_IVRS_PHYSICAL_SIZE 0x00007F00 /* 7 bits, physical address size */ 370 #define ACPI_IVRS_VIRTUAL_SIZE 0x003F8000 /* 7 bits, virtual address size */ 371 #define ACPI_IVRS_ATS_RESERVED 0x00400000 /* ATS address translation range reserved */ 372 373 374 /* IVRS subtable header */ 375 376 typedef struct acpi_ivrs_header 377 { 378 UINT8 Type; /* Subtable type */ 379 UINT8 Flags; 380 UINT16 Length; /* Subtable length */ 381 UINT16 DeviceId; /* ID of IOMMU */ 382 383 } ACPI_IVRS_HEADER; 384 385 /* Values for subtable Type above */ 386 387 enum AcpiIvrsType 388 { 389 ACPI_IVRS_TYPE_HARDWARE1 = 0x10, 390 ACPI_IVRS_TYPE_HARDWARE2 = 0x11, 391 ACPI_IVRS_TYPE_HARDWARE3 = 0x40, 392 ACPI_IVRS_TYPE_MEMORY1 = 0x20, 393 ACPI_IVRS_TYPE_MEMORY2 = 0x21, 394 ACPI_IVRS_TYPE_MEMORY3 = 0x22 395 }; 396 397 /* Masks for Flags field above for IVHD subtable */ 398 399 #define ACPI_IVHD_TT_ENABLE (1) 400 #define ACPI_IVHD_PASS_PW (1<<1) 401 #define ACPI_IVHD_RES_PASS_PW (1<<2) 402 #define ACPI_IVHD_ISOC (1<<3) 403 #define ACPI_IVHD_IOTLB (1<<4) 404 405 /* Masks for Flags field above for IVMD subtable */ 406 407 #define ACPI_IVMD_UNITY (1) 408 #define ACPI_IVMD_READ (1<<1) 409 #define ACPI_IVMD_WRITE (1<<2) 410 #define ACPI_IVMD_EXCLUSION_RANGE (1<<3) 411 412 413 /* 414 * IVRS subtables, correspond to Type in ACPI_IVRS_HEADER 415 */ 416 417 /* 0x10: I/O Virtualization Hardware Definition Block (IVHD) */ 418 419 typedef struct acpi_ivrs_hardware_10 420 { 421 ACPI_IVRS_HEADER Header; 422 UINT16 CapabilityOffset; /* Offset for IOMMU control fields */ 423 UINT64 BaseAddress; /* IOMMU control registers */ 424 UINT16 PciSegmentGroup; 425 UINT16 Info; /* MSI number and unit ID */ 426 UINT32 FeatureReporting; 427 428 } ACPI_IVRS_HARDWARE1; 429 430 /* 0x11: I/O Virtualization Hardware Definition Block (IVHD) */ 431 432 typedef struct acpi_ivrs_hardware_11 433 { 434 ACPI_IVRS_HEADER Header; 435 UINT16 CapabilityOffset; /* Offset for IOMMU control fields */ 436 UINT64 BaseAddress; /* IOMMU control registers */ 437 UINT16 PciSegmentGroup; 438 UINT16 Info; /* MSI number and unit ID */ 439 UINT32 Attributes; 440 UINT64 EfrRegisterImage; 441 UINT64 Reserved; 442 } ACPI_IVRS_HARDWARE2; 443 444 /* Masks for Info field above */ 445 446 #define ACPI_IVHD_MSI_NUMBER_MASK 0x001F /* 5 bits, MSI message number */ 447 #define ACPI_IVHD_UNIT_ID_MASK 0x1F00 /* 5 bits, UnitID */ 448 449 450 /* 451 * Device Entries for IVHD subtable, appear after ACPI_IVRS_HARDWARE structure. 452 * Upper two bits of the Type field are the (encoded) length of the structure. 453 * Currently, only 4 and 8 byte entries are defined. 16 and 32 byte entries 454 * are reserved for future use but not defined. 455 */ 456 typedef struct acpi_ivrs_de_header 457 { 458 UINT8 Type; 459 UINT16 Id; 460 UINT8 DataSetting; 461 462 } ACPI_IVRS_DE_HEADER; 463 464 /* Length of device entry is in the top two bits of Type field above */ 465 466 #define ACPI_IVHD_ENTRY_LENGTH 0xC0 467 468 /* Values for device entry Type field above */ 469 470 enum AcpiIvrsDeviceEntryType 471 { 472 /* 4-byte device entries, all use ACPI_IVRS_DEVICE4 */ 473 474 ACPI_IVRS_TYPE_PAD4 = 0, 475 ACPI_IVRS_TYPE_ALL = 1, 476 ACPI_IVRS_TYPE_SELECT = 2, 477 ACPI_IVRS_TYPE_START = 3, 478 ACPI_IVRS_TYPE_END = 4, 479 480 /* 8-byte device entries */ 481 482 ACPI_IVRS_TYPE_PAD8 = 64, 483 ACPI_IVRS_TYPE_NOT_USED = 65, 484 ACPI_IVRS_TYPE_ALIAS_SELECT = 66, /* Uses ACPI_IVRS_DEVICE8A */ 485 ACPI_IVRS_TYPE_ALIAS_START = 67, /* Uses ACPI_IVRS_DEVICE8A */ 486 ACPI_IVRS_TYPE_EXT_SELECT = 70, /* Uses ACPI_IVRS_DEVICE8B */ 487 ACPI_IVRS_TYPE_EXT_START = 71, /* Uses ACPI_IVRS_DEVICE8B */ 488 ACPI_IVRS_TYPE_SPECIAL = 72, /* Uses ACPI_IVRS_DEVICE8C */ 489 490 /* Variable-length device entries */ 491 492 ACPI_IVRS_TYPE_HID = 240 /* Uses ACPI_IVRS_DEVICE_HID */ 493 }; 494 495 /* Values for Data field above */ 496 497 #define ACPI_IVHD_INIT_PASS (1) 498 #define ACPI_IVHD_EINT_PASS (1<<1) 499 #define ACPI_IVHD_NMI_PASS (1<<2) 500 #define ACPI_IVHD_SYSTEM_MGMT (3<<4) 501 #define ACPI_IVHD_LINT0_PASS (1<<6) 502 #define ACPI_IVHD_LINT1_PASS (1<<7) 503 504 505 /* Types 0-4: 4-byte device entry */ 506 507 typedef struct acpi_ivrs_device4 508 { 509 ACPI_IVRS_DE_HEADER Header; 510 511 } ACPI_IVRS_DEVICE4; 512 513 /* Types 66-67: 8-byte device entry */ 514 515 typedef struct acpi_ivrs_device8a 516 { 517 ACPI_IVRS_DE_HEADER Header; 518 UINT8 Reserved1; 519 UINT16 UsedId; 520 UINT8 Reserved2; 521 522 } ACPI_IVRS_DEVICE8A; 523 524 /* Types 70-71: 8-byte device entry */ 525 526 typedef struct acpi_ivrs_device8b 527 { 528 ACPI_IVRS_DE_HEADER Header; 529 UINT32 ExtendedData; 530 531 } ACPI_IVRS_DEVICE8B; 532 533 /* Values for ExtendedData above */ 534 535 #define ACPI_IVHD_ATS_DISABLED (1<<31) 536 537 /* Type 72: 8-byte device entry */ 538 539 typedef struct acpi_ivrs_device8c 540 { 541 ACPI_IVRS_DE_HEADER Header; 542 UINT8 Handle; 543 UINT16 UsedId; 544 UINT8 Variety; 545 546 } ACPI_IVRS_DEVICE8C; 547 548 /* Values for Variety field above */ 549 550 #define ACPI_IVHD_IOAPIC 1 551 #define ACPI_IVHD_HPET 2 552 553 /* Type 240: variable-length device entry */ 554 555 typedef struct acpi_ivrs_device_hid 556 { 557 ACPI_IVRS_DE_HEADER Header; 558 UINT64 AcpiHid; 559 UINT64 AcpiCid; 560 UINT8 UidType; 561 UINT8 UidLength; 562 563 } ACPI_IVRS_DEVICE_HID; 564 565 /* Values for UidType above */ 566 567 #define ACPI_IVRS_UID_NOT_PRESENT 0 568 #define ACPI_IVRS_UID_IS_INTEGER 1 569 #define ACPI_IVRS_UID_IS_STRING 2 570 571 /* 0x20, 0x21, 0x22: I/O Virtualization Memory Definition Block (IVMD) */ 572 573 typedef struct acpi_ivrs_memory 574 { 575 ACPI_IVRS_HEADER Header; 576 UINT16 AuxData; 577 UINT64 Reserved; 578 UINT64 StartAddress; 579 UINT64 MemoryLength; 580 581 } ACPI_IVRS_MEMORY; 582 583 584 /******************************************************************************* 585 * 586 * LPIT - Low Power Idle Table 587 * 588 * Conforms to "ACPI Low Power Idle Table (LPIT)" July 2014. 589 * 590 ******************************************************************************/ 591 592 typedef struct acpi_table_lpit 593 { 594 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 595 596 } ACPI_TABLE_LPIT; 597 598 599 /* LPIT subtable header */ 600 601 typedef struct acpi_lpit_header 602 { 603 UINT32 Type; /* Subtable type */ 604 UINT32 Length; /* Subtable length */ 605 UINT16 UniqueId; 606 UINT16 Reserved; 607 UINT32 Flags; 608 609 } ACPI_LPIT_HEADER; 610 611 /* Values for subtable Type above */ 612 613 enum AcpiLpitType 614 { 615 ACPI_LPIT_TYPE_NATIVE_CSTATE = 0x00, 616 ACPI_LPIT_TYPE_RESERVED = 0x01 /* 1 and above are reserved */ 617 }; 618 619 /* Masks for Flags field above */ 620 621 #define ACPI_LPIT_STATE_DISABLED (1) 622 #define ACPI_LPIT_NO_COUNTER (1<<1) 623 624 /* 625 * LPIT subtables, correspond to Type in ACPI_LPIT_HEADER 626 */ 627 628 /* 0x00: Native C-state instruction based LPI structure */ 629 630 typedef struct acpi_lpit_native 631 { 632 ACPI_LPIT_HEADER Header; 633 ACPI_GENERIC_ADDRESS EntryTrigger; 634 UINT32 Residency; 635 UINT32 Latency; 636 ACPI_GENERIC_ADDRESS ResidencyCounter; 637 UINT64 CounterFrequency; 638 639 } ACPI_LPIT_NATIVE; 640 641 642 /******************************************************************************* 643 * 644 * MADT - Multiple APIC Description Table 645 * Version 3 646 * 647 ******************************************************************************/ 648 649 typedef struct acpi_table_madt 650 { 651 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 652 UINT32 Address; /* Physical address of local APIC */ 653 UINT32 Flags; 654 655 } ACPI_TABLE_MADT; 656 657 /* Masks for Flags field above */ 658 659 #define ACPI_MADT_PCAT_COMPAT (1) /* 00: System also has dual 8259s */ 660 661 /* Values for PCATCompat flag */ 662 663 #define ACPI_MADT_DUAL_PIC 1 664 #define ACPI_MADT_MULTIPLE_APIC 0 665 666 667 /* Values for MADT subtable type in ACPI_SUBTABLE_HEADER */ 668 669 enum AcpiMadtType 670 { 671 ACPI_MADT_TYPE_LOCAL_APIC = 0, 672 ACPI_MADT_TYPE_IO_APIC = 1, 673 ACPI_MADT_TYPE_INTERRUPT_OVERRIDE = 2, 674 ACPI_MADT_TYPE_NMI_SOURCE = 3, 675 ACPI_MADT_TYPE_LOCAL_APIC_NMI = 4, 676 ACPI_MADT_TYPE_LOCAL_APIC_OVERRIDE = 5, 677 ACPI_MADT_TYPE_IO_SAPIC = 6, 678 ACPI_MADT_TYPE_LOCAL_SAPIC = 7, 679 ACPI_MADT_TYPE_INTERRUPT_SOURCE = 8, 680 ACPI_MADT_TYPE_LOCAL_X2APIC = 9, 681 ACPI_MADT_TYPE_LOCAL_X2APIC_NMI = 10, 682 ACPI_MADT_TYPE_GENERIC_INTERRUPT = 11, 683 ACPI_MADT_TYPE_GENERIC_DISTRIBUTOR = 12, 684 ACPI_MADT_TYPE_GENERIC_MSI_FRAME = 13, 685 ACPI_MADT_TYPE_GENERIC_REDISTRIBUTOR = 14, 686 ACPI_MADT_TYPE_GENERIC_TRANSLATOR = 15, 687 ACPI_MADT_TYPE_MULTIPROC_WAKEUP = 16, 688 ACPI_MADT_TYPE_RESERVED = 17 /* 17 and greater are reserved */ 689 }; 690 691 692 /* 693 * MADT Subtables, correspond to Type in ACPI_SUBTABLE_HEADER 694 */ 695 696 /* 0: Processor Local APIC */ 697 698 typedef struct acpi_madt_local_apic 699 { 700 ACPI_SUBTABLE_HEADER Header; 701 UINT8 ProcessorId; /* ACPI processor id */ 702 UINT8 Id; /* Processor's local APIC id */ 703 UINT32 LapicFlags; 704 705 } ACPI_MADT_LOCAL_APIC; 706 707 708 /* 1: IO APIC */ 709 710 typedef struct acpi_madt_io_apic 711 { 712 ACPI_SUBTABLE_HEADER Header; 713 UINT8 Id; /* I/O APIC ID */ 714 UINT8 Reserved; /* Reserved - must be zero */ 715 UINT32 Address; /* APIC physical address */ 716 UINT32 GlobalIrqBase; /* Global system interrupt where INTI lines start */ 717 718 } ACPI_MADT_IO_APIC; 719 720 721 /* 2: Interrupt Override */ 722 723 typedef struct acpi_madt_interrupt_override 724 { 725 ACPI_SUBTABLE_HEADER Header; 726 UINT8 Bus; /* 0 - ISA */ 727 UINT8 SourceIrq; /* Interrupt source (IRQ) */ 728 UINT32 GlobalIrq; /* Global system interrupt */ 729 UINT16 IntiFlags; 730 731 } ACPI_MADT_INTERRUPT_OVERRIDE; 732 733 734 /* 3: NMI Source */ 735 736 typedef struct acpi_madt_nmi_source 737 { 738 ACPI_SUBTABLE_HEADER Header; 739 UINT16 IntiFlags; 740 UINT32 GlobalIrq; /* Global system interrupt */ 741 742 } ACPI_MADT_NMI_SOURCE; 743 744 745 /* 4: Local APIC NMI */ 746 747 typedef struct acpi_madt_local_apic_nmi 748 { 749 ACPI_SUBTABLE_HEADER Header; 750 UINT8 ProcessorId; /* ACPI processor id */ 751 UINT16 IntiFlags; 752 UINT8 Lint; /* LINTn to which NMI is connected */ 753 754 } ACPI_MADT_LOCAL_APIC_NMI; 755 756 757 /* 5: Address Override */ 758 759 typedef struct acpi_madt_local_apic_override 760 { 761 ACPI_SUBTABLE_HEADER Header; 762 UINT16 Reserved; /* Reserved, must be zero */ 763 UINT64 Address; /* APIC physical address */ 764 765 } ACPI_MADT_LOCAL_APIC_OVERRIDE; 766 767 768 /* 6: I/O Sapic */ 769 770 typedef struct acpi_madt_io_sapic 771 { 772 ACPI_SUBTABLE_HEADER Header; 773 UINT8 Id; /* I/O SAPIC ID */ 774 UINT8 Reserved; /* Reserved, must be zero */ 775 UINT32 GlobalIrqBase; /* Global interrupt for SAPIC start */ 776 UINT64 Address; /* SAPIC physical address */ 777 778 } ACPI_MADT_IO_SAPIC; 779 780 781 /* 7: Local Sapic */ 782 783 typedef struct acpi_madt_local_sapic 784 { 785 ACPI_SUBTABLE_HEADER Header; 786 UINT8 ProcessorId; /* ACPI processor id */ 787 UINT8 Id; /* SAPIC ID */ 788 UINT8 Eid; /* SAPIC EID */ 789 UINT8 Reserved[3]; /* Reserved, must be zero */ 790 UINT32 LapicFlags; 791 UINT32 Uid; /* Numeric UID - ACPI 3.0 */ 792 char UidString[1]; /* String UID - ACPI 3.0 */ 793 794 } ACPI_MADT_LOCAL_SAPIC; 795 796 797 /* 8: Platform Interrupt Source */ 798 799 typedef struct acpi_madt_interrupt_source 800 { 801 ACPI_SUBTABLE_HEADER Header; 802 UINT16 IntiFlags; 803 UINT8 Type; /* 1=PMI, 2=INIT, 3=corrected */ 804 UINT8 Id; /* Processor ID */ 805 UINT8 Eid; /* Processor EID */ 806 UINT8 IoSapicVector; /* Vector value for PMI interrupts */ 807 UINT32 GlobalIrq; /* Global system interrupt */ 808 UINT32 Flags; /* Interrupt Source Flags */ 809 810 } ACPI_MADT_INTERRUPT_SOURCE; 811 812 /* Masks for Flags field above */ 813 814 #define ACPI_MADT_CPEI_OVERRIDE (1) 815 816 817 /* 9: Processor Local X2APIC (ACPI 4.0) */ 818 819 typedef struct acpi_madt_local_x2apic 820 { 821 ACPI_SUBTABLE_HEADER Header; 822 UINT16 Reserved; /* Reserved - must be zero */ 823 UINT32 LocalApicId; /* Processor x2APIC ID */ 824 UINT32 LapicFlags; 825 UINT32 Uid; /* ACPI processor UID */ 826 827 } ACPI_MADT_LOCAL_X2APIC; 828 829 830 /* 10: Local X2APIC NMI (ACPI 4.0) */ 831 832 typedef struct acpi_madt_local_x2apic_nmi 833 { 834 ACPI_SUBTABLE_HEADER Header; 835 UINT16 IntiFlags; 836 UINT32 Uid; /* ACPI processor UID */ 837 UINT8 Lint; /* LINTn to which NMI is connected */ 838 UINT8 Reserved[3]; /* Reserved - must be zero */ 839 840 } ACPI_MADT_LOCAL_X2APIC_NMI; 841 842 843 /* 11: Generic Interrupt - GICC (ACPI 5.0 + ACPI 6.0 + ACPI 6.3 changes) */ 844 845 typedef struct acpi_madt_generic_interrupt 846 { 847 ACPI_SUBTABLE_HEADER Header; 848 UINT16 Reserved; /* Reserved - must be zero */ 849 UINT32 CpuInterfaceNumber; 850 UINT32 Uid; 851 UINT32 Flags; 852 UINT32 ParkingVersion; 853 UINT32 PerformanceInterrupt; 854 UINT64 ParkedAddress; 855 UINT64 BaseAddress; 856 UINT64 GicvBaseAddress; 857 UINT64 GichBaseAddress; 858 UINT32 VgicInterrupt; 859 UINT64 GicrBaseAddress; 860 UINT64 ArmMpidr; 861 UINT8 EfficiencyClass; 862 UINT8 Reserved2[1]; 863 UINT16 SpeInterrupt; /* ACPI 6.3 */ 864 865 } ACPI_MADT_GENERIC_INTERRUPT; 866 867 /* Masks for Flags field above */ 868 869 /* ACPI_MADT_ENABLED (1) Processor is usable if set */ 870 #define ACPI_MADT_PERFORMANCE_IRQ_MODE (1<<1) /* 01: Performance Interrupt Mode */ 871 #define ACPI_MADT_VGIC_IRQ_MODE (1<<2) /* 02: VGIC Maintenance Interrupt mode */ 872 873 874 /* 12: Generic Distributor (ACPI 5.0 + ACPI 6.0 changes) */ 875 876 typedef struct acpi_madt_generic_distributor 877 { 878 ACPI_SUBTABLE_HEADER Header; 879 UINT16 Reserved; /* Reserved - must be zero */ 880 UINT32 GicId; 881 UINT64 BaseAddress; 882 UINT32 GlobalIrqBase; 883 UINT8 Version; 884 UINT8 Reserved2[3]; /* Reserved - must be zero */ 885 886 } ACPI_MADT_GENERIC_DISTRIBUTOR; 887 888 /* Values for Version field above */ 889 890 enum AcpiMadtGicVersion 891 { 892 ACPI_MADT_GIC_VERSION_NONE = 0, 893 ACPI_MADT_GIC_VERSION_V1 = 1, 894 ACPI_MADT_GIC_VERSION_V2 = 2, 895 ACPI_MADT_GIC_VERSION_V3 = 3, 896 ACPI_MADT_GIC_VERSION_V4 = 4, 897 ACPI_MADT_GIC_VERSION_RESERVED = 5 /* 5 and greater are reserved */ 898 }; 899 900 901 /* 13: Generic MSI Frame (ACPI 5.1) */ 902 903 typedef struct acpi_madt_generic_msi_frame 904 { 905 ACPI_SUBTABLE_HEADER Header; 906 UINT16 Reserved; /* Reserved - must be zero */ 907 UINT32 MsiFrameId; 908 UINT64 BaseAddress; 909 UINT32 Flags; 910 UINT16 SpiCount; 911 UINT16 SpiBase; 912 913 } ACPI_MADT_GENERIC_MSI_FRAME; 914 915 /* Masks for Flags field above */ 916 917 #define ACPI_MADT_OVERRIDE_SPI_VALUES (1) 918 919 920 /* 14: Generic Redistributor (ACPI 5.1) */ 921 922 typedef struct acpi_madt_generic_redistributor 923 { 924 ACPI_SUBTABLE_HEADER Header; 925 UINT16 Reserved; /* reserved - must be zero */ 926 UINT64 BaseAddress; 927 UINT32 Length; 928 929 } ACPI_MADT_GENERIC_REDISTRIBUTOR; 930 931 932 /* 15: Generic Translator (ACPI 6.0) */ 933 934 typedef struct acpi_madt_generic_translator 935 { 936 ACPI_SUBTABLE_HEADER Header; 937 UINT16 Reserved; /* reserved - must be zero */ 938 UINT32 TranslationId; 939 UINT64 BaseAddress; 940 UINT32 Reserved2; 941 942 } ACPI_MADT_GENERIC_TRANSLATOR; 943 944 /* 16: Multiprocessor wakeup (ACPI 6.4) */ 945 946 typedef struct acpi_madt_multiproc_wakeup 947 { 948 ACPI_SUBTABLE_HEADER Header; 949 UINT16 MailboxVersion; 950 UINT32 Reserved; /* reserved - must be zero */ 951 UINT64 BaseAddress; 952 953 } ACPI_MADT_MULTIPROC_WAKEUP; 954 955 #define ACPI_MULTIPROC_WAKEUP_MB_OS_SIZE 2032 956 #define ACPI_MULTIPROC_WAKEUP_MB_FIRMWARE_SIZE 2048 957 958 typedef struct acpi_madt_multiproc_wakeup_mailbox 959 { 960 UINT16 Command; 961 UINT16 Reserved; /* reserved - must be zero */ 962 UINT32 ApicId; 963 UINT64 WakeupVector; 964 UINT8 ReservedOs[ACPI_MULTIPROC_WAKEUP_MB_OS_SIZE]; /* reserved for OS use */ 965 UINT8 ReservedFirmware[ACPI_MULTIPROC_WAKEUP_MB_FIRMWARE_SIZE]; /* reserved for firmware use */ 966 967 } ACPI_MADT_MULTIPROC_WAKEUP_MAILBOX; 968 969 #define ACPI_MP_WAKE_COMMAND_WAKEUP 1 970 971 972 /* 973 * Common flags fields for MADT subtables 974 */ 975 976 /* MADT Local APIC flags */ 977 978 #define ACPI_MADT_ENABLED (1) /* 00: Processor is usable if set */ 979 980 /* MADT MPS INTI flags (IntiFlags) */ 981 982 #define ACPI_MADT_POLARITY_MASK (3) /* 00-01: Polarity of APIC I/O input signals */ 983 #define ACPI_MADT_TRIGGER_MASK (3<<2) /* 02-03: Trigger mode of APIC input signals */ 984 985 /* Values for MPS INTI flags */ 986 987 #define ACPI_MADT_POLARITY_CONFORMS 0 988 #define ACPI_MADT_POLARITY_ACTIVE_HIGH 1 989 #define ACPI_MADT_POLARITY_RESERVED 2 990 #define ACPI_MADT_POLARITY_ACTIVE_LOW 3 991 992 #define ACPI_MADT_TRIGGER_CONFORMS (0) 993 #define ACPI_MADT_TRIGGER_EDGE (1<<2) 994 #define ACPI_MADT_TRIGGER_RESERVED (2<<2) 995 #define ACPI_MADT_TRIGGER_LEVEL (3<<2) 996 997 998 /******************************************************************************* 999 * 1000 * MCFG - PCI Memory Mapped Configuration table and subtable 1001 * Version 1 1002 * 1003 * Conforms to "PCI Firmware Specification", Revision 3.0, June 20, 2005 1004 * 1005 ******************************************************************************/ 1006 1007 typedef struct acpi_table_mcfg 1008 { 1009 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1010 UINT8 Reserved[8]; 1011 1012 } ACPI_TABLE_MCFG; 1013 1014 1015 /* Subtable */ 1016 1017 typedef struct acpi_mcfg_allocation 1018 { 1019 UINT64 Address; /* Base address, processor-relative */ 1020 UINT16 PciSegment; /* PCI segment group number */ 1021 UINT8 StartBusNumber; /* Starting PCI Bus number */ 1022 UINT8 EndBusNumber; /* Final PCI Bus number */ 1023 UINT32 Reserved; 1024 1025 } ACPI_MCFG_ALLOCATION; 1026 1027 1028 /******************************************************************************* 1029 * 1030 * MCHI - Management Controller Host Interface Table 1031 * Version 1 1032 * 1033 * Conforms to "Management Component Transport Protocol (MCTP) Host 1034 * Interface Specification", Revision 1.0.0a, October 13, 2009 1035 * 1036 ******************************************************************************/ 1037 1038 typedef struct acpi_table_mchi 1039 { 1040 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1041 UINT8 InterfaceType; 1042 UINT8 Protocol; 1043 UINT64 ProtocolData; 1044 UINT8 InterruptType; 1045 UINT8 Gpe; 1046 UINT8 PciDeviceFlag; 1047 UINT32 GlobalInterrupt; 1048 ACPI_GENERIC_ADDRESS ControlRegister; 1049 UINT8 PciSegment; 1050 UINT8 PciBus; 1051 UINT8 PciDevice; 1052 UINT8 PciFunction; 1053 1054 } ACPI_TABLE_MCHI; 1055 1056 1057 /******************************************************************************* 1058 * 1059 * MPST - Memory Power State Table (ACPI 5.0) 1060 * Version 1 1061 * 1062 ******************************************************************************/ 1063 1064 #define ACPI_MPST_CHANNEL_INFO \ 1065 UINT8 ChannelId; \ 1066 UINT8 Reserved1[3]; \ 1067 UINT16 PowerNodeCount; \ 1068 UINT16 Reserved2; 1069 1070 /* Main table */ 1071 1072 typedef struct acpi_table_mpst 1073 { 1074 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1075 ACPI_MPST_CHANNEL_INFO /* Platform Communication Channel */ 1076 1077 } ACPI_TABLE_MPST; 1078 1079 1080 /* Memory Platform Communication Channel Info */ 1081 1082 typedef struct acpi_mpst_channel 1083 { 1084 ACPI_MPST_CHANNEL_INFO /* Platform Communication Channel */ 1085 1086 } ACPI_MPST_CHANNEL; 1087 1088 1089 /* Memory Power Node Structure */ 1090 1091 typedef struct acpi_mpst_power_node 1092 { 1093 UINT8 Flags; 1094 UINT8 Reserved1; 1095 UINT16 NodeId; 1096 UINT32 Length; 1097 UINT64 RangeAddress; 1098 UINT64 RangeLength; 1099 UINT32 NumPowerStates; 1100 UINT32 NumPhysicalComponents; 1101 1102 } ACPI_MPST_POWER_NODE; 1103 1104 /* Values for Flags field above */ 1105 1106 #define ACPI_MPST_ENABLED 1 1107 #define ACPI_MPST_POWER_MANAGED 2 1108 #define ACPI_MPST_HOT_PLUG_CAPABLE 4 1109 1110 1111 /* Memory Power State Structure (follows POWER_NODE above) */ 1112 1113 typedef struct acpi_mpst_power_state 1114 { 1115 UINT8 PowerState; 1116 UINT8 InfoIndex; 1117 1118 } ACPI_MPST_POWER_STATE; 1119 1120 1121 /* Physical Component ID Structure (follows POWER_STATE above) */ 1122 1123 typedef struct acpi_mpst_component 1124 { 1125 UINT16 ComponentId; 1126 1127 } ACPI_MPST_COMPONENT; 1128 1129 1130 /* Memory Power State Characteristics Structure (follows all POWER_NODEs) */ 1131 1132 typedef struct acpi_mpst_data_hdr 1133 { 1134 UINT16 CharacteristicsCount; 1135 UINT16 Reserved; 1136 1137 } ACPI_MPST_DATA_HDR; 1138 1139 typedef struct acpi_mpst_power_data 1140 { 1141 UINT8 StructureId; 1142 UINT8 Flags; 1143 UINT16 Reserved1; 1144 UINT32 AveragePower; 1145 UINT32 PowerSaving; 1146 UINT64 ExitLatency; 1147 UINT64 Reserved2; 1148 1149 } ACPI_MPST_POWER_DATA; 1150 1151 /* Values for Flags field above */ 1152 1153 #define ACPI_MPST_PRESERVE 1 1154 #define ACPI_MPST_AUTOENTRY 2 1155 #define ACPI_MPST_AUTOEXIT 4 1156 1157 1158 /* Shared Memory Region (not part of an ACPI table) */ 1159 1160 typedef struct acpi_mpst_shared 1161 { 1162 UINT32 Signature; 1163 UINT16 PccCommand; 1164 UINT16 PccStatus; 1165 UINT32 CommandRegister; 1166 UINT32 StatusRegister; 1167 UINT32 PowerStateId; 1168 UINT32 PowerNodeId; 1169 UINT64 EnergyConsumed; 1170 UINT64 AveragePower; 1171 1172 } ACPI_MPST_SHARED; 1173 1174 1175 /******************************************************************************* 1176 * 1177 * MSCT - Maximum System Characteristics Table (ACPI 4.0) 1178 * Version 1 1179 * 1180 ******************************************************************************/ 1181 1182 typedef struct acpi_table_msct 1183 { 1184 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1185 UINT32 ProximityOffset; /* Location of proximity info struct(s) */ 1186 UINT32 MaxProximityDomains;/* Max number of proximity domains */ 1187 UINT32 MaxClockDomains; /* Max number of clock domains */ 1188 UINT64 MaxAddress; /* Max physical address in system */ 1189 1190 } ACPI_TABLE_MSCT; 1191 1192 1193 /* Subtable - Maximum Proximity Domain Information. Version 1 */ 1194 1195 typedef struct acpi_msct_proximity 1196 { 1197 UINT8 Revision; 1198 UINT8 Length; 1199 UINT32 RangeStart; /* Start of domain range */ 1200 UINT32 RangeEnd; /* End of domain range */ 1201 UINT32 ProcessorCapacity; 1202 UINT64 MemoryCapacity; /* In bytes */ 1203 1204 } ACPI_MSCT_PROXIMITY; 1205 1206 1207 /******************************************************************************* 1208 * 1209 * MSDM - Microsoft Data Management table 1210 * 1211 * Conforms to "Microsoft Software Licensing Tables (SLIC and MSDM)", 1212 * November 29, 2011. Copyright 2011 Microsoft 1213 * 1214 ******************************************************************************/ 1215 1216 /* Basic MSDM table is only the common ACPI header */ 1217 1218 typedef struct acpi_table_msdm 1219 { 1220 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1221 1222 } ACPI_TABLE_MSDM; 1223 1224 1225 /******************************************************************************* 1226 * 1227 * NFIT - NVDIMM Interface Table (ACPI 6.0+) 1228 * Version 1 1229 * 1230 ******************************************************************************/ 1231 1232 typedef struct acpi_table_nfit 1233 { 1234 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1235 UINT32 Reserved; /* Reserved, must be zero */ 1236 1237 } ACPI_TABLE_NFIT; 1238 1239 /* Subtable header for NFIT */ 1240 1241 typedef struct acpi_nfit_header 1242 { 1243 UINT16 Type; 1244 UINT16 Length; 1245 1246 } ACPI_NFIT_HEADER; 1247 1248 1249 /* Values for subtable type in ACPI_NFIT_HEADER */ 1250 1251 enum AcpiNfitType 1252 { 1253 ACPI_NFIT_TYPE_SYSTEM_ADDRESS = 0, 1254 ACPI_NFIT_TYPE_MEMORY_MAP = 1, 1255 ACPI_NFIT_TYPE_INTERLEAVE = 2, 1256 ACPI_NFIT_TYPE_SMBIOS = 3, 1257 ACPI_NFIT_TYPE_CONTROL_REGION = 4, 1258 ACPI_NFIT_TYPE_DATA_REGION = 5, 1259 ACPI_NFIT_TYPE_FLUSH_ADDRESS = 6, 1260 ACPI_NFIT_TYPE_CAPABILITIES = 7, 1261 ACPI_NFIT_TYPE_RESERVED = 8 /* 8 and greater are reserved */ 1262 }; 1263 1264 /* 1265 * NFIT Subtables 1266 */ 1267 1268 /* 0: System Physical Address Range Structure */ 1269 1270 typedef struct acpi_nfit_system_address 1271 { 1272 ACPI_NFIT_HEADER Header; 1273 UINT16 RangeIndex; 1274 UINT16 Flags; 1275 UINT32 Reserved; /* Reserved, must be zero */ 1276 UINT32 ProximityDomain; 1277 UINT8 RangeGuid[16]; 1278 UINT64 Address; 1279 UINT64 Length; 1280 UINT64 MemoryMapping; 1281 UINT64 LocationCookie; /* ACPI 6.4 */ 1282 1283 } ACPI_NFIT_SYSTEM_ADDRESS; 1284 1285 /* Flags */ 1286 1287 #define ACPI_NFIT_ADD_ONLINE_ONLY (1) /* 00: Add/Online Operation Only */ 1288 #define ACPI_NFIT_PROXIMITY_VALID (1<<1) /* 01: Proximity Domain Valid */ 1289 #define ACPI_NFIT_LOCATION_COOKIE_VALID (1<<2) /* 02: SPA location cookie valid (ACPI 6.4) */ 1290 1291 /* Range Type GUIDs appear in the include/acuuid.h file */ 1292 1293 1294 /* 1: Memory Device to System Address Range Map Structure */ 1295 1296 typedef struct acpi_nfit_memory_map 1297 { 1298 ACPI_NFIT_HEADER Header; 1299 UINT32 DeviceHandle; 1300 UINT16 PhysicalId; 1301 UINT16 RegionId; 1302 UINT16 RangeIndex; 1303 UINT16 RegionIndex; 1304 UINT64 RegionSize; 1305 UINT64 RegionOffset; 1306 UINT64 Address; 1307 UINT16 InterleaveIndex; 1308 UINT16 InterleaveWays; 1309 UINT16 Flags; 1310 UINT16 Reserved; /* Reserved, must be zero */ 1311 1312 } ACPI_NFIT_MEMORY_MAP; 1313 1314 /* Flags */ 1315 1316 #define ACPI_NFIT_MEM_SAVE_FAILED (1) /* 00: Last SAVE to Memory Device failed */ 1317 #define ACPI_NFIT_MEM_RESTORE_FAILED (1<<1) /* 01: Last RESTORE from Memory Device failed */ 1318 #define ACPI_NFIT_MEM_FLUSH_FAILED (1<<2) /* 02: Platform flush failed */ 1319 #define ACPI_NFIT_MEM_NOT_ARMED (1<<3) /* 03: Memory Device is not armed */ 1320 #define ACPI_NFIT_MEM_HEALTH_OBSERVED (1<<4) /* 04: Memory Device observed SMART/health events */ 1321 #define ACPI_NFIT_MEM_HEALTH_ENABLED (1<<5) /* 05: SMART/health events enabled */ 1322 #define ACPI_NFIT_MEM_MAP_FAILED (1<<6) /* 06: Mapping to SPA failed */ 1323 1324 1325 /* 2: Interleave Structure */ 1326 1327 typedef struct acpi_nfit_interleave 1328 { 1329 ACPI_NFIT_HEADER Header; 1330 UINT16 InterleaveIndex; 1331 UINT16 Reserved; /* Reserved, must be zero */ 1332 UINT32 LineCount; 1333 UINT32 LineSize; 1334 UINT32 LineOffset[1]; /* Variable length */ 1335 1336 } ACPI_NFIT_INTERLEAVE; 1337 1338 1339 /* 3: SMBIOS Management Information Structure */ 1340 1341 typedef struct acpi_nfit_smbios 1342 { 1343 ACPI_NFIT_HEADER Header; 1344 UINT32 Reserved; /* Reserved, must be zero */ 1345 UINT8 Data[1]; /* Variable length */ 1346 1347 } ACPI_NFIT_SMBIOS; 1348 1349 1350 /* 4: NVDIMM Control Region Structure */ 1351 1352 typedef struct acpi_nfit_control_region 1353 { 1354 ACPI_NFIT_HEADER Header; 1355 UINT16 RegionIndex; 1356 UINT16 VendorId; 1357 UINT16 DeviceId; 1358 UINT16 RevisionId; 1359 UINT16 SubsystemVendorId; 1360 UINT16 SubsystemDeviceId; 1361 UINT16 SubsystemRevisionId; 1362 UINT8 ValidFields; 1363 UINT8 ManufacturingLocation; 1364 UINT16 ManufacturingDate; 1365 UINT8 Reserved[2]; /* Reserved, must be zero */ 1366 UINT32 SerialNumber; 1367 UINT16 Code; 1368 UINT16 Windows; 1369 UINT64 WindowSize; 1370 UINT64 CommandOffset; 1371 UINT64 CommandSize; 1372 UINT64 StatusOffset; 1373 UINT64 StatusSize; 1374 UINT16 Flags; 1375 UINT8 Reserved1[6]; /* Reserved, must be zero */ 1376 1377 } ACPI_NFIT_CONTROL_REGION; 1378 1379 /* Flags */ 1380 1381 #define ACPI_NFIT_CONTROL_BUFFERED (1) /* Block Data Windows implementation is buffered */ 1382 1383 /* ValidFields bits */ 1384 1385 #define ACPI_NFIT_CONTROL_MFG_INFO_VALID (1) /* Manufacturing fields are valid */ 1386 1387 1388 /* 5: NVDIMM Block Data Window Region Structure */ 1389 1390 typedef struct acpi_nfit_data_region 1391 { 1392 ACPI_NFIT_HEADER Header; 1393 UINT16 RegionIndex; 1394 UINT16 Windows; 1395 UINT64 Offset; 1396 UINT64 Size; 1397 UINT64 Capacity; 1398 UINT64 StartAddress; 1399 1400 } ACPI_NFIT_DATA_REGION; 1401 1402 1403 /* 6: Flush Hint Address Structure */ 1404 1405 typedef struct acpi_nfit_flush_address 1406 { 1407 ACPI_NFIT_HEADER Header; 1408 UINT32 DeviceHandle; 1409 UINT16 HintCount; 1410 UINT8 Reserved[6]; /* Reserved, must be zero */ 1411 UINT64 HintAddress[1]; /* Variable length */ 1412 1413 } ACPI_NFIT_FLUSH_ADDRESS; 1414 1415 1416 /* 7: Platform Capabilities Structure */ 1417 1418 typedef struct acpi_nfit_capabilities 1419 { 1420 ACPI_NFIT_HEADER Header; 1421 UINT8 HighestCapability; 1422 UINT8 Reserved[3]; /* Reserved, must be zero */ 1423 UINT32 Capabilities; 1424 UINT32 Reserved2; 1425 1426 } ACPI_NFIT_CAPABILITIES; 1427 1428 /* Capabilities Flags */ 1429 1430 #define ACPI_NFIT_CAPABILITY_CACHE_FLUSH (1) /* 00: Cache Flush to NVDIMM capable */ 1431 #define ACPI_NFIT_CAPABILITY_MEM_FLUSH (1<<1) /* 01: Memory Flush to NVDIMM capable */ 1432 #define ACPI_NFIT_CAPABILITY_MEM_MIRRORING (1<<2) /* 02: Memory Mirroring capable */ 1433 1434 1435 /* 1436 * NFIT/DVDIMM device handle support - used as the _ADR for each NVDIMM 1437 */ 1438 typedef struct nfit_device_handle 1439 { 1440 UINT32 Handle; 1441 1442 } NFIT_DEVICE_HANDLE; 1443 1444 /* Device handle construction and extraction macros */ 1445 1446 #define ACPI_NFIT_DIMM_NUMBER_MASK 0x0000000F 1447 #define ACPI_NFIT_CHANNEL_NUMBER_MASK 0x000000F0 1448 #define ACPI_NFIT_MEMORY_ID_MASK 0x00000F00 1449 #define ACPI_NFIT_SOCKET_ID_MASK 0x0000F000 1450 #define ACPI_NFIT_NODE_ID_MASK 0x0FFF0000 1451 1452 #define ACPI_NFIT_DIMM_NUMBER_OFFSET 0 1453 #define ACPI_NFIT_CHANNEL_NUMBER_OFFSET 4 1454 #define ACPI_NFIT_MEMORY_ID_OFFSET 8 1455 #define ACPI_NFIT_SOCKET_ID_OFFSET 12 1456 #define ACPI_NFIT_NODE_ID_OFFSET 16 1457 1458 /* Macro to construct a NFIT/NVDIMM device handle */ 1459 1460 #define ACPI_NFIT_BUILD_DEVICE_HANDLE(dimm, channel, memory, socket, node) \ 1461 ((dimm) | \ 1462 ((channel) << ACPI_NFIT_CHANNEL_NUMBER_OFFSET) | \ 1463 ((memory) << ACPI_NFIT_MEMORY_ID_OFFSET) | \ 1464 ((socket) << ACPI_NFIT_SOCKET_ID_OFFSET) | \ 1465 ((node) << ACPI_NFIT_NODE_ID_OFFSET)) 1466 1467 /* Macros to extract individual fields from a NFIT/NVDIMM device handle */ 1468 1469 #define ACPI_NFIT_GET_DIMM_NUMBER(handle) \ 1470 ((handle) & ACPI_NFIT_DIMM_NUMBER_MASK) 1471 1472 #define ACPI_NFIT_GET_CHANNEL_NUMBER(handle) \ 1473 (((handle) & ACPI_NFIT_CHANNEL_NUMBER_MASK) >> ACPI_NFIT_CHANNEL_NUMBER_OFFSET) 1474 1475 #define ACPI_NFIT_GET_MEMORY_ID(handle) \ 1476 (((handle) & ACPI_NFIT_MEMORY_ID_MASK) >> ACPI_NFIT_MEMORY_ID_OFFSET) 1477 1478 #define ACPI_NFIT_GET_SOCKET_ID(handle) \ 1479 (((handle) & ACPI_NFIT_SOCKET_ID_MASK) >> ACPI_NFIT_SOCKET_ID_OFFSET) 1480 1481 #define ACPI_NFIT_GET_NODE_ID(handle) \ 1482 (((handle) & ACPI_NFIT_NODE_ID_MASK) >> ACPI_NFIT_NODE_ID_OFFSET) 1483 1484 1485 /******************************************************************************* 1486 * 1487 * PCCT - Platform Communications Channel Table (ACPI 5.0) 1488 * Version 2 (ACPI 6.2) 1489 * 1490 ******************************************************************************/ 1491 1492 typedef struct acpi_table_pcct 1493 { 1494 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1495 UINT32 Flags; 1496 UINT64 Reserved; 1497 1498 } ACPI_TABLE_PCCT; 1499 1500 /* Values for Flags field above */ 1501 1502 #define ACPI_PCCT_DOORBELL 1 1503 1504 /* Values for subtable type in ACPI_SUBTABLE_HEADER */ 1505 1506 enum AcpiPcctType 1507 { 1508 ACPI_PCCT_TYPE_GENERIC_SUBSPACE = 0, 1509 ACPI_PCCT_TYPE_HW_REDUCED_SUBSPACE = 1, 1510 ACPI_PCCT_TYPE_HW_REDUCED_SUBSPACE_TYPE2 = 2, /* ACPI 6.1 */ 1511 ACPI_PCCT_TYPE_EXT_PCC_MASTER_SUBSPACE = 3, /* ACPI 6.2 */ 1512 ACPI_PCCT_TYPE_EXT_PCC_SLAVE_SUBSPACE = 4, /* ACPI 6.2 */ 1513 ACPI_PCCT_TYPE_HW_REG_COMM_SUBSPACE = 5, /* ACPI 6.4 */ 1514 ACPI_PCCT_TYPE_RESERVED = 6 /* 6 and greater are reserved */ 1515 }; 1516 1517 /* 1518 * PCCT Subtables, correspond to Type in ACPI_SUBTABLE_HEADER 1519 */ 1520 1521 /* 0: Generic Communications Subspace */ 1522 1523 typedef struct acpi_pcct_subspace 1524 { 1525 ACPI_SUBTABLE_HEADER Header; 1526 UINT8 Reserved[6]; 1527 UINT64 BaseAddress; 1528 UINT64 Length; 1529 ACPI_GENERIC_ADDRESS DoorbellRegister; 1530 UINT64 PreserveMask; 1531 UINT64 WriteMask; 1532 UINT32 Latency; 1533 UINT32 MaxAccessRate; 1534 UINT16 MinTurnaroundTime; 1535 1536 } ACPI_PCCT_SUBSPACE; 1537 1538 1539 /* 1: HW-reduced Communications Subspace (ACPI 5.1) */ 1540 1541 typedef struct acpi_pcct_hw_reduced 1542 { 1543 ACPI_SUBTABLE_HEADER Header; 1544 UINT32 PlatformInterrupt; 1545 UINT8 Flags; 1546 UINT8 Reserved; 1547 UINT64 BaseAddress; 1548 UINT64 Length; 1549 ACPI_GENERIC_ADDRESS DoorbellRegister; 1550 UINT64 PreserveMask; 1551 UINT64 WriteMask; 1552 UINT32 Latency; 1553 UINT32 MaxAccessRate; 1554 UINT16 MinTurnaroundTime; 1555 1556 } ACPI_PCCT_HW_REDUCED; 1557 1558 1559 /* 2: HW-reduced Communications Subspace Type 2 (ACPI 6.1) */ 1560 1561 typedef struct acpi_pcct_hw_reduced_type2 1562 { 1563 ACPI_SUBTABLE_HEADER Header; 1564 UINT32 PlatformInterrupt; 1565 UINT8 Flags; 1566 UINT8 Reserved; 1567 UINT64 BaseAddress; 1568 UINT64 Length; 1569 ACPI_GENERIC_ADDRESS DoorbellRegister; 1570 UINT64 PreserveMask; 1571 UINT64 WriteMask; 1572 UINT32 Latency; 1573 UINT32 MaxAccessRate; 1574 UINT16 MinTurnaroundTime; 1575 ACPI_GENERIC_ADDRESS PlatformAckRegister; 1576 UINT64 AckPreserveMask; 1577 UINT64 AckWriteMask; 1578 1579 } ACPI_PCCT_HW_REDUCED_TYPE2; 1580 1581 1582 /* 3: Extended PCC Master Subspace Type 3 (ACPI 6.2) */ 1583 1584 typedef struct acpi_pcct_ext_pcc_master 1585 { 1586 ACPI_SUBTABLE_HEADER Header; 1587 UINT32 PlatformInterrupt; 1588 UINT8 Flags; 1589 UINT8 Reserved1; 1590 UINT64 BaseAddress; 1591 UINT32 Length; 1592 ACPI_GENERIC_ADDRESS DoorbellRegister; 1593 UINT64 PreserveMask; 1594 UINT64 WriteMask; 1595 UINT32 Latency; 1596 UINT32 MaxAccessRate; 1597 UINT32 MinTurnaroundTime; 1598 ACPI_GENERIC_ADDRESS PlatformAckRegister; 1599 UINT64 AckPreserveMask; 1600 UINT64 AckSetMask; 1601 UINT64 Reserved2; 1602 ACPI_GENERIC_ADDRESS CmdCompleteRegister; 1603 UINT64 CmdCompleteMask; 1604 ACPI_GENERIC_ADDRESS CmdUpdateRegister; 1605 UINT64 CmdUpdatePreserveMask; 1606 UINT64 CmdUpdateSetMask; 1607 ACPI_GENERIC_ADDRESS ErrorStatusRegister; 1608 UINT64 ErrorStatusMask; 1609 1610 } ACPI_PCCT_EXT_PCC_MASTER; 1611 1612 1613 /* 4: Extended PCC Slave Subspace Type 4 (ACPI 6.2) */ 1614 1615 typedef struct acpi_pcct_ext_pcc_slave 1616 { 1617 ACPI_SUBTABLE_HEADER Header; 1618 UINT32 PlatformInterrupt; 1619 UINT8 Flags; 1620 UINT8 Reserved1; 1621 UINT64 BaseAddress; 1622 UINT32 Length; 1623 ACPI_GENERIC_ADDRESS DoorbellRegister; 1624 UINT64 PreserveMask; 1625 UINT64 WriteMask; 1626 UINT32 Latency; 1627 UINT32 MaxAccessRate; 1628 UINT32 MinTurnaroundTime; 1629 ACPI_GENERIC_ADDRESS PlatformAckRegister; 1630 UINT64 AckPreserveMask; 1631 UINT64 AckSetMask; 1632 UINT64 Reserved2; 1633 ACPI_GENERIC_ADDRESS CmdCompleteRegister; 1634 UINT64 CmdCompleteMask; 1635 ACPI_GENERIC_ADDRESS CmdUpdateRegister; 1636 UINT64 CmdUpdatePreserveMask; 1637 UINT64 CmdUpdateSetMask; 1638 ACPI_GENERIC_ADDRESS ErrorStatusRegister; 1639 UINT64 ErrorStatusMask; 1640 1641 } ACPI_PCCT_EXT_PCC_SLAVE; 1642 1643 /* 5: HW Registers based Communications Subspace */ 1644 1645 typedef struct acpi_pcct_hw_reg 1646 { 1647 ACPI_SUBTABLE_HEADER Header; 1648 UINT16 Version; 1649 UINT64 BaseAddress; 1650 UINT64 Length; 1651 ACPI_GENERIC_ADDRESS DoorbellRegister; 1652 UINT64 DoorbellPreserve; 1653 UINT64 DoorbellWrite; 1654 ACPI_GENERIC_ADDRESS CmdCompleteRegister; 1655 UINT64 CmdCompleteMask; 1656 ACPI_GENERIC_ADDRESS ErrorStatusRegister; 1657 UINT64 ErrorStatusMask; 1658 UINT32 NominalLatency; 1659 UINT32 MinTurnaroundTime; 1660 1661 } ACPI_PCCT_HW_REG; 1662 1663 1664 /* Values for doorbell flags above */ 1665 1666 #define ACPI_PCCT_INTERRUPT_POLARITY (1) 1667 #define ACPI_PCCT_INTERRUPT_MODE (1<<1) 1668 1669 1670 /* 1671 * PCC memory structures (not part of the ACPI table) 1672 */ 1673 1674 /* Shared Memory Region */ 1675 1676 typedef struct acpi_pcct_shared_memory 1677 { 1678 UINT32 Signature; 1679 UINT16 Command; 1680 UINT16 Status; 1681 1682 } ACPI_PCCT_SHARED_MEMORY; 1683 1684 1685 /* Extended PCC Subspace Shared Memory Region (ACPI 6.2) */ 1686 1687 typedef struct acpi_pcct_ext_pcc_shared_memory 1688 { 1689 UINT32 Signature; 1690 UINT32 Flags; 1691 UINT32 Length; 1692 UINT32 Command; 1693 1694 } ACPI_PCCT_EXT_PCC_SHARED_MEMORY; 1695 1696 1697 /******************************************************************************* 1698 * 1699 * PDTT - Platform Debug Trigger Table (ACPI 6.2) 1700 * Version 0 1701 * 1702 ******************************************************************************/ 1703 1704 typedef struct acpi_table_pdtt 1705 { 1706 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1707 UINT8 TriggerCount; 1708 UINT8 Reserved[3]; 1709 UINT32 ArrayOffset; 1710 1711 } ACPI_TABLE_PDTT; 1712 1713 1714 /* 1715 * PDTT Communication Channel Identifier Structure. 1716 * The number of these structures is defined by TriggerCount above, 1717 * starting at ArrayOffset. 1718 */ 1719 typedef struct acpi_pdtt_channel 1720 { 1721 UINT8 SubchannelId; 1722 UINT8 Flags; 1723 1724 } ACPI_PDTT_CHANNEL; 1725 1726 /* Flags for above */ 1727 1728 #define ACPI_PDTT_RUNTIME_TRIGGER (1) 1729 #define ACPI_PDTT_WAIT_COMPLETION (1<<1) 1730 #define ACPI_PDTT_TRIGGER_ORDER (1<<2) 1731 1732 1733 /******************************************************************************* 1734 * 1735 * PHAT - Platform Health Assessment Table (ACPI 6.4) 1736 * Version 1 1737 * 1738 ******************************************************************************/ 1739 1740 typedef struct acpi_table_phat 1741 { 1742 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1743 1744 } ACPI_TABLE_PHAT; 1745 1746 /* Common header for PHAT subtables that follow main table */ 1747 1748 typedef struct acpi_phat_header 1749 { 1750 UINT16 Type; 1751 UINT16 Length; 1752 UINT8 Revision; 1753 1754 } ACPI_PHAT_HEADER; 1755 1756 1757 /* Values for Type field above */ 1758 1759 #define ACPI_PHAT_TYPE_FW_VERSION_DATA 0 1760 #define ACPI_PHAT_TYPE_FW_HEALTH_DATA 1 1761 #define ACPI_PHAT_TYPE_RESERVED 2 /* 0x02-0xFFFF are reserved */ 1762 1763 /* 1764 * PHAT subtables, correspond to Type in ACPI_PHAT_HEADER 1765 */ 1766 1767 /* 0: Firmware Version Data Record */ 1768 1769 typedef struct acpi_phat_version_data 1770 { 1771 ACPI_PHAT_HEADER Header; 1772 UINT8 Reserved[3]; 1773 UINT32 ElementCount; 1774 1775 } ACPI_PHAT_VERSION_DATA; 1776 1777 typedef struct acpi_phat_version_element 1778 { 1779 UINT8 Guid[16]; 1780 UINT64 VersionValue; 1781 UINT32 ProducerId; 1782 1783 } ACPI_PHAT_VERSION_ELEMENT; 1784 1785 1786 /* 1: Firmware Health Data Record */ 1787 1788 typedef struct acpi_phat_health_data 1789 { 1790 ACPI_PHAT_HEADER Header; 1791 UINT8 Reserved[2]; 1792 UINT8 Health; 1793 UINT8 DeviceGuid[16]; 1794 UINT32 DeviceSpecificOffset; /* Zero if no Device-specific data */ 1795 1796 } ACPI_PHAT_HEALTH_DATA; 1797 1798 /* Values for Health field above */ 1799 1800 #define ACPI_PHAT_ERRORS_FOUND 0 1801 #define ACPI_PHAT_NO_ERRORS 1 1802 #define ACPI_PHAT_UNKNOWN_ERRORS 2 1803 #define ACPI_PHAT_ADVISORY 3 1804 1805 1806 /******************************************************************************* 1807 * 1808 * PMTT - Platform Memory Topology Table (ACPI 5.0) 1809 * Version 1 1810 * 1811 ******************************************************************************/ 1812 1813 typedef struct acpi_table_pmtt 1814 { 1815 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1816 UINT32 MemoryDeviceCount; 1817 /* 1818 * Immediately followed by: 1819 * MEMORY_DEVICE MemoryDeviceStruct[MemoryDeviceCount]; 1820 */ 1821 1822 } ACPI_TABLE_PMTT; 1823 1824 1825 /* Common header for PMTT subtables that follow main table */ 1826 1827 typedef struct acpi_pmtt_header 1828 { 1829 UINT8 Type; 1830 UINT8 Reserved1; 1831 UINT16 Length; 1832 UINT16 Flags; 1833 UINT16 Reserved2; 1834 UINT32 MemoryDeviceCount; /* Zero means no memory device structs follow */ 1835 /* 1836 * Immediately followed by: 1837 * UINT8 TypeSpecificData[] 1838 * MEMORY_DEVICE MemoryDeviceStruct[MemoryDeviceCount]; 1839 */ 1840 1841 } ACPI_PMTT_HEADER; 1842 1843 /* Values for Type field above */ 1844 1845 #define ACPI_PMTT_TYPE_SOCKET 0 1846 #define ACPI_PMTT_TYPE_CONTROLLER 1 1847 #define ACPI_PMTT_TYPE_DIMM 2 1848 #define ACPI_PMTT_TYPE_RESERVED 3 /* 0x03-0xFE are reserved */ 1849 #define ACPI_PMTT_TYPE_VENDOR 0xFF 1850 1851 /* Values for Flags field above */ 1852 1853 #define ACPI_PMTT_TOP_LEVEL 0x0001 1854 #define ACPI_PMTT_PHYSICAL 0x0002 1855 #define ACPI_PMTT_MEMORY_TYPE 0x000C 1856 1857 1858 /* 1859 * PMTT subtables, correspond to Type in acpi_pmtt_header 1860 */ 1861 1862 1863 /* 0: Socket Structure */ 1864 1865 typedef struct acpi_pmtt_socket 1866 { 1867 ACPI_PMTT_HEADER Header; 1868 UINT16 SocketId; 1869 UINT16 Reserved; 1870 1871 } ACPI_PMTT_SOCKET; 1872 /* 1873 * Immediately followed by: 1874 * MEMORY_DEVICE MemoryDeviceStruct[MemoryDeviceCount]; 1875 */ 1876 1877 1878 /* 1: Memory Controller subtable */ 1879 1880 typedef struct acpi_pmtt_controller 1881 { 1882 ACPI_PMTT_HEADER Header; 1883 UINT16 ControllerId; 1884 UINT16 Reserved; 1885 1886 } ACPI_PMTT_CONTROLLER; 1887 /* 1888 * Immediately followed by: 1889 * MEMORY_DEVICE MemoryDeviceStruct[MemoryDeviceCount]; 1890 */ 1891 1892 1893 /* 2: Physical Component Identifier (DIMM) */ 1894 1895 typedef struct acpi_pmtt_physical_component 1896 { 1897 ACPI_PMTT_HEADER Header; 1898 UINT32 BiosHandle; 1899 1900 } ACPI_PMTT_PHYSICAL_COMPONENT; 1901 1902 1903 /* 0xFF: Vendor Specific Data */ 1904 1905 typedef struct acpi_pmtt_vendor_specific 1906 { 1907 ACPI_PMTT_HEADER Header; 1908 UINT8 TypeUuid[16]; 1909 UINT8 Specific[]; 1910 /* 1911 * Immediately followed by: 1912 * UINT8 VendorSpecificData[]; 1913 * MEMORY_DEVICE MemoryDeviceStruct[MemoryDeviceCount]; 1914 */ 1915 1916 } ACPI_PMTT_VENDOR_SPECIFIC; 1917 1918 1919 /******************************************************************************* 1920 * 1921 * PPTT - Processor Properties Topology Table (ACPI 6.2) 1922 * Version 1 1923 * 1924 ******************************************************************************/ 1925 1926 typedef struct acpi_table_pptt 1927 { 1928 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1929 1930 } ACPI_TABLE_PPTT; 1931 1932 /* Values for Type field above */ 1933 1934 enum AcpiPpttType 1935 { 1936 ACPI_PPTT_TYPE_PROCESSOR = 0, 1937 ACPI_PPTT_TYPE_CACHE = 1, 1938 ACPI_PPTT_TYPE_ID = 2, 1939 ACPI_PPTT_TYPE_RESERVED = 3 1940 }; 1941 1942 1943 /* 0: Processor Hierarchy Node Structure */ 1944 1945 typedef struct acpi_pptt_processor 1946 { 1947 ACPI_SUBTABLE_HEADER Header; 1948 UINT16 Reserved; 1949 UINT32 Flags; 1950 UINT32 Parent; 1951 UINT32 AcpiProcessorId; 1952 UINT32 NumberOfPrivResources; 1953 1954 } ACPI_PPTT_PROCESSOR; 1955 1956 /* Flags */ 1957 1958 #define ACPI_PPTT_PHYSICAL_PACKAGE (1) 1959 #define ACPI_PPTT_ACPI_PROCESSOR_ID_VALID (1<<1) 1960 #define ACPI_PPTT_ACPI_PROCESSOR_IS_THREAD (1<<2) /* ACPI 6.3 */ 1961 #define ACPI_PPTT_ACPI_LEAF_NODE (1<<3) /* ACPI 6.3 */ 1962 #define ACPI_PPTT_ACPI_IDENTICAL (1<<4) /* ACPI 6.3 */ 1963 1964 1965 /* 1: Cache Type Structure */ 1966 1967 typedef struct acpi_pptt_cache 1968 { 1969 ACPI_SUBTABLE_HEADER Header; 1970 UINT16 Reserved; 1971 UINT32 Flags; 1972 UINT32 NextLevelOfCache; 1973 UINT32 Size; 1974 UINT32 NumberOfSets; 1975 UINT8 Associativity; 1976 UINT8 Attributes; 1977 UINT16 LineSize; 1978 1979 } ACPI_PPTT_CACHE; 1980 1981 /* 1: Cache Type Structure for PPTT version 3 */ 1982 1983 typedef struct acpi_pptt_cache_v1 1984 { 1985 UINT32 CacheId; 1986 1987 } ACPI_PPTT_CACHE_V1; 1988 1989 1990 /* Flags */ 1991 1992 #define ACPI_PPTT_SIZE_PROPERTY_VALID (1) /* Physical property valid */ 1993 #define ACPI_PPTT_NUMBER_OF_SETS_VALID (1<<1) /* Number of sets valid */ 1994 #define ACPI_PPTT_ASSOCIATIVITY_VALID (1<<2) /* Associativity valid */ 1995 #define ACPI_PPTT_ALLOCATION_TYPE_VALID (1<<3) /* Allocation type valid */ 1996 #define ACPI_PPTT_CACHE_TYPE_VALID (1<<4) /* Cache type valid */ 1997 #define ACPI_PPTT_WRITE_POLICY_VALID (1<<5) /* Write policy valid */ 1998 #define ACPI_PPTT_LINE_SIZE_VALID (1<<6) /* Line size valid */ 1999 #define ACPI_PPTT_CACHE_ID_VALID (1<<7) /* Cache ID valid */ 2000 2001 /* Masks for Attributes */ 2002 2003 #define ACPI_PPTT_MASK_ALLOCATION_TYPE (0x03) /* Allocation type */ 2004 #define ACPI_PPTT_MASK_CACHE_TYPE (0x0C) /* Cache type */ 2005 #define ACPI_PPTT_MASK_WRITE_POLICY (0x10) /* Write policy */ 2006 2007 /* Attributes describing cache */ 2008 #define ACPI_PPTT_CACHE_READ_ALLOCATE (0x0) /* Cache line is allocated on read */ 2009 #define ACPI_PPTT_CACHE_WRITE_ALLOCATE (0x01) /* Cache line is allocated on write */ 2010 #define ACPI_PPTT_CACHE_RW_ALLOCATE (0x02) /* Cache line is allocated on read and write */ 2011 #define ACPI_PPTT_CACHE_RW_ALLOCATE_ALT (0x03) /* Alternate representation of above */ 2012 2013 #define ACPI_PPTT_CACHE_TYPE_DATA (0x0) /* Data cache */ 2014 #define ACPI_PPTT_CACHE_TYPE_INSTR (1<<2) /* Instruction cache */ 2015 #define ACPI_PPTT_CACHE_TYPE_UNIFIED (2<<2) /* Unified I & D cache */ 2016 #define ACPI_PPTT_CACHE_TYPE_UNIFIED_ALT (3<<2) /* Alternate representation of above */ 2017 2018 #define ACPI_PPTT_CACHE_POLICY_WB (0x0) /* Cache is write back */ 2019 #define ACPI_PPTT_CACHE_POLICY_WT (1<<4) /* Cache is write through */ 2020 2021 /* 2: ID Structure */ 2022 2023 typedef struct acpi_pptt_id 2024 { 2025 ACPI_SUBTABLE_HEADER Header; 2026 UINT16 Reserved; 2027 UINT32 VendorId; 2028 UINT64 Level1Id; 2029 UINT64 Level2Id; 2030 UINT16 MajorRev; 2031 UINT16 MinorRev; 2032 UINT16 SpinRev; 2033 2034 } ACPI_PPTT_ID; 2035 2036 2037 /******************************************************************************* 2038 * 2039 * PRMT - Platform Runtime Mechanism Table 2040 * Version 1 2041 * 2042 ******************************************************************************/ 2043 2044 typedef struct acpi_table_prmt 2045 { 2046 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 2047 2048 } ACPI_TABLE_PRMT; 2049 2050 typedef struct acpi_table_prmt_header 2051 { 2052 UINT8 PlatformGuid[16]; 2053 UINT32 ModuleInfoOffset; 2054 UINT32 ModuleInfoCount; 2055 2056 } ACPI_TABLE_PRMT_HEADER; 2057 2058 typedef struct acpi_prmt_module_info 2059 { 2060 UINT16 Revision; 2061 UINT16 Length; 2062 UINT8 ModuleGuid[16]; 2063 UINT16 MajorRev; 2064 UINT16 MinorRev; 2065 UINT16 HandlerInfoCount; 2066 UINT32 HandlerInfoOffset; 2067 UINT64 MmioListPointer; 2068 2069 } ACPI_PRMT_MODULE_INFO; 2070 2071 typedef struct acpi_prmt_handler_info 2072 { 2073 UINT16 Revision; 2074 UINT16 Length; 2075 UINT8 HandlerGuid[16]; 2076 UINT64 HandlerAddress; 2077 UINT64 StaticDataBufferAddress; 2078 UINT64 AcpiParamBufferAddress; 2079 2080 } ACPI_PRMT_HANDLER_INFO; 2081 2082 2083 /******************************************************************************* 2084 * 2085 * RASF - RAS Feature Table (ACPI 5.0) 2086 * Version 1 2087 * 2088 ******************************************************************************/ 2089 2090 typedef struct acpi_table_rasf 2091 { 2092 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 2093 UINT8 ChannelId[12]; 2094 2095 } ACPI_TABLE_RASF; 2096 2097 /* RASF Platform Communication Channel Shared Memory Region */ 2098 2099 typedef struct acpi_rasf_shared_memory 2100 { 2101 UINT32 Signature; 2102 UINT16 Command; 2103 UINT16 Status; 2104 UINT16 Version; 2105 UINT8 Capabilities[16]; 2106 UINT8 SetCapabilities[16]; 2107 UINT16 NumParameterBlocks; 2108 UINT32 SetCapabilitiesStatus; 2109 2110 } ACPI_RASF_SHARED_MEMORY; 2111 2112 /* RASF Parameter Block Structure Header */ 2113 2114 typedef struct acpi_rasf_parameter_block 2115 { 2116 UINT16 Type; 2117 UINT16 Version; 2118 UINT16 Length; 2119 2120 } ACPI_RASF_PARAMETER_BLOCK; 2121 2122 /* RASF Parameter Block Structure for PATROL_SCRUB */ 2123 2124 typedef struct acpi_rasf_patrol_scrub_parameter 2125 { 2126 ACPI_RASF_PARAMETER_BLOCK Header; 2127 UINT16 PatrolScrubCommand; 2128 UINT64 RequestedAddressRange[2]; 2129 UINT64 ActualAddressRange[2]; 2130 UINT16 Flags; 2131 UINT8 RequestedSpeed; 2132 2133 } ACPI_RASF_PATROL_SCRUB_PARAMETER; 2134 2135 /* Masks for Flags and Speed fields above */ 2136 2137 #define ACPI_RASF_SCRUBBER_RUNNING 1 2138 #define ACPI_RASF_SPEED (7<<1) 2139 #define ACPI_RASF_SPEED_SLOW (0<<1) 2140 #define ACPI_RASF_SPEED_MEDIUM (4<<1) 2141 #define ACPI_RASF_SPEED_FAST (7<<1) 2142 2143 /* Channel Commands */ 2144 2145 enum AcpiRasfCommands 2146 { 2147 ACPI_RASF_EXECUTE_RASF_COMMAND = 1 2148 }; 2149 2150 /* Platform RAS Capabilities */ 2151 2152 enum AcpiRasfCapabiliities 2153 { 2154 ACPI_HW_PATROL_SCRUB_SUPPORTED = 0, 2155 ACPI_SW_PATROL_SCRUB_EXPOSED = 1 2156 }; 2157 2158 /* Patrol Scrub Commands */ 2159 2160 enum AcpiRasfPatrolScrubCommands 2161 { 2162 ACPI_RASF_GET_PATROL_PARAMETERS = 1, 2163 ACPI_RASF_START_PATROL_SCRUBBER = 2, 2164 ACPI_RASF_STOP_PATROL_SCRUBBER = 3 2165 }; 2166 2167 /* Channel Command flags */ 2168 2169 #define ACPI_RASF_GENERATE_SCI (1<<15) 2170 2171 /* Status values */ 2172 2173 enum AcpiRasfStatus 2174 { 2175 ACPI_RASF_SUCCESS = 0, 2176 ACPI_RASF_NOT_VALID = 1, 2177 ACPI_RASF_NOT_SUPPORTED = 2, 2178 ACPI_RASF_BUSY = 3, 2179 ACPI_RASF_FAILED = 4, 2180 ACPI_RASF_ABORTED = 5, 2181 ACPI_RASF_INVALID_DATA = 6 2182 }; 2183 2184 /* Status flags */ 2185 2186 #define ACPI_RASF_COMMAND_COMPLETE (1) 2187 #define ACPI_RASF_SCI_DOORBELL (1<<1) 2188 #define ACPI_RASF_ERROR (1<<2) 2189 #define ACPI_RASF_STATUS (0x1F<<3) 2190 2191 2192 /******************************************************************************* 2193 * 2194 * RGRT - Regulatory Graphics Resource Table 2195 * Version 1 2196 * 2197 * Conforms to "ACPI RGRT" available at: 2198 * https://microsoft.github.io/mu/dyn/mu_plus/MsCorePkg/AcpiRGRT/feature_acpi_rgrt/ 2199 * 2200 ******************************************************************************/ 2201 2202 typedef struct acpi_table_rgrt 2203 { 2204 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 2205 UINT16 Version; 2206 UINT8 ImageType; 2207 UINT8 Reserved; 2208 UINT8 Image[0]; 2209 2210 } ACPI_TABLE_RGRT; 2211 2212 /* ImageType values */ 2213 2214 enum AcpiRgrtImageType 2215 { 2216 ACPI_RGRT_TYPE_RESERVED0 = 0, 2217 ACPI_RGRT_IMAGE_TYPE_PNG = 1, 2218 ACPI_RGRT_TYPE_RESERVED = 2 /* 2 and greater are reserved */ 2219 }; 2220 2221 2222 /******************************************************************************* 2223 * 2224 * SBST - Smart Battery Specification Table 2225 * Version 1 2226 * 2227 ******************************************************************************/ 2228 2229 typedef struct acpi_table_sbst 2230 { 2231 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 2232 UINT32 WarningLevel; 2233 UINT32 LowLevel; 2234 UINT32 CriticalLevel; 2235 2236 } ACPI_TABLE_SBST; 2237 2238 2239 /******************************************************************************* 2240 * 2241 * SDEI - Software Delegated Exception Interface Descriptor Table 2242 * 2243 * Conforms to "Software Delegated Exception Interface (SDEI)" ARM DEN0054A, 2244 * May 8th, 2017. Copyright 2017 ARM Ltd. 2245 * 2246 ******************************************************************************/ 2247 2248 typedef struct acpi_table_sdei 2249 { 2250 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 2251 2252 } ACPI_TABLE_SDEI; 2253 2254 2255 /******************************************************************************* 2256 * 2257 * SDEV - Secure Devices Table (ACPI 6.2) 2258 * Version 1 2259 * 2260 ******************************************************************************/ 2261 2262 typedef struct acpi_table_sdev 2263 { 2264 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 2265 2266 } ACPI_TABLE_SDEV; 2267 2268 2269 typedef struct acpi_sdev_header 2270 { 2271 UINT8 Type; 2272 UINT8 Flags; 2273 UINT16 Length; 2274 2275 } ACPI_SDEV_HEADER; 2276 2277 2278 /* Values for subtable type above */ 2279 2280 enum AcpiSdevType 2281 { 2282 ACPI_SDEV_TYPE_NAMESPACE_DEVICE = 0, 2283 ACPI_SDEV_TYPE_PCIE_ENDPOINT_DEVICE = 1, 2284 ACPI_SDEV_TYPE_RESERVED = 2 /* 2 and greater are reserved */ 2285 }; 2286 2287 /* Values for flags above */ 2288 2289 #define ACPI_SDEV_HANDOFF_TO_UNSECURE_OS (1) 2290 #define ACPI_SDEV_SECURE_COMPONENTS_PRESENT (1<<1) 2291 2292 /* 2293 * SDEV subtables 2294 */ 2295 2296 /* 0: Namespace Device Based Secure Device Structure */ 2297 2298 typedef struct acpi_sdev_namespace 2299 { 2300 ACPI_SDEV_HEADER Header; 2301 UINT16 DeviceIdOffset; 2302 UINT16 DeviceIdLength; 2303 UINT16 VendorDataOffset; 2304 UINT16 VendorDataLength; 2305 2306 } ACPI_SDEV_NAMESPACE; 2307 2308 typedef struct acpi_sdev_secure_component 2309 { 2310 UINT16 SecureComponentOffset; 2311 UINT16 SecureComponentLength; 2312 2313 } ACPI_SDEV_SECURE_COMPONENT; 2314 2315 2316 /* 2317 * SDEV sub-subtables ("Components") for above 2318 */ 2319 typedef struct acpi_sdev_component 2320 { 2321 ACPI_SDEV_HEADER Header; 2322 2323 } ACPI_SDEV_COMPONENT; 2324 2325 2326 /* Values for sub-subtable type above */ 2327 2328 enum AcpiSacType 2329 { 2330 ACPI_SDEV_TYPE_ID_COMPONENT = 0, 2331 ACPI_SDEV_TYPE_MEM_COMPONENT = 1 2332 }; 2333 2334 typedef struct acpi_sdev_id_component 2335 { 2336 ACPI_SDEV_HEADER Header; 2337 UINT16 HardwareIdOffset; 2338 UINT16 HardwareIdLength; 2339 UINT16 SubsystemIdOffset; 2340 UINT16 SubsystemIdLength; 2341 UINT16 HardwareRevision; 2342 UINT8 HardwareRevPresent; 2343 UINT8 ClassCodePresent; 2344 UINT8 PciBaseClass; 2345 UINT8 PciSubClass; 2346 UINT8 PciProgrammingXface; 2347 2348 } ACPI_SDEV_ID_COMPONENT; 2349 2350 typedef struct acpi_sdev_mem_component 2351 { 2352 ACPI_SDEV_HEADER Header; 2353 UINT32 Reserved; 2354 UINT64 MemoryBaseAddress; 2355 UINT64 MemoryLength; 2356 2357 } ACPI_SDEV_MEM_COMPONENT; 2358 2359 2360 /* 1: PCIe Endpoint Device Based Device Structure */ 2361 2362 typedef struct acpi_sdev_pcie 2363 { 2364 ACPI_SDEV_HEADER Header; 2365 UINT16 Segment; 2366 UINT16 StartBus; 2367 UINT16 PathOffset; 2368 UINT16 PathLength; 2369 UINT16 VendorDataOffset; 2370 UINT16 VendorDataLength; 2371 2372 } ACPI_SDEV_PCIE; 2373 2374 /* 1a: PCIe Endpoint path entry */ 2375 2376 typedef struct acpi_sdev_pcie_path 2377 { 2378 UINT8 Device; 2379 UINT8 Function; 2380 2381 } ACPI_SDEV_PCIE_PATH; 2382 2383 2384 /******************************************************************************* 2385 * 2386 * SVKL - Storage Volume Key Location Table (ACPI 6.4) 2387 * From: "Guest-Host-Communication Interface (GHCI) for Intel 2388 * Trust Domain Extensions (Intel TDX)". 2389 * Version 1 2390 * 2391 ******************************************************************************/ 2392 2393 typedef struct acpi_table_svkl 2394 { 2395 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 2396 UINT32 Count; 2397 2398 } ACPI_TABLE_SVKL; 2399 2400 typedef struct acpi_svkl_key 2401 { 2402 UINT16 Type; 2403 UINT16 Format; 2404 UINT32 Size; 2405 UINT64 Address; 2406 2407 } ACPI_SVKL_KEY; 2408 2409 enum acpi_svkl_type 2410 { 2411 ACPI_SVKL_TYPE_MAIN_STORAGE = 0, 2412 ACPI_SVKL_TYPE_RESERVED = 1 /* 1 and greater are reserved */ 2413 }; 2414 2415 enum acpi_svkl_format 2416 { 2417 ACPI_SVKL_FORMAT_RAW_BINARY = 0, 2418 ACPI_SVKL_FORMAT_RESERVED = 1 /* 1 and greater are reserved */ 2419 }; 2420 2421 2422 /* Reset to default packing */ 2423 2424 #pragma pack() 2425 2426 #endif /* __ACTBL2_H__ */ 2427
Indexes created Tue Sep 30 17:09:57 GMT 2025