actbl2.h revision 1.1.1.23
1 /****************************************************************************** 2 * 3 * Name: actbl2.h - ACPI Table Definitions (tables not in ACPI spec) 4 * 5 *****************************************************************************/ 6 7 /* 8 * Copyright (C) 2000 - 2022, Intel Corp. 9 * All rights reserved. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions, and the following disclaimer, 16 * without modification. 17 * 2. Redistributions in binary form must reproduce at minimum a disclaimer 18 * substantially similar to the "NO WARRANTY" disclaimer below 19 * ("Disclaimer") and any redistribution must be conditioned upon 20 * including a substantially similar Disclaimer requirement for further 21 * binary redistribution. 22 * 3. Neither the names of the above-listed copyright holders nor the names 23 * of any contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * Alternatively, this software may be distributed under the terms of the 27 * GNU General Public License ("GPL") version 2 as published by the Free 28 * Software Foundation. 29 * 30 * NO WARRANTY 31 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 32 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 33 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 34 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 35 * HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 36 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 37 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 38 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 39 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING 40 * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 41 * POSSIBILITY OF SUCH DAMAGES. 42 */ 43 44 #ifndef __ACTBL2_H__ 45 #define __ACTBL2_H__ 46 47 48 /******************************************************************************* 49 * 50 * Additional ACPI Tables (2) 51 * 52 * These tables are not consumed directly by the ACPICA subsystem, but are 53 * included here to support device drivers and the AML disassembler. 54 * 55 ******************************************************************************/ 56 57 58 /* 59 * Values for description table header signatures for tables defined in this 60 * file. Useful because they make it more difficult to inadvertently type in 61 * the wrong signature. 62 */ 63 #define ACPI_SIG_AGDI "AGDI" /* Arm Generic Diagnostic Dump and Reset Device Interface */ 64 #define ACPI_SIG_APMT "APMT" /* Arm Performance Monitoring Unit table */ 65 #define ACPI_SIG_BDAT "BDAT" /* BIOS Data ACPI Table */ 66 #define ACPI_SIG_CCEL "CCEL" /* CC Event Log Table */ 67 #define ACPI_SIG_CDAT "CDAT" /* Coherent Device Attribute Table */ 68 #define ACPI_SIG_IORT "IORT" /* IO Remapping Table */ 69 #define ACPI_SIG_IVRS "IVRS" /* I/O Virtualization Reporting Structure */ 70 #define ACPI_SIG_LPIT "LPIT" /* Low Power Idle Table */ 71 #define ACPI_SIG_MADT "APIC" /* Multiple APIC Description Table */ 72 #define ACPI_SIG_MCFG "MCFG" /* PCI Memory Mapped Configuration table */ 73 #define ACPI_SIG_MCHI "MCHI" /* Management Controller Host Interface table */ 74 #define ACPI_SIG_MPST "MPST" /* Memory Power State Table */ 75 #define ACPI_SIG_MSDM "MSDM" /* Microsoft Data Management Table */ 76 #define ACPI_SIG_NFIT "NFIT" /* NVDIMM Firmware Interface Table */ 77 #define ACPI_SIG_NHLT "NHLT" /* Non HD Audio Link Table */ 78 #define ACPI_SIG_PCCT "PCCT" /* Platform Communications Channel Table */ 79 #define ACPI_SIG_PDTT "PDTT" /* Platform Debug Trigger Table */ 80 #define ACPI_SIG_PHAT "PHAT" /* Platform Health Assessment Table */ 81 #define ACPI_SIG_PMTT "PMTT" /* Platform Memory Topology Table */ 82 #define ACPI_SIG_PPTT "PPTT" /* Processor Properties Topology Table */ 83 #define ACPI_SIG_PRMT "PRMT" /* Platform Runtime Mechanism Table */ 84 #define ACPI_SIG_RASF "RASF" /* RAS Feature table */ 85 #define ACPI_SIG_RGRT "RGRT" /* Regulatory Graphics Resource Table */ 86 #define ACPI_SIG_SBST "SBST" /* Smart Battery Specification Table */ 87 #define ACPI_SIG_SDEI "SDEI" /* Software Delegated Exception Interface Table */ 88 #define ACPI_SIG_SDEV "SDEV" /* Secure Devices table */ 89 #define ACPI_SIG_SVKL "SVKL" /* Storage Volume Key Location Table */ 90 #define ACPI_SIG_TDEL "TDEL" /* TD Event Log Table */ 91 92 93 /* 94 * All tables must be byte-packed to match the ACPI specification, since 95 * the tables are provided by the system BIOS. 96 */ 97 #pragma pack(1) 98 99 /* 100 * Note: C bitfields are not used for this reason: 101 * 102 * "Bitfields are great and easy to read, but unfortunately the C language 103 * does not specify the layout of bitfields in memory, which means they are 104 * essentially useless for dealing with packed data in on-disk formats or 105 * binary wire protocols." (Or ACPI tables and buffers.) "If you ask me, 106 * this decision was a design error in C. Ritchie could have picked an order 107 * and stuck with it." Norman Ramsey. 108 * See http://stackoverflow.com/a/1053662/41661 109 */ 110 111 112 /******************************************************************************* 113 * 114 * AEST - Arm Error Source Table 115 * 116 * Conforms to: ACPI for the Armv8 RAS Extensions 1.1 Platform Design Document 117 * September 2020. 118 * 119 ******************************************************************************/ 120 121 typedef struct acpi_table_aest 122 { 123 ACPI_TABLE_HEADER Header; 124 void *NodeArray[]; 125 126 } ACPI_TABLE_AEST; 127 128 /* Common Subtable header - one per Node Structure (Subtable) */ 129 130 typedef struct acpi_aest_hdr 131 { 132 UINT8 Type; 133 UINT16 Length; 134 UINT8 Reserved; 135 UINT32 NodeSpecificOffset; 136 UINT32 NodeInterfaceOffset; 137 UINT32 NodeInterruptOffset; 138 UINT32 NodeInterruptCount; 139 UINT64 TimestampRate; 140 UINT64 Reserved1; 141 UINT64 ErrorInjectionRate; 142 143 } ACPI_AEST_HEADER; 144 145 /* Values for Type above */ 146 147 #define ACPI_AEST_PROCESSOR_ERROR_NODE 0 148 #define ACPI_AEST_MEMORY_ERROR_NODE 1 149 #define ACPI_AEST_SMMU_ERROR_NODE 2 150 #define ACPI_AEST_VENDOR_ERROR_NODE 3 151 #define ACPI_AEST_GIC_ERROR_NODE 4 152 #define ACPI_AEST_NODE_TYPE_RESERVED 5 /* 5 and above are reserved */ 153 154 155 /* 156 * AEST subtables (Error nodes) 157 */ 158 159 /* 0: Processor Error */ 160 161 typedef struct acpi_aest_processor 162 { 163 UINT32 ProcessorId; 164 UINT8 ResourceType; 165 UINT8 Reserved; 166 UINT8 Flags; 167 UINT8 Revision; 168 UINT64 ProcessorAffinity; 169 170 } ACPI_AEST_PROCESSOR; 171 172 /* Values for ResourceType above, related structs below */ 173 174 #define ACPI_AEST_CACHE_RESOURCE 0 175 #define ACPI_AEST_TLB_RESOURCE 1 176 #define ACPI_AEST_GENERIC_RESOURCE 2 177 #define ACPI_AEST_RESOURCE_RESERVED 3 /* 3 and above are reserved */ 178 179 /* 0R: Processor Cache Resource Substructure */ 180 181 typedef struct acpi_aest_processor_cache 182 { 183 UINT32 CacheReference; 184 UINT32 Reserved; 185 186 } ACPI_AEST_PROCESSOR_CACHE; 187 188 /* Values for CacheType above */ 189 190 #define ACPI_AEST_CACHE_DATA 0 191 #define ACPI_AEST_CACHE_INSTRUCTION 1 192 #define ACPI_AEST_CACHE_UNIFIED 2 193 #define ACPI_AEST_CACHE_RESERVED 3 /* 3 and above are reserved */ 194 195 /* 1R: Processor TLB Resource Substructure */ 196 197 typedef struct acpi_aest_processor_tlb 198 { 199 UINT32 TlbLevel; 200 UINT32 Reserved; 201 202 } ACPI_AEST_PROCESSOR_TLB; 203 204 /* 2R: Processor Generic Resource Substructure */ 205 206 typedef struct acpi_aest_processor_generic 207 { 208 UINT32 Resource; 209 210 } ACPI_AEST_PROCESSOR_GENERIC; 211 212 /* 1: Memory Error */ 213 214 typedef struct acpi_aest_memory 215 { 216 UINT32 SratProximityDomain; 217 218 } ACPI_AEST_MEMORY; 219 220 /* 2: Smmu Error */ 221 222 typedef struct acpi_aest_smmu 223 { 224 UINT32 IortNodeReference; 225 UINT32 SubcomponentReference; 226 227 } ACPI_AEST_SMMU; 228 229 /* 3: Vendor Defined */ 230 231 typedef struct acpi_aest_vendor 232 { 233 UINT32 AcpiHid; 234 UINT32 AcpiUid; 235 UINT8 VendorSpecificData[16]; 236 237 } ACPI_AEST_VENDOR; 238 239 /* 4: Gic Error */ 240 241 typedef struct acpi_aest_gic 242 { 243 UINT32 InterfaceType; 244 UINT32 InstanceId; 245 246 } ACPI_AEST_GIC; 247 248 /* Values for InterfaceType above */ 249 250 #define ACPI_AEST_GIC_CPU 0 251 #define ACPI_AEST_GIC_DISTRIBUTOR 1 252 #define ACPI_AEST_GIC_REDISTRIBUTOR 2 253 #define ACPI_AEST_GIC_ITS 3 254 #define ACPI_AEST_GIC_RESERVED 4 /* 4 and above are reserved */ 255 256 257 /* Node Interface Structure */ 258 259 typedef struct acpi_aest_node_interface 260 { 261 UINT8 Type; 262 UINT8 Reserved[3]; 263 UINT32 Flags; 264 UINT64 Address; 265 UINT32 ErrorRecordIndex; 266 UINT32 ErrorRecordCount; 267 UINT64 ErrorRecordImplemented; 268 UINT64 ErrorStatusReporting; 269 UINT64 AddressingMode; 270 271 } ACPI_AEST_NODE_INTERFACE; 272 273 /* Values for Type field above */ 274 275 #define ACPI_AEST_NODE_SYSTEM_REGISTER 0 276 #define ACPI_AEST_NODE_MEMORY_MAPPED 1 277 #define ACPI_AEST_XFACE_RESERVED 2 /* 2 and above are reserved */ 278 279 /* Node Interrupt Structure */ 280 281 typedef struct acpi_aest_node_interrupt 282 { 283 UINT8 Type; 284 UINT8 Reserved[2]; 285 UINT8 Flags; 286 UINT32 Gsiv; 287 UINT8 IortId; 288 UINT8 Reserved1[3]; 289 290 } ACPI_AEST_NODE_INTERRUPT; 291 292 /* Values for Type field above */ 293 294 #define ACPI_AEST_NODE_FAULT_HANDLING 0 295 #define ACPI_AEST_NODE_ERROR_RECOVERY 1 296 #define ACPI_AEST_XRUPT_RESERVED 2 /* 2 and above are reserved */ 297 298 299 /******************************************************************************* 300 * AGDI - Arm Generic Diagnostic Dump and Reset Device Interface 301 * 302 * Conforms to "ACPI for Arm Components 1.1, Platform Design Document" 303 * ARM DEN0093 v1.1 304 * 305 ******************************************************************************/ 306 typedef struct acpi_table_agdi 307 { 308 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 309 UINT8 Flags; 310 UINT8 Reserved[3]; 311 UINT32 SdeiEvent; 312 UINT32 Gsiv; 313 314 } ACPI_TABLE_AGDI; 315 316 /* Mask for Flags field above */ 317 318 #define ACPI_AGDI_SIGNALING_MODE (1) 319 320 321 /******************************************************************************* 322 * 323 * APMT - ARM Performance Monitoring Unit Table 324 * 325 * Conforms to: 326 * ARM Performance Monitoring Unit Architecture 1.0 Platform Design Document 327 * ARM DEN0117 v1.0 November 25, 2021 328 * 329 ******************************************************************************/ 330 331 typedef struct acpi_table_apmt { 332 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 333 } ACPI_TABLE_APMT; 334 335 #define ACPI_APMT_NODE_ID_LENGTH 4 336 337 /* 338 * APMT subtables 339 */ 340 typedef struct acpi_apmt_node { 341 UINT16 Length; 342 UINT8 Flags; 343 UINT8 Type; 344 UINT32 Id; 345 UINT64 InstPrimary; 346 UINT32 InstSecondary; 347 UINT64 BaseAddress0; 348 UINT64 BaseAddress1; 349 UINT32 OvflwIrq; 350 UINT32 Reserved; 351 UINT32 OvflwIrqFlags; 352 UINT32 ProcAffinity; 353 UINT32 ImplId; 354 } ACPI_APMT_NODE; 355 356 /* Masks for Flags field above */ 357 358 #define ACPI_APMT_FLAGS_DUAL_PAGE (1<<0) 359 #define ACPI_APMT_FLAGS_AFFINITY (1<<1) 360 #define ACPI_APMT_FLAGS_ATOMIC (1<<2) 361 362 /* Values for Flags dual page field above */ 363 364 #define ACPI_APMT_FLAGS_DUAL_PAGE_NSUPP (0<<0) 365 #define ACPI_APMT_FLAGS_DUAL_PAGE_SUPP (1<<0) 366 367 /* Values for Flags processor affinity field above */ 368 #define ACPI_APMT_FLAGS_AFFINITY_PROC (0<<1) 369 #define ACPI_APMT_FLAGS_AFFINITY_PROC_CONTAINER (1<<1) 370 371 /* Values for Flags 64-bit atomic field above */ 372 #define ACPI_APMT_FLAGS_ATOMIC_NSUPP (0<<2) 373 #define ACPI_APMT_FLAGS_ATOMIC_SUPP (1<<2) 374 375 /* Values for Type field above */ 376 377 enum acpi_apmt_node_type { 378 ACPI_APMT_NODE_TYPE_MC = 0x00, 379 ACPI_APMT_NODE_TYPE_SMMU = 0x01, 380 ACPI_APMT_NODE_TYPE_PCIE_ROOT = 0x02, 381 ACPI_APMT_NODE_TYPE_ACPI = 0x03, 382 ACPI_APMT_NODE_TYPE_CACHE = 0x04, 383 ACPI_APMT_NODE_TYPE_COUNT 384 }; 385 386 /* Masks for ovflw_irq_flags field above */ 387 388 #define ACPI_APMT_OVFLW_IRQ_FLAGS_MODE (1<<0) 389 #define ACPI_APMT_OVFLW_IRQ_FLAGS_TYPE (1<<1) 390 391 /* Values for ovflw_irq_flags mode field above */ 392 393 #define ACPI_APMT_OVFLW_IRQ_FLAGS_MODE_LEVEL (0<<0) 394 #define ACPI_APMT_OVFLW_IRQ_FLAGS_MODE_EDGE (1<<0) 395 396 /* Values for ovflw_irq_flags type field above */ 397 398 #define ACPI_APMT_OVFLW_IRQ_FLAGS_TYPE_WIRED (0<<1) 399 400 401 /******************************************************************************* 402 * 403 * BDAT - BIOS Data ACPI Table 404 * 405 * Conforms to "BIOS Data ACPI Table", Interface Specification v4.0 Draft 5 406 * Nov 2020 407 * 408 ******************************************************************************/ 409 410 typedef struct acpi_table_bdat 411 { 412 ACPI_TABLE_HEADER Header; 413 ACPI_GENERIC_ADDRESS Gas; 414 415 } ACPI_TABLE_BDAT; 416 417 /******************************************************************************* 418 * 419 * CCEL - CC-Event Log 420 * From: "Guest-Host-Communication Interface (GHCI) for Intel 421 * Trust Domain Extensions (Intel TDX)". Feb 2022 422 * 423 ******************************************************************************/ 424 425 typedef struct acpi_table_ccel 426 { 427 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 428 UINT8 CCType; 429 UINT8 CCSubType; 430 UINT16 Reserved; 431 UINT64 LogAreaMinimumLength; 432 UINT64 LogAreaStartAddress; 433 434 } ACPI_TABLE_CCEL; 435 436 /******************************************************************************* 437 * 438 * IORT - IO Remapping Table 439 * 440 * Conforms to "IO Remapping Table System Software on ARM Platforms", 441 * Document number: ARM DEN 0049E.e, Sep 2022 442 * 443 ******************************************************************************/ 444 445 typedef struct acpi_table_iort 446 { 447 ACPI_TABLE_HEADER Header; 448 UINT32 NodeCount; 449 UINT32 NodeOffset; 450 UINT32 Reserved; 451 452 } ACPI_TABLE_IORT; 453 454 455 /* 456 * IORT subtables 457 */ 458 typedef struct acpi_iort_node 459 { 460 UINT8 Type; 461 UINT16 Length; 462 UINT8 Revision; 463 UINT32 Identifier; 464 UINT32 MappingCount; 465 UINT32 MappingOffset; 466 char NodeData[1]; 467 468 } ACPI_IORT_NODE; 469 470 /* Values for subtable Type above */ 471 472 enum AcpiIortNodeType 473 { 474 ACPI_IORT_NODE_ITS_GROUP = 0x00, 475 ACPI_IORT_NODE_NAMED_COMPONENT = 0x01, 476 ACPI_IORT_NODE_PCI_ROOT_COMPLEX = 0x02, 477 ACPI_IORT_NODE_SMMU = 0x03, 478 ACPI_IORT_NODE_SMMU_V3 = 0x04, 479 ACPI_IORT_NODE_PMCG = 0x05, 480 ACPI_IORT_NODE_RMR = 0x06, 481 }; 482 483 484 typedef struct acpi_iort_id_mapping 485 { 486 UINT32 InputBase; /* Lowest value in input range */ 487 UINT32 IdCount; /* Number of IDs */ 488 UINT32 OutputBase; /* Lowest value in output range */ 489 UINT32 OutputReference; /* A reference to the output node */ 490 UINT32 Flags; 491 492 } ACPI_IORT_ID_MAPPING; 493 494 /* Masks for Flags field above for IORT subtable */ 495 496 #define ACPI_IORT_ID_SINGLE_MAPPING (1) 497 498 499 typedef struct acpi_iort_memory_access 500 { 501 UINT32 CacheCoherency; 502 UINT8 Hints; 503 UINT16 Reserved; 504 UINT8 MemoryFlags; 505 506 } ACPI_IORT_MEMORY_ACCESS; 507 508 /* Values for CacheCoherency field above */ 509 510 #define ACPI_IORT_NODE_COHERENT 0x00000001 /* The device node is fully coherent */ 511 #define ACPI_IORT_NODE_NOT_COHERENT 0x00000000 /* The device node is not coherent */ 512 513 /* Masks for Hints field above */ 514 515 #define ACPI_IORT_HT_TRANSIENT (1) 516 #define ACPI_IORT_HT_WRITE (1<<1) 517 #define ACPI_IORT_HT_READ (1<<2) 518 #define ACPI_IORT_HT_OVERRIDE (1<<3) 519 520 /* Masks for MemoryFlags field above */ 521 522 #define ACPI_IORT_MF_COHERENCY (1) 523 #define ACPI_IORT_MF_ATTRIBUTES (1<<1) 524 525 526 /* 527 * IORT node specific subtables 528 */ 529 typedef struct acpi_iort_its_group 530 { 531 UINT32 ItsCount; 532 UINT32 Identifiers[1]; /* GIC ITS identifier array */ 533 534 } ACPI_IORT_ITS_GROUP; 535 536 537 typedef struct acpi_iort_named_component 538 { 539 UINT32 NodeFlags; 540 UINT64 MemoryProperties; /* Memory access properties */ 541 UINT8 MemoryAddressLimit; /* Memory address size limit */ 542 char DeviceName[1]; /* Path of namespace object */ 543 544 } ACPI_IORT_NAMED_COMPONENT; 545 546 /* Masks for Flags field above */ 547 548 #define ACPI_IORT_NC_STALL_SUPPORTED (1) 549 #define ACPI_IORT_NC_PASID_BITS (31<<1) 550 551 typedef struct acpi_iort_root_complex 552 { 553 UINT64 MemoryProperties; /* Memory access properties */ 554 UINT32 AtsAttribute; 555 UINT32 PciSegmentNumber; 556 UINT8 MemoryAddressLimit; /* Memory address size limit */ 557 UINT16 PasidCapabilities; /* PASID Capabilities */ 558 UINT8 Reserved[1]; /* Reserved, must be zero */ 559 560 } ACPI_IORT_ROOT_COMPLEX; 561 562 /* Masks for AtsAttribute field above */ 563 564 #define ACPI_IORT_ATS_SUPPORTED (1) /* The root complex ATS support */ 565 #define ACPI_IORT_PRI_SUPPORTED (1<<1) /* The root complex PRI support */ 566 #define ACPI_IORT_PASID_FWD_SUPPORTED (1<<2) /* The root complex PASID forward support */ 567 568 /* Masks for PasidCapabilities field above */ 569 #define ACPI_IORT_PASID_MAX_WIDTH (0x1F) /* Bits 0-4 */ 570 571 typedef struct acpi_iort_smmu 572 { 573 UINT64 BaseAddress; /* SMMU base address */ 574 UINT64 Span; /* Length of memory range */ 575 UINT32 Model; 576 UINT32 Flags; 577 UINT32 GlobalInterruptOffset; 578 UINT32 ContextInterruptCount; 579 UINT32 ContextInterruptOffset; 580 UINT32 PmuInterruptCount; 581 UINT32 PmuInterruptOffset; 582 UINT64 Interrupts[1]; /* Interrupt array */ 583 584 } ACPI_IORT_SMMU; 585 586 /* Values for Model field above */ 587 588 #define ACPI_IORT_SMMU_V1 0x00000000 /* Generic SMMUv1 */ 589 #define ACPI_IORT_SMMU_V2 0x00000001 /* Generic SMMUv2 */ 590 #define ACPI_IORT_SMMU_CORELINK_MMU400 0x00000002 /* ARM Corelink MMU-400 */ 591 #define ACPI_IORT_SMMU_CORELINK_MMU500 0x00000003 /* ARM Corelink MMU-500 */ 592 #define ACPI_IORT_SMMU_CORELINK_MMU401 0x00000004 /* ARM Corelink MMU-401 */ 593 #define ACPI_IORT_SMMU_CAVIUM_THUNDERX 0x00000005 /* Cavium ThunderX SMMUv2 */ 594 595 /* Masks for Flags field above */ 596 597 #define ACPI_IORT_SMMU_DVM_SUPPORTED (1) 598 #define ACPI_IORT_SMMU_COHERENT_WALK (1<<1) 599 600 /* Global interrupt format */ 601 602 typedef struct acpi_iort_smmu_gsi 603 { 604 UINT32 NSgIrpt; 605 UINT32 NSgIrptFlags; 606 UINT32 NSgCfgIrpt; 607 UINT32 NSgCfgIrptFlags; 608 609 } ACPI_IORT_SMMU_GSI; 610 611 612 typedef struct acpi_iort_smmu_v3 613 { 614 UINT64 BaseAddress; /* SMMUv3 base address */ 615 UINT32 Flags; 616 UINT32 Reserved; 617 UINT64 VatosAddress; 618 UINT32 Model; 619 UINT32 EventGsiv; 620 UINT32 PriGsiv; 621 UINT32 GerrGsiv; 622 UINT32 SyncGsiv; 623 UINT32 Pxm; 624 UINT32 IdMappingIndex; 625 626 } ACPI_IORT_SMMU_V3; 627 628 /* Values for Model field above */ 629 630 #define ACPI_IORT_SMMU_V3_GENERIC 0x00000000 /* Generic SMMUv3 */ 631 #define ACPI_IORT_SMMU_V3_HISILICON_HI161X 0x00000001 /* HiSilicon Hi161x SMMUv3 */ 632 #define ACPI_IORT_SMMU_V3_CAVIUM_CN99XX 0x00000002 /* Cavium CN99xx SMMUv3 */ 633 634 /* Masks for Flags field above */ 635 636 #define ACPI_IORT_SMMU_V3_COHACC_OVERRIDE (1) 637 #define ACPI_IORT_SMMU_V3_HTTU_OVERRIDE (3<<1) 638 #define ACPI_IORT_SMMU_V3_PXM_VALID (1<<3) 639 #define ACPI_IORT_SMMU_V3_DEVICEID_VALID (1<<4) 640 641 typedef struct acpi_iort_pmcg 642 { 643 UINT64 Page0BaseAddress; 644 UINT32 OverflowGsiv; 645 UINT32 NodeReference; 646 UINT64 Page1BaseAddress; 647 648 } ACPI_IORT_PMCG; 649 650 typedef struct acpi_iort_rmr { 651 UINT32 Flags; 652 UINT32 RmrCount; 653 UINT32 RmrOffset; 654 655 } ACPI_IORT_RMR; 656 657 /* Masks for Flags field above */ 658 #define ACPI_IORT_RMR_REMAP_PERMITTED (1) 659 #define ACPI_IORT_RMR_ACCESS_PRIVILEGE (1<<1) 660 661 /* 662 * Macro to access the Access Attributes in flags field above: 663 * Access Attributes is encoded in bits 9:2 664 */ 665 #define ACPI_IORT_RMR_ACCESS_ATTRIBUTES(flags) (((flags) >> 2) & 0xFF) 666 667 /* Values for above Access Attributes */ 668 669 #define ACPI_IORT_RMR_ATTR_DEVICE_NGNRNE 0x00 670 #define ACPI_IORT_RMR_ATTR_DEVICE_NGNRE 0x01 671 #define ACPI_IORT_RMR_ATTR_DEVICE_NGRE 0x02 672 #define ACPI_IORT_RMR_ATTR_DEVICE_GRE 0x03 673 #define ACPI_IORT_RMR_ATTR_NORMAL_NC 0x04 674 #define ACPI_IORT_RMR_ATTR_NORMAL_IWB_OWB 0x05 675 676 typedef struct acpi_iort_rmr_desc { 677 UINT64 BaseAddress; 678 UINT64 Length; 679 UINT32 Reserved; 680 681 } ACPI_IORT_RMR_DESC; 682 683 /******************************************************************************* 684 * 685 * IVRS - I/O Virtualization Reporting Structure 686 * Version 1 687 * 688 * Conforms to "AMD I/O Virtualization Technology (IOMMU) Specification", 689 * Revision 1.26, February 2009. 690 * 691 ******************************************************************************/ 692 693 typedef struct acpi_table_ivrs 694 { 695 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 696 UINT32 Info; /* Common virtualization info */ 697 UINT64 Reserved; 698 699 } ACPI_TABLE_IVRS; 700 701 /* Values for Info field above */ 702 703 #define ACPI_IVRS_PHYSICAL_SIZE 0x00007F00 /* 7 bits, physical address size */ 704 #define ACPI_IVRS_VIRTUAL_SIZE 0x003F8000 /* 7 bits, virtual address size */ 705 #define ACPI_IVRS_ATS_RESERVED 0x00400000 /* ATS address translation range reserved */ 706 707 708 /* IVRS subtable header */ 709 710 typedef struct acpi_ivrs_header 711 { 712 UINT8 Type; /* Subtable type */ 713 UINT8 Flags; 714 UINT16 Length; /* Subtable length */ 715 UINT16 DeviceId; /* ID of IOMMU */ 716 717 } ACPI_IVRS_HEADER; 718 719 /* Values for subtable Type above */ 720 721 enum AcpiIvrsType 722 { 723 ACPI_IVRS_TYPE_HARDWARE1 = 0x10, 724 ACPI_IVRS_TYPE_HARDWARE2 = 0x11, 725 ACPI_IVRS_TYPE_HARDWARE3 = 0x40, 726 ACPI_IVRS_TYPE_MEMORY1 = 0x20, 727 ACPI_IVRS_TYPE_MEMORY2 = 0x21, 728 ACPI_IVRS_TYPE_MEMORY3 = 0x22 729 }; 730 731 /* Masks for Flags field above for IVHD subtable */ 732 733 #define ACPI_IVHD_TT_ENABLE (1) 734 #define ACPI_IVHD_PASS_PW (1<<1) 735 #define ACPI_IVHD_RES_PASS_PW (1<<2) 736 #define ACPI_IVHD_ISOC (1<<3) 737 #define ACPI_IVHD_IOTLB (1<<4) 738 739 /* Masks for Flags field above for IVMD subtable */ 740 741 #define ACPI_IVMD_UNITY (1) 742 #define ACPI_IVMD_READ (1<<1) 743 #define ACPI_IVMD_WRITE (1<<2) 744 #define ACPI_IVMD_EXCLUSION_RANGE (1<<3) 745 746 747 /* 748 * IVRS subtables, correspond to Type in ACPI_IVRS_HEADER 749 */ 750 751 /* 0x10: I/O Virtualization Hardware Definition Block (IVHD) */ 752 753 typedef struct acpi_ivrs_hardware_10 754 { 755 ACPI_IVRS_HEADER Header; 756 UINT16 CapabilityOffset; /* Offset for IOMMU control fields */ 757 UINT64 BaseAddress; /* IOMMU control registers */ 758 UINT16 PciSegmentGroup; 759 UINT16 Info; /* MSI number and unit ID */ 760 UINT32 FeatureReporting; 761 762 } ACPI_IVRS_HARDWARE1; 763 764 /* 0x11: I/O Virtualization Hardware Definition Block (IVHD) */ 765 766 typedef struct acpi_ivrs_hardware_11 767 { 768 ACPI_IVRS_HEADER Header; 769 UINT16 CapabilityOffset; /* Offset for IOMMU control fields */ 770 UINT64 BaseAddress; /* IOMMU control registers */ 771 UINT16 PciSegmentGroup; 772 UINT16 Info; /* MSI number and unit ID */ 773 UINT32 Attributes; 774 UINT64 EfrRegisterImage; 775 UINT64 Reserved; 776 } ACPI_IVRS_HARDWARE2; 777 778 /* Masks for Info field above */ 779 780 #define ACPI_IVHD_MSI_NUMBER_MASK 0x001F /* 5 bits, MSI message number */ 781 #define ACPI_IVHD_UNIT_ID_MASK 0x1F00 /* 5 bits, UnitID */ 782 783 784 /* 785 * Device Entries for IVHD subtable, appear after ACPI_IVRS_HARDWARE structure. 786 * Upper two bits of the Type field are the (encoded) length of the structure. 787 * Currently, only 4 and 8 byte entries are defined. 16 and 32 byte entries 788 * are reserved for future use but not defined. 789 */ 790 typedef struct acpi_ivrs_de_header 791 { 792 UINT8 Type; 793 UINT16 Id; 794 UINT8 DataSetting; 795 796 } ACPI_IVRS_DE_HEADER; 797 798 /* Length of device entry is in the top two bits of Type field above */ 799 800 #define ACPI_IVHD_ENTRY_LENGTH 0xC0 801 802 /* Values for device entry Type field above */ 803 804 enum AcpiIvrsDeviceEntryType 805 { 806 /* 4-byte device entries, all use ACPI_IVRS_DEVICE4 */ 807 808 ACPI_IVRS_TYPE_PAD4 = 0, 809 ACPI_IVRS_TYPE_ALL = 1, 810 ACPI_IVRS_TYPE_SELECT = 2, 811 ACPI_IVRS_TYPE_START = 3, 812 ACPI_IVRS_TYPE_END = 4, 813 814 /* 8-byte device entries */ 815 816 ACPI_IVRS_TYPE_PAD8 = 64, 817 ACPI_IVRS_TYPE_NOT_USED = 65, 818 ACPI_IVRS_TYPE_ALIAS_SELECT = 66, /* Uses ACPI_IVRS_DEVICE8A */ 819 ACPI_IVRS_TYPE_ALIAS_START = 67, /* Uses ACPI_IVRS_DEVICE8A */ 820 ACPI_IVRS_TYPE_EXT_SELECT = 70, /* Uses ACPI_IVRS_DEVICE8B */ 821 ACPI_IVRS_TYPE_EXT_START = 71, /* Uses ACPI_IVRS_DEVICE8B */ 822 ACPI_IVRS_TYPE_SPECIAL = 72, /* Uses ACPI_IVRS_DEVICE8C */ 823 824 /* Variable-length device entries */ 825 826 ACPI_IVRS_TYPE_HID = 240 /* Uses ACPI_IVRS_DEVICE_HID */ 827 }; 828 829 /* Values for Data field above */ 830 831 #define ACPI_IVHD_INIT_PASS (1) 832 #define ACPI_IVHD_EINT_PASS (1<<1) 833 #define ACPI_IVHD_NMI_PASS (1<<2) 834 #define ACPI_IVHD_SYSTEM_MGMT (3<<4) 835 #define ACPI_IVHD_LINT0_PASS (1<<6) 836 #define ACPI_IVHD_LINT1_PASS (1<<7) 837 838 839 /* Types 0-4: 4-byte device entry */ 840 841 typedef struct acpi_ivrs_device4 842 { 843 ACPI_IVRS_DE_HEADER Header; 844 845 } ACPI_IVRS_DEVICE4; 846 847 /* Types 66-67: 8-byte device entry */ 848 849 typedef struct acpi_ivrs_device8a 850 { 851 ACPI_IVRS_DE_HEADER Header; 852 UINT8 Reserved1; 853 UINT16 UsedId; 854 UINT8 Reserved2; 855 856 } ACPI_IVRS_DEVICE8A; 857 858 /* Types 70-71: 8-byte device entry */ 859 860 typedef struct acpi_ivrs_device8b 861 { 862 ACPI_IVRS_DE_HEADER Header; 863 UINT32 ExtendedData; 864 865 } ACPI_IVRS_DEVICE8B; 866 867 /* Values for ExtendedData above */ 868 869 #define ACPI_IVHD_ATS_DISABLED (1<<31) 870 871 /* Type 72: 8-byte device entry */ 872 873 typedef struct acpi_ivrs_device8c 874 { 875 ACPI_IVRS_DE_HEADER Header; 876 UINT8 Handle; 877 UINT16 UsedId; 878 UINT8 Variety; 879 880 } ACPI_IVRS_DEVICE8C; 881 882 /* Values for Variety field above */ 883 884 #define ACPI_IVHD_IOAPIC 1 885 #define ACPI_IVHD_HPET 2 886 887 /* Type 240: variable-length device entry */ 888 889 typedef struct acpi_ivrs_device_hid 890 { 891 ACPI_IVRS_DE_HEADER Header; 892 UINT64 AcpiHid; 893 UINT64 AcpiCid; 894 UINT8 UidType; 895 UINT8 UidLength; 896 897 } ACPI_IVRS_DEVICE_HID; 898 899 /* Values for UidType above */ 900 901 #define ACPI_IVRS_UID_NOT_PRESENT 0 902 #define ACPI_IVRS_UID_IS_INTEGER 1 903 #define ACPI_IVRS_UID_IS_STRING 2 904 905 /* 0x20, 0x21, 0x22: I/O Virtualization Memory Definition Block (IVMD) */ 906 907 typedef struct acpi_ivrs_memory 908 { 909 ACPI_IVRS_HEADER Header; 910 UINT16 AuxData; 911 UINT64 Reserved; 912 UINT64 StartAddress; 913 UINT64 MemoryLength; 914 915 } ACPI_IVRS_MEMORY; 916 917 918 /******************************************************************************* 919 * 920 * LPIT - Low Power Idle Table 921 * 922 * Conforms to "ACPI Low Power Idle Table (LPIT)" July 2014. 923 * 924 ******************************************************************************/ 925 926 typedef struct acpi_table_lpit 927 { 928 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 929 930 } ACPI_TABLE_LPIT; 931 932 933 /* LPIT subtable header */ 934 935 typedef struct acpi_lpit_header 936 { 937 UINT32 Type; /* Subtable type */ 938 UINT32 Length; /* Subtable length */ 939 UINT16 UniqueId; 940 UINT16 Reserved; 941 UINT32 Flags; 942 943 } ACPI_LPIT_HEADER; 944 945 /* Values for subtable Type above */ 946 947 enum AcpiLpitType 948 { 949 ACPI_LPIT_TYPE_NATIVE_CSTATE = 0x00, 950 ACPI_LPIT_TYPE_RESERVED = 0x01 /* 1 and above are reserved */ 951 }; 952 953 /* Masks for Flags field above */ 954 955 #define ACPI_LPIT_STATE_DISABLED (1) 956 #define ACPI_LPIT_NO_COUNTER (1<<1) 957 958 /* 959 * LPIT subtables, correspond to Type in ACPI_LPIT_HEADER 960 */ 961 962 /* 0x00: Native C-state instruction based LPI structure */ 963 964 typedef struct acpi_lpit_native 965 { 966 ACPI_LPIT_HEADER Header; 967 ACPI_GENERIC_ADDRESS EntryTrigger; 968 UINT32 Residency; 969 UINT32 Latency; 970 ACPI_GENERIC_ADDRESS ResidencyCounter; 971 UINT64 CounterFrequency; 972 973 } ACPI_LPIT_NATIVE; 974 975 976 /******************************************************************************* 977 * 978 * MADT - Multiple APIC Description Table 979 * Version 3 980 * 981 ******************************************************************************/ 982 983 typedef struct acpi_table_madt 984 { 985 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 986 UINT32 Address; /* Physical address of local APIC */ 987 UINT32 Flags; 988 989 } ACPI_TABLE_MADT; 990 991 /* Masks for Flags field above */ 992 993 #define ACPI_MADT_PCAT_COMPAT (1) /* 00: System also has dual 8259s */ 994 995 /* Values for PCATCompat flag */ 996 997 #define ACPI_MADT_DUAL_PIC 1 998 #define ACPI_MADT_MULTIPLE_APIC 0 999 1000 1001 /* Values for MADT subtable type in ACPI_SUBTABLE_HEADER */ 1002 1003 enum AcpiMadtType 1004 { 1005 ACPI_MADT_TYPE_LOCAL_APIC = 0, 1006 ACPI_MADT_TYPE_IO_APIC = 1, 1007 ACPI_MADT_TYPE_INTERRUPT_OVERRIDE = 2, 1008 ACPI_MADT_TYPE_NMI_SOURCE = 3, 1009 ACPI_MADT_TYPE_LOCAL_APIC_NMI = 4, 1010 ACPI_MADT_TYPE_LOCAL_APIC_OVERRIDE = 5, 1011 ACPI_MADT_TYPE_IO_SAPIC = 6, 1012 ACPI_MADT_TYPE_LOCAL_SAPIC = 7, 1013 ACPI_MADT_TYPE_INTERRUPT_SOURCE = 8, 1014 ACPI_MADT_TYPE_LOCAL_X2APIC = 9, 1015 ACPI_MADT_TYPE_LOCAL_X2APIC_NMI = 10, 1016 ACPI_MADT_TYPE_GENERIC_INTERRUPT = 11, 1017 ACPI_MADT_TYPE_GENERIC_DISTRIBUTOR = 12, 1018 ACPI_MADT_TYPE_GENERIC_MSI_FRAME = 13, 1019 ACPI_MADT_TYPE_GENERIC_REDISTRIBUTOR = 14, 1020 ACPI_MADT_TYPE_GENERIC_TRANSLATOR = 15, 1021 ACPI_MADT_TYPE_MULTIPROC_WAKEUP = 16, 1022 ACPI_MADT_TYPE_CORE_PIC = 17, 1023 ACPI_MADT_TYPE_LIO_PIC = 18, 1024 ACPI_MADT_TYPE_HT_PIC = 19, 1025 ACPI_MADT_TYPE_EIO_PIC = 20, 1026 ACPI_MADT_TYPE_MSI_PIC = 21, 1027 ACPI_MADT_TYPE_BIO_PIC = 22, 1028 ACPI_MADT_TYPE_LPC_PIC = 23, 1029 ACPI_MADT_TYPE_RESERVED = 24, /* 24 to 0x7F are reserved */ 1030 ACPI_MADT_TYPE_OEM_RESERVED = 0x80 /* 0x80 to 0xFF are reserved for OEM use */ 1031 }; 1032 1033 1034 /* 1035 * MADT Subtables, correspond to Type in ACPI_SUBTABLE_HEADER 1036 */ 1037 1038 /* 0: Processor Local APIC */ 1039 1040 typedef struct acpi_madt_local_apic 1041 { 1042 ACPI_SUBTABLE_HEADER Header; 1043 UINT8 ProcessorId; /* ACPI processor id */ 1044 UINT8 Id; /* Processor's local APIC id */ 1045 UINT32 LapicFlags; 1046 1047 } ACPI_MADT_LOCAL_APIC; 1048 1049 1050 /* 1: IO APIC */ 1051 1052 typedef struct acpi_madt_io_apic 1053 { 1054 ACPI_SUBTABLE_HEADER Header; 1055 UINT8 Id; /* I/O APIC ID */ 1056 UINT8 Reserved; /* Reserved - must be zero */ 1057 UINT32 Address; /* APIC physical address */ 1058 UINT32 GlobalIrqBase; /* Global system interrupt where INTI lines start */ 1059 1060 } ACPI_MADT_IO_APIC; 1061 1062 1063 /* 2: Interrupt Override */ 1064 1065 typedef struct acpi_madt_interrupt_override 1066 { 1067 ACPI_SUBTABLE_HEADER Header; 1068 UINT8 Bus; /* 0 - ISA */ 1069 UINT8 SourceIrq; /* Interrupt source (IRQ) */ 1070 UINT32 GlobalIrq; /* Global system interrupt */ 1071 UINT16 IntiFlags; 1072 1073 } ACPI_MADT_INTERRUPT_OVERRIDE; 1074 1075 1076 /* 3: NMI Source */ 1077 1078 typedef struct acpi_madt_nmi_source 1079 { 1080 ACPI_SUBTABLE_HEADER Header; 1081 UINT16 IntiFlags; 1082 UINT32 GlobalIrq; /* Global system interrupt */ 1083 1084 } ACPI_MADT_NMI_SOURCE; 1085 1086 1087 /* 4: Local APIC NMI */ 1088 1089 typedef struct acpi_madt_local_apic_nmi 1090 { 1091 ACPI_SUBTABLE_HEADER Header; 1092 UINT8 ProcessorId; /* ACPI processor id */ 1093 UINT16 IntiFlags; 1094 UINT8 Lint; /* LINTn to which NMI is connected */ 1095 1096 } ACPI_MADT_LOCAL_APIC_NMI; 1097 1098 1099 /* 5: Address Override */ 1100 1101 typedef struct acpi_madt_local_apic_override 1102 { 1103 ACPI_SUBTABLE_HEADER Header; 1104 UINT16 Reserved; /* Reserved, must be zero */ 1105 UINT64 Address; /* APIC physical address */ 1106 1107 } ACPI_MADT_LOCAL_APIC_OVERRIDE; 1108 1109 1110 /* 6: I/O Sapic */ 1111 1112 typedef struct acpi_madt_io_sapic 1113 { 1114 ACPI_SUBTABLE_HEADER Header; 1115 UINT8 Id; /* I/O SAPIC ID */ 1116 UINT8 Reserved; /* Reserved, must be zero */ 1117 UINT32 GlobalIrqBase; /* Global interrupt for SAPIC start */ 1118 UINT64 Address; /* SAPIC physical address */ 1119 1120 } ACPI_MADT_IO_SAPIC; 1121 1122 1123 /* 7: Local Sapic */ 1124 1125 typedef struct acpi_madt_local_sapic 1126 { 1127 ACPI_SUBTABLE_HEADER Header; 1128 UINT8 ProcessorId; /* ACPI processor id */ 1129 UINT8 Id; /* SAPIC ID */ 1130 UINT8 Eid; /* SAPIC EID */ 1131 UINT8 Reserved[3]; /* Reserved, must be zero */ 1132 UINT32 LapicFlags; 1133 UINT32 Uid; /* Numeric UID - ACPI 3.0 */ 1134 char UidString[1]; /* String UID - ACPI 3.0 */ 1135 1136 } ACPI_MADT_LOCAL_SAPIC; 1137 1138 1139 /* 8: Platform Interrupt Source */ 1140 1141 typedef struct acpi_madt_interrupt_source 1142 { 1143 ACPI_SUBTABLE_HEADER Header; 1144 UINT16 IntiFlags; 1145 UINT8 Type; /* 1=PMI, 2=INIT, 3=corrected */ 1146 UINT8 Id; /* Processor ID */ 1147 UINT8 Eid; /* Processor EID */ 1148 UINT8 IoSapicVector; /* Vector value for PMI interrupts */ 1149 UINT32 GlobalIrq; /* Global system interrupt */ 1150 UINT32 Flags; /* Interrupt Source Flags */ 1151 1152 } ACPI_MADT_INTERRUPT_SOURCE; 1153 1154 /* Masks for Flags field above */ 1155 1156 #define ACPI_MADT_CPEI_OVERRIDE (1) 1157 1158 1159 /* 9: Processor Local X2APIC (ACPI 4.0) */ 1160 1161 typedef struct acpi_madt_local_x2apic 1162 { 1163 ACPI_SUBTABLE_HEADER Header; 1164 UINT16 Reserved; /* Reserved - must be zero */ 1165 UINT32 LocalApicId; /* Processor x2APIC ID */ 1166 UINT32 LapicFlags; 1167 UINT32 Uid; /* ACPI processor UID */ 1168 1169 } ACPI_MADT_LOCAL_X2APIC; 1170 1171 1172 /* 10: Local X2APIC NMI (ACPI 4.0) */ 1173 1174 typedef struct acpi_madt_local_x2apic_nmi 1175 { 1176 ACPI_SUBTABLE_HEADER Header; 1177 UINT16 IntiFlags; 1178 UINT32 Uid; /* ACPI processor UID */ 1179 UINT8 Lint; /* LINTn to which NMI is connected */ 1180 UINT8 Reserved[3]; /* Reserved - must be zero */ 1181 1182 } ACPI_MADT_LOCAL_X2APIC_NMI; 1183 1184 1185 /* 11: Generic Interrupt - GICC (ACPI 5.0 + ACPI 6.0 + ACPI 6.3 changes) */ 1186 1187 typedef struct acpi_madt_generic_interrupt 1188 { 1189 ACPI_SUBTABLE_HEADER Header; 1190 UINT16 Reserved; /* Reserved - must be zero */ 1191 UINT32 CpuInterfaceNumber; 1192 UINT32 Uid; 1193 UINT32 Flags; 1194 UINT32 ParkingVersion; 1195 UINT32 PerformanceInterrupt; 1196 UINT64 ParkedAddress; 1197 UINT64 BaseAddress; 1198 UINT64 GicvBaseAddress; 1199 UINT64 GichBaseAddress; 1200 UINT32 VgicInterrupt; 1201 UINT64 GicrBaseAddress; 1202 UINT64 ArmMpidr; 1203 UINT8 EfficiencyClass; 1204 UINT8 Reserved2[1]; 1205 UINT16 SpeInterrupt; /* ACPI 6.3 */ 1206 1207 } ACPI_MADT_GENERIC_INTERRUPT; 1208 1209 /* Masks for Flags field above */ 1210 1211 /* ACPI_MADT_ENABLED (1) Processor is usable if set */ 1212 #define ACPI_MADT_PERFORMANCE_IRQ_MODE (1<<1) /* 01: Performance Interrupt Mode */ 1213 #define ACPI_MADT_VGIC_IRQ_MODE (1<<2) /* 02: VGIC Maintenance Interrupt mode */ 1214 1215 1216 /* 12: Generic Distributor (ACPI 5.0 + ACPI 6.0 changes) */ 1217 1218 typedef struct acpi_madt_generic_distributor 1219 { 1220 ACPI_SUBTABLE_HEADER Header; 1221 UINT16 Reserved; /* Reserved - must be zero */ 1222 UINT32 GicId; 1223 UINT64 BaseAddress; 1224 UINT32 GlobalIrqBase; 1225 UINT8 Version; 1226 UINT8 Reserved2[3]; /* Reserved - must be zero */ 1227 1228 } ACPI_MADT_GENERIC_DISTRIBUTOR; 1229 1230 /* Values for Version field above */ 1231 1232 enum AcpiMadtGicVersion 1233 { 1234 ACPI_MADT_GIC_VERSION_NONE = 0, 1235 ACPI_MADT_GIC_VERSION_V1 = 1, 1236 ACPI_MADT_GIC_VERSION_V2 = 2, 1237 ACPI_MADT_GIC_VERSION_V3 = 3, 1238 ACPI_MADT_GIC_VERSION_V4 = 4, 1239 ACPI_MADT_GIC_VERSION_RESERVED = 5 /* 5 and greater are reserved */ 1240 }; 1241 1242 1243 /* 13: Generic MSI Frame (ACPI 5.1) */ 1244 1245 typedef struct acpi_madt_generic_msi_frame 1246 { 1247 ACPI_SUBTABLE_HEADER Header; 1248 UINT16 Reserved; /* Reserved - must be zero */ 1249 UINT32 MsiFrameId; 1250 UINT64 BaseAddress; 1251 UINT32 Flags; 1252 UINT16 SpiCount; 1253 UINT16 SpiBase; 1254 1255 } ACPI_MADT_GENERIC_MSI_FRAME; 1256 1257 /* Masks for Flags field above */ 1258 1259 #define ACPI_MADT_OVERRIDE_SPI_VALUES (1) 1260 1261 1262 /* 14: Generic Redistributor (ACPI 5.1) */ 1263 1264 typedef struct acpi_madt_generic_redistributor 1265 { 1266 ACPI_SUBTABLE_HEADER Header; 1267 UINT16 Reserved; /* reserved - must be zero */ 1268 UINT64 BaseAddress; 1269 UINT32 Length; 1270 1271 } ACPI_MADT_GENERIC_REDISTRIBUTOR; 1272 1273 1274 /* 15: Generic Translator (ACPI 6.0) */ 1275 1276 typedef struct acpi_madt_generic_translator 1277 { 1278 ACPI_SUBTABLE_HEADER Header; 1279 UINT16 Reserved; /* reserved - must be zero */ 1280 UINT32 TranslationId; 1281 UINT64 BaseAddress; 1282 UINT32 Reserved2; 1283 1284 } ACPI_MADT_GENERIC_TRANSLATOR; 1285 1286 /* 16: Multiprocessor wakeup (ACPI 6.4) */ 1287 1288 typedef struct acpi_madt_multiproc_wakeup 1289 { 1290 ACPI_SUBTABLE_HEADER Header; 1291 UINT16 MailboxVersion; 1292 UINT32 Reserved; /* reserved - must be zero */ 1293 UINT64 BaseAddress; 1294 1295 } ACPI_MADT_MULTIPROC_WAKEUP; 1296 1297 #define ACPI_MULTIPROC_WAKEUP_MB_OS_SIZE 2032 1298 #define ACPI_MULTIPROC_WAKEUP_MB_FIRMWARE_SIZE 2048 1299 1300 typedef struct acpi_madt_multiproc_wakeup_mailbox 1301 { 1302 UINT16 Command; 1303 UINT16 Reserved; /* reserved - must be zero */ 1304 UINT32 ApicId; 1305 UINT64 WakeupVector; 1306 UINT8 ReservedOs[ACPI_MULTIPROC_WAKEUP_MB_OS_SIZE]; /* reserved for OS use */ 1307 UINT8 ReservedFirmware[ACPI_MULTIPROC_WAKEUP_MB_FIRMWARE_SIZE]; /* reserved for firmware use */ 1308 1309 } ACPI_MADT_MULTIPROC_WAKEUP_MAILBOX; 1310 1311 #define ACPI_MP_WAKE_COMMAND_WAKEUP 1 1312 1313 /* 17: CPU Core Interrupt Controller (ACPI 6.5) */ 1314 1315 typedef struct acpi_madt_core_pic { 1316 ACPI_SUBTABLE_HEADER Header; 1317 UINT8 Version; 1318 UINT32 ProcessorId; 1319 UINT32 CoreId; 1320 UINT32 Flags; 1321 } ACPI_MADT_CORE_PIC; 1322 1323 /* Values for Version field above */ 1324 1325 enum AcpiMadtCorePicVersion { 1326 ACPI_MADT_CORE_PIC_VERSION_NONE = 0, 1327 ACPI_MADT_CORE_PIC_VERSION_V1 = 1, 1328 ACPI_MADT_CORE_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */ 1329 }; 1330 1331 /* 18: Legacy I/O Interrupt Controller (ACPI 6.5) */ 1332 1333 typedef struct acpi_madt_lio_pic { 1334 ACPI_SUBTABLE_HEADER Header; 1335 UINT8 Version; 1336 UINT64 Address; 1337 UINT16 Size; 1338 UINT8 Cascade[2]; 1339 UINT32 CascadeMap[2]; 1340 } ACPI_MADT_LIO_PIC; 1341 1342 /* Values for Version field above */ 1343 1344 enum AcpiMadtLioPicVersion { 1345 ACPI_MADT_LIO_PIC_VERSION_NONE = 0, 1346 ACPI_MADT_LIO_PIC_VERSION_V1 = 1, 1347 ACPI_MADT_LIO_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */ 1348 }; 1349 1350 /* 19: HT Interrupt Controller (ACPI 6.5) */ 1351 1352 typedef struct acpi_madt_ht_pic { 1353 ACPI_SUBTABLE_HEADER Header; 1354 UINT8 Version; 1355 UINT64 Address; 1356 UINT16 Size; 1357 UINT8 Cascade[8]; 1358 } ACPI_MADT_HT_PIC; 1359 1360 /* Values for Version field above */ 1361 1362 enum AcpiMadtHtPicVersion { 1363 ACPI_MADT_HT_PIC_VERSION_NONE = 0, 1364 ACPI_MADT_HT_PIC_VERSION_V1 = 1, 1365 ACPI_MADT_HT_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */ 1366 }; 1367 1368 /* 20: Extend I/O Interrupt Controller (ACPI 6.5) */ 1369 1370 typedef struct acpi_madt_eio_pic { 1371 ACPI_SUBTABLE_HEADER Header; 1372 UINT8 Version; 1373 UINT8 Cascade; 1374 UINT8 Node; 1375 UINT64 NodeMap; 1376 } ACPI_MADT_EIO_PIC; 1377 1378 /* Values for Version field above */ 1379 1380 enum AcpiMadtEioPicVersion { 1381 ACPI_MADT_EIO_PIC_VERSION_NONE = 0, 1382 ACPI_MADT_EIO_PIC_VERSION_V1 = 1, 1383 ACPI_MADT_EIO_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */ 1384 }; 1385 1386 /* 21: MSI Interrupt Controller (ACPI 6.5) */ 1387 1388 typedef struct acpi_madt_msi_pic { 1389 ACPI_SUBTABLE_HEADER Header; 1390 UINT8 Version; 1391 UINT64 MsgAddress; 1392 UINT32 Start; 1393 UINT32 Count; 1394 } ACPI_MADT_MSI_PIC; 1395 1396 /* Values for Version field above */ 1397 1398 enum AcpiMadtMsiPicVersion { 1399 ACPI_MADT_MSI_PIC_VERSION_NONE = 0, 1400 ACPI_MADT_MSI_PIC_VERSION_V1 = 1, 1401 ACPI_MADT_MSI_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */ 1402 }; 1403 1404 /* 22: Bridge I/O Interrupt Controller (ACPI 6.5) */ 1405 1406 typedef struct acpi_madt_bio_pic { 1407 ACPI_SUBTABLE_HEADER Header; 1408 UINT8 Version; 1409 UINT64 Address; 1410 UINT16 Size; 1411 UINT16 Id; 1412 UINT16 GsiBase; 1413 } ACPI_MADT_BIO_PIC; 1414 1415 /* Values for Version field above */ 1416 1417 enum AcpiMadtBioPicVersion { 1418 ACPI_MADT_BIO_PIC_VERSION_NONE = 0, 1419 ACPI_MADT_BIO_PIC_VERSION_V1 = 1, 1420 ACPI_MADT_BIO_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */ 1421 }; 1422 1423 /* 23: LPC Interrupt Controller (ACPI 6.5) */ 1424 1425 typedef struct acpi_madt_lpc_pic { 1426 ACPI_SUBTABLE_HEADER Header; 1427 UINT8 Version; 1428 UINT64 Address; 1429 UINT16 Size; 1430 UINT8 Cascade; 1431 } ACPI_MADT_LPC_PIC; 1432 1433 /* Values for Version field above */ 1434 1435 enum AcpiMadtLpcPicVersion { 1436 ACPI_MADT_LPC_PIC_VERSION_NONE = 0, 1437 ACPI_MADT_LPC_PIC_VERSION_V1 = 1, 1438 ACPI_MADT_LPC_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */ 1439 }; 1440 1441 /* 80: OEM data */ 1442 1443 typedef struct acpi_madt_oem_data 1444 { 1445 UINT8 OemData[0]; 1446 } ACPI_MADT_OEM_DATA; 1447 1448 1449 /* 1450 * Common flags fields for MADT subtables 1451 */ 1452 1453 /* MADT Local APIC flags */ 1454 1455 #define ACPI_MADT_ENABLED (1) /* 00: Processor is usable if set */ 1456 #define ACPI_MADT_ONLINE_CAPABLE (2) /* 01: System HW supports enabling processor at runtime */ 1457 1458 /* MADT MPS INTI flags (IntiFlags) */ 1459 1460 #define ACPI_MADT_POLARITY_MASK (3) /* 00-01: Polarity of APIC I/O input signals */ 1461 #define ACPI_MADT_TRIGGER_MASK (3<<2) /* 02-03: Trigger mode of APIC input signals */ 1462 1463 /* Values for MPS INTI flags */ 1464 1465 #define ACPI_MADT_POLARITY_CONFORMS 0 1466 #define ACPI_MADT_POLARITY_ACTIVE_HIGH 1 1467 #define ACPI_MADT_POLARITY_RESERVED 2 1468 #define ACPI_MADT_POLARITY_ACTIVE_LOW 3 1469 1470 #define ACPI_MADT_TRIGGER_CONFORMS (0) 1471 #define ACPI_MADT_TRIGGER_EDGE (1<<2) 1472 #define ACPI_MADT_TRIGGER_RESERVED (2<<2) 1473 #define ACPI_MADT_TRIGGER_LEVEL (3<<2) 1474 1475 1476 /******************************************************************************* 1477 * 1478 * MCFG - PCI Memory Mapped Configuration table and subtable 1479 * Version 1 1480 * 1481 * Conforms to "PCI Firmware Specification", Revision 3.0, June 20, 2005 1482 * 1483 ******************************************************************************/ 1484 1485 typedef struct acpi_table_mcfg 1486 { 1487 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1488 UINT8 Reserved[8]; 1489 1490 } ACPI_TABLE_MCFG; 1491 1492 1493 /* Subtable */ 1494 1495 typedef struct acpi_mcfg_allocation 1496 { 1497 UINT64 Address; /* Base address, processor-relative */ 1498 UINT16 PciSegment; /* PCI segment group number */ 1499 UINT8 StartBusNumber; /* Starting PCI Bus number */ 1500 UINT8 EndBusNumber; /* Final PCI Bus number */ 1501 UINT32 Reserved; 1502 1503 } ACPI_MCFG_ALLOCATION; 1504 1505 1506 /******************************************************************************* 1507 * 1508 * MCHI - Management Controller Host Interface Table 1509 * Version 1 1510 * 1511 * Conforms to "Management Component Transport Protocol (MCTP) Host 1512 * Interface Specification", Revision 1.0.0a, October 13, 2009 1513 * 1514 ******************************************************************************/ 1515 1516 typedef struct acpi_table_mchi 1517 { 1518 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1519 UINT8 InterfaceType; 1520 UINT8 Protocol; 1521 UINT64 ProtocolData; 1522 UINT8 InterruptType; 1523 UINT8 Gpe; 1524 UINT8 PciDeviceFlag; 1525 UINT32 GlobalInterrupt; 1526 ACPI_GENERIC_ADDRESS ControlRegister; 1527 UINT8 PciSegment; 1528 UINT8 PciBus; 1529 UINT8 PciDevice; 1530 UINT8 PciFunction; 1531 1532 } ACPI_TABLE_MCHI; 1533 1534 1535 /******************************************************************************* 1536 * 1537 * MPST - Memory Power State Table (ACPI 5.0) 1538 * Version 1 1539 * 1540 ******************************************************************************/ 1541 1542 #define ACPI_MPST_CHANNEL_INFO \ 1543 UINT8 ChannelId; \ 1544 UINT8 Reserved1[3]; \ 1545 UINT16 PowerNodeCount; \ 1546 UINT16 Reserved2; 1547 1548 /* Main table */ 1549 1550 typedef struct acpi_table_mpst 1551 { 1552 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1553 ACPI_MPST_CHANNEL_INFO /* Platform Communication Channel */ 1554 1555 } ACPI_TABLE_MPST; 1556 1557 1558 /* Memory Platform Communication Channel Info */ 1559 1560 typedef struct acpi_mpst_channel 1561 { 1562 ACPI_MPST_CHANNEL_INFO /* Platform Communication Channel */ 1563 1564 } ACPI_MPST_CHANNEL; 1565 1566 1567 /* Memory Power Node Structure */ 1568 1569 typedef struct acpi_mpst_power_node 1570 { 1571 UINT8 Flags; 1572 UINT8 Reserved1; 1573 UINT16 NodeId; 1574 UINT32 Length; 1575 UINT64 RangeAddress; 1576 UINT64 RangeLength; 1577 UINT32 NumPowerStates; 1578 UINT32 NumPhysicalComponents; 1579 1580 } ACPI_MPST_POWER_NODE; 1581 1582 /* Values for Flags field above */ 1583 1584 #define ACPI_MPST_ENABLED 1 1585 #define ACPI_MPST_POWER_MANAGED 2 1586 #define ACPI_MPST_HOT_PLUG_CAPABLE 4 1587 1588 1589 /* Memory Power State Structure (follows POWER_NODE above) */ 1590 1591 typedef struct acpi_mpst_power_state 1592 { 1593 UINT8 PowerState; 1594 UINT8 InfoIndex; 1595 1596 } ACPI_MPST_POWER_STATE; 1597 1598 1599 /* Physical Component ID Structure (follows POWER_STATE above) */ 1600 1601 typedef struct acpi_mpst_component 1602 { 1603 UINT16 ComponentId; 1604 1605 } ACPI_MPST_COMPONENT; 1606 1607 1608 /* Memory Power State Characteristics Structure (follows all POWER_NODEs) */ 1609 1610 typedef struct acpi_mpst_data_hdr 1611 { 1612 UINT16 CharacteristicsCount; 1613 UINT16 Reserved; 1614 1615 } ACPI_MPST_DATA_HDR; 1616 1617 typedef struct acpi_mpst_power_data 1618 { 1619 UINT8 StructureId; 1620 UINT8 Flags; 1621 UINT16 Reserved1; 1622 UINT32 AveragePower; 1623 UINT32 PowerSaving; 1624 UINT64 ExitLatency; 1625 UINT64 Reserved2; 1626 1627 } ACPI_MPST_POWER_DATA; 1628 1629 /* Values for Flags field above */ 1630 1631 #define ACPI_MPST_PRESERVE 1 1632 #define ACPI_MPST_AUTOENTRY 2 1633 #define ACPI_MPST_AUTOEXIT 4 1634 1635 1636 /* Shared Memory Region (not part of an ACPI table) */ 1637 1638 typedef struct acpi_mpst_shared 1639 { 1640 UINT32 Signature; 1641 UINT16 PccCommand; 1642 UINT16 PccStatus; 1643 UINT32 CommandRegister; 1644 UINT32 StatusRegister; 1645 UINT32 PowerStateId; 1646 UINT32 PowerNodeId; 1647 UINT64 EnergyConsumed; 1648 UINT64 AveragePower; 1649 1650 } ACPI_MPST_SHARED; 1651 1652 1653 /******************************************************************************* 1654 * 1655 * MSCT - Maximum System Characteristics Table (ACPI 4.0) 1656 * Version 1 1657 * 1658 ******************************************************************************/ 1659 1660 typedef struct acpi_table_msct 1661 { 1662 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1663 UINT32 ProximityOffset; /* Location of proximity info struct(s) */ 1664 UINT32 MaxProximityDomains;/* Max number of proximity domains */ 1665 UINT32 MaxClockDomains; /* Max number of clock domains */ 1666 UINT64 MaxAddress; /* Max physical address in system */ 1667 1668 } ACPI_TABLE_MSCT; 1669 1670 1671 /* Subtable - Maximum Proximity Domain Information. Version 1 */ 1672 1673 typedef struct acpi_msct_proximity 1674 { 1675 UINT8 Revision; 1676 UINT8 Length; 1677 UINT32 RangeStart; /* Start of domain range */ 1678 UINT32 RangeEnd; /* End of domain range */ 1679 UINT32 ProcessorCapacity; 1680 UINT64 MemoryCapacity; /* In bytes */ 1681 1682 } ACPI_MSCT_PROXIMITY; 1683 1684 1685 /******************************************************************************* 1686 * 1687 * MSDM - Microsoft Data Management table 1688 * 1689 * Conforms to "Microsoft Software Licensing Tables (SLIC and MSDM)", 1690 * November 29, 2011. Copyright 2011 Microsoft 1691 * 1692 ******************************************************************************/ 1693 1694 /* Basic MSDM table is only the common ACPI header */ 1695 1696 typedef struct acpi_table_msdm 1697 { 1698 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1699 1700 } ACPI_TABLE_MSDM; 1701 1702 1703 /******************************************************************************* 1704 * 1705 * NFIT - NVDIMM Interface Table (ACPI 6.0+) 1706 * Version 1 1707 * 1708 ******************************************************************************/ 1709 1710 typedef struct acpi_table_nfit 1711 { 1712 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1713 UINT32 Reserved; /* Reserved, must be zero */ 1714 1715 } ACPI_TABLE_NFIT; 1716 1717 /* Subtable header for NFIT */ 1718 1719 typedef struct acpi_nfit_header 1720 { 1721 UINT16 Type; 1722 UINT16 Length; 1723 1724 } ACPI_NFIT_HEADER; 1725 1726 1727 /* Values for subtable type in ACPI_NFIT_HEADER */ 1728 1729 enum AcpiNfitType 1730 { 1731 ACPI_NFIT_TYPE_SYSTEM_ADDRESS = 0, 1732 ACPI_NFIT_TYPE_MEMORY_MAP = 1, 1733 ACPI_NFIT_TYPE_INTERLEAVE = 2, 1734 ACPI_NFIT_TYPE_SMBIOS = 3, 1735 ACPI_NFIT_TYPE_CONTROL_REGION = 4, 1736 ACPI_NFIT_TYPE_DATA_REGION = 5, 1737 ACPI_NFIT_TYPE_FLUSH_ADDRESS = 6, 1738 ACPI_NFIT_TYPE_CAPABILITIES = 7, 1739 ACPI_NFIT_TYPE_RESERVED = 8 /* 8 and greater are reserved */ 1740 }; 1741 1742 /* 1743 * NFIT Subtables 1744 */ 1745 1746 /* 0: System Physical Address Range Structure */ 1747 1748 typedef struct acpi_nfit_system_address 1749 { 1750 ACPI_NFIT_HEADER Header; 1751 UINT16 RangeIndex; 1752 UINT16 Flags; 1753 UINT32 Reserved; /* Reserved, must be zero */ 1754 UINT32 ProximityDomain; 1755 UINT8 RangeGuid[16]; 1756 UINT64 Address; 1757 UINT64 Length; 1758 UINT64 MemoryMapping; 1759 UINT64 LocationCookie; /* ACPI 6.4 */ 1760 1761 } ACPI_NFIT_SYSTEM_ADDRESS; 1762 1763 /* Flags */ 1764 1765 #define ACPI_NFIT_ADD_ONLINE_ONLY (1) /* 00: Add/Online Operation Only */ 1766 #define ACPI_NFIT_PROXIMITY_VALID (1<<1) /* 01: Proximity Domain Valid */ 1767 #define ACPI_NFIT_LOCATION_COOKIE_VALID (1<<2) /* 02: SPA location cookie valid (ACPI 6.4) */ 1768 1769 /* Range Type GUIDs appear in the include/acuuid.h file */ 1770 1771 1772 /* 1: Memory Device to System Address Range Map Structure */ 1773 1774 typedef struct acpi_nfit_memory_map 1775 { 1776 ACPI_NFIT_HEADER Header; 1777 UINT32 DeviceHandle; 1778 UINT16 PhysicalId; 1779 UINT16 RegionId; 1780 UINT16 RangeIndex; 1781 UINT16 RegionIndex; 1782 UINT64 RegionSize; 1783 UINT64 RegionOffset; 1784 UINT64 Address; 1785 UINT16 InterleaveIndex; 1786 UINT16 InterleaveWays; 1787 UINT16 Flags; 1788 UINT16 Reserved; /* Reserved, must be zero */ 1789 1790 } ACPI_NFIT_MEMORY_MAP; 1791 1792 /* Flags */ 1793 1794 #define ACPI_NFIT_MEM_SAVE_FAILED (1) /* 00: Last SAVE to Memory Device failed */ 1795 #define ACPI_NFIT_MEM_RESTORE_FAILED (1<<1) /* 01: Last RESTORE from Memory Device failed */ 1796 #define ACPI_NFIT_MEM_FLUSH_FAILED (1<<2) /* 02: Platform flush failed */ 1797 #define ACPI_NFIT_MEM_NOT_ARMED (1<<3) /* 03: Memory Device is not armed */ 1798 #define ACPI_NFIT_MEM_HEALTH_OBSERVED (1<<4) /* 04: Memory Device observed SMART/health events */ 1799 #define ACPI_NFIT_MEM_HEALTH_ENABLED (1<<5) /* 05: SMART/health events enabled */ 1800 #define ACPI_NFIT_MEM_MAP_FAILED (1<<6) /* 06: Mapping to SPA failed */ 1801 1802 1803 /* 2: Interleave Structure */ 1804 1805 typedef struct acpi_nfit_interleave 1806 { 1807 ACPI_NFIT_HEADER Header; 1808 UINT16 InterleaveIndex; 1809 UINT16 Reserved; /* Reserved, must be zero */ 1810 UINT32 LineCount; 1811 UINT32 LineSize; 1812 UINT32 LineOffset[1]; /* Variable length */ 1813 1814 } ACPI_NFIT_INTERLEAVE; 1815 1816 1817 /* 3: SMBIOS Management Information Structure */ 1818 1819 typedef struct acpi_nfit_smbios 1820 { 1821 ACPI_NFIT_HEADER Header; 1822 UINT32 Reserved; /* Reserved, must be zero */ 1823 UINT8 Data[1]; /* Variable length */ 1824 1825 } ACPI_NFIT_SMBIOS; 1826 1827 1828 /* 4: NVDIMM Control Region Structure */ 1829 1830 typedef struct acpi_nfit_control_region 1831 { 1832 ACPI_NFIT_HEADER Header; 1833 UINT16 RegionIndex; 1834 UINT16 VendorId; 1835 UINT16 DeviceId; 1836 UINT16 RevisionId; 1837 UINT16 SubsystemVendorId; 1838 UINT16 SubsystemDeviceId; 1839 UINT16 SubsystemRevisionId; 1840 UINT8 ValidFields; 1841 UINT8 ManufacturingLocation; 1842 UINT16 ManufacturingDate; 1843 UINT8 Reserved[2]; /* Reserved, must be zero */ 1844 UINT32 SerialNumber; 1845 UINT16 Code; 1846 UINT16 Windows; 1847 UINT64 WindowSize; 1848 UINT64 CommandOffset; 1849 UINT64 CommandSize; 1850 UINT64 StatusOffset; 1851 UINT64 StatusSize; 1852 UINT16 Flags; 1853 UINT8 Reserved1[6]; /* Reserved, must be zero */ 1854 1855 } ACPI_NFIT_CONTROL_REGION; 1856 1857 /* Flags */ 1858 1859 #define ACPI_NFIT_CONTROL_BUFFERED (1) /* Block Data Windows implementation is buffered */ 1860 1861 /* ValidFields bits */ 1862 1863 #define ACPI_NFIT_CONTROL_MFG_INFO_VALID (1) /* Manufacturing fields are valid */ 1864 1865 1866 /* 5: NVDIMM Block Data Window Region Structure */ 1867 1868 typedef struct acpi_nfit_data_region 1869 { 1870 ACPI_NFIT_HEADER Header; 1871 UINT16 RegionIndex; 1872 UINT16 Windows; 1873 UINT64 Offset; 1874 UINT64 Size; 1875 UINT64 Capacity; 1876 UINT64 StartAddress; 1877 1878 } ACPI_NFIT_DATA_REGION; 1879 1880 1881 /* 6: Flush Hint Address Structure */ 1882 1883 typedef struct acpi_nfit_flush_address 1884 { 1885 ACPI_NFIT_HEADER Header; 1886 UINT32 DeviceHandle; 1887 UINT16 HintCount; 1888 UINT8 Reserved[6]; /* Reserved, must be zero */ 1889 UINT64 HintAddress[1]; /* Variable length */ 1890 1891 } ACPI_NFIT_FLUSH_ADDRESS; 1892 1893 1894 /* 7: Platform Capabilities Structure */ 1895 1896 typedef struct acpi_nfit_capabilities 1897 { 1898 ACPI_NFIT_HEADER Header; 1899 UINT8 HighestCapability; 1900 UINT8 Reserved[3]; /* Reserved, must be zero */ 1901 UINT32 Capabilities; 1902 UINT32 Reserved2; 1903 1904 } ACPI_NFIT_CAPABILITIES; 1905 1906 /* Capabilities Flags */ 1907 1908 #define ACPI_NFIT_CAPABILITY_CACHE_FLUSH (1) /* 00: Cache Flush to NVDIMM capable */ 1909 #define ACPI_NFIT_CAPABILITY_MEM_FLUSH (1<<1) /* 01: Memory Flush to NVDIMM capable */ 1910 #define ACPI_NFIT_CAPABILITY_MEM_MIRRORING (1<<2) /* 02: Memory Mirroring capable */ 1911 1912 1913 /* 1914 * NFIT/DVDIMM device handle support - used as the _ADR for each NVDIMM 1915 */ 1916 typedef struct nfit_device_handle 1917 { 1918 UINT32 Handle; 1919 1920 } NFIT_DEVICE_HANDLE; 1921 1922 /* Device handle construction and extraction macros */ 1923 1924 #define ACPI_NFIT_DIMM_NUMBER_MASK 0x0000000F 1925 #define ACPI_NFIT_CHANNEL_NUMBER_MASK 0x000000F0 1926 #define ACPI_NFIT_MEMORY_ID_MASK 0x00000F00 1927 #define ACPI_NFIT_SOCKET_ID_MASK 0x0000F000 1928 #define ACPI_NFIT_NODE_ID_MASK 0x0FFF0000 1929 1930 #define ACPI_NFIT_DIMM_NUMBER_OFFSET 0 1931 #define ACPI_NFIT_CHANNEL_NUMBER_OFFSET 4 1932 #define ACPI_NFIT_MEMORY_ID_OFFSET 8 1933 #define ACPI_NFIT_SOCKET_ID_OFFSET 12 1934 #define ACPI_NFIT_NODE_ID_OFFSET 16 1935 1936 /* Macro to construct a NFIT/NVDIMM device handle */ 1937 1938 #define ACPI_NFIT_BUILD_DEVICE_HANDLE(dimm, channel, memory, socket, node) \ 1939 ((dimm) | \ 1940 ((channel) << ACPI_NFIT_CHANNEL_NUMBER_OFFSET) | \ 1941 ((memory) << ACPI_NFIT_MEMORY_ID_OFFSET) | \ 1942 ((socket) << ACPI_NFIT_SOCKET_ID_OFFSET) | \ 1943 ((node) << ACPI_NFIT_NODE_ID_OFFSET)) 1944 1945 /* Macros to extract individual fields from a NFIT/NVDIMM device handle */ 1946 1947 #define ACPI_NFIT_GET_DIMM_NUMBER(handle) \ 1948 ((handle) & ACPI_NFIT_DIMM_NUMBER_MASK) 1949 1950 #define ACPI_NFIT_GET_CHANNEL_NUMBER(handle) \ 1951 (((handle) & ACPI_NFIT_CHANNEL_NUMBER_MASK) >> ACPI_NFIT_CHANNEL_NUMBER_OFFSET) 1952 1953 #define ACPI_NFIT_GET_MEMORY_ID(handle) \ 1954 (((handle) & ACPI_NFIT_MEMORY_ID_MASK) >> ACPI_NFIT_MEMORY_ID_OFFSET) 1955 1956 #define ACPI_NFIT_GET_SOCKET_ID(handle) \ 1957 (((handle) & ACPI_NFIT_SOCKET_ID_MASK) >> ACPI_NFIT_SOCKET_ID_OFFSET) 1958 1959 #define ACPI_NFIT_GET_NODE_ID(handle) \ 1960 (((handle) & ACPI_NFIT_NODE_ID_MASK) >> ACPI_NFIT_NODE_ID_OFFSET) 1961 1962 1963 /******************************************************************************* 1964 * 1965 * NHLT - Non HD Audio Link Table 1966 * 1967 * Conforms to: Intel Smart Sound Technology NHLT Specification 1968 * Version 0.8.1, January 2020. 1969 * 1970 ******************************************************************************/ 1971 1972 /* Main table */ 1973 1974 typedef struct acpi_table_nhlt 1975 { 1976 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1977 UINT8 EndpointCount; 1978 1979 } ACPI_TABLE_NHLT; 1980 1981 typedef struct acpi_table_nhlt_endpoint_count 1982 { 1983 UINT8 EndpointCount; 1984 1985 } ACPI_TABLE_NHLT_ENDPOINT_COUNT; 1986 1987 typedef struct acpi_nhlt_endpoint 1988 { 1989 UINT32 DescriptorLength; 1990 UINT8 LinkType; 1991 UINT8 InstanceId; 1992 UINT16 VendorId; 1993 UINT16 DeviceId; 1994 UINT16 RevisionId; 1995 UINT32 SubsystemId; 1996 UINT8 DeviceType; 1997 UINT8 Direction; 1998 UINT8 VirtualBusId; 1999 2000 } ACPI_NHLT_ENDPOINT; 2001 2002 /* Types for LinkType field above */ 2003 2004 #define ACPI_NHLT_RESERVED_HD_AUDIO 0 2005 #define ACPI_NHLT_RESERVED_DSP 1 2006 #define ACPI_NHLT_PDM 2 2007 #define ACPI_NHLT_SSP 3 2008 #define ACPI_NHLT_RESERVED_SLIMBUS 4 2009 #define ACPI_NHLT_RESERVED_SOUNDWIRE 5 2010 #define ACPI_NHLT_TYPE_RESERVED 6 /* 6 and above are reserved */ 2011 2012 /* All other values above are reserved */ 2013 2014 /* Values for DeviceId field above */ 2015 2016 #define ACPI_NHLT_PDM_DMIC 0xAE20 2017 #define ACPI_NHLT_BT_SIDEBAND 0xAE30 2018 #define ACPI_NHLT_I2S_TDM_CODECS 0xAE23 2019 2020 /* Values for DeviceType field above */ 2021 2022 /* SSP Link */ 2023 2024 #define ACPI_NHLT_LINK_BT_SIDEBAND 0 2025 #define ACPI_NHLT_LINK_FM 1 2026 #define ACPI_NHLT_LINK_MODEM 2 2027 /* 3 is reserved */ 2028 #define ACPI_NHLT_LINK_SSP_ANALOG_CODEC 4 2029 2030 /* PDM Link */ 2031 2032 #define ACPI_NHLT_PDM_ON_CAVS_1P8 0 2033 #define ACPI_NHLT_PDM_ON_CAVS_1P5 1 2034 2035 /* Values for Direction field above */ 2036 2037 #define ACPI_NHLT_DIR_RENDER 0 2038 #define ACPI_NHLT_DIR_CAPTURE 1 2039 #define ACPI_NHLT_DIR_RENDER_LOOPBACK 2 2040 #define ACPI_NHLT_DIR_RENDER_FEEDBACK 3 2041 #define ACPI_NHLT_DIR_RESERVED 4 /* 4 and above are reserved */ 2042 2043 /* Capabilities = 2 */ 2044 2045 typedef struct acpi_nhlt_device_specific_config 2046 { 2047 UINT32 CapabilitiesSize; 2048 UINT8 VirtualSlot; 2049 UINT8 ConfigType; 2050 2051 } ACPI_NHLT_DEVICE_SPECIFIC_CONFIG; 2052 2053 /* Capabilities = 3 */ 2054 2055 typedef struct acpi_nhlt_device_specific_config_a 2056 { 2057 UINT32 CapabilitiesSize; 2058 UINT8 VirtualSlot; 2059 UINT8 ConfigType; 2060 UINT8 ArrayType; 2061 2062 } ACPI_NHLT_DEVICE_SPECIFIC_CONFIG_A; 2063 2064 /* Capabilities = 3 */ 2065 2066 typedef struct acpi_nhlt_device_specific_config_d 2067 { 2068 UINT8 VirtualSlot; 2069 UINT8 ConfigType; 2070 UINT8 ArrayType; 2071 2072 } ACPI_NHLT_DEVICE_SPECIFIC_CONFIG_D; 2073 2074 /* Values for Config Type above */ 2075 2076 #define ACPI_NHLT_CONFIG_TYPE_GENERIC 0x00 2077 #define ACPI_NHLT_CONFIG_TYPE_MIC_ARRAY 0x01 2078 #define ACPI_NHLT_CONFIG_TYPE_RENDER_FEEDBACK 0x03 2079 #define ACPI_NHLT_CONFIG_TYPE_RESERVED 0x04 /* 4 and above are reserved */ 2080 2081 /* Capabilities = 0 */ 2082 2083 typedef struct acpi_nhlt_device_specific_config_b 2084 { 2085 UINT32 CapabilitiesSize; 2086 2087 } ACPI_NHLT_DEVICE_SPECIFIC_CONFIG_B; 2088 2089 /* Capabilities = 1 */ 2090 2091 typedef struct acpi_nhlt_device_specific_config_c 2092 { 2093 UINT32 CapabilitiesSize; 2094 UINT8 VirtualSlot; 2095 2096 } ACPI_NHLT_DEVICE_SPECIFIC_CONFIG_C; 2097 2098 typedef struct acpi_nhlt_render_device_specific_config 2099 { 2100 UINT32 CapabilitiesSize; 2101 UINT8 VirtualSlot; 2102 2103 } ACPI_NHLT_RENDER_DEVICE_SPECIFIC_CONFIG; 2104 2105 typedef struct acpi_nhlt_wave_extensible 2106 { 2107 UINT16 FormatTag; 2108 UINT16 ChannelCount; 2109 UINT32 SamplesPerSec; 2110 UINT32 AvgBytesPerSec; 2111 UINT16 BlockAlign; 2112 UINT16 BitsPerSample; 2113 UINT16 ExtraFormatSize; 2114 UINT16 ValidBitsPerSample; 2115 UINT32 ChannelMask; 2116 UINT8 SubFormatGuid[16]; 2117 2118 } ACPI_NHLT_WAVE_EXTENSIBLE; 2119 2120 /* Values for ChannelMask above */ 2121 2122 #define ACPI_NHLT_SPKR_FRONT_LEFT 0x1 2123 #define ACPI_NHLT_SPKR_FRONT_RIGHT 0x2 2124 #define ACPI_NHLT_SPKR_FRONT_CENTER 0x4 2125 #define ACPI_NHLT_SPKR_LOW_FREQ 0x8 2126 #define ACPI_NHLT_SPKR_BACK_LEFT 0x10 2127 #define ACPI_NHLT_SPKR_BACK_RIGHT 0x20 2128 #define ACPI_NHLT_SPKR_FRONT_LEFT_OF_CENTER 0x40 2129 #define ACPI_NHLT_SPKR_FRONT_RIGHT_OF_CENTER 0x80 2130 #define ACPI_NHLT_SPKR_BACK_CENTER 0x100 2131 #define ACPI_NHLT_SPKR_SIDE_LEFT 0x200 2132 #define ACPI_NHLT_SPKR_SIDE_RIGHT 0x400 2133 #define ACPI_NHLT_SPKR_TOP_CENTER 0x800 2134 #define ACPI_NHLT_SPKR_TOP_FRONT_LEFT 0x1000 2135 #define ACPI_NHLT_SPKR_TOP_FRONT_CENTER 0x2000 2136 #define ACPI_NHLT_SPKR_TOP_FRONT_RIGHT 0x4000 2137 #define ACPI_NHLT_SPKR_TOP_BACK_LEFT 0x8000 2138 #define ACPI_NHLT_SPKR_TOP_BACK_CENTER 0x10000 2139 #define ACPI_NHLT_SPKR_TOP_BACK_RIGHT 0x20000 2140 2141 typedef struct acpi_nhlt_format_config 2142 { 2143 ACPI_NHLT_WAVE_EXTENSIBLE Format; 2144 UINT32 CapabilitySize; 2145 UINT8 Capabilities[]; 2146 2147 } ACPI_NHLT_FORMAT_CONFIG; 2148 2149 typedef struct acpi_nhlt_formats_config 2150 { 2151 UINT8 FormatsCount; 2152 2153 } ACPI_NHLT_FORMATS_CONFIG; 2154 2155 typedef struct acpi_nhlt_device_specific_hdr 2156 { 2157 UINT8 VirtualSlot; 2158 UINT8 ConfigType; 2159 2160 } ACPI_NHLT_DEVICE_SPECIFIC_HDR; 2161 2162 /* Types for ConfigType above */ 2163 2164 #define ACPI_NHLT_GENERIC 0 2165 #define ACPI_NHLT_MIC 1 2166 #define ACPI_NHLT_RENDER 3 2167 2168 typedef struct acpi_nhlt_mic_device_specific_config 2169 { 2170 ACPI_NHLT_DEVICE_SPECIFIC_HDR DeviceConfig; 2171 UINT8 ArrayTypeExt; 2172 2173 } ACPI_NHLT_MIC_DEVICE_SPECIFIC_CONFIG; 2174 2175 /* Values for ArrayTypeExt above */ 2176 2177 #define ACPI_NHLT_ARRAY_TYPE_RESERVED 0x09 /* 9 and below are reserved */ 2178 #define ACPI_NHLT_SMALL_LINEAR_2ELEMENT 0x0A 2179 #define ACPI_NHLT_BIG_LINEAR_2ELEMENT 0x0B 2180 #define ACPI_NHLT_FIRST_GEOMETRY_LINEAR_4ELEMENT 0x0C 2181 #define ACPI_NHLT_PLANAR_LSHAPED_4ELEMENT 0x0D 2182 #define ACPI_NHLT_SECOND_GEOMETRY_LINEAR_4ELEMENT 0x0E 2183 #define ACPI_NHLT_VENDOR_DEFINED 0x0F 2184 #define ACPI_NHLT_ARRAY_TYPE_MASK 0x0F 2185 #define ACPI_NHLT_ARRAY_TYPE_EXT_MASK 0x10 2186 2187 #define ACPI_NHLT_NO_EXTENSION 0x0 2188 #define ACPI_NHLT_MIC_SNR_SENSITIVITY_EXT (1<<4) 2189 2190 typedef struct acpi_nhlt_vendor_mic_count 2191 { 2192 UINT8 MicrophoneCount; 2193 2194 } ACPI_NHLT_VENDOR_MIC_COUNT; 2195 2196 typedef struct acpi_nhlt_vendor_mic_config 2197 { 2198 UINT8 Type; 2199 UINT8 Panel; 2200 UINT16 SpeakerPositionDistance; /* mm */ 2201 UINT16 HorizontalOffset; /* mm */ 2202 UINT16 VerticalOffset; /* mm */ 2203 UINT8 FrequencyLowBand; /* 5*Hz */ 2204 UINT8 FrequencyHighBand; /* 500*Hz */ 2205 UINT16 DirectionAngle; /* -180 - + 180 */ 2206 UINT16 ElevationAngle; /* -180 - + 180 */ 2207 UINT16 WorkVerticalAngleBegin; /* -180 - + 180 with 2 deg step */ 2208 UINT16 WorkVerticalAngleEnd; /* -180 - + 180 with 2 deg step */ 2209 UINT16 WorkHorizontalAngleBegin; /* -180 - + 180 with 2 deg step */ 2210 UINT16 WorkHorizontalAngleEnd; /* -180 - + 180 with 2 deg step */ 2211 2212 } ACPI_NHLT_VENDOR_MIC_CONFIG; 2213 2214 /* Values for Type field above */ 2215 2216 #define ACPI_NHLT_MIC_OMNIDIRECTIONAL 0 2217 #define ACPI_NHLT_MIC_SUBCARDIOID 1 2218 #define ACPI_NHLT_MIC_CARDIOID 2 2219 #define ACPI_NHLT_MIC_SUPER_CARDIOID 3 2220 #define ACPI_NHLT_MIC_HYPER_CARDIOID 4 2221 #define ACPI_NHLT_MIC_8_SHAPED 5 2222 #define ACPI_NHLT_MIC_RESERVED6 6 /* 6 is reserved */ 2223 #define ACPI_NHLT_MIC_VENDOR_DEFINED 7 2224 #define ACPI_NHLT_MIC_RESERVED 8 /* 8 and above are reserved */ 2225 2226 /* Values for Panel field above */ 2227 2228 #define ACPI_NHLT_MIC_POSITION_TOP 0 2229 #define ACPI_NHLT_MIC_POSITION_BOTTOM 1 2230 #define ACPI_NHLT_MIC_POSITION_LEFT 2 2231 #define ACPI_NHLT_MIC_POSITION_RIGHT 3 2232 #define ACPI_NHLT_MIC_POSITION_FRONT 4 2233 #define ACPI_NHLT_MIC_POSITION_BACK 5 2234 #define ACPI_NHLT_MIC_POSITION_RESERVED 6 /* 6 and above are reserved */ 2235 2236 typedef struct acpi_nhlt_vendor_mic_device_specific_config 2237 { 2238 ACPI_NHLT_MIC_DEVICE_SPECIFIC_CONFIG MicArrayDeviceConfig; 2239 UINT8 NumberOfMicrophones; 2240 ACPI_NHLT_VENDOR_MIC_CONFIG MicConfig[]; /* Indexed by NumberOfMicrophones */ 2241 2242 } ACPI_NHLT_VENDOR_MIC_DEVICE_SPECIFIC_CONFIG; 2243 2244 /* Microphone SNR and Sensitivity extension */ 2245 2246 typedef struct acpi_nhlt_mic_snr_sensitivity_extension 2247 { 2248 UINT32 SNR; 2249 UINT32 Sensitivity; 2250 2251 } ACPI_NHLT_MIC_SNR_SENSITIVITY_EXTENSION; 2252 2253 /* Render device with feedback */ 2254 2255 typedef struct acpi_nhlt_render_feedback_device_specific_config 2256 { 2257 UINT8 FeedbackVirtualSlot; /* Render slot in case of capture */ 2258 UINT16 FeedbackChannels; /* Informative only */ 2259 UINT16 FeedbackValidBitsPerSample; 2260 2261 } ACPI_NHLT_RENDER_FEEDBACK_DEVICE_SPECIFIC_CONFIG; 2262 2263 /* Non documented structures */ 2264 2265 typedef struct acpi_nhlt_device_info_count 2266 { 2267 UINT8 StructureCount; 2268 2269 } ACPI_NHLT_DEVICE_INFO_COUNT; 2270 2271 typedef struct acpi_nhlt_device_info 2272 { 2273 UINT8 DeviceId[16]; 2274 UINT8 DeviceInstanceId; 2275 UINT8 DevicePortId; 2276 2277 } ACPI_NHLT_DEVICE_INFO; 2278 2279 2280 /******************************************************************************* 2281 * 2282 * PCCT - Platform Communications Channel Table (ACPI 5.0) 2283 * Version 2 (ACPI 6.2) 2284 * 2285 ******************************************************************************/ 2286 2287 typedef struct acpi_table_pcct 2288 { 2289 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 2290 UINT32 Flags; 2291 UINT64 Reserved; 2292 2293 } ACPI_TABLE_PCCT; 2294 2295 /* Values for Flags field above */ 2296 2297 #define ACPI_PCCT_DOORBELL 1 2298 2299 /* Values for subtable type in ACPI_SUBTABLE_HEADER */ 2300 2301 enum AcpiPcctType 2302 { 2303 ACPI_PCCT_TYPE_GENERIC_SUBSPACE = 0, 2304 ACPI_PCCT_TYPE_HW_REDUCED_SUBSPACE = 1, 2305 ACPI_PCCT_TYPE_HW_REDUCED_SUBSPACE_TYPE2 = 2, /* ACPI 6.1 */ 2306 ACPI_PCCT_TYPE_EXT_PCC_MASTER_SUBSPACE = 3, /* ACPI 6.2 */ 2307 ACPI_PCCT_TYPE_EXT_PCC_SLAVE_SUBSPACE = 4, /* ACPI 6.2 */ 2308 ACPI_PCCT_TYPE_HW_REG_COMM_SUBSPACE = 5, /* ACPI 6.4 */ 2309 ACPI_PCCT_TYPE_RESERVED = 6 /* 6 and greater are reserved */ 2310 }; 2311 2312 /* 2313 * PCCT Subtables, correspond to Type in ACPI_SUBTABLE_HEADER 2314 */ 2315 2316 /* 0: Generic Communications Subspace */ 2317 2318 typedef struct acpi_pcct_subspace 2319 { 2320 ACPI_SUBTABLE_HEADER Header; 2321 UINT8 Reserved[6]; 2322 UINT64 BaseAddress; 2323 UINT64 Length; 2324 ACPI_GENERIC_ADDRESS DoorbellRegister; 2325 UINT64 PreserveMask; 2326 UINT64 WriteMask; 2327 UINT32 Latency; 2328 UINT32 MaxAccessRate; 2329 UINT16 MinTurnaroundTime; 2330 2331 } ACPI_PCCT_SUBSPACE; 2332 2333 2334 /* 1: HW-reduced Communications Subspace (ACPI 5.1) */ 2335 2336 typedef struct acpi_pcct_hw_reduced 2337 { 2338 ACPI_SUBTABLE_HEADER Header; 2339 UINT32 PlatformInterrupt; 2340 UINT8 Flags; 2341 UINT8 Reserved; 2342 UINT64 BaseAddress; 2343 UINT64 Length; 2344 ACPI_GENERIC_ADDRESS DoorbellRegister; 2345 UINT64 PreserveMask; 2346 UINT64 WriteMask; 2347 UINT32 Latency; 2348 UINT32 MaxAccessRate; 2349 UINT16 MinTurnaroundTime; 2350 2351 } ACPI_PCCT_HW_REDUCED; 2352 2353 2354 /* 2: HW-reduced Communications Subspace Type 2 (ACPI 6.1) */ 2355 2356 typedef struct acpi_pcct_hw_reduced_type2 2357 { 2358 ACPI_SUBTABLE_HEADER Header; 2359 UINT32 PlatformInterrupt; 2360 UINT8 Flags; 2361 UINT8 Reserved; 2362 UINT64 BaseAddress; 2363 UINT64 Length; 2364 ACPI_GENERIC_ADDRESS DoorbellRegister; 2365 UINT64 PreserveMask; 2366 UINT64 WriteMask; 2367 UINT32 Latency; 2368 UINT32 MaxAccessRate; 2369 UINT16 MinTurnaroundTime; 2370 ACPI_GENERIC_ADDRESS PlatformAckRegister; 2371 UINT64 AckPreserveMask; 2372 UINT64 AckWriteMask; 2373 2374 } ACPI_PCCT_HW_REDUCED_TYPE2; 2375 2376 2377 /* 3: Extended PCC Master Subspace Type 3 (ACPI 6.2) */ 2378 2379 typedef struct acpi_pcct_ext_pcc_master 2380 { 2381 ACPI_SUBTABLE_HEADER Header; 2382 UINT32 PlatformInterrupt; 2383 UINT8 Flags; 2384 UINT8 Reserved1; 2385 UINT64 BaseAddress; 2386 UINT32 Length; 2387 ACPI_GENERIC_ADDRESS DoorbellRegister; 2388 UINT64 PreserveMask; 2389 UINT64 WriteMask; 2390 UINT32 Latency; 2391 UINT32 MaxAccessRate; 2392 UINT32 MinTurnaroundTime; 2393 ACPI_GENERIC_ADDRESS PlatformAckRegister; 2394 UINT64 AckPreserveMask; 2395 UINT64 AckSetMask; 2396 UINT64 Reserved2; 2397 ACPI_GENERIC_ADDRESS CmdCompleteRegister; 2398 UINT64 CmdCompleteMask; 2399 ACPI_GENERIC_ADDRESS CmdUpdateRegister; 2400 UINT64 CmdUpdatePreserveMask; 2401 UINT64 CmdUpdateSetMask; 2402 ACPI_GENERIC_ADDRESS ErrorStatusRegister; 2403 UINT64 ErrorStatusMask; 2404 2405 } ACPI_PCCT_EXT_PCC_MASTER; 2406 2407 2408 /* 4: Extended PCC Slave Subspace Type 4 (ACPI 6.2) */ 2409 2410 typedef struct acpi_pcct_ext_pcc_slave 2411 { 2412 ACPI_SUBTABLE_HEADER Header; 2413 UINT32 PlatformInterrupt; 2414 UINT8 Flags; 2415 UINT8 Reserved1; 2416 UINT64 BaseAddress; 2417 UINT32 Length; 2418 ACPI_GENERIC_ADDRESS DoorbellRegister; 2419 UINT64 PreserveMask; 2420 UINT64 WriteMask; 2421 UINT32 Latency; 2422 UINT32 MaxAccessRate; 2423 UINT32 MinTurnaroundTime; 2424 ACPI_GENERIC_ADDRESS PlatformAckRegister; 2425 UINT64 AckPreserveMask; 2426 UINT64 AckSetMask; 2427 UINT64 Reserved2; 2428 ACPI_GENERIC_ADDRESS CmdCompleteRegister; 2429 UINT64 CmdCompleteMask; 2430 ACPI_GENERIC_ADDRESS CmdUpdateRegister; 2431 UINT64 CmdUpdatePreserveMask; 2432 UINT64 CmdUpdateSetMask; 2433 ACPI_GENERIC_ADDRESS ErrorStatusRegister; 2434 UINT64 ErrorStatusMask; 2435 2436 } ACPI_PCCT_EXT_PCC_SLAVE; 2437 2438 /* 5: HW Registers based Communications Subspace */ 2439 2440 typedef struct acpi_pcct_hw_reg 2441 { 2442 ACPI_SUBTABLE_HEADER Header; 2443 UINT16 Version; 2444 UINT64 BaseAddress; 2445 UINT64 Length; 2446 ACPI_GENERIC_ADDRESS DoorbellRegister; 2447 UINT64 DoorbellPreserve; 2448 UINT64 DoorbellWrite; 2449 ACPI_GENERIC_ADDRESS CmdCompleteRegister; 2450 UINT64 CmdCompleteMask; 2451 ACPI_GENERIC_ADDRESS ErrorStatusRegister; 2452 UINT64 ErrorStatusMask; 2453 UINT32 NominalLatency; 2454 UINT32 MinTurnaroundTime; 2455 2456 } ACPI_PCCT_HW_REG; 2457 2458 2459 /* Values for doorbell flags above */ 2460 2461 #define ACPI_PCCT_INTERRUPT_POLARITY (1) 2462 #define ACPI_PCCT_INTERRUPT_MODE (1<<1) 2463 2464 2465 /* 2466 * PCC memory structures (not part of the ACPI table) 2467 */ 2468 2469 /* Shared Memory Region */ 2470 2471 typedef struct acpi_pcct_shared_memory 2472 { 2473 UINT32 Signature; 2474 UINT16 Command; 2475 UINT16 Status; 2476 2477 } ACPI_PCCT_SHARED_MEMORY; 2478 2479 2480 /* Extended PCC Subspace Shared Memory Region (ACPI 6.2) */ 2481 2482 typedef struct acpi_pcct_ext_pcc_shared_memory 2483 { 2484 UINT32 Signature; 2485 UINT32 Flags; 2486 UINT32 Length; 2487 UINT32 Command; 2488 2489 } ACPI_PCCT_EXT_PCC_SHARED_MEMORY; 2490 2491 2492 /******************************************************************************* 2493 * 2494 * PDTT - Platform Debug Trigger Table (ACPI 6.2) 2495 * Version 0 2496 * 2497 ******************************************************************************/ 2498 2499 typedef struct acpi_table_pdtt 2500 { 2501 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 2502 UINT8 TriggerCount; 2503 UINT8 Reserved[3]; 2504 UINT32 ArrayOffset; 2505 2506 } ACPI_TABLE_PDTT; 2507 2508 2509 /* 2510 * PDTT Communication Channel Identifier Structure. 2511 * The number of these structures is defined by TriggerCount above, 2512 * starting at ArrayOffset. 2513 */ 2514 typedef struct acpi_pdtt_channel 2515 { 2516 UINT8 SubchannelId; 2517 UINT8 Flags; 2518 2519 } ACPI_PDTT_CHANNEL; 2520 2521 /* Flags for above */ 2522 2523 #define ACPI_PDTT_RUNTIME_TRIGGER (1) 2524 #define ACPI_PDTT_WAIT_COMPLETION (1<<1) 2525 #define ACPI_PDTT_TRIGGER_ORDER (1<<2) 2526 2527 2528 /******************************************************************************* 2529 * 2530 * PHAT - Platform Health Assessment Table (ACPI 6.4) 2531 * Version 1 2532 * 2533 ******************************************************************************/ 2534 2535 typedef struct acpi_table_phat 2536 { 2537 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 2538 2539 } ACPI_TABLE_PHAT; 2540 2541 /* Common header for PHAT subtables that follow main table */ 2542 2543 typedef struct acpi_phat_header 2544 { 2545 UINT16 Type; 2546 UINT16 Length; 2547 UINT8 Revision; 2548 2549 } ACPI_PHAT_HEADER; 2550 2551 2552 /* Values for Type field above */ 2553 2554 #define ACPI_PHAT_TYPE_FW_VERSION_DATA 0 2555 #define ACPI_PHAT_TYPE_FW_HEALTH_DATA 1 2556 #define ACPI_PHAT_TYPE_RESERVED 2 /* 0x02-0xFFFF are reserved */ 2557 2558 /* 2559 * PHAT subtables, correspond to Type in ACPI_PHAT_HEADER 2560 */ 2561 2562 /* 0: Firmware Version Data Record */ 2563 2564 typedef struct acpi_phat_version_data 2565 { 2566 ACPI_PHAT_HEADER Header; 2567 UINT8 Reserved[3]; 2568 UINT32 ElementCount; 2569 2570 } ACPI_PHAT_VERSION_DATA; 2571 2572 typedef struct acpi_phat_version_element 2573 { 2574 UINT8 Guid[16]; 2575 UINT64 VersionValue; 2576 UINT32 ProducerId; 2577 2578 } ACPI_PHAT_VERSION_ELEMENT; 2579 2580 2581 /* 1: Firmware Health Data Record */ 2582 2583 typedef struct acpi_phat_health_data 2584 { 2585 ACPI_PHAT_HEADER Header; 2586 UINT8 Reserved[2]; 2587 UINT8 Health; 2588 UINT8 DeviceGuid[16]; 2589 UINT32 DeviceSpecificOffset; /* Zero if no Device-specific data */ 2590 2591 } ACPI_PHAT_HEALTH_DATA; 2592 2593 /* Values for Health field above */ 2594 2595 #define ACPI_PHAT_ERRORS_FOUND 0 2596 #define ACPI_PHAT_NO_ERRORS 1 2597 #define ACPI_PHAT_UNKNOWN_ERRORS 2 2598 #define ACPI_PHAT_ADVISORY 3 2599 2600 2601 /******************************************************************************* 2602 * 2603 * PMTT - Platform Memory Topology Table (ACPI 5.0) 2604 * Version 1 2605 * 2606 ******************************************************************************/ 2607 2608 typedef struct acpi_table_pmtt 2609 { 2610 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 2611 UINT32 MemoryDeviceCount; 2612 /* 2613 * Immediately followed by: 2614 * MEMORY_DEVICE MemoryDeviceStruct[MemoryDeviceCount]; 2615 */ 2616 2617 } ACPI_TABLE_PMTT; 2618 2619 2620 /* Common header for PMTT subtables that follow main table */ 2621 2622 typedef struct acpi_pmtt_header 2623 { 2624 UINT8 Type; 2625 UINT8 Reserved1; 2626 UINT16 Length; 2627 UINT16 Flags; 2628 UINT16 Reserved2; 2629 UINT32 MemoryDeviceCount; /* Zero means no memory device structs follow */ 2630 /* 2631 * Immediately followed by: 2632 * UINT8 TypeSpecificData[] 2633 * MEMORY_DEVICE MemoryDeviceStruct[MemoryDeviceCount]; 2634 */ 2635 2636 } ACPI_PMTT_HEADER; 2637 2638 /* Values for Type field above */ 2639 2640 #define ACPI_PMTT_TYPE_SOCKET 0 2641 #define ACPI_PMTT_TYPE_CONTROLLER 1 2642 #define ACPI_PMTT_TYPE_DIMM 2 2643 #define ACPI_PMTT_TYPE_RESERVED 3 /* 0x03-0xFE are reserved */ 2644 #define ACPI_PMTT_TYPE_VENDOR 0xFF 2645 2646 /* Values for Flags field above */ 2647 2648 #define ACPI_PMTT_TOP_LEVEL 0x0001 2649 #define ACPI_PMTT_PHYSICAL 0x0002 2650 #define ACPI_PMTT_MEMORY_TYPE 0x000C 2651 2652 2653 /* 2654 * PMTT subtables, correspond to Type in acpi_pmtt_header 2655 */ 2656 2657 2658 /* 0: Socket Structure */ 2659 2660 typedef struct acpi_pmtt_socket 2661 { 2662 ACPI_PMTT_HEADER Header; 2663 UINT16 SocketId; 2664 UINT16 Reserved; 2665 2666 } ACPI_PMTT_SOCKET; 2667 /* 2668 * Immediately followed by: 2669 * MEMORY_DEVICE MemoryDeviceStruct[MemoryDeviceCount]; 2670 */ 2671 2672 2673 /* 1: Memory Controller subtable */ 2674 2675 typedef struct acpi_pmtt_controller 2676 { 2677 ACPI_PMTT_HEADER Header; 2678 UINT16 ControllerId; 2679 UINT16 Reserved; 2680 2681 } ACPI_PMTT_CONTROLLER; 2682 /* 2683 * Immediately followed by: 2684 * MEMORY_DEVICE MemoryDeviceStruct[MemoryDeviceCount]; 2685 */ 2686 2687 2688 /* 2: Physical Component Identifier (DIMM) */ 2689 2690 typedef struct acpi_pmtt_physical_component 2691 { 2692 ACPI_PMTT_HEADER Header; 2693 UINT32 BiosHandle; 2694 2695 } ACPI_PMTT_PHYSICAL_COMPONENT; 2696 2697 2698 /* 0xFF: Vendor Specific Data */ 2699 2700 typedef struct acpi_pmtt_vendor_specific 2701 { 2702 ACPI_PMTT_HEADER Header; 2703 UINT8 TypeUuid[16]; 2704 UINT8 Specific[]; 2705 /* 2706 * Immediately followed by: 2707 * UINT8 VendorSpecificData[]; 2708 * MEMORY_DEVICE MemoryDeviceStruct[MemoryDeviceCount]; 2709 */ 2710 2711 } ACPI_PMTT_VENDOR_SPECIFIC; 2712 2713 2714 /******************************************************************************* 2715 * 2716 * PPTT - Processor Properties Topology Table (ACPI 6.2) 2717 * Version 1 2718 * 2719 ******************************************************************************/ 2720 2721 typedef struct acpi_table_pptt 2722 { 2723 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 2724 2725 } ACPI_TABLE_PPTT; 2726 2727 /* Values for Type field above */ 2728 2729 enum AcpiPpttType 2730 { 2731 ACPI_PPTT_TYPE_PROCESSOR = 0, 2732 ACPI_PPTT_TYPE_CACHE = 1, 2733 ACPI_PPTT_TYPE_ID = 2, 2734 ACPI_PPTT_TYPE_RESERVED = 3 2735 }; 2736 2737 2738 /* 0: Processor Hierarchy Node Structure */ 2739 2740 typedef struct acpi_pptt_processor 2741 { 2742 ACPI_SUBTABLE_HEADER Header; 2743 UINT16 Reserved; 2744 UINT32 Flags; 2745 UINT32 Parent; 2746 UINT32 AcpiProcessorId; 2747 UINT32 NumberOfPrivResources; 2748 2749 } ACPI_PPTT_PROCESSOR; 2750 2751 /* Flags */ 2752 2753 #define ACPI_PPTT_PHYSICAL_PACKAGE (1) 2754 #define ACPI_PPTT_ACPI_PROCESSOR_ID_VALID (1<<1) 2755 #define ACPI_PPTT_ACPI_PROCESSOR_IS_THREAD (1<<2) /* ACPI 6.3 */ 2756 #define ACPI_PPTT_ACPI_LEAF_NODE (1<<3) /* ACPI 6.3 */ 2757 #define ACPI_PPTT_ACPI_IDENTICAL (1<<4) /* ACPI 6.3 */ 2758 2759 2760 /* 1: Cache Type Structure */ 2761 2762 typedef struct acpi_pptt_cache 2763 { 2764 ACPI_SUBTABLE_HEADER Header; 2765 UINT16 Reserved; 2766 UINT32 Flags; 2767 UINT32 NextLevelOfCache; 2768 UINT32 Size; 2769 UINT32 NumberOfSets; 2770 UINT8 Associativity; 2771 UINT8 Attributes; 2772 UINT16 LineSize; 2773 2774 } ACPI_PPTT_CACHE; 2775 2776 /* 1: Cache Type Structure for PPTT version 3 */ 2777 2778 typedef struct acpi_pptt_cache_v1 2779 { 2780 UINT32 CacheId; 2781 2782 } ACPI_PPTT_CACHE_V1; 2783 2784 2785 /* Flags */ 2786 2787 #define ACPI_PPTT_SIZE_PROPERTY_VALID (1) /* Physical property valid */ 2788 #define ACPI_PPTT_NUMBER_OF_SETS_VALID (1<<1) /* Number of sets valid */ 2789 #define ACPI_PPTT_ASSOCIATIVITY_VALID (1<<2) /* Associativity valid */ 2790 #define ACPI_PPTT_ALLOCATION_TYPE_VALID (1<<3) /* Allocation type valid */ 2791 #define ACPI_PPTT_CACHE_TYPE_VALID (1<<4) /* Cache type valid */ 2792 #define ACPI_PPTT_WRITE_POLICY_VALID (1<<5) /* Write policy valid */ 2793 #define ACPI_PPTT_LINE_SIZE_VALID (1<<6) /* Line size valid */ 2794 #define ACPI_PPTT_CACHE_ID_VALID (1<<7) /* Cache ID valid */ 2795 2796 /* Masks for Attributes */ 2797 2798 #define ACPI_PPTT_MASK_ALLOCATION_TYPE (0x03) /* Allocation type */ 2799 #define ACPI_PPTT_MASK_CACHE_TYPE (0x0C) /* Cache type */ 2800 #define ACPI_PPTT_MASK_WRITE_POLICY (0x10) /* Write policy */ 2801 2802 /* Attributes describing cache */ 2803 #define ACPI_PPTT_CACHE_READ_ALLOCATE (0x0) /* Cache line is allocated on read */ 2804 #define ACPI_PPTT_CACHE_WRITE_ALLOCATE (0x01) /* Cache line is allocated on write */ 2805 #define ACPI_PPTT_CACHE_RW_ALLOCATE (0x02) /* Cache line is allocated on read and write */ 2806 #define ACPI_PPTT_CACHE_RW_ALLOCATE_ALT (0x03) /* Alternate representation of above */ 2807 2808 #define ACPI_PPTT_CACHE_TYPE_DATA (0x0) /* Data cache */ 2809 #define ACPI_PPTT_CACHE_TYPE_INSTR (1<<2) /* Instruction cache */ 2810 #define ACPI_PPTT_CACHE_TYPE_UNIFIED (2<<2) /* Unified I & D cache */ 2811 #define ACPI_PPTT_CACHE_TYPE_UNIFIED_ALT (3<<2) /* Alternate representation of above */ 2812 2813 #define ACPI_PPTT_CACHE_POLICY_WB (0x0) /* Cache is write back */ 2814 #define ACPI_PPTT_CACHE_POLICY_WT (1<<4) /* Cache is write through */ 2815 2816 /* 2: ID Structure */ 2817 2818 typedef struct acpi_pptt_id 2819 { 2820 ACPI_SUBTABLE_HEADER Header; 2821 UINT16 Reserved; 2822 UINT32 VendorId; 2823 UINT64 Level1Id; 2824 UINT64 Level2Id; 2825 UINT16 MajorRev; 2826 UINT16 MinorRev; 2827 UINT16 SpinRev; 2828 2829 } ACPI_PPTT_ID; 2830 2831 2832 /******************************************************************************* 2833 * 2834 * PRMT - Platform Runtime Mechanism Table 2835 * Version 1 2836 * 2837 ******************************************************************************/ 2838 2839 typedef struct acpi_table_prmt 2840 { 2841 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 2842 2843 } ACPI_TABLE_PRMT; 2844 2845 typedef struct acpi_table_prmt_header 2846 { 2847 UINT8 PlatformGuid[16]; 2848 UINT32 ModuleInfoOffset; 2849 UINT32 ModuleInfoCount; 2850 2851 } ACPI_TABLE_PRMT_HEADER; 2852 2853 typedef struct acpi_prmt_module_header 2854 { 2855 UINT16 Revision; 2856 UINT16 Length; 2857 2858 } ACPI_PRMT_MODULE_HEADER; 2859 2860 typedef struct acpi_prmt_module_info 2861 { 2862 UINT16 Revision; 2863 UINT16 Length; 2864 UINT8 ModuleGuid[16]; 2865 UINT16 MajorRev; 2866 UINT16 MinorRev; 2867 UINT16 HandlerInfoCount; 2868 UINT32 HandlerInfoOffset; 2869 UINT64 MmioListPointer; 2870 2871 } ACPI_PRMT_MODULE_INFO; 2872 2873 typedef struct acpi_prmt_handler_info 2874 { 2875 UINT16 Revision; 2876 UINT16 Length; 2877 UINT8 HandlerGuid[16]; 2878 UINT64 HandlerAddress; 2879 UINT64 StaticDataBufferAddress; 2880 UINT64 AcpiParamBufferAddress; 2881 2882 } ACPI_PRMT_HANDLER_INFO; 2883 2884 2885 /******************************************************************************* 2886 * 2887 * RASF - RAS Feature Table (ACPI 5.0) 2888 * Version 1 2889 * 2890 ******************************************************************************/ 2891 2892 typedef struct acpi_table_rasf 2893 { 2894 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 2895 UINT8 ChannelId[12]; 2896 2897 } ACPI_TABLE_RASF; 2898 2899 /* RASF Platform Communication Channel Shared Memory Region */ 2900 2901 typedef struct acpi_rasf_shared_memory 2902 { 2903 UINT32 Signature; 2904 UINT16 Command; 2905 UINT16 Status; 2906 UINT16 Version; 2907 UINT8 Capabilities[16]; 2908 UINT8 SetCapabilities[16]; 2909 UINT16 NumParameterBlocks; 2910 UINT32 SetCapabilitiesStatus; 2911 2912 } ACPI_RASF_SHARED_MEMORY; 2913 2914 /* RASF Parameter Block Structure Header */ 2915 2916 typedef struct acpi_rasf_parameter_block 2917 { 2918 UINT16 Type; 2919 UINT16 Version; 2920 UINT16 Length; 2921 2922 } ACPI_RASF_PARAMETER_BLOCK; 2923 2924 /* RASF Parameter Block Structure for PATROL_SCRUB */ 2925 2926 typedef struct acpi_rasf_patrol_scrub_parameter 2927 { 2928 ACPI_RASF_PARAMETER_BLOCK Header; 2929 UINT16 PatrolScrubCommand; 2930 UINT64 RequestedAddressRange[2]; 2931 UINT64 ActualAddressRange[2]; 2932 UINT16 Flags; 2933 UINT8 RequestedSpeed; 2934 2935 } ACPI_RASF_PATROL_SCRUB_PARAMETER; 2936 2937 /* Masks for Flags and Speed fields above */ 2938 2939 #define ACPI_RASF_SCRUBBER_RUNNING 1 2940 #define ACPI_RASF_SPEED (7<<1) 2941 #define ACPI_RASF_SPEED_SLOW (0<<1) 2942 #define ACPI_RASF_SPEED_MEDIUM (4<<1) 2943 #define ACPI_RASF_SPEED_FAST (7<<1) 2944 2945 /* Channel Commands */ 2946 2947 enum AcpiRasfCommands 2948 { 2949 ACPI_RASF_EXECUTE_RASF_COMMAND = 1 2950 }; 2951 2952 /* Platform RAS Capabilities */ 2953 2954 enum AcpiRasfCapabiliities 2955 { 2956 ACPI_HW_PATROL_SCRUB_SUPPORTED = 0, 2957 ACPI_SW_PATROL_SCRUB_EXPOSED = 1 2958 }; 2959 2960 /* Patrol Scrub Commands */ 2961 2962 enum AcpiRasfPatrolScrubCommands 2963 { 2964 ACPI_RASF_GET_PATROL_PARAMETERS = 1, 2965 ACPI_RASF_START_PATROL_SCRUBBER = 2, 2966 ACPI_RASF_STOP_PATROL_SCRUBBER = 3 2967 }; 2968 2969 /* Channel Command flags */ 2970 2971 #define ACPI_RASF_GENERATE_SCI (1<<15) 2972 2973 /* Status values */ 2974 2975 enum AcpiRasfStatus 2976 { 2977 ACPI_RASF_SUCCESS = 0, 2978 ACPI_RASF_NOT_VALID = 1, 2979 ACPI_RASF_NOT_SUPPORTED = 2, 2980 ACPI_RASF_BUSY = 3, 2981 ACPI_RASF_FAILED = 4, 2982 ACPI_RASF_ABORTED = 5, 2983 ACPI_RASF_INVALID_DATA = 6 2984 }; 2985 2986 /* Status flags */ 2987 2988 #define ACPI_RASF_COMMAND_COMPLETE (1) 2989 #define ACPI_RASF_SCI_DOORBELL (1<<1) 2990 #define ACPI_RASF_ERROR (1<<2) 2991 #define ACPI_RASF_STATUS (0x1F<<3) 2992 2993 2994 /******************************************************************************* 2995 * 2996 * RGRT - Regulatory Graphics Resource Table 2997 * Version 1 2998 * 2999 * Conforms to "ACPI RGRT" available at: 3000 * https://microsoft.github.io/mu/dyn/mu_plus/MsCorePkg/AcpiRGRT/feature_acpi_rgrt/ 3001 * 3002 ******************************************************************************/ 3003 3004 typedef struct acpi_table_rgrt 3005 { 3006 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 3007 UINT16 Version; 3008 UINT8 ImageType; 3009 UINT8 Reserved; 3010 UINT8 Image[]; 3011 3012 } ACPI_TABLE_RGRT; 3013 3014 /* ImageType values */ 3015 3016 enum AcpiRgrtImageType 3017 { 3018 ACPI_RGRT_TYPE_RESERVED0 = 0, 3019 ACPI_RGRT_IMAGE_TYPE_PNG = 1, 3020 ACPI_RGRT_TYPE_RESERVED = 2 /* 2 and greater are reserved */ 3021 }; 3022 3023 3024 /******************************************************************************* 3025 * 3026 * SBST - Smart Battery Specification Table 3027 * Version 1 3028 * 3029 ******************************************************************************/ 3030 3031 typedef struct acpi_table_sbst 3032 { 3033 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 3034 UINT32 WarningLevel; 3035 UINT32 LowLevel; 3036 UINT32 CriticalLevel; 3037 3038 } ACPI_TABLE_SBST; 3039 3040 3041 /******************************************************************************* 3042 * 3043 * SDEI - Software Delegated Exception Interface Descriptor Table 3044 * 3045 * Conforms to "Software Delegated Exception Interface (SDEI)" ARM DEN0054A, 3046 * May 8th, 2017. Copyright 2017 ARM Ltd. 3047 * 3048 ******************************************************************************/ 3049 3050 typedef struct acpi_table_sdei 3051 { 3052 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 3053 3054 } ACPI_TABLE_SDEI; 3055 3056 3057 /******************************************************************************* 3058 * 3059 * SDEV - Secure Devices Table (ACPI 6.2) 3060 * Version 1 3061 * 3062 ******************************************************************************/ 3063 3064 typedef struct acpi_table_sdev 3065 { 3066 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 3067 3068 } ACPI_TABLE_SDEV; 3069 3070 3071 typedef struct acpi_sdev_header 3072 { 3073 UINT8 Type; 3074 UINT8 Flags; 3075 UINT16 Length; 3076 3077 } ACPI_SDEV_HEADER; 3078 3079 3080 /* Values for subtable type above */ 3081 3082 enum AcpiSdevType 3083 { 3084 ACPI_SDEV_TYPE_NAMESPACE_DEVICE = 0, 3085 ACPI_SDEV_TYPE_PCIE_ENDPOINT_DEVICE = 1, 3086 ACPI_SDEV_TYPE_RESERVED = 2 /* 2 and greater are reserved */ 3087 }; 3088 3089 /* Values for flags above */ 3090 3091 #define ACPI_SDEV_HANDOFF_TO_UNSECURE_OS (1) 3092 #define ACPI_SDEV_SECURE_COMPONENTS_PRESENT (1<<1) 3093 3094 /* 3095 * SDEV subtables 3096 */ 3097 3098 /* 0: Namespace Device Based Secure Device Structure */ 3099 3100 typedef struct acpi_sdev_namespace 3101 { 3102 ACPI_SDEV_HEADER Header; 3103 UINT16 DeviceIdOffset; 3104 UINT16 DeviceIdLength; 3105 UINT16 VendorDataOffset; 3106 UINT16 VendorDataLength; 3107 3108 } ACPI_SDEV_NAMESPACE; 3109 3110 typedef struct acpi_sdev_secure_component 3111 { 3112 UINT16 SecureComponentOffset; 3113 UINT16 SecureComponentLength; 3114 3115 } ACPI_SDEV_SECURE_COMPONENT; 3116 3117 3118 /* 3119 * SDEV sub-subtables ("Components") for above 3120 */ 3121 typedef struct acpi_sdev_component 3122 { 3123 ACPI_SDEV_HEADER Header; 3124 3125 } ACPI_SDEV_COMPONENT; 3126 3127 3128 /* Values for sub-subtable type above */ 3129 3130 enum AcpiSacType 3131 { 3132 ACPI_SDEV_TYPE_ID_COMPONENT = 0, 3133 ACPI_SDEV_TYPE_MEM_COMPONENT = 1 3134 }; 3135 3136 typedef struct acpi_sdev_id_component 3137 { 3138 ACPI_SDEV_HEADER Header; 3139 UINT16 HardwareIdOffset; 3140 UINT16 HardwareIdLength; 3141 UINT16 SubsystemIdOffset; 3142 UINT16 SubsystemIdLength; 3143 UINT16 HardwareRevision; 3144 UINT8 HardwareRevPresent; 3145 UINT8 ClassCodePresent; 3146 UINT8 PciBaseClass; 3147 UINT8 PciSubClass; 3148 UINT8 PciProgrammingXface; 3149 3150 } ACPI_SDEV_ID_COMPONENT; 3151 3152 typedef struct acpi_sdev_mem_component 3153 { 3154 ACPI_SDEV_HEADER Header; 3155 UINT32 Reserved; 3156 UINT64 MemoryBaseAddress; 3157 UINT64 MemoryLength; 3158 3159 } ACPI_SDEV_MEM_COMPONENT; 3160 3161 3162 /* 1: PCIe Endpoint Device Based Device Structure */ 3163 3164 typedef struct acpi_sdev_pcie 3165 { 3166 ACPI_SDEV_HEADER Header; 3167 UINT16 Segment; 3168 UINT16 StartBus; 3169 UINT16 PathOffset; 3170 UINT16 PathLength; 3171 UINT16 VendorDataOffset; 3172 UINT16 VendorDataLength; 3173 3174 } ACPI_SDEV_PCIE; 3175 3176 /* 1a: PCIe Endpoint path entry */ 3177 3178 typedef struct acpi_sdev_pcie_path 3179 { 3180 UINT8 Device; 3181 UINT8 Function; 3182 3183 } ACPI_SDEV_PCIE_PATH; 3184 3185 3186 /******************************************************************************* 3187 * 3188 * SVKL - Storage Volume Key Location Table (ACPI 6.4) 3189 * From: "Guest-Host-Communication Interface (GHCI) for Intel 3190 * Trust Domain Extensions (Intel TDX)". 3191 * Version 1 3192 * 3193 ******************************************************************************/ 3194 3195 typedef struct acpi_table_svkl 3196 { 3197 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 3198 UINT32 Count; 3199 3200 } ACPI_TABLE_SVKL; 3201 3202 typedef struct acpi_svkl_key 3203 { 3204 UINT16 Type; 3205 UINT16 Format; 3206 UINT32 Size; 3207 UINT64 Address; 3208 3209 } ACPI_SVKL_KEY; 3210 3211 enum acpi_svkl_type 3212 { 3213 ACPI_SVKL_TYPE_MAIN_STORAGE = 0, 3214 ACPI_SVKL_TYPE_RESERVED = 1 /* 1 and greater are reserved */ 3215 }; 3216 3217 enum acpi_svkl_format 3218 { 3219 ACPI_SVKL_FORMAT_RAW_BINARY = 0, 3220 ACPI_SVKL_FORMAT_RESERVED = 1 /* 1 and greater are reserved */ 3221 }; 3222 3223 3224 /******************************************************************************* 3225 * 3226 * TDEL - TD-Event Log 3227 * From: "Guest-Host-Communication Interface (GHCI) for Intel 3228 * Trust Domain Extensions (Intel TDX)". 3229 * September 2020 3230 * 3231 ******************************************************************************/ 3232 3233 typedef struct acpi_table_tdel 3234 { 3235 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 3236 UINT32 Reserved; 3237 UINT64 LogAreaMinimumLength; 3238 UINT64 LogAreaStartAddress; 3239 3240 } ACPI_TABLE_TDEL; 3241 3242 /* Reset to default packing */ 3243 3244 #pragma pack() 3245 3246 #endif /* __ACTBL2_H__ */ 3247
Indexes created Tue Sep 30 11:09:46 GMT 2025