actbl2.h revision 1.1.1.25
1 /****************************************************************************** 2 * 3 * Name: actbl2.h - ACPI Table Definitions (tables not in ACPI spec) 4 * 5 *****************************************************************************/ 6 7 /* 8 * Copyright (C) 2000 - 2023, Intel Corp. 9 * All rights reserved. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions, and the following disclaimer, 16 * without modification. 17 * 2. Redistributions in binary form must reproduce at minimum a disclaimer 18 * substantially similar to the "NO WARRANTY" disclaimer below 19 * ("Disclaimer") and any redistribution must be conditioned upon 20 * including a substantially similar Disclaimer requirement for further 21 * binary redistribution. 22 * 3. Neither the names of the above-listed copyright holders nor the names 23 * of any contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * Alternatively, this software may be distributed under the terms of the 27 * GNU General Public License ("GPL") version 2 as published by the Free 28 * Software Foundation. 29 * 30 * NO WARRANTY 31 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 32 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 33 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 34 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 35 * HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 36 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 37 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 38 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 39 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING 40 * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 41 * POSSIBILITY OF SUCH DAMAGES. 42 */ 43 44 #ifndef __ACTBL2_H__ 45 #define __ACTBL2_H__ 46 47 48 /******************************************************************************* 49 * 50 * Additional ACPI Tables (2) 51 * 52 * These tables are not consumed directly by the ACPICA subsystem, but are 53 * included here to support device drivers and the AML disassembler. 54 * 55 ******************************************************************************/ 56 57 58 /* 59 * Values for description table header signatures for tables defined in this 60 * file. Useful because they make it more difficult to inadvertently type in 61 * the wrong signature. 62 */ 63 #define ACPI_SIG_AGDI "AGDI" /* Arm Generic Diagnostic Dump and Reset Device Interface */ 64 #define ACPI_SIG_APMT "APMT" /* Arm Performance Monitoring Unit table */ 65 #define ACPI_SIG_BDAT "BDAT" /* BIOS Data ACPI Table */ 66 #define ACPI_SIG_CCEL "CCEL" /* CC Event Log Table */ 67 #define ACPI_SIG_CDAT "CDAT" /* Coherent Device Attribute Table */ 68 #define ACPI_SIG_IORT "IORT" /* IO Remapping Table */ 69 #define ACPI_SIG_IVRS "IVRS" /* I/O Virtualization Reporting Structure */ 70 #define ACPI_SIG_LPIT "LPIT" /* Low Power Idle Table */ 71 #define ACPI_SIG_MADT "APIC" /* Multiple APIC Description Table */ 72 #define ACPI_SIG_MCFG "MCFG" /* PCI Memory Mapped Configuration table */ 73 #define ACPI_SIG_MCHI "MCHI" /* Management Controller Host Interface table */ 74 #define ACPI_SIG_MPAM "MPAM" /* Memory System Resource Partitioning and Monitoring Table */ 75 #define ACPI_SIG_MPST "MPST" /* Memory Power State Table */ 76 #define ACPI_SIG_MSDM "MSDM" /* Microsoft Data Management Table */ 77 #define ACPI_SIG_NFIT "NFIT" /* NVDIMM Firmware Interface Table */ 78 #define ACPI_SIG_NHLT "NHLT" /* Non HD Audio Link Table */ 79 #define ACPI_SIG_PCCT "PCCT" /* Platform Communications Channel Table */ 80 #define ACPI_SIG_PDTT "PDTT" /* Platform Debug Trigger Table */ 81 #define ACPI_SIG_PHAT "PHAT" /* Platform Health Assessment Table */ 82 #define ACPI_SIG_PMTT "PMTT" /* Platform Memory Topology Table */ 83 #define ACPI_SIG_PPTT "PPTT" /* Processor Properties Topology Table */ 84 #define ACPI_SIG_PRMT "PRMT" /* Platform Runtime Mechanism Table */ 85 #define ACPI_SIG_RASF "RASF" /* RAS Feature table */ 86 #define ACPI_SIG_RAS2 "RAS2" /* RAS2 Feature table */ 87 #define ACPI_SIG_RGRT "RGRT" /* Regulatory Graphics Resource Table */ 88 #define ACPI_SIG_RHCT "RHCT" /* RISC-V Hart Capabilities Table */ 89 #define ACPI_SIG_SBST "SBST" /* Smart Battery Specification Table */ 90 #define ACPI_SIG_SDEI "SDEI" /* Software Delegated Exception Interface Table */ 91 #define ACPI_SIG_SDEV "SDEV" /* Secure Devices table */ 92 #define ACPI_SIG_SVKL "SVKL" /* Storage Volume Key Location Table */ 93 #define ACPI_SIG_TDEL "TDEL" /* TD Event Log Table */ 94 95 96 /* 97 * All tables must be byte-packed to match the ACPI specification, since 98 * the tables are provided by the system BIOS. 99 */ 100 #pragma pack(1) 101 102 /* 103 * Note: C bitfields are not used for this reason: 104 * 105 * "Bitfields are great and easy to read, but unfortunately the C language 106 * does not specify the layout of bitfields in memory, which means they are 107 * essentially useless for dealing with packed data in on-disk formats or 108 * binary wire protocols." (Or ACPI tables and buffers.) "If you ask me, 109 * this decision was a design error in C. Ritchie could have picked an order 110 * and stuck with it." Norman Ramsey. 111 * See http://stackoverflow.com/a/1053662/41661 112 */ 113 114 115 /******************************************************************************* 116 * 117 * AEST - Arm Error Source Table 118 * 119 * Conforms to: ACPI for the Armv8 RAS Extensions 1.1 Platform Design Document 120 * September 2020. 121 * 122 ******************************************************************************/ 123 124 typedef struct acpi_table_aest 125 { 126 ACPI_TABLE_HEADER Header; 127 128 } ACPI_TABLE_AEST; 129 130 /* Common Subtable header - one per Node Structure (Subtable) */ 131 132 typedef struct acpi_aest_hdr 133 { 134 UINT8 Type; 135 UINT16 Length; 136 UINT8 Reserved; 137 UINT32 NodeSpecificOffset; 138 UINT32 NodeInterfaceOffset; 139 UINT32 NodeInterruptOffset; 140 UINT32 NodeInterruptCount; 141 UINT64 TimestampRate; 142 UINT64 Reserved1; 143 UINT64 ErrorInjectionRate; 144 145 } ACPI_AEST_HEADER; 146 147 /* Values for Type above */ 148 149 #define ACPI_AEST_PROCESSOR_ERROR_NODE 0 150 #define ACPI_AEST_MEMORY_ERROR_NODE 1 151 #define ACPI_AEST_SMMU_ERROR_NODE 2 152 #define ACPI_AEST_VENDOR_ERROR_NODE 3 153 #define ACPI_AEST_GIC_ERROR_NODE 4 154 #define ACPI_AEST_PCIE_ERROR_NODE 5 155 #define ACPI_AEST_PROXY_ERROR_NODE 6 156 #define ACPI_AEST_NODE_TYPE_RESERVED 7 /* 7 and above are reserved */ 157 158 159 /* 160 * AEST subtables (Error nodes) 161 */ 162 163 /* 0: Processor Error */ 164 165 typedef struct acpi_aest_processor 166 { 167 UINT32 ProcessorId; 168 UINT8 ResourceType; 169 UINT8 Reserved; 170 UINT8 Flags; 171 UINT8 Revision; 172 UINT64 ProcessorAffinity; 173 174 } ACPI_AEST_PROCESSOR; 175 176 /* Values for ResourceType above, related structs below */ 177 178 #define ACPI_AEST_CACHE_RESOURCE 0 179 #define ACPI_AEST_TLB_RESOURCE 1 180 #define ACPI_AEST_GENERIC_RESOURCE 2 181 #define ACPI_AEST_RESOURCE_RESERVED 3 /* 3 and above are reserved */ 182 183 /* 0R: Processor Cache Resource Substructure */ 184 185 typedef struct acpi_aest_processor_cache 186 { 187 UINT32 CacheReference; 188 UINT32 Reserved; 189 190 } ACPI_AEST_PROCESSOR_CACHE; 191 192 /* Values for CacheType above */ 193 194 #define ACPI_AEST_CACHE_DATA 0 195 #define ACPI_AEST_CACHE_INSTRUCTION 1 196 #define ACPI_AEST_CACHE_UNIFIED 2 197 #define ACPI_AEST_CACHE_RESERVED 3 /* 3 and above are reserved */ 198 199 /* 1R: Processor TLB Resource Substructure */ 200 201 typedef struct acpi_aest_processor_tlb 202 { 203 UINT32 TlbLevel; 204 UINT32 Reserved; 205 206 } ACPI_AEST_PROCESSOR_TLB; 207 208 /* 2R: Processor Generic Resource Substructure */ 209 210 typedef struct acpi_aest_processor_generic 211 { 212 UINT32 Resource; 213 214 } ACPI_AEST_PROCESSOR_GENERIC; 215 216 /* 1: Memory Error */ 217 218 typedef struct acpi_aest_memory 219 { 220 UINT32 SratProximityDomain; 221 222 } ACPI_AEST_MEMORY; 223 224 /* 2: Smmu Error */ 225 226 typedef struct acpi_aest_smmu 227 { 228 UINT32 IortNodeReference; 229 UINT32 SubcomponentReference; 230 231 } ACPI_AEST_SMMU; 232 233 /* 3: Vendor Defined */ 234 235 typedef struct acpi_aest_vendor 236 { 237 UINT32 AcpiHid; 238 UINT32 AcpiUid; 239 UINT8 VendorSpecificData[16]; 240 241 } ACPI_AEST_VENDOR; 242 243 /* 3: Vendor Defined V2 */ 244 245 typedef struct acpi_aest_vendor_v2 246 { 247 UINT64 AcpiHid; 248 UINT32 AcpiUid; 249 UINT8 VendorSpecificData[16]; 250 251 } ACPI_AEST_VENDOR_V2; 252 253 /* 4: Gic Error */ 254 255 typedef struct acpi_aest_gic 256 { 257 UINT32 InterfaceType; 258 UINT32 InstanceId; 259 260 } ACPI_AEST_GIC; 261 262 /* Values for InterfaceType above */ 263 264 #define ACPI_AEST_GIC_CPU 0 265 #define ACPI_AEST_GIC_DISTRIBUTOR 1 266 #define ACPI_AEST_GIC_REDISTRIBUTOR 2 267 #define ACPI_AEST_GIC_ITS 3 268 #define ACPI_AEST_GIC_RESERVED 4 /* 4 and above are reserved */ 269 270 /* 5: PCIe Error */ 271 272 typedef struct acpi_aest_pcie 273 { 274 UINT32 IortNodeReference; 275 276 } ACPI_AEST_PCIE; 277 278 279 /* 6: Proxy Error */ 280 281 typedef struct acpi_aest_proxy 282 { 283 UINT64 NodeAddress; 284 285 } ACPI_AEST_PROXY; 286 287 /* Node Interface Structure */ 288 289 typedef struct acpi_aest_node_interface 290 { 291 UINT8 Type; 292 UINT8 Reserved[3]; 293 UINT32 Flags; 294 UINT64 Address; 295 UINT32 ErrorRecordIndex; 296 UINT32 ErrorRecordCount; 297 UINT64 ErrorRecordImplemented; 298 UINT64 ErrorStatusReporting; 299 UINT64 AddressingMode; 300 301 } ACPI_AEST_NODE_INTERFACE; 302 303 /* Node Interface Structure V2*/ 304 305 typedef struct acpi_aest_node_interface_header 306 { 307 UINT8 Type; 308 UINT8 GroupFormat; 309 UINT8 Reserved[2]; 310 UINT32 Flags; 311 UINT64 Address; 312 UINT32 ErrorRecordIndex; 313 UINT32 ErrorRecordCount; 314 315 } ACPI_AEST_NODE_INTERFACE_HEADER; 316 317 #define ACPI_AEST_NODE_GROUP_FORMAT_4K 0 318 #define ACPI_AEST_NODE_GROUP_FORMAT_16K 1 319 #define ACPI_AEST_NODE_GROUP_FORMAT_64K 2 320 321 typedef struct acpi_aest_node_interface_common 322 { 323 UINT32 ErrorNodeDevice; 324 UINT32 ProcessorAffinity; 325 UINT64 ErrorGroupRegisterBase; 326 UINT64 FaultInjectRegisterBase; 327 UINT64 InterruptConfigRegisterBase; 328 329 } ACPI_AEST_NODE_INTERFACE_COMMON; 330 331 typedef struct acpi_aest_node_interface_4k 332 { 333 UINT64 ErrorRecordImplemented; 334 UINT64 ErrorStatusReporting; 335 UINT64 AddressingMode; 336 ACPI_AEST_NODE_INTERFACE_COMMON Common; 337 338 } ACPI_AEST_NODE_INTERFACE_4K; 339 340 typedef struct acpi_aest_node_interface_16k 341 { 342 UINT64 ErrorRecordImplemented[4]; 343 UINT64 ErrorStatusReporting[4]; 344 UINT64 AddressingMode[4]; 345 ACPI_AEST_NODE_INTERFACE_COMMON Common; 346 347 } ACPI_AEST_NODE_INTERFACE_16K; 348 349 typedef struct acpi_aest_node_interface_64k 350 { 351 INT64 ErrorRecordImplemented[14]; 352 UINT64 ErrorStatusReporting[14]; 353 UINT64 AddressingMode[14]; 354 ACPI_AEST_NODE_INTERFACE_COMMON Common; 355 356 } ACPI_AEST_NODE_INTERFACE_64K; 357 358 /* Values for Type field above */ 359 360 #define ACPI_AEST_NODE_SYSTEM_REGISTER 0 361 #define ACPI_AEST_NODE_MEMORY_MAPPED 1 362 #define ACPI_AEST_NODE_SINGLE_RECORD_MEMORY_MAPPED 2 363 #define ACPI_AEST_XFACE_RESERVED 3 /* 2 and above are reserved */ 364 365 /* Node Interrupt Structure */ 366 367 typedef struct acpi_aest_node_interrupt 368 { 369 UINT8 Type; 370 UINT8 Reserved[2]; 371 UINT8 Flags; 372 UINT32 Gsiv; 373 UINT8 IortId; 374 UINT8 Reserved1[3]; 375 376 } ACPI_AEST_NODE_INTERRUPT; 377 378 /* Node Interrupt Structure V2 */ 379 380 typedef struct acpi_aest_node_interrupt_v2 381 { 382 UINT8 Type; 383 UINT8 Reserved[2]; 384 UINT8 Flags; 385 UINT32 Gsiv; 386 UINT8 Reserved1[4]; 387 388 } ACPI_AEST_NODE_INTERRUPT_V2; 389 390 /* Values for Type field above */ 391 392 #define ACPI_AEST_NODE_FAULT_HANDLING 0 393 #define ACPI_AEST_NODE_ERROR_RECOVERY 1 394 #define ACPI_AEST_XRUPT_RESERVED 2 /* 2 and above are reserved */ 395 396 397 /******************************************************************************* 398 * AGDI - Arm Generic Diagnostic Dump and Reset Device Interface 399 * 400 * Conforms to "ACPI for Arm Components 1.1, Platform Design Document" 401 * ARM DEN0093 v1.1 402 * 403 ******************************************************************************/ 404 typedef struct acpi_table_agdi 405 { 406 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 407 UINT8 Flags; 408 UINT8 Reserved[3]; 409 UINT32 SdeiEvent; 410 UINT32 Gsiv; 411 412 } ACPI_TABLE_AGDI; 413 414 /* Mask for Flags field above */ 415 416 #define ACPI_AGDI_SIGNALING_MODE (1) 417 418 419 /******************************************************************************* 420 * 421 * APMT - ARM Performance Monitoring Unit Table 422 * 423 * Conforms to: 424 * ARM Performance Monitoring Unit Architecture 1.0 Platform Design Document 425 * ARM DEN0117 v1.0 November 25, 2021 426 * 427 ******************************************************************************/ 428 429 typedef struct acpi_table_apmt { 430 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 431 } ACPI_TABLE_APMT; 432 433 #define ACPI_APMT_NODE_ID_LENGTH 4 434 435 /* 436 * APMT subtables 437 */ 438 typedef struct acpi_apmt_node { 439 UINT16 Length; 440 UINT8 Flags; 441 UINT8 Type; 442 UINT32 Id; 443 UINT64 InstPrimary; 444 UINT32 InstSecondary; 445 UINT64 BaseAddress0; 446 UINT64 BaseAddress1; 447 UINT32 OvflwIrq; 448 UINT32 Reserved; 449 UINT32 OvflwIrqFlags; 450 UINT32 ProcAffinity; 451 UINT32 ImplId; 452 } ACPI_APMT_NODE; 453 454 /* Masks for Flags field above */ 455 456 #define ACPI_APMT_FLAGS_DUAL_PAGE (1<<0) 457 #define ACPI_APMT_FLAGS_AFFINITY (1<<1) 458 #define ACPI_APMT_FLAGS_ATOMIC (1<<2) 459 460 /* Values for Flags dual page field above */ 461 462 #define ACPI_APMT_FLAGS_DUAL_PAGE_NSUPP (0<<0) 463 #define ACPI_APMT_FLAGS_DUAL_PAGE_SUPP (1<<0) 464 465 /* Values for Flags processor affinity field above */ 466 #define ACPI_APMT_FLAGS_AFFINITY_PROC (0<<1) 467 #define ACPI_APMT_FLAGS_AFFINITY_PROC_CONTAINER (1<<1) 468 469 /* Values for Flags 64-bit atomic field above */ 470 #define ACPI_APMT_FLAGS_ATOMIC_NSUPP (0<<2) 471 #define ACPI_APMT_FLAGS_ATOMIC_SUPP (1<<2) 472 473 /* Values for Type field above */ 474 475 enum acpi_apmt_node_type { 476 ACPI_APMT_NODE_TYPE_MC = 0x00, 477 ACPI_APMT_NODE_TYPE_SMMU = 0x01, 478 ACPI_APMT_NODE_TYPE_PCIE_ROOT = 0x02, 479 ACPI_APMT_NODE_TYPE_ACPI = 0x03, 480 ACPI_APMT_NODE_TYPE_CACHE = 0x04, 481 ACPI_APMT_NODE_TYPE_COUNT 482 }; 483 484 /* Masks for ovflw_irq_flags field above */ 485 486 #define ACPI_APMT_OVFLW_IRQ_FLAGS_MODE (1<<0) 487 #define ACPI_APMT_OVFLW_IRQ_FLAGS_TYPE (1<<1) 488 489 /* Values for ovflw_irq_flags mode field above */ 490 491 #define ACPI_APMT_OVFLW_IRQ_FLAGS_MODE_LEVEL (0<<0) 492 #define ACPI_APMT_OVFLW_IRQ_FLAGS_MODE_EDGE (1<<0) 493 494 /* Values for ovflw_irq_flags type field above */ 495 496 #define ACPI_APMT_OVFLW_IRQ_FLAGS_TYPE_WIRED (0<<1) 497 498 499 /******************************************************************************* 500 * 501 * BDAT - BIOS Data ACPI Table 502 * 503 * Conforms to "BIOS Data ACPI Table", Interface Specification v4.0 Draft 5 504 * Nov 2020 505 * 506 ******************************************************************************/ 507 508 typedef struct acpi_table_bdat 509 { 510 ACPI_TABLE_HEADER Header; 511 ACPI_GENERIC_ADDRESS Gas; 512 513 } ACPI_TABLE_BDAT; 514 515 /******************************************************************************* 516 * 517 * CCEL - CC-Event Log 518 * From: "Guest-Host-Communication Interface (GHCI) for Intel 519 * Trust Domain Extensions (Intel TDX)". Feb 2022 520 * 521 ******************************************************************************/ 522 523 typedef struct acpi_table_ccel 524 { 525 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 526 UINT8 CCType; 527 UINT8 CCSubType; 528 UINT16 Reserved; 529 UINT64 LogAreaMinimumLength; 530 UINT64 LogAreaStartAddress; 531 532 } ACPI_TABLE_CCEL; 533 534 /******************************************************************************* 535 * 536 * IORT - IO Remapping Table 537 * 538 * Conforms to "IO Remapping Table System Software on ARM Platforms", 539 * Document number: ARM DEN 0049E.f, Apr 2024 540 * 541 ******************************************************************************/ 542 543 typedef struct acpi_table_iort 544 { 545 ACPI_TABLE_HEADER Header; 546 UINT32 NodeCount; 547 UINT32 NodeOffset; 548 UINT32 Reserved; 549 550 } ACPI_TABLE_IORT; 551 552 553 /* 554 * IORT subtables 555 */ 556 typedef struct acpi_iort_node 557 { 558 UINT8 Type; 559 UINT16 Length; 560 UINT8 Revision; 561 UINT32 Identifier; 562 UINT32 MappingCount; 563 UINT32 MappingOffset; 564 char NodeData[]; 565 566 } ACPI_IORT_NODE; 567 568 /* Values for subtable Type above */ 569 570 enum AcpiIortNodeType 571 { 572 ACPI_IORT_NODE_ITS_GROUP = 0x00, 573 ACPI_IORT_NODE_NAMED_COMPONENT = 0x01, 574 ACPI_IORT_NODE_PCI_ROOT_COMPLEX = 0x02, 575 ACPI_IORT_NODE_SMMU = 0x03, 576 ACPI_IORT_NODE_SMMU_V3 = 0x04, 577 ACPI_IORT_NODE_PMCG = 0x05, 578 ACPI_IORT_NODE_RMR = 0x06, 579 }; 580 581 582 typedef struct acpi_iort_id_mapping 583 { 584 UINT32 InputBase; /* Lowest value in input range */ 585 UINT32 IdCount; /* Number of IDs */ 586 UINT32 OutputBase; /* Lowest value in output range */ 587 UINT32 OutputReference; /* A reference to the output node */ 588 UINT32 Flags; 589 590 } ACPI_IORT_ID_MAPPING; 591 592 /* Masks for Flags field above for IORT subtable */ 593 594 #define ACPI_IORT_ID_SINGLE_MAPPING (1) 595 596 597 typedef struct acpi_iort_memory_access 598 { 599 UINT32 CacheCoherency; 600 UINT8 Hints; 601 UINT16 Reserved; 602 UINT8 MemoryFlags; 603 604 } ACPI_IORT_MEMORY_ACCESS; 605 606 /* Values for CacheCoherency field above */ 607 608 #define ACPI_IORT_NODE_COHERENT 0x00000001 /* The device node is fully coherent */ 609 #define ACPI_IORT_NODE_NOT_COHERENT 0x00000000 /* The device node is not coherent */ 610 611 /* Masks for Hints field above */ 612 613 #define ACPI_IORT_HT_TRANSIENT (1) 614 #define ACPI_IORT_HT_WRITE (1<<1) 615 #define ACPI_IORT_HT_READ (1<<2) 616 #define ACPI_IORT_HT_OVERRIDE (1<<3) 617 618 /* Masks for MemoryFlags field above */ 619 620 #define ACPI_IORT_MF_COHERENCY (1) 621 #define ACPI_IORT_MF_ATTRIBUTES (1<<1) 622 #define ACPI_IORT_MF_CANWBS (1<<2) 623 624 625 /* 626 * IORT node specific subtables 627 */ 628 typedef struct acpi_iort_its_group 629 { 630 UINT32 ItsCount; 631 UINT32 Identifiers[]; /* GIC ITS identifier array */ 632 633 } ACPI_IORT_ITS_GROUP; 634 635 636 typedef struct acpi_iort_named_component 637 { 638 UINT32 NodeFlags; 639 UINT64 MemoryProperties; /* Memory access properties */ 640 UINT8 MemoryAddressLimit; /* Memory address size limit */ 641 char DeviceName[]; /* Path of namespace object */ 642 643 } ACPI_IORT_NAMED_COMPONENT; 644 645 /* Masks for Flags field above */ 646 647 #define ACPI_IORT_NC_STALL_SUPPORTED (1) 648 #define ACPI_IORT_NC_PASID_BITS (31<<1) 649 650 typedef struct acpi_iort_root_complex 651 { 652 UINT64 MemoryProperties; /* Memory access properties */ 653 UINT32 AtsAttribute; 654 UINT32 PciSegmentNumber; 655 UINT8 MemoryAddressLimit; /* Memory address size limit */ 656 UINT16 PasidCapabilities; /* PASID Capabilities */ 657 UINT8 Reserved[]; /* Reserved, must be zero */ 658 659 } ACPI_IORT_ROOT_COMPLEX; 660 661 /* Masks for AtsAttribute field above */ 662 663 #define ACPI_IORT_ATS_SUPPORTED (1) /* The root complex ATS support */ 664 #define ACPI_IORT_PRI_SUPPORTED (1<<1) /* The root complex PRI support */ 665 #define ACPI_IORT_PASID_FWD_SUPPORTED (1<<2) /* The root complex PASID forward support */ 666 667 /* Masks for PasidCapabilities field above */ 668 #define ACPI_IORT_PASID_MAX_WIDTH (0x1F) /* Bits 0-4 */ 669 670 typedef struct acpi_iort_smmu 671 { 672 UINT64 BaseAddress; /* SMMU base address */ 673 UINT64 Span; /* Length of memory range */ 674 UINT32 Model; 675 UINT32 Flags; 676 UINT32 GlobalInterruptOffset; 677 UINT32 ContextInterruptCount; 678 UINT32 ContextInterruptOffset; 679 UINT32 PmuInterruptCount; 680 UINT32 PmuInterruptOffset; 681 UINT64 Interrupts[]; /* Interrupt array */ 682 683 } ACPI_IORT_SMMU; 684 685 /* Values for Model field above */ 686 687 #define ACPI_IORT_SMMU_V1 0x00000000 /* Generic SMMUv1 */ 688 #define ACPI_IORT_SMMU_V2 0x00000001 /* Generic SMMUv2 */ 689 #define ACPI_IORT_SMMU_CORELINK_MMU400 0x00000002 /* ARM Corelink MMU-400 */ 690 #define ACPI_IORT_SMMU_CORELINK_MMU500 0x00000003 /* ARM Corelink MMU-500 */ 691 #define ACPI_IORT_SMMU_CORELINK_MMU401 0x00000004 /* ARM Corelink MMU-401 */ 692 #define ACPI_IORT_SMMU_CAVIUM_THUNDERX 0x00000005 /* Cavium ThunderX SMMUv2 */ 693 694 /* Masks for Flags field above */ 695 696 #define ACPI_IORT_SMMU_DVM_SUPPORTED (1) 697 #define ACPI_IORT_SMMU_COHERENT_WALK (1<<1) 698 699 /* Global interrupt format */ 700 701 typedef struct acpi_iort_smmu_gsi 702 { 703 UINT32 NSgIrpt; 704 UINT32 NSgIrptFlags; 705 UINT32 NSgCfgIrpt; 706 UINT32 NSgCfgIrptFlags; 707 708 } ACPI_IORT_SMMU_GSI; 709 710 711 typedef struct acpi_iort_smmu_v3 712 { 713 UINT64 BaseAddress; /* SMMUv3 base address */ 714 UINT32 Flags; 715 UINT32 Reserved; 716 UINT64 VatosAddress; 717 UINT32 Model; 718 UINT32 EventGsiv; 719 UINT32 PriGsiv; 720 UINT32 GerrGsiv; 721 UINT32 SyncGsiv; 722 UINT32 Pxm; 723 UINT32 IdMappingIndex; 724 725 } ACPI_IORT_SMMU_V3; 726 727 /* Values for Model field above */ 728 729 #define ACPI_IORT_SMMU_V3_GENERIC 0x00000000 /* Generic SMMUv3 */ 730 #define ACPI_IORT_SMMU_V3_HISILICON_HI161X 0x00000001 /* HiSilicon Hi161x SMMUv3 */ 731 #define ACPI_IORT_SMMU_V3_CAVIUM_CN99XX 0x00000002 /* Cavium CN99xx SMMUv3 */ 732 733 /* Masks for Flags field above */ 734 735 #define ACPI_IORT_SMMU_V3_COHACC_OVERRIDE (1) 736 #define ACPI_IORT_SMMU_V3_HTTU_OVERRIDE (3<<1) 737 #define ACPI_IORT_SMMU_V3_PXM_VALID (1<<3) 738 #define ACPI_IORT_SMMU_V3_DEVICEID_VALID (1<<4) 739 740 typedef struct acpi_iort_pmcg 741 { 742 UINT64 Page0BaseAddress; 743 UINT32 OverflowGsiv; 744 UINT32 NodeReference; 745 UINT64 Page1BaseAddress; 746 747 } ACPI_IORT_PMCG; 748 749 typedef struct acpi_iort_rmr { 750 UINT32 Flags; 751 UINT32 RmrCount; 752 UINT32 RmrOffset; 753 754 } ACPI_IORT_RMR; 755 756 /* Masks for Flags field above */ 757 #define ACPI_IORT_RMR_REMAP_PERMITTED (1) 758 #define ACPI_IORT_RMR_ACCESS_PRIVILEGE (1<<1) 759 760 /* 761 * Macro to access the Access Attributes in flags field above: 762 * Access Attributes is encoded in bits 9:2 763 */ 764 #define ACPI_IORT_RMR_ACCESS_ATTRIBUTES(flags) (((flags) >> 2) & 0xFF) 765 766 /* Values for above Access Attributes */ 767 768 #define ACPI_IORT_RMR_ATTR_DEVICE_NGNRNE 0x00 769 #define ACPI_IORT_RMR_ATTR_DEVICE_NGNRE 0x01 770 #define ACPI_IORT_RMR_ATTR_DEVICE_NGRE 0x02 771 #define ACPI_IORT_RMR_ATTR_DEVICE_GRE 0x03 772 #define ACPI_IORT_RMR_ATTR_NORMAL_NC 0x04 773 #define ACPI_IORT_RMR_ATTR_NORMAL_IWB_OWB 0x05 774 775 typedef struct acpi_iort_rmr_desc { 776 UINT64 BaseAddress; 777 UINT64 Length; 778 UINT32 Reserved; 779 780 } ACPI_IORT_RMR_DESC; 781 782 /******************************************************************************* 783 * 784 * IVRS - I/O Virtualization Reporting Structure 785 * Version 1 786 * 787 * Conforms to "AMD I/O Virtualization Technology (IOMMU) Specification", 788 * Revision 1.26, February 2009. 789 * 790 ******************************************************************************/ 791 792 typedef struct acpi_table_ivrs 793 { 794 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 795 UINT32 Info; /* Common virtualization info */ 796 UINT64 Reserved; 797 798 } ACPI_TABLE_IVRS; 799 800 /* Values for Info field above */ 801 802 #define ACPI_IVRS_PHYSICAL_SIZE 0x00007F00 /* 7 bits, physical address size */ 803 #define ACPI_IVRS_VIRTUAL_SIZE 0x003F8000 /* 7 bits, virtual address size */ 804 #define ACPI_IVRS_ATS_RESERVED 0x00400000 /* ATS address translation range reserved */ 805 806 807 /* IVRS subtable header */ 808 809 typedef struct acpi_ivrs_header 810 { 811 UINT8 Type; /* Subtable type */ 812 UINT8 Flags; 813 UINT16 Length; /* Subtable length */ 814 UINT16 DeviceId; /* ID of IOMMU */ 815 816 } ACPI_IVRS_HEADER; 817 818 /* Values for subtable Type above */ 819 820 enum AcpiIvrsType 821 { 822 ACPI_IVRS_TYPE_HARDWARE1 = 0x10, 823 ACPI_IVRS_TYPE_HARDWARE2 = 0x11, 824 ACPI_IVRS_TYPE_HARDWARE3 = 0x40, 825 ACPI_IVRS_TYPE_MEMORY1 = 0x20, 826 ACPI_IVRS_TYPE_MEMORY2 = 0x21, 827 ACPI_IVRS_TYPE_MEMORY3 = 0x22 828 }; 829 830 /* Masks for Flags field above for IVHD subtable */ 831 832 #define ACPI_IVHD_TT_ENABLE (1) 833 #define ACPI_IVHD_PASS_PW (1<<1) 834 #define ACPI_IVHD_RES_PASS_PW (1<<2) 835 #define ACPI_IVHD_ISOC (1<<3) 836 #define ACPI_IVHD_IOTLB (1<<4) 837 838 /* Masks for Flags field above for IVMD subtable */ 839 840 #define ACPI_IVMD_UNITY (1) 841 #define ACPI_IVMD_READ (1<<1) 842 #define ACPI_IVMD_WRITE (1<<2) 843 #define ACPI_IVMD_EXCLUSION_RANGE (1<<3) 844 845 846 /* 847 * IVRS subtables, correspond to Type in ACPI_IVRS_HEADER 848 */ 849 850 /* 0x10: I/O Virtualization Hardware Definition Block (IVHD) */ 851 852 typedef struct acpi_ivrs_hardware_10 853 { 854 ACPI_IVRS_HEADER Header; 855 UINT16 CapabilityOffset; /* Offset for IOMMU control fields */ 856 UINT64 BaseAddress; /* IOMMU control registers */ 857 UINT16 PciSegmentGroup; 858 UINT16 Info; /* MSI number and unit ID */ 859 UINT32 FeatureReporting; 860 861 } ACPI_IVRS_HARDWARE1; 862 863 /* 0x11: I/O Virtualization Hardware Definition Block (IVHD) */ 864 865 typedef struct acpi_ivrs_hardware_11 866 { 867 ACPI_IVRS_HEADER Header; 868 UINT16 CapabilityOffset; /* Offset for IOMMU control fields */ 869 UINT64 BaseAddress; /* IOMMU control registers */ 870 UINT16 PciSegmentGroup; 871 UINT16 Info; /* MSI number and unit ID */ 872 UINT32 Attributes; 873 UINT64 EfrRegisterImage; 874 UINT64 Reserved; 875 } ACPI_IVRS_HARDWARE2; 876 877 /* Masks for Info field above */ 878 879 #define ACPI_IVHD_MSI_NUMBER_MASK 0x001F /* 5 bits, MSI message number */ 880 #define ACPI_IVHD_UNIT_ID_MASK 0x1F00 /* 5 bits, UnitID */ 881 882 883 /* 884 * Device Entries for IVHD subtable, appear after ACPI_IVRS_HARDWARE structure. 885 * Upper two bits of the Type field are the (encoded) length of the structure. 886 * Currently, only 4 and 8 byte entries are defined. 16 and 32 byte entries 887 * are reserved for future use but not defined. 888 */ 889 typedef struct acpi_ivrs_de_header 890 { 891 UINT8 Type; 892 UINT16 Id; 893 UINT8 DataSetting; 894 895 } ACPI_IVRS_DE_HEADER; 896 897 /* Length of device entry is in the top two bits of Type field above */ 898 899 #define ACPI_IVHD_ENTRY_LENGTH 0xC0 900 901 /* Values for device entry Type field above */ 902 903 enum AcpiIvrsDeviceEntryType 904 { 905 /* 4-byte device entries, all use ACPI_IVRS_DEVICE4 */ 906 907 ACPI_IVRS_TYPE_PAD4 = 0, 908 ACPI_IVRS_TYPE_ALL = 1, 909 ACPI_IVRS_TYPE_SELECT = 2, 910 ACPI_IVRS_TYPE_START = 3, 911 ACPI_IVRS_TYPE_END = 4, 912 913 /* 8-byte device entries */ 914 915 ACPI_IVRS_TYPE_PAD8 = 64, 916 ACPI_IVRS_TYPE_NOT_USED = 65, 917 ACPI_IVRS_TYPE_ALIAS_SELECT = 66, /* Uses ACPI_IVRS_DEVICE8A */ 918 ACPI_IVRS_TYPE_ALIAS_START = 67, /* Uses ACPI_IVRS_DEVICE8A */ 919 ACPI_IVRS_TYPE_EXT_SELECT = 70, /* Uses ACPI_IVRS_DEVICE8B */ 920 ACPI_IVRS_TYPE_EXT_START = 71, /* Uses ACPI_IVRS_DEVICE8B */ 921 ACPI_IVRS_TYPE_SPECIAL = 72, /* Uses ACPI_IVRS_DEVICE8C */ 922 923 /* Variable-length device entries */ 924 925 ACPI_IVRS_TYPE_HID = 240 /* Uses ACPI_IVRS_DEVICE_HID */ 926 }; 927 928 /* Values for Data field above */ 929 930 #define ACPI_IVHD_INIT_PASS (1) 931 #define ACPI_IVHD_EINT_PASS (1<<1) 932 #define ACPI_IVHD_NMI_PASS (1<<2) 933 #define ACPI_IVHD_SYSTEM_MGMT (3<<4) 934 #define ACPI_IVHD_LINT0_PASS (1<<6) 935 #define ACPI_IVHD_LINT1_PASS (1<<7) 936 937 938 /* Types 0-4: 4-byte device entry */ 939 940 typedef struct acpi_ivrs_device4 941 { 942 ACPI_IVRS_DE_HEADER Header; 943 944 } ACPI_IVRS_DEVICE4; 945 946 /* Types 66-67: 8-byte device entry */ 947 948 typedef struct acpi_ivrs_device8a 949 { 950 ACPI_IVRS_DE_HEADER Header; 951 UINT8 Reserved1; 952 UINT16 UsedId; 953 UINT8 Reserved2; 954 955 } ACPI_IVRS_DEVICE8A; 956 957 /* Types 70-71: 8-byte device entry */ 958 959 typedef struct acpi_ivrs_device8b 960 { 961 ACPI_IVRS_DE_HEADER Header; 962 UINT32 ExtendedData; 963 964 } ACPI_IVRS_DEVICE8B; 965 966 /* Values for ExtendedData above */ 967 968 #define ACPI_IVHD_ATS_DISABLED (1<<31) 969 970 /* Type 72: 8-byte device entry */ 971 972 typedef struct acpi_ivrs_device8c 973 { 974 ACPI_IVRS_DE_HEADER Header; 975 UINT8 Handle; 976 UINT16 UsedId; 977 UINT8 Variety; 978 979 } ACPI_IVRS_DEVICE8C; 980 981 /* Values for Variety field above */ 982 983 #define ACPI_IVHD_IOAPIC 1 984 #define ACPI_IVHD_HPET 2 985 986 /* Type 240: variable-length device entry */ 987 988 typedef struct acpi_ivrs_device_hid 989 { 990 ACPI_IVRS_DE_HEADER Header; 991 UINT64 AcpiHid; 992 UINT64 AcpiCid; 993 UINT8 UidType; 994 UINT8 UidLength; 995 996 } ACPI_IVRS_DEVICE_HID; 997 998 /* Values for UidType above */ 999 1000 #define ACPI_IVRS_UID_NOT_PRESENT 0 1001 #define ACPI_IVRS_UID_IS_INTEGER 1 1002 #define ACPI_IVRS_UID_IS_STRING 2 1003 1004 /* 0x20, 0x21, 0x22: I/O Virtualization Memory Definition Block (IVMD) */ 1005 1006 typedef struct acpi_ivrs_memory 1007 { 1008 ACPI_IVRS_HEADER Header; 1009 UINT16 AuxData; 1010 UINT64 Reserved; 1011 UINT64 StartAddress; 1012 UINT64 MemoryLength; 1013 1014 } ACPI_IVRS_MEMORY; 1015 1016 1017 /******************************************************************************* 1018 * 1019 * LPIT - Low Power Idle Table 1020 * 1021 * Conforms to "ACPI Low Power Idle Table (LPIT)" July 2014. 1022 * 1023 ******************************************************************************/ 1024 1025 typedef struct acpi_table_lpit 1026 { 1027 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1028 1029 } ACPI_TABLE_LPIT; 1030 1031 1032 /* LPIT subtable header */ 1033 1034 typedef struct acpi_lpit_header 1035 { 1036 UINT32 Type; /* Subtable type */ 1037 UINT32 Length; /* Subtable length */ 1038 UINT16 UniqueId; 1039 UINT16 Reserved; 1040 UINT32 Flags; 1041 1042 } ACPI_LPIT_HEADER; 1043 1044 /* Values for subtable Type above */ 1045 1046 enum AcpiLpitType 1047 { 1048 ACPI_LPIT_TYPE_NATIVE_CSTATE = 0x00, 1049 ACPI_LPIT_TYPE_RESERVED = 0x01 /* 1 and above are reserved */ 1050 }; 1051 1052 /* Masks for Flags field above */ 1053 1054 #define ACPI_LPIT_STATE_DISABLED (1) 1055 #define ACPI_LPIT_NO_COUNTER (1<<1) 1056 1057 /* 1058 * LPIT subtables, correspond to Type in ACPI_LPIT_HEADER 1059 */ 1060 1061 /* 0x00: Native C-state instruction based LPI structure */ 1062 1063 typedef struct acpi_lpit_native 1064 { 1065 ACPI_LPIT_HEADER Header; 1066 ACPI_GENERIC_ADDRESS EntryTrigger; 1067 UINT32 Residency; 1068 UINT32 Latency; 1069 ACPI_GENERIC_ADDRESS ResidencyCounter; 1070 UINT64 CounterFrequency; 1071 1072 } ACPI_LPIT_NATIVE; 1073 1074 1075 /******************************************************************************* 1076 * 1077 * MADT - Multiple APIC Description Table 1078 * Version 3 1079 * 1080 ******************************************************************************/ 1081 1082 typedef struct acpi_table_madt 1083 { 1084 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1085 UINT32 Address; /* Physical address of local APIC */ 1086 UINT32 Flags; 1087 1088 } ACPI_TABLE_MADT; 1089 1090 /* Masks for Flags field above */ 1091 1092 #define ACPI_MADT_PCAT_COMPAT (1) /* 00: System also has dual 8259s */ 1093 1094 /* Values for PCATCompat flag */ 1095 1096 #define ACPI_MADT_DUAL_PIC 1 1097 #define ACPI_MADT_MULTIPLE_APIC 0 1098 1099 1100 /* Values for MADT subtable type in ACPI_SUBTABLE_HEADER */ 1101 1102 enum AcpiMadtType 1103 { 1104 ACPI_MADT_TYPE_LOCAL_APIC = 0, 1105 ACPI_MADT_TYPE_IO_APIC = 1, 1106 ACPI_MADT_TYPE_INTERRUPT_OVERRIDE = 2, 1107 ACPI_MADT_TYPE_NMI_SOURCE = 3, 1108 ACPI_MADT_TYPE_LOCAL_APIC_NMI = 4, 1109 ACPI_MADT_TYPE_LOCAL_APIC_OVERRIDE = 5, 1110 ACPI_MADT_TYPE_IO_SAPIC = 6, 1111 ACPI_MADT_TYPE_LOCAL_SAPIC = 7, 1112 ACPI_MADT_TYPE_INTERRUPT_SOURCE = 8, 1113 ACPI_MADT_TYPE_LOCAL_X2APIC = 9, 1114 ACPI_MADT_TYPE_LOCAL_X2APIC_NMI = 10, 1115 ACPI_MADT_TYPE_GENERIC_INTERRUPT = 11, 1116 ACPI_MADT_TYPE_GENERIC_DISTRIBUTOR = 12, 1117 ACPI_MADT_TYPE_GENERIC_MSI_FRAME = 13, 1118 ACPI_MADT_TYPE_GENERIC_REDISTRIBUTOR = 14, 1119 ACPI_MADT_TYPE_GENERIC_TRANSLATOR = 15, 1120 ACPI_MADT_TYPE_MULTIPROC_WAKEUP = 16, 1121 ACPI_MADT_TYPE_CORE_PIC = 17, 1122 ACPI_MADT_TYPE_LIO_PIC = 18, 1123 ACPI_MADT_TYPE_HT_PIC = 19, 1124 ACPI_MADT_TYPE_EIO_PIC = 20, 1125 ACPI_MADT_TYPE_MSI_PIC = 21, 1126 ACPI_MADT_TYPE_BIO_PIC = 22, 1127 ACPI_MADT_TYPE_LPC_PIC = 23, 1128 ACPI_MADT_TYPE_RINTC = 24, 1129 ACPI_MADT_TYPE_IMSIC = 25, 1130 ACPI_MADT_TYPE_APLIC = 26, 1131 ACPI_MADT_TYPE_PLIC = 27, 1132 ACPI_MADT_TYPE_RESERVED = 28, /* 28 to 0x7F are reserved */ 1133 ACPI_MADT_TYPE_OEM_RESERVED = 0x80 /* 0x80 to 0xFF are reserved for OEM use */ 1134 }; 1135 1136 1137 /* 1138 * MADT Subtables, correspond to Type in ACPI_SUBTABLE_HEADER 1139 */ 1140 1141 /* 0: Processor Local APIC */ 1142 1143 typedef struct acpi_madt_local_apic 1144 { 1145 ACPI_SUBTABLE_HEADER Header; 1146 UINT8 ProcessorId; /* ACPI processor id */ 1147 UINT8 Id; /* Processor's local APIC id */ 1148 UINT32 LapicFlags; 1149 1150 } ACPI_MADT_LOCAL_APIC; 1151 1152 1153 /* 1: IO APIC */ 1154 1155 typedef struct acpi_madt_io_apic 1156 { 1157 ACPI_SUBTABLE_HEADER Header; 1158 UINT8 Id; /* I/O APIC ID */ 1159 UINT8 Reserved; /* Reserved - must be zero */ 1160 UINT32 Address; /* APIC physical address */ 1161 UINT32 GlobalIrqBase; /* Global system interrupt where INTI lines start */ 1162 1163 } ACPI_MADT_IO_APIC; 1164 1165 1166 /* 2: Interrupt Override */ 1167 1168 typedef struct acpi_madt_interrupt_override 1169 { 1170 ACPI_SUBTABLE_HEADER Header; 1171 UINT8 Bus; /* 0 - ISA */ 1172 UINT8 SourceIrq; /* Interrupt source (IRQ) */ 1173 UINT32 GlobalIrq; /* Global system interrupt */ 1174 UINT16 IntiFlags; 1175 1176 } ACPI_MADT_INTERRUPT_OVERRIDE; 1177 1178 1179 /* 3: NMI Source */ 1180 1181 typedef struct acpi_madt_nmi_source 1182 { 1183 ACPI_SUBTABLE_HEADER Header; 1184 UINT16 IntiFlags; 1185 UINT32 GlobalIrq; /* Global system interrupt */ 1186 1187 } ACPI_MADT_NMI_SOURCE; 1188 1189 1190 /* 4: Local APIC NMI */ 1191 1192 typedef struct acpi_madt_local_apic_nmi 1193 { 1194 ACPI_SUBTABLE_HEADER Header; 1195 UINT8 ProcessorId; /* ACPI processor id */ 1196 UINT16 IntiFlags; 1197 UINT8 Lint; /* LINTn to which NMI is connected */ 1198 1199 } ACPI_MADT_LOCAL_APIC_NMI; 1200 1201 1202 /* 5: Address Override */ 1203 1204 typedef struct acpi_madt_local_apic_override 1205 { 1206 ACPI_SUBTABLE_HEADER Header; 1207 UINT16 Reserved; /* Reserved, must be zero */ 1208 UINT64 Address; /* APIC physical address */ 1209 1210 } ACPI_MADT_LOCAL_APIC_OVERRIDE; 1211 1212 1213 /* 6: I/O Sapic */ 1214 1215 typedef struct acpi_madt_io_sapic 1216 { 1217 ACPI_SUBTABLE_HEADER Header; 1218 UINT8 Id; /* I/O SAPIC ID */ 1219 UINT8 Reserved; /* Reserved, must be zero */ 1220 UINT32 GlobalIrqBase; /* Global interrupt for SAPIC start */ 1221 UINT64 Address; /* SAPIC physical address */ 1222 1223 } ACPI_MADT_IO_SAPIC; 1224 1225 1226 /* 7: Local Sapic */ 1227 1228 typedef struct acpi_madt_local_sapic 1229 { 1230 ACPI_SUBTABLE_HEADER Header; 1231 UINT8 ProcessorId; /* ACPI processor id */ 1232 UINT8 Id; /* SAPIC ID */ 1233 UINT8 Eid; /* SAPIC EID */ 1234 UINT8 Reserved[3]; /* Reserved, must be zero */ 1235 UINT32 LapicFlags; 1236 UINT32 Uid; /* Numeric UID - ACPI 3.0 */ 1237 char UidString[]; /* String UID - ACPI 3.0 */ 1238 1239 } ACPI_MADT_LOCAL_SAPIC; 1240 1241 1242 /* 8: Platform Interrupt Source */ 1243 1244 typedef struct acpi_madt_interrupt_source 1245 { 1246 ACPI_SUBTABLE_HEADER Header; 1247 UINT16 IntiFlags; 1248 UINT8 Type; /* 1=PMI, 2=INIT, 3=corrected */ 1249 UINT8 Id; /* Processor ID */ 1250 UINT8 Eid; /* Processor EID */ 1251 UINT8 IoSapicVector; /* Vector value for PMI interrupts */ 1252 UINT32 GlobalIrq; /* Global system interrupt */ 1253 UINT32 Flags; /* Interrupt Source Flags */ 1254 1255 } ACPI_MADT_INTERRUPT_SOURCE; 1256 1257 /* Masks for Flags field above */ 1258 1259 #define ACPI_MADT_CPEI_OVERRIDE (1) 1260 1261 1262 /* 9: Processor Local X2APIC (ACPI 4.0) */ 1263 1264 typedef struct acpi_madt_local_x2apic 1265 { 1266 ACPI_SUBTABLE_HEADER Header; 1267 UINT16 Reserved; /* Reserved - must be zero */ 1268 UINT32 LocalApicId; /* Processor x2APIC ID */ 1269 UINT32 LapicFlags; 1270 UINT32 Uid; /* ACPI processor UID */ 1271 1272 } ACPI_MADT_LOCAL_X2APIC; 1273 1274 1275 /* 10: Local X2APIC NMI (ACPI 4.0) */ 1276 1277 typedef struct acpi_madt_local_x2apic_nmi 1278 { 1279 ACPI_SUBTABLE_HEADER Header; 1280 UINT16 IntiFlags; 1281 UINT32 Uid; /* ACPI processor UID */ 1282 UINT8 Lint; /* LINTn to which NMI is connected */ 1283 UINT8 Reserved[3]; /* Reserved - must be zero */ 1284 1285 } ACPI_MADT_LOCAL_X2APIC_NMI; 1286 1287 1288 /* 11: Generic Interrupt - GICC (ACPI 5.0 + ACPI 6.0 + ACPI 6.3 + ACPI 6.5 changes) */ 1289 1290 typedef struct acpi_madt_generic_interrupt 1291 { 1292 ACPI_SUBTABLE_HEADER Header; 1293 UINT16 Reserved; /* Reserved - must be zero */ 1294 UINT32 CpuInterfaceNumber; 1295 UINT32 Uid; 1296 UINT32 Flags; 1297 UINT32 ParkingVersion; 1298 UINT32 PerformanceInterrupt; 1299 UINT64 ParkedAddress; 1300 UINT64 BaseAddress; 1301 UINT64 GicvBaseAddress; 1302 UINT64 GichBaseAddress; 1303 UINT32 VgicInterrupt; 1304 UINT64 GicrBaseAddress; 1305 UINT64 ArmMpidr; 1306 UINT8 EfficiencyClass; 1307 UINT8 Reserved2[1]; 1308 UINT16 SpeInterrupt; /* ACPI 6.3 */ 1309 UINT16 TrbeInterrupt; /* ACPI 6.5 */ 1310 1311 } ACPI_MADT_GENERIC_INTERRUPT; 1312 1313 /* Masks for Flags field above */ 1314 1315 /* ACPI_MADT_ENABLED (1) Processor is usable if set */ 1316 #define ACPI_MADT_PERFORMANCE_IRQ_MODE (1<<1) /* 01: Performance Interrupt Mode */ 1317 #define ACPI_MADT_VGIC_IRQ_MODE (1<<2) /* 02: VGIC Maintenance Interrupt mode */ 1318 #define ACPI_MADT_GICC_ONLINE_CAPABLE (1<<3) /* 03: Processor is online capable */ 1319 #define ACPI_MADT_GICC_NON_COHERENT (1<<4) /* 04: GIC redistributor is not coherent */ 1320 1321 /* 12: Generic Distributor (ACPI 5.0 + ACPI 6.0 changes) */ 1322 1323 typedef struct acpi_madt_generic_distributor 1324 { 1325 ACPI_SUBTABLE_HEADER Header; 1326 UINT16 Reserved; /* Reserved - must be zero */ 1327 UINT32 GicId; 1328 UINT64 BaseAddress; 1329 UINT32 GlobalIrqBase; 1330 UINT8 Version; 1331 UINT8 Reserved2[3]; /* Reserved - must be zero */ 1332 1333 } ACPI_MADT_GENERIC_DISTRIBUTOR; 1334 1335 /* Values for Version field above */ 1336 1337 enum AcpiMadtGicVersion 1338 { 1339 ACPI_MADT_GIC_VERSION_NONE = 0, 1340 ACPI_MADT_GIC_VERSION_V1 = 1, 1341 ACPI_MADT_GIC_VERSION_V2 = 2, 1342 ACPI_MADT_GIC_VERSION_V3 = 3, 1343 ACPI_MADT_GIC_VERSION_V4 = 4, 1344 ACPI_MADT_GIC_VERSION_RESERVED = 5 /* 5 and greater are reserved */ 1345 }; 1346 1347 1348 /* 13: Generic MSI Frame (ACPI 5.1) */ 1349 1350 typedef struct acpi_madt_generic_msi_frame 1351 { 1352 ACPI_SUBTABLE_HEADER Header; 1353 UINT16 Reserved; /* Reserved - must be zero */ 1354 UINT32 MsiFrameId; 1355 UINT64 BaseAddress; 1356 UINT32 Flags; 1357 UINT16 SpiCount; 1358 UINT16 SpiBase; 1359 1360 } ACPI_MADT_GENERIC_MSI_FRAME; 1361 1362 /* Masks for Flags field above */ 1363 1364 #define ACPI_MADT_OVERRIDE_SPI_VALUES (1) 1365 1366 1367 /* 14: Generic Redistributor (ACPI 5.1) */ 1368 1369 typedef struct acpi_madt_generic_redistributor 1370 { 1371 ACPI_SUBTABLE_HEADER Header; 1372 UINT8 Flags; 1373 UINT8 Reserved; /* reserved - must be zero */ 1374 UINT64 BaseAddress; 1375 UINT32 Length; 1376 1377 } ACPI_MADT_GENERIC_REDISTRIBUTOR; 1378 1379 #define ACPI_MADT_GICR_NON_COHERENT (1) 1380 1381 /* 15: Generic Translator (ACPI 6.0) */ 1382 1383 typedef struct acpi_madt_generic_translator 1384 { 1385 ACPI_SUBTABLE_HEADER Header; 1386 UINT8 Flags; 1387 UINT8 Reserved; /* reserved - must be zero */ 1388 UINT32 TranslationId; 1389 UINT64 BaseAddress; 1390 UINT32 Reserved2; 1391 1392 } ACPI_MADT_GENERIC_TRANSLATOR; 1393 1394 #define ACPI_MADT_ITS_NON_COHERENT (1) 1395 1396 /* 16: Multiprocessor wakeup (ACPI 6.4) */ 1397 1398 typedef struct acpi_madt_multiproc_wakeup 1399 { 1400 ACPI_SUBTABLE_HEADER Header; 1401 UINT16 MailboxVersion; 1402 UINT32 Reserved; /* reserved - must be zero */ 1403 UINT64 BaseAddress; 1404 1405 } ACPI_MADT_MULTIPROC_WAKEUP; 1406 1407 #define ACPI_MULTIPROC_WAKEUP_MB_OS_SIZE 2032 1408 #define ACPI_MULTIPROC_WAKEUP_MB_FIRMWARE_SIZE 2048 1409 1410 typedef struct acpi_madt_multiproc_wakeup_mailbox 1411 { 1412 UINT16 Command; 1413 UINT16 Reserved; /* reserved - must be zero */ 1414 UINT32 ApicId; 1415 UINT64 WakeupVector; 1416 UINT8 ReservedOs[ACPI_MULTIPROC_WAKEUP_MB_OS_SIZE]; /* reserved for OS use */ 1417 UINT8 ReservedFirmware[ACPI_MULTIPROC_WAKEUP_MB_FIRMWARE_SIZE]; /* reserved for firmware use */ 1418 1419 } ACPI_MADT_MULTIPROC_WAKEUP_MAILBOX; 1420 1421 #define ACPI_MP_WAKE_COMMAND_WAKEUP 1 1422 1423 /* 17: CPU Core Interrupt Controller (ACPI 6.5) */ 1424 1425 typedef struct acpi_madt_core_pic { 1426 ACPI_SUBTABLE_HEADER Header; 1427 UINT8 Version; 1428 UINT32 ProcessorId; 1429 UINT32 CoreId; 1430 UINT32 Flags; 1431 } ACPI_MADT_CORE_PIC; 1432 1433 /* Values for Version field above */ 1434 1435 enum AcpiMadtCorePicVersion { 1436 ACPI_MADT_CORE_PIC_VERSION_NONE = 0, 1437 ACPI_MADT_CORE_PIC_VERSION_V1 = 1, 1438 ACPI_MADT_CORE_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */ 1439 }; 1440 1441 /* 18: Legacy I/O Interrupt Controller (ACPI 6.5) */ 1442 1443 typedef struct acpi_madt_lio_pic { 1444 ACPI_SUBTABLE_HEADER Header; 1445 UINT8 Version; 1446 UINT64 Address; 1447 UINT16 Size; 1448 UINT8 Cascade[2]; 1449 UINT32 CascadeMap[2]; 1450 } ACPI_MADT_LIO_PIC; 1451 1452 /* Values for Version field above */ 1453 1454 enum AcpiMadtLioPicVersion { 1455 ACPI_MADT_LIO_PIC_VERSION_NONE = 0, 1456 ACPI_MADT_LIO_PIC_VERSION_V1 = 1, 1457 ACPI_MADT_LIO_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */ 1458 }; 1459 1460 /* 19: HT Interrupt Controller (ACPI 6.5) */ 1461 1462 typedef struct acpi_madt_ht_pic { 1463 ACPI_SUBTABLE_HEADER Header; 1464 UINT8 Version; 1465 UINT64 Address; 1466 UINT16 Size; 1467 UINT8 Cascade[8]; 1468 } ACPI_MADT_HT_PIC; 1469 1470 /* Values for Version field above */ 1471 1472 enum AcpiMadtHtPicVersion { 1473 ACPI_MADT_HT_PIC_VERSION_NONE = 0, 1474 ACPI_MADT_HT_PIC_VERSION_V1 = 1, 1475 ACPI_MADT_HT_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */ 1476 }; 1477 1478 /* 20: Extend I/O Interrupt Controller (ACPI 6.5) */ 1479 1480 typedef struct acpi_madt_eio_pic { 1481 ACPI_SUBTABLE_HEADER Header; 1482 UINT8 Version; 1483 UINT8 Cascade; 1484 UINT8 Node; 1485 UINT64 NodeMap; 1486 } ACPI_MADT_EIO_PIC; 1487 1488 /* Values for Version field above */ 1489 1490 enum AcpiMadtEioPicVersion { 1491 ACPI_MADT_EIO_PIC_VERSION_NONE = 0, 1492 ACPI_MADT_EIO_PIC_VERSION_V1 = 1, 1493 ACPI_MADT_EIO_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */ 1494 }; 1495 1496 /* 21: MSI Interrupt Controller (ACPI 6.5) */ 1497 1498 typedef struct acpi_madt_msi_pic { 1499 ACPI_SUBTABLE_HEADER Header; 1500 UINT8 Version; 1501 UINT64 MsgAddress; 1502 UINT32 Start; 1503 UINT32 Count; 1504 } ACPI_MADT_MSI_PIC; 1505 1506 /* Values for Version field above */ 1507 1508 enum AcpiMadtMsiPicVersion { 1509 ACPI_MADT_MSI_PIC_VERSION_NONE = 0, 1510 ACPI_MADT_MSI_PIC_VERSION_V1 = 1, 1511 ACPI_MADT_MSI_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */ 1512 }; 1513 1514 /* 22: Bridge I/O Interrupt Controller (ACPI 6.5) */ 1515 1516 typedef struct acpi_madt_bio_pic { 1517 ACPI_SUBTABLE_HEADER Header; 1518 UINT8 Version; 1519 UINT64 Address; 1520 UINT16 Size; 1521 UINT16 Id; 1522 UINT16 GsiBase; 1523 } ACPI_MADT_BIO_PIC; 1524 1525 /* Values for Version field above */ 1526 1527 enum AcpiMadtBioPicVersion { 1528 ACPI_MADT_BIO_PIC_VERSION_NONE = 0, 1529 ACPI_MADT_BIO_PIC_VERSION_V1 = 1, 1530 ACPI_MADT_BIO_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */ 1531 }; 1532 1533 /* 23: LPC Interrupt Controller (ACPI 6.5) */ 1534 1535 typedef struct acpi_madt_lpc_pic { 1536 ACPI_SUBTABLE_HEADER Header; 1537 UINT8 Version; 1538 UINT64 Address; 1539 UINT16 Size; 1540 UINT8 Cascade; 1541 } ACPI_MADT_LPC_PIC; 1542 1543 /* Values for Version field above */ 1544 1545 enum AcpiMadtLpcPicVersion { 1546 ACPI_MADT_LPC_PIC_VERSION_NONE = 0, 1547 ACPI_MADT_LPC_PIC_VERSION_V1 = 1, 1548 ACPI_MADT_LPC_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */ 1549 }; 1550 1551 /* 24: RISC-V INTC */ 1552 typedef struct acpi_madt_rintc { 1553 ACPI_SUBTABLE_HEADER Header; 1554 UINT8 Version; 1555 UINT8 Reserved; 1556 UINT32 Flags; 1557 UINT64 HartId; 1558 UINT32 Uid; /* ACPI processor UID */ 1559 UINT32 ExtIntcId; /* External INTC Id */ 1560 UINT64 ImsicAddr; /* IMSIC base address */ 1561 UINT32 ImsicSize; /* IMSIC size */ 1562 } ACPI_MADT_RINTC; 1563 1564 /* Values for RISC-V INTC Version field above */ 1565 1566 enum AcpiMadtRintcVersion { 1567 ACPI_MADT_RINTC_VERSION_NONE = 0, 1568 ACPI_MADT_RINTC_VERSION_V1 = 1, 1569 ACPI_MADT_RINTC_VERSION_RESERVED = 2 /* 2 and greater are reserved */ 1570 }; 1571 1572 /* 25: RISC-V IMSIC */ 1573 typedef struct acpi_madt_imsic { 1574 ACPI_SUBTABLE_HEADER Header; 1575 UINT8 Version; 1576 UINT8 Reserved; 1577 UINT32 Flags; 1578 UINT16 NumIds; 1579 UINT16 NumGuestIds; 1580 UINT8 GuestIndexBits; 1581 UINT8 HartIndexBits; 1582 UINT8 GroupIndexBits; 1583 UINT8 GroupIndexShift; 1584 } ACPI_MADT_IMSIC; 1585 1586 /* 26: RISC-V APLIC */ 1587 typedef struct acpi_madt_aplic { 1588 ACPI_SUBTABLE_HEADER Header; 1589 UINT8 Version; 1590 UINT8 Id; 1591 UINT32 Flags; 1592 UINT8 HwId[8]; 1593 UINT16 NumIdcs; 1594 UINT16 NumSources; 1595 UINT32 GsiBase; 1596 UINT64 BaseAddr; 1597 UINT32 Size; 1598 } ACPI_MADT_APLIC; 1599 1600 /* 27: RISC-V PLIC */ 1601 typedef struct acpi_madt_plic { 1602 ACPI_SUBTABLE_HEADER Header; 1603 UINT8 Version; 1604 UINT8 Id; 1605 UINT8 HwId[8]; 1606 UINT16 NumIrqs; 1607 UINT16 MaxPrio; 1608 UINT32 Flags; 1609 UINT32 Size; 1610 UINT64 BaseAddr; 1611 UINT32 GsiBase; 1612 } ACPI_MADT_PLIC; 1613 1614 1615 /* 80: OEM data */ 1616 1617 typedef struct acpi_madt_oem_data 1618 { 1619 ACPI_FLEX_ARRAY(UINT8, OemData); 1620 } ACPI_MADT_OEM_DATA; 1621 1622 1623 /* 1624 * Common flags fields for MADT subtables 1625 */ 1626 1627 /* MADT Local APIC flags */ 1628 1629 #define ACPI_MADT_ENABLED (1) /* 00: Processor is usable if set */ 1630 #define ACPI_MADT_ONLINE_CAPABLE (2) /* 01: System HW supports enabling processor at runtime */ 1631 1632 /* MADT MPS INTI flags (IntiFlags) */ 1633 1634 #define ACPI_MADT_POLARITY_MASK (3) /* 00-01: Polarity of APIC I/O input signals */ 1635 #define ACPI_MADT_TRIGGER_MASK (3<<2) /* 02-03: Trigger mode of APIC input signals */ 1636 1637 /* Values for MPS INTI flags */ 1638 1639 #define ACPI_MADT_POLARITY_CONFORMS 0 1640 #define ACPI_MADT_POLARITY_ACTIVE_HIGH 1 1641 #define ACPI_MADT_POLARITY_RESERVED 2 1642 #define ACPI_MADT_POLARITY_ACTIVE_LOW 3 1643 1644 #define ACPI_MADT_TRIGGER_CONFORMS (0) 1645 #define ACPI_MADT_TRIGGER_EDGE (1<<2) 1646 #define ACPI_MADT_TRIGGER_RESERVED (2<<2) 1647 #define ACPI_MADT_TRIGGER_LEVEL (3<<2) 1648 1649 1650 /******************************************************************************* 1651 * 1652 * MCFG - PCI Memory Mapped Configuration table and subtable 1653 * Version 1 1654 * 1655 * Conforms to "PCI Firmware Specification", Revision 3.0, June 20, 2005 1656 * 1657 ******************************************************************************/ 1658 1659 typedef struct acpi_table_mcfg 1660 { 1661 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1662 UINT8 Reserved[8]; 1663 1664 } ACPI_TABLE_MCFG; 1665 1666 1667 /* Subtable */ 1668 1669 typedef struct acpi_mcfg_allocation 1670 { 1671 UINT64 Address; /* Base address, processor-relative */ 1672 UINT16 PciSegment; /* PCI segment group number */ 1673 UINT8 StartBusNumber; /* Starting PCI Bus number */ 1674 UINT8 EndBusNumber; /* Final PCI Bus number */ 1675 UINT32 Reserved; 1676 1677 } ACPI_MCFG_ALLOCATION; 1678 1679 1680 /******************************************************************************* 1681 * 1682 * MCHI - Management Controller Host Interface Table 1683 * Version 1 1684 * 1685 * Conforms to "Management Component Transport Protocol (MCTP) Host 1686 * Interface Specification", Revision 1.0.0a, October 13, 2009 1687 * 1688 ******************************************************************************/ 1689 1690 typedef struct acpi_table_mchi 1691 { 1692 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1693 UINT8 InterfaceType; 1694 UINT8 Protocol; 1695 UINT64 ProtocolData; 1696 UINT8 InterruptType; 1697 UINT8 Gpe; 1698 UINT8 PciDeviceFlag; 1699 UINT32 GlobalInterrupt; 1700 ACPI_GENERIC_ADDRESS ControlRegister; 1701 UINT8 PciSegment; 1702 UINT8 PciBus; 1703 UINT8 PciDevice; 1704 UINT8 PciFunction; 1705 1706 } ACPI_TABLE_MCHI; 1707 1708 /******************************************************************************* 1709 * 1710 * MPAM - Memory System Resource Partitioning and Monitoring 1711 * 1712 * Conforms to "ACPI for Memory System Resource Partitioning and Monitoring 2.0" 1713 * Document number: ARM DEN 0065, December, 2022. 1714 * 1715 ******************************************************************************/ 1716 1717 /* MPAM RIS locator types. Table 11, Location types */ 1718 enum AcpiMpamLocatorType { 1719 ACPI_MPAM_LOCATION_TYPE_PROCESSOR_CACHE = 0, 1720 ACPI_MPAM_LOCATION_TYPE_MEMORY = 1, 1721 ACPI_MPAM_LOCATION_TYPE_SMMU = 2, 1722 ACPI_MPAM_LOCATION_TYPE_MEMORY_CACHE = 3, 1723 ACPI_MPAM_LOCATION_TYPE_ACPI_DEVICE = 4, 1724 ACPI_MPAM_LOCATION_TYPE_INTERCONNECT = 5, 1725 ACPI_MPAM_LOCATION_TYPE_UNKNOWN = 0xFF 1726 }; 1727 1728 /* MPAM Functional dependency descriptor. Table 10 */ 1729 typedef struct acpi_mpam_func_deps 1730 { 1731 UINT32 Producer; 1732 UINT32 Reserved; 1733 } ACPI_MPAM_FUNC_DEPS; 1734 1735 /* MPAM Processor cache locator descriptor. Table 13 */ 1736 typedef struct acpi_mpam_resource_cache_locator 1737 { 1738 UINT64 CacheReference; 1739 UINT32 Reserved; 1740 } ACPI_MPAM_RESOURCE_CACHE_LOCATOR; 1741 1742 /* MPAM Memory locator descriptor. Table 14 */ 1743 typedef struct acpi_mpam_resource_memory_locator 1744 { 1745 UINT64 ProximityDomain; 1746 UINT32 Reserved; 1747 } ACPI_MPAM_RESOURCE_MEMORY_LOCATOR; 1748 1749 /* MPAM SMMU locator descriptor. Table 15 */ 1750 typedef struct acpi_mpam_resource_smmu_locator 1751 { 1752 UINT64 SmmuInterface; 1753 UINT32 Reserved; 1754 } ACPI_MPAM_RESOURCE_SMMU_INTERFACE; 1755 1756 /* MPAM Memory-side cache locator descriptor. Table 16 */ 1757 typedef struct acpi_mpam_resource_memcache_locator 1758 { 1759 UINT8 Reserved[7]; 1760 UINT8 Level; 1761 UINT32 Reference; 1762 } ACPI_MPAM_RESOURCE_MEMCACHE_INTERFACE; 1763 1764 /* MPAM ACPI device locator descriptor. Table 17 */ 1765 typedef struct acpi_mpam_resource_acpi_locator 1766 { 1767 UINT64 AcpiHwId; 1768 UINT32 AcpiUniqueId; 1769 } ACPI_MPAM_RESOURCE_ACPI_INTERFACE; 1770 1771 /* MPAM Interconnect locator descriptor. Table 18 */ 1772 typedef struct acpi_mpam_resource_interconnect_locator 1773 { 1774 UINT64 InterConnectDescTblOff; 1775 UINT32 Reserved; 1776 } ACPI_MPAM_RESOURCE_INTERCONNECT_INTERFACE; 1777 1778 /* MPAM Locator structure. Table 12 */ 1779 typedef struct acpi_mpam_resource_generic_locator 1780 { 1781 UINT64 Descriptor1; 1782 UINT32 Descriptor2; 1783 } ACPI_MPAM_RESOURCE_GENERIC_LOCATOR; 1784 1785 typedef union acpi_mpam_resource_locator 1786 { 1787 ACPI_MPAM_RESOURCE_CACHE_LOCATOR CacheLocator; 1788 ACPI_MPAM_RESOURCE_MEMORY_LOCATOR MemoryLocator; 1789 ACPI_MPAM_RESOURCE_SMMU_INTERFACE SmmuLocator; 1790 ACPI_MPAM_RESOURCE_MEMCACHE_INTERFACE MemCacheLocator; 1791 ACPI_MPAM_RESOURCE_ACPI_INTERFACE AcpiLocator; 1792 ACPI_MPAM_RESOURCE_INTERCONNECT_INTERFACE InterconnectIfcLocator; 1793 ACPI_MPAM_RESOURCE_GENERIC_LOCATOR GenericLocator; 1794 } ACPI_MPAM_RESOURCE_LOCATOR; 1795 1796 /* Memory System Component Resource Node Structure Table 9 */ 1797 typedef struct acpi_mpam_resource_node 1798 { 1799 UINT32 Identifier; 1800 UINT8 RISIndex; 1801 UINT16 Reserved1; 1802 UINT8 LocatorType; 1803 ACPI_MPAM_RESOURCE_LOCATOR Locator; 1804 UINT32 NumFunctionalDeps; 1805 } ACPI_MPAM_RESOURCE_NODE; 1806 1807 /* Memory System Component (MSC) Node Structure. Table 4 */ 1808 typedef struct acpi_mpam_msc_node 1809 { 1810 UINT16 Length; 1811 UINT8 InterfaceType; 1812 UINT8 Reserved; 1813 UINT32 Identifier; 1814 UINT64 BaseAddress; 1815 UINT32 MMIOSize; 1816 UINT32 OverflowInterrupt; 1817 UINT32 OverflowInterruptFlags; 1818 UINT32 Reserved1; 1819 UINT32 OverflowInterruptAffinity; 1820 UINT32 ErrorInterrupt; 1821 UINT32 ErrorInterruptFlags; 1822 UINT32 Reserved2; 1823 UINT32 ErrorInterruptAffinity; 1824 UINT32 MaxNrdyUsec; 1825 UINT64 HardwareIdLinkedDevice; 1826 UINT32 InstanceIdLinkedDevice; 1827 UINT32 NumResourceNodes; 1828 } ACPI_MPAM_MSC_NODE; 1829 1830 typedef struct acpi_table_mpam 1831 { 1832 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1833 } ACPI_TABLE_MPAM; 1834 1835 /******************************************************************************* 1836 * 1837 * MPST - Memory Power State Table (ACPI 5.0) 1838 * Version 1 1839 * 1840 ******************************************************************************/ 1841 1842 #define ACPI_MPST_CHANNEL_INFO \ 1843 UINT8 ChannelId; \ 1844 UINT8 Reserved1[3]; \ 1845 UINT16 PowerNodeCount; \ 1846 UINT16 Reserved2; 1847 1848 /* Main table */ 1849 1850 typedef struct acpi_table_mpst 1851 { 1852 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1853 ACPI_MPST_CHANNEL_INFO /* Platform Communication Channel */ 1854 1855 } ACPI_TABLE_MPST; 1856 1857 1858 /* Memory Platform Communication Channel Info */ 1859 1860 typedef struct acpi_mpst_channel 1861 { 1862 ACPI_MPST_CHANNEL_INFO /* Platform Communication Channel */ 1863 1864 } ACPI_MPST_CHANNEL; 1865 1866 1867 /* Memory Power Node Structure */ 1868 1869 typedef struct acpi_mpst_power_node 1870 { 1871 UINT8 Flags; 1872 UINT8 Reserved1; 1873 UINT16 NodeId; 1874 UINT32 Length; 1875 UINT64 RangeAddress; 1876 UINT64 RangeLength; 1877 UINT32 NumPowerStates; 1878 UINT32 NumPhysicalComponents; 1879 1880 } ACPI_MPST_POWER_NODE; 1881 1882 /* Values for Flags field above */ 1883 1884 #define ACPI_MPST_ENABLED 1 1885 #define ACPI_MPST_POWER_MANAGED 2 1886 #define ACPI_MPST_HOT_PLUG_CAPABLE 4 1887 1888 1889 /* Memory Power State Structure (follows POWER_NODE above) */ 1890 1891 typedef struct acpi_mpst_power_state 1892 { 1893 UINT8 PowerState; 1894 UINT8 InfoIndex; 1895 1896 } ACPI_MPST_POWER_STATE; 1897 1898 1899 /* Physical Component ID Structure (follows POWER_STATE above) */ 1900 1901 typedef struct acpi_mpst_component 1902 { 1903 UINT16 ComponentId; 1904 1905 } ACPI_MPST_COMPONENT; 1906 1907 1908 /* Memory Power State Characteristics Structure (follows all POWER_NODEs) */ 1909 1910 typedef struct acpi_mpst_data_hdr 1911 { 1912 UINT16 CharacteristicsCount; 1913 UINT16 Reserved; 1914 1915 } ACPI_MPST_DATA_HDR; 1916 1917 typedef struct acpi_mpst_power_data 1918 { 1919 UINT8 StructureId; 1920 UINT8 Flags; 1921 UINT16 Reserved1; 1922 UINT32 AveragePower; 1923 UINT32 PowerSaving; 1924 UINT64 ExitLatency; 1925 UINT64 Reserved2; 1926 1927 } ACPI_MPST_POWER_DATA; 1928 1929 /* Values for Flags field above */ 1930 1931 #define ACPI_MPST_PRESERVE 1 1932 #define ACPI_MPST_AUTOENTRY 2 1933 #define ACPI_MPST_AUTOEXIT 4 1934 1935 1936 /* Shared Memory Region (not part of an ACPI table) */ 1937 1938 typedef struct acpi_mpst_shared 1939 { 1940 UINT32 Signature; 1941 UINT16 PccCommand; 1942 UINT16 PccStatus; 1943 UINT32 CommandRegister; 1944 UINT32 StatusRegister; 1945 UINT32 PowerStateId; 1946 UINT32 PowerNodeId; 1947 UINT64 EnergyConsumed; 1948 UINT64 AveragePower; 1949 1950 } ACPI_MPST_SHARED; 1951 1952 1953 /******************************************************************************* 1954 * 1955 * MSCT - Maximum System Characteristics Table (ACPI 4.0) 1956 * Version 1 1957 * 1958 ******************************************************************************/ 1959 1960 typedef struct acpi_table_msct 1961 { 1962 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1963 UINT32 ProximityOffset; /* Location of proximity info struct(s) */ 1964 UINT32 MaxProximityDomains;/* Max number of proximity domains */ 1965 UINT32 MaxClockDomains; /* Max number of clock domains */ 1966 UINT64 MaxAddress; /* Max physical address in system */ 1967 1968 } ACPI_TABLE_MSCT; 1969 1970 1971 /* Subtable - Maximum Proximity Domain Information. Version 1 */ 1972 1973 typedef struct acpi_msct_proximity 1974 { 1975 UINT8 Revision; 1976 UINT8 Length; 1977 UINT32 RangeStart; /* Start of domain range */ 1978 UINT32 RangeEnd; /* End of domain range */ 1979 UINT32 ProcessorCapacity; 1980 UINT64 MemoryCapacity; /* In bytes */ 1981 1982 } ACPI_MSCT_PROXIMITY; 1983 1984 1985 /******************************************************************************* 1986 * 1987 * MSDM - Microsoft Data Management table 1988 * 1989 * Conforms to "Microsoft Software Licensing Tables (SLIC and MSDM)", 1990 * November 29, 2011. Copyright 2011 Microsoft 1991 * 1992 ******************************************************************************/ 1993 1994 /* Basic MSDM table is only the common ACPI header */ 1995 1996 typedef struct acpi_table_msdm 1997 { 1998 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1999 2000 } ACPI_TABLE_MSDM; 2001 2002 2003 /******************************************************************************* 2004 * 2005 * NFIT - NVDIMM Interface Table (ACPI 6.0+) 2006 * Version 1 2007 * 2008 ******************************************************************************/ 2009 2010 typedef struct acpi_table_nfit 2011 { 2012 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 2013 UINT32 Reserved; /* Reserved, must be zero */ 2014 2015 } ACPI_TABLE_NFIT; 2016 2017 /* Subtable header for NFIT */ 2018 2019 typedef struct acpi_nfit_header 2020 { 2021 UINT16 Type; 2022 UINT16 Length; 2023 2024 } ACPI_NFIT_HEADER; 2025 2026 2027 /* Values for subtable type in ACPI_NFIT_HEADER */ 2028 2029 enum AcpiNfitType 2030 { 2031 ACPI_NFIT_TYPE_SYSTEM_ADDRESS = 0, 2032 ACPI_NFIT_TYPE_MEMORY_MAP = 1, 2033 ACPI_NFIT_TYPE_INTERLEAVE = 2, 2034 ACPI_NFIT_TYPE_SMBIOS = 3, 2035 ACPI_NFIT_TYPE_CONTROL_REGION = 4, 2036 ACPI_NFIT_TYPE_DATA_REGION = 5, 2037 ACPI_NFIT_TYPE_FLUSH_ADDRESS = 6, 2038 ACPI_NFIT_TYPE_CAPABILITIES = 7, 2039 ACPI_NFIT_TYPE_RESERVED = 8 /* 8 and greater are reserved */ 2040 }; 2041 2042 /* 2043 * NFIT Subtables 2044 */ 2045 2046 /* 0: System Physical Address Range Structure */ 2047 2048 typedef struct acpi_nfit_system_address 2049 { 2050 ACPI_NFIT_HEADER Header; 2051 UINT16 RangeIndex; 2052 UINT16 Flags; 2053 UINT32 Reserved; /* Reserved, must be zero */ 2054 UINT32 ProximityDomain; 2055 UINT8 RangeGuid[16]; 2056 UINT64 Address; 2057 UINT64 Length; 2058 UINT64 MemoryMapping; 2059 UINT64 LocationCookie; /* ACPI 6.4 */ 2060 2061 } ACPI_NFIT_SYSTEM_ADDRESS; 2062 2063 /* Flags */ 2064 2065 #define ACPI_NFIT_ADD_ONLINE_ONLY (1) /* 00: Add/Online Operation Only */ 2066 #define ACPI_NFIT_PROXIMITY_VALID (1<<1) /* 01: Proximity Domain Valid */ 2067 #define ACPI_NFIT_LOCATION_COOKIE_VALID (1<<2) /* 02: SPA location cookie valid (ACPI 6.4) */ 2068 2069 /* Range Type GUIDs appear in the include/acuuid.h file */ 2070 2071 2072 /* 1: Memory Device to System Address Range Map Structure */ 2073 2074 typedef struct acpi_nfit_memory_map 2075 { 2076 ACPI_NFIT_HEADER Header; 2077 UINT32 DeviceHandle; 2078 UINT16 PhysicalId; 2079 UINT16 RegionId; 2080 UINT16 RangeIndex; 2081 UINT16 RegionIndex; 2082 UINT64 RegionSize; 2083 UINT64 RegionOffset; 2084 UINT64 Address; 2085 UINT16 InterleaveIndex; 2086 UINT16 InterleaveWays; 2087 UINT16 Flags; 2088 UINT16 Reserved; /* Reserved, must be zero */ 2089 2090 } ACPI_NFIT_MEMORY_MAP; 2091 2092 /* Flags */ 2093 2094 #define ACPI_NFIT_MEM_SAVE_FAILED (1) /* 00: Last SAVE to Memory Device failed */ 2095 #define ACPI_NFIT_MEM_RESTORE_FAILED (1<<1) /* 01: Last RESTORE from Memory Device failed */ 2096 #define ACPI_NFIT_MEM_FLUSH_FAILED (1<<2) /* 02: Platform flush failed */ 2097 #define ACPI_NFIT_MEM_NOT_ARMED (1<<3) /* 03: Memory Device is not armed */ 2098 #define ACPI_NFIT_MEM_HEALTH_OBSERVED (1<<4) /* 04: Memory Device observed SMART/health events */ 2099 #define ACPI_NFIT_MEM_HEALTH_ENABLED (1<<5) /* 05: SMART/health events enabled */ 2100 #define ACPI_NFIT_MEM_MAP_FAILED (1<<6) /* 06: Mapping to SPA failed */ 2101 2102 2103 /* 2: Interleave Structure */ 2104 2105 typedef struct acpi_nfit_interleave 2106 { 2107 ACPI_NFIT_HEADER Header; 2108 UINT16 InterleaveIndex; 2109 UINT16 Reserved; /* Reserved, must be zero */ 2110 UINT32 LineCount; 2111 UINT32 LineSize; 2112 UINT32 LineOffset[]; /* Variable length */ 2113 2114 } ACPI_NFIT_INTERLEAVE; 2115 2116 2117 /* 3: SMBIOS Management Information Structure */ 2118 2119 typedef struct acpi_nfit_smbios 2120 { 2121 ACPI_NFIT_HEADER Header; 2122 UINT32 Reserved; /* Reserved, must be zero */ 2123 UINT8 Data[]; /* Variable length */ 2124 2125 } ACPI_NFIT_SMBIOS; 2126 2127 2128 /* 4: NVDIMM Control Region Structure */ 2129 2130 typedef struct acpi_nfit_control_region 2131 { 2132 ACPI_NFIT_HEADER Header; 2133 UINT16 RegionIndex; 2134 UINT16 VendorId; 2135 UINT16 DeviceId; 2136 UINT16 RevisionId; 2137 UINT16 SubsystemVendorId; 2138 UINT16 SubsystemDeviceId; 2139 UINT16 SubsystemRevisionId; 2140 UINT8 ValidFields; 2141 UINT8 ManufacturingLocation; 2142 UINT16 ManufacturingDate; 2143 UINT8 Reserved[2]; /* Reserved, must be zero */ 2144 UINT32 SerialNumber; 2145 UINT16 Code; 2146 UINT16 Windows; 2147 UINT64 WindowSize; 2148 UINT64 CommandOffset; 2149 UINT64 CommandSize; 2150 UINT64 StatusOffset; 2151 UINT64 StatusSize; 2152 UINT16 Flags; 2153 UINT8 Reserved1[6]; /* Reserved, must be zero */ 2154 2155 } ACPI_NFIT_CONTROL_REGION; 2156 2157 /* Flags */ 2158 2159 #define ACPI_NFIT_CONTROL_BUFFERED (1) /* Block Data Windows implementation is buffered */ 2160 2161 /* ValidFields bits */ 2162 2163 #define ACPI_NFIT_CONTROL_MFG_INFO_VALID (1) /* Manufacturing fields are valid */ 2164 2165 2166 /* 5: NVDIMM Block Data Window Region Structure */ 2167 2168 typedef struct acpi_nfit_data_region 2169 { 2170 ACPI_NFIT_HEADER Header; 2171 UINT16 RegionIndex; 2172 UINT16 Windows; 2173 UINT64 Offset; 2174 UINT64 Size; 2175 UINT64 Capacity; 2176 UINT64 StartAddress; 2177 2178 } ACPI_NFIT_DATA_REGION; 2179 2180 2181 /* 6: Flush Hint Address Structure */ 2182 2183 typedef struct acpi_nfit_flush_address 2184 { 2185 ACPI_NFIT_HEADER Header; 2186 UINT32 DeviceHandle; 2187 UINT16 HintCount; 2188 UINT8 Reserved[6]; /* Reserved, must be zero */ 2189 UINT64 HintAddress[]; /* Variable length */ 2190 2191 } ACPI_NFIT_FLUSH_ADDRESS; 2192 2193 2194 /* 7: Platform Capabilities Structure */ 2195 2196 typedef struct acpi_nfit_capabilities 2197 { 2198 ACPI_NFIT_HEADER Header; 2199 UINT8 HighestCapability; 2200 UINT8 Reserved[3]; /* Reserved, must be zero */ 2201 UINT32 Capabilities; 2202 UINT32 Reserved2; 2203 2204 } ACPI_NFIT_CAPABILITIES; 2205 2206 /* Capabilities Flags */ 2207 2208 #define ACPI_NFIT_CAPABILITY_CACHE_FLUSH (1) /* 00: Cache Flush to NVDIMM capable */ 2209 #define ACPI_NFIT_CAPABILITY_MEM_FLUSH (1<<1) /* 01: Memory Flush to NVDIMM capable */ 2210 #define ACPI_NFIT_CAPABILITY_MEM_MIRRORING (1<<2) /* 02: Memory Mirroring capable */ 2211 2212 2213 /* 2214 * NFIT/DVDIMM device handle support - used as the _ADR for each NVDIMM 2215 */ 2216 typedef struct nfit_device_handle 2217 { 2218 UINT32 Handle; 2219 2220 } NFIT_DEVICE_HANDLE; 2221 2222 /* Device handle construction and extraction macros */ 2223 2224 #define ACPI_NFIT_DIMM_NUMBER_MASK 0x0000000F 2225 #define ACPI_NFIT_CHANNEL_NUMBER_MASK 0x000000F0 2226 #define ACPI_NFIT_MEMORY_ID_MASK 0x00000F00 2227 #define ACPI_NFIT_SOCKET_ID_MASK 0x0000F000 2228 #define ACPI_NFIT_NODE_ID_MASK 0x0FFF0000 2229 2230 #define ACPI_NFIT_DIMM_NUMBER_OFFSET 0 2231 #define ACPI_NFIT_CHANNEL_NUMBER_OFFSET 4 2232 #define ACPI_NFIT_MEMORY_ID_OFFSET 8 2233 #define ACPI_NFIT_SOCKET_ID_OFFSET 12 2234 #define ACPI_NFIT_NODE_ID_OFFSET 16 2235 2236 /* Macro to construct a NFIT/NVDIMM device handle */ 2237 2238 #define ACPI_NFIT_BUILD_DEVICE_HANDLE(dimm, channel, memory, socket, node) \ 2239 ((dimm) | \ 2240 ((channel) << ACPI_NFIT_CHANNEL_NUMBER_OFFSET) | \ 2241 ((memory) << ACPI_NFIT_MEMORY_ID_OFFSET) | \ 2242 ((socket) << ACPI_NFIT_SOCKET_ID_OFFSET) | \ 2243 ((node) << ACPI_NFIT_NODE_ID_OFFSET)) 2244 2245 /* Macros to extract individual fields from a NFIT/NVDIMM device handle */ 2246 2247 #define ACPI_NFIT_GET_DIMM_NUMBER(handle) \ 2248 ((handle) & ACPI_NFIT_DIMM_NUMBER_MASK) 2249 2250 #define ACPI_NFIT_GET_CHANNEL_NUMBER(handle) \ 2251 (((handle) & ACPI_NFIT_CHANNEL_NUMBER_MASK) >> ACPI_NFIT_CHANNEL_NUMBER_OFFSET) 2252 2253 #define ACPI_NFIT_GET_MEMORY_ID(handle) \ 2254 (((handle) & ACPI_NFIT_MEMORY_ID_MASK) >> ACPI_NFIT_MEMORY_ID_OFFSET) 2255 2256 #define ACPI_NFIT_GET_SOCKET_ID(handle) \ 2257 (((handle) & ACPI_NFIT_SOCKET_ID_MASK) >> ACPI_NFIT_SOCKET_ID_OFFSET) 2258 2259 #define ACPI_NFIT_GET_NODE_ID(handle) \ 2260 (((handle) & ACPI_NFIT_NODE_ID_MASK) >> ACPI_NFIT_NODE_ID_OFFSET) 2261 2262 2263 /******************************************************************************* 2264 * 2265 * NHLT - Non HDAudio Link Table 2266 * Version 1 2267 * 2268 ******************************************************************************/ 2269 2270 typedef struct acpi_table_nhlt 2271 { 2272 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 2273 UINT8 EndpointsCount; 2274 /* 2275 * ACPI_NHLT_ENDPOINT Endpoints[]; 2276 * ACPI_NHLT_CONFIG OEDConfig; 2277 */ 2278 2279 } ACPI_TABLE_NHLT; 2280 2281 typedef struct acpi_nhlt_endpoint 2282 { 2283 UINT32 Length; 2284 UINT8 LinkType; 2285 UINT8 InstanceId; 2286 UINT16 VendorId; 2287 UINT16 DeviceId; 2288 UINT16 RevisionId; 2289 UINT32 SubsystemId; 2290 UINT8 DeviceType; 2291 UINT8 Direction; 2292 UINT8 VirtualBusId; 2293 /* 2294 * ACPI_NHLT_CONFIG DeviceConfig; 2295 * ACPI_NHLT_FORMATS_CONFIG FormatsConfig; 2296 * ACPI_NHLT_DEVICES_INFO DevicesInfo; 2297 */ 2298 2299 } ACPI_NHLT_ENDPOINT; 2300 2301 /* Values for LinkType field above */ 2302 2303 #define ACPI_NHLT_LINKTYPE_HDA 0 2304 #define ACPI_NHLT_LINKTYPE_DSP 1 2305 #define ACPI_NHLT_LINKTYPE_PDM 2 2306 #define ACPI_NHLT_LINKTYPE_SSP 3 2307 #define ACPI_NHLT_LINKTYPE_SLIMBUS 4 2308 #define ACPI_NHLT_LINKTYPE_SDW 5 2309 #define ACPI_NHLT_LINKTYPE_UAOL 6 2310 2311 /* Values for DeviceId field above */ 2312 2313 #define ACPI_NHLT_DEVICEID_DMIC 0xAE20 2314 #define ACPI_NHLT_DEVICEID_BT 0xAE30 2315 #define ACPI_NHLT_DEVICEID_I2S 0xAE34 2316 2317 /* Values for DeviceType field above */ 2318 2319 /* Device types unique to endpoint of LinkType=PDM */ 2320 #define ACPI_NHLT_DEVICETYPE_PDM 0 2321 #define ACPI_NHLT_DEVICETYPE_PDM_SKL 1 2322 /* Device types unique to endpoint of LinkType=SSP */ 2323 #define ACPI_NHLT_DEVICETYPE_BT 0 2324 #define ACPI_NHLT_DEVICETYPE_FM 1 2325 #define ACPI_NHLT_DEVICETYPE_MODEM 2 2326 #define ACPI_NHLT_DEVICETYPE_CODEC 4 2327 2328 /* Values for Direction field above */ 2329 2330 #define ACPI_NHLT_DIR_RENDER 0 2331 #define ACPI_NHLT_DIR_CAPTURE 1 2332 2333 typedef struct acpi_nhlt_config 2334 { 2335 UINT32 CapabilitiesSize; 2336 UINT8 Capabilities[1]; 2337 2338 } ACPI_NHLT_CONFIG; 2339 2340 typedef struct acpi_nhlt_gendevice_config 2341 { 2342 UINT8 VirtualSlot; 2343 UINT8 ConfigType; 2344 2345 } ACPI_NHLT_GENDEVICE_CONFIG; 2346 2347 /* Values for ConfigType field above */ 2348 2349 #define ACPI_NHLT_CONFIGTYPE_GENERIC 0 2350 #define ACPI_NHLT_CONFIGTYPE_MICARRAY 1 2351 2352 typedef struct acpi_nhlt_micdevice_config 2353 { 2354 UINT8 VirtualSlot; 2355 UINT8 ConfigType; 2356 UINT8 ArrayType; 2357 2358 } ACPI_NHLT_MICDEVICE_CONFIG; 2359 2360 /* Values for ArrayType field above */ 2361 2362 #define ACPI_NHLT_ARRAYTYPE_LINEAR2_SMALL 0xA 2363 #define ACPI_NHLT_ARRAYTYPE_LINEAR2_BIG 0xB 2364 #define ACPI_NHLT_ARRAYTYPE_LINEAR4_GEO1 0xC 2365 #define ACPI_NHLT_ARRAYTYPE_PLANAR4_LSHAPED 0xD 2366 #define ACPI_NHLT_ARRAYTYPE_LINEAR4_GEO2 0xE 2367 #define ACPI_NHLT_ARRAYTYPE_VENDOR 0xF 2368 2369 typedef struct acpi_nhlt_vendor_mic_config 2370 { 2371 UINT8 Type; 2372 UINT8 Panel; 2373 UINT16 SpeakerPositionDistance; /* mm */ 2374 UINT16 HorizontalOffset; /* mm */ 2375 UINT16 VerticalOffset; /* mm */ 2376 UINT8 FrequencyLowBand; /* 5*Hz */ 2377 UINT8 FrequencyHighBand; /* 500*Hz */ 2378 UINT16 DirectionAngle; /* -180 - +180 */ 2379 UINT16 ElevationAngle; /* -180 - +180 */ 2380 UINT16 WorkVerticalAngleBegin; /* -180 - +180 with 2 deg step */ 2381 UINT16 WorkVerticalAngleEnd; /* -180 - +180 with 2 deg step */ 2382 UINT16 WorkHorizontalAngleBegin; /* -180 - +180 with 2 deg step */ 2383 UINT16 WorkHorizontalAngleEnd; /* -180 - +180 with 2 deg step */ 2384 2385 } ACPI_NHLT_VENDOR_MIC_CONFIG; 2386 2387 /* Values for Type field above */ 2388 2389 #define ACPI_NHLT_MICTYPE_OMNIDIRECTIONAL 0 2390 #define ACPI_NHLT_MICTYPE_SUBCARDIOID 1 2391 #define ACPI_NHLT_MICTYPE_CARDIOID 2 2392 #define ACPI_NHLT_MICTYPE_SUPERCARDIOID 3 2393 #define ACPI_NHLT_MICTYPE_HYPERCARDIOID 4 2394 #define ACPI_NHLT_MICTYPE_8SHAPED 5 2395 #define ACPI_NHLT_MICTYPE_RESERVED 6 2396 #define ACPI_NHLT_MICTYPE_VENDORDEFINED 7 2397 2398 /* Values for Panel field above */ 2399 2400 #define ACPI_NHLT_MICLOCATION_TOP 0 2401 #define ACPI_NHLT_MICLOCATION_BOTTOM 1 2402 #define ACPI_NHLT_MICLOCATION_LEFT 2 2403 #define ACPI_NHLT_MICLOCATION_RIGHT 3 2404 #define ACPI_NHLT_MICLOCATION_FRONT 4 2405 #define ACPI_NHLT_MICLOCATION_REAR 5 2406 2407 typedef struct acpi_nhlt_vendor_micdevice_config 2408 { 2409 UINT8 VirtualSlot; 2410 UINT8 ConfigType; 2411 UINT8 ArrayType; 2412 UINT8 MicsCount; 2413 ACPI_NHLT_VENDOR_MIC_CONFIG Mics[]; 2414 2415 } ACPI_NHLT_VENDOR_MICDEVICE_CONFIG; 2416 2417 typedef union acpi_nhlt_device_config 2418 { 2419 UINT8 VirtualSlot; 2420 ACPI_NHLT_GENDEVICE_CONFIG Gen; 2421 ACPI_NHLT_MICDEVICE_CONFIG Mic; 2422 ACPI_NHLT_VENDOR_MICDEVICE_CONFIG VendorMic; 2423 2424 } ACPI_NHLT_DEVICE_CONFIG; 2425 2426 /* Inherited from Microsoft's WAVEFORMATEXTENSIBLE. */ 2427 typedef struct acpi_nhlt_wave_formatext 2428 { 2429 UINT16 FormatTag; 2430 UINT16 ChannelCount; 2431 UINT32 SamplesPerSec; 2432 UINT32 AvgBytesPerSec; 2433 UINT16 BlockAlign; 2434 UINT16 BitsPerSample; 2435 UINT16 ExtraFormatSize; 2436 UINT16 ValidBitsPerSample; 2437 UINT32 ChannelMask; 2438 UINT8 Subformat[16]; 2439 2440 } ACPI_NHLT_WAVE_FORMATEXT; 2441 2442 typedef struct acpi_nhlt_format_config 2443 { 2444 ACPI_NHLT_WAVE_FORMATEXT Format; 2445 ACPI_NHLT_CONFIG Config; 2446 2447 } ACPI_NHLT_FORMAT_CONFIG; 2448 2449 typedef struct acpi_nhlt_formats_config 2450 { 2451 UINT8 FormatsCount; 2452 ACPI_NHLT_FORMAT_CONFIG Formats[]; 2453 2454 } ACPI_NHLT_FORMATS_CONFIG; 2455 2456 typedef struct acpi_nhlt_device_info 2457 { 2458 UINT8 Id[16]; 2459 UINT8 InstanceId; 2460 UINT8 PortId; 2461 2462 } ACPI_NHLT_DEVICE_INFO; 2463 2464 typedef struct acpi_nhlt_devices_info 2465 { 2466 UINT8 DevicesCount; 2467 ACPI_NHLT_DEVICE_INFO Devices[]; 2468 2469 } ACPI_NHLT_DEVICES_INFO; 2470 2471 2472 /******************************************************************************* 2473 * 2474 * PCCT - Platform Communications Channel Table (ACPI 5.0) 2475 * Version 2 (ACPI 6.2) 2476 * 2477 ******************************************************************************/ 2478 2479 typedef struct acpi_table_pcct 2480 { 2481 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 2482 UINT32 Flags; 2483 UINT64 Reserved; 2484 2485 } ACPI_TABLE_PCCT; 2486 2487 /* Values for Flags field above */ 2488 2489 #define ACPI_PCCT_DOORBELL 1 2490 2491 /* Values for subtable type in ACPI_SUBTABLE_HEADER */ 2492 2493 enum AcpiPcctType 2494 { 2495 ACPI_PCCT_TYPE_GENERIC_SUBSPACE = 0, 2496 ACPI_PCCT_TYPE_HW_REDUCED_SUBSPACE = 1, 2497 ACPI_PCCT_TYPE_HW_REDUCED_SUBSPACE_TYPE2 = 2, /* ACPI 6.1 */ 2498 ACPI_PCCT_TYPE_EXT_PCC_MASTER_SUBSPACE = 3, /* ACPI 6.2 */ 2499 ACPI_PCCT_TYPE_EXT_PCC_SLAVE_SUBSPACE = 4, /* ACPI 6.2 */ 2500 ACPI_PCCT_TYPE_HW_REG_COMM_SUBSPACE = 5, /* ACPI 6.4 */ 2501 ACPI_PCCT_TYPE_RESERVED = 6 /* 6 and greater are reserved */ 2502 }; 2503 2504 /* 2505 * PCCT Subtables, correspond to Type in ACPI_SUBTABLE_HEADER 2506 */ 2507 2508 /* 0: Generic Communications Subspace */ 2509 2510 typedef struct acpi_pcct_subspace 2511 { 2512 ACPI_SUBTABLE_HEADER Header; 2513 UINT8 Reserved[6]; 2514 UINT64 BaseAddress; 2515 UINT64 Length; 2516 ACPI_GENERIC_ADDRESS DoorbellRegister; 2517 UINT64 PreserveMask; 2518 UINT64 WriteMask; 2519 UINT32 Latency; 2520 UINT32 MaxAccessRate; 2521 UINT16 MinTurnaroundTime; 2522 2523 } ACPI_PCCT_SUBSPACE; 2524 2525 2526 /* 1: HW-reduced Communications Subspace (ACPI 5.1) */ 2527 2528 typedef struct acpi_pcct_hw_reduced 2529 { 2530 ACPI_SUBTABLE_HEADER Header; 2531 UINT32 PlatformInterrupt; 2532 UINT8 Flags; 2533 UINT8 Reserved; 2534 UINT64 BaseAddress; 2535 UINT64 Length; 2536 ACPI_GENERIC_ADDRESS DoorbellRegister; 2537 UINT64 PreserveMask; 2538 UINT64 WriteMask; 2539 UINT32 Latency; 2540 UINT32 MaxAccessRate; 2541 UINT16 MinTurnaroundTime; 2542 2543 } ACPI_PCCT_HW_REDUCED; 2544 2545 2546 /* 2: HW-reduced Communications Subspace Type 2 (ACPI 6.1) */ 2547 2548 typedef struct acpi_pcct_hw_reduced_type2 2549 { 2550 ACPI_SUBTABLE_HEADER Header; 2551 UINT32 PlatformInterrupt; 2552 UINT8 Flags; 2553 UINT8 Reserved; 2554 UINT64 BaseAddress; 2555 UINT64 Length; 2556 ACPI_GENERIC_ADDRESS DoorbellRegister; 2557 UINT64 PreserveMask; 2558 UINT64 WriteMask; 2559 UINT32 Latency; 2560 UINT32 MaxAccessRate; 2561 UINT16 MinTurnaroundTime; 2562 ACPI_GENERIC_ADDRESS PlatformAckRegister; 2563 UINT64 AckPreserveMask; 2564 UINT64 AckWriteMask; 2565 2566 } ACPI_PCCT_HW_REDUCED_TYPE2; 2567 2568 2569 /* 3: Extended PCC Master Subspace Type 3 (ACPI 6.2) */ 2570 2571 typedef struct acpi_pcct_ext_pcc_master 2572 { 2573 ACPI_SUBTABLE_HEADER Header; 2574 UINT32 PlatformInterrupt; 2575 UINT8 Flags; 2576 UINT8 Reserved1; 2577 UINT64 BaseAddress; 2578 UINT32 Length; 2579 ACPI_GENERIC_ADDRESS DoorbellRegister; 2580 UINT64 PreserveMask; 2581 UINT64 WriteMask; 2582 UINT32 Latency; 2583 UINT32 MaxAccessRate; 2584 UINT32 MinTurnaroundTime; 2585 ACPI_GENERIC_ADDRESS PlatformAckRegister; 2586 UINT64 AckPreserveMask; 2587 UINT64 AckSetMask; 2588 UINT64 Reserved2; 2589 ACPI_GENERIC_ADDRESS CmdCompleteRegister; 2590 UINT64 CmdCompleteMask; 2591 ACPI_GENERIC_ADDRESS CmdUpdateRegister; 2592 UINT64 CmdUpdatePreserveMask; 2593 UINT64 CmdUpdateSetMask; 2594 ACPI_GENERIC_ADDRESS ErrorStatusRegister; 2595 UINT64 ErrorStatusMask; 2596 2597 } ACPI_PCCT_EXT_PCC_MASTER; 2598 2599 2600 /* 4: Extended PCC Slave Subspace Type 4 (ACPI 6.2) */ 2601 2602 typedef struct acpi_pcct_ext_pcc_slave 2603 { 2604 ACPI_SUBTABLE_HEADER Header; 2605 UINT32 PlatformInterrupt; 2606 UINT8 Flags; 2607 UINT8 Reserved1; 2608 UINT64 BaseAddress; 2609 UINT32 Length; 2610 ACPI_GENERIC_ADDRESS DoorbellRegister; 2611 UINT64 PreserveMask; 2612 UINT64 WriteMask; 2613 UINT32 Latency; 2614 UINT32 MaxAccessRate; 2615 UINT32 MinTurnaroundTime; 2616 ACPI_GENERIC_ADDRESS PlatformAckRegister; 2617 UINT64 AckPreserveMask; 2618 UINT64 AckSetMask; 2619 UINT64 Reserved2; 2620 ACPI_GENERIC_ADDRESS CmdCompleteRegister; 2621 UINT64 CmdCompleteMask; 2622 ACPI_GENERIC_ADDRESS CmdUpdateRegister; 2623 UINT64 CmdUpdatePreserveMask; 2624 UINT64 CmdUpdateSetMask; 2625 ACPI_GENERIC_ADDRESS ErrorStatusRegister; 2626 UINT64 ErrorStatusMask; 2627 2628 } ACPI_PCCT_EXT_PCC_SLAVE; 2629 2630 /* 5: HW Registers based Communications Subspace */ 2631 2632 typedef struct acpi_pcct_hw_reg 2633 { 2634 ACPI_SUBTABLE_HEADER Header; 2635 UINT16 Version; 2636 UINT64 BaseAddress; 2637 UINT64 Length; 2638 ACPI_GENERIC_ADDRESS DoorbellRegister; 2639 UINT64 DoorbellPreserve; 2640 UINT64 DoorbellWrite; 2641 ACPI_GENERIC_ADDRESS CmdCompleteRegister; 2642 UINT64 CmdCompleteMask; 2643 ACPI_GENERIC_ADDRESS ErrorStatusRegister; 2644 UINT64 ErrorStatusMask; 2645 UINT32 NominalLatency; 2646 UINT32 MinTurnaroundTime; 2647 2648 } ACPI_PCCT_HW_REG; 2649 2650 2651 /* Values for doorbell flags above */ 2652 2653 #define ACPI_PCCT_INTERRUPT_POLARITY (1) 2654 #define ACPI_PCCT_INTERRUPT_MODE (1<<1) 2655 2656 2657 /* 2658 * PCC memory structures (not part of the ACPI table) 2659 */ 2660 2661 /* Shared Memory Region */ 2662 2663 typedef struct acpi_pcct_shared_memory 2664 { 2665 UINT32 Signature; 2666 UINT16 Command; 2667 UINT16 Status; 2668 2669 } ACPI_PCCT_SHARED_MEMORY; 2670 2671 2672 /* Extended PCC Subspace Shared Memory Region (ACPI 6.2) */ 2673 2674 typedef struct acpi_pcct_ext_pcc_shared_memory 2675 { 2676 UINT32 Signature; 2677 UINT32 Flags; 2678 UINT32 Length; 2679 UINT32 Command; 2680 2681 } ACPI_PCCT_EXT_PCC_SHARED_MEMORY; 2682 2683 2684 /******************************************************************************* 2685 * 2686 * PDTT - Platform Debug Trigger Table (ACPI 6.2) 2687 * Version 0 2688 * 2689 ******************************************************************************/ 2690 2691 typedef struct acpi_table_pdtt 2692 { 2693 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 2694 UINT8 TriggerCount; 2695 UINT8 Reserved[3]; 2696 UINT32 ArrayOffset; 2697 2698 } ACPI_TABLE_PDTT; 2699 2700 2701 /* 2702 * PDTT Communication Channel Identifier Structure. 2703 * The number of these structures is defined by TriggerCount above, 2704 * starting at ArrayOffset. 2705 */ 2706 typedef struct acpi_pdtt_channel 2707 { 2708 UINT8 SubchannelId; 2709 UINT8 Flags; 2710 2711 } ACPI_PDTT_CHANNEL; 2712 2713 /* Flags for above */ 2714 2715 #define ACPI_PDTT_RUNTIME_TRIGGER (1) 2716 #define ACPI_PDTT_WAIT_COMPLETION (1<<1) 2717 #define ACPI_PDTT_TRIGGER_ORDER (1<<2) 2718 2719 2720 /******************************************************************************* 2721 * 2722 * PHAT - Platform Health Assessment Table (ACPI 6.4) 2723 * Version 1 2724 * 2725 ******************************************************************************/ 2726 2727 typedef struct acpi_table_phat 2728 { 2729 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 2730 2731 } ACPI_TABLE_PHAT; 2732 2733 /* Common header for PHAT subtables that follow main table */ 2734 2735 typedef struct acpi_phat_header 2736 { 2737 UINT16 Type; 2738 UINT16 Length; 2739 UINT8 Revision; 2740 2741 } ACPI_PHAT_HEADER; 2742 2743 2744 /* Values for Type field above */ 2745 2746 #define ACPI_PHAT_TYPE_FW_VERSION_DATA 0 2747 #define ACPI_PHAT_TYPE_FW_HEALTH_DATA 1 2748 #define ACPI_PHAT_TYPE_RESERVED 2 /* 0x02-0xFFFF are reserved */ 2749 2750 /* 2751 * PHAT subtables, correspond to Type in ACPI_PHAT_HEADER 2752 */ 2753 2754 /* 0: Firmware Version Data Record */ 2755 2756 typedef struct acpi_phat_version_data 2757 { 2758 ACPI_PHAT_HEADER Header; 2759 UINT8 Reserved[3]; 2760 UINT32 ElementCount; 2761 2762 } ACPI_PHAT_VERSION_DATA; 2763 2764 typedef struct acpi_phat_version_element 2765 { 2766 UINT8 Guid[16]; 2767 UINT64 VersionValue; 2768 UINT32 ProducerId; 2769 2770 } ACPI_PHAT_VERSION_ELEMENT; 2771 2772 2773 /* 1: Firmware Health Data Record */ 2774 2775 typedef struct acpi_phat_health_data 2776 { 2777 ACPI_PHAT_HEADER Header; 2778 UINT8 Reserved[2]; 2779 UINT8 Health; 2780 UINT8 DeviceGuid[16]; 2781 UINT32 DeviceSpecificOffset; /* Zero if no Device-specific data */ 2782 2783 } ACPI_PHAT_HEALTH_DATA; 2784 2785 /* Values for Health field above */ 2786 2787 #define ACPI_PHAT_ERRORS_FOUND 0 2788 #define ACPI_PHAT_NO_ERRORS 1 2789 #define ACPI_PHAT_UNKNOWN_ERRORS 2 2790 #define ACPI_PHAT_ADVISORY 3 2791 2792 2793 /******************************************************************************* 2794 * 2795 * PMTT - Platform Memory Topology Table (ACPI 5.0) 2796 * Version 1 2797 * 2798 ******************************************************************************/ 2799 2800 typedef struct acpi_table_pmtt 2801 { 2802 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 2803 UINT32 MemoryDeviceCount; 2804 /* 2805 * Immediately followed by: 2806 * MEMORY_DEVICE MemoryDeviceStruct[MemoryDeviceCount]; 2807 */ 2808 2809 } ACPI_TABLE_PMTT; 2810 2811 2812 /* Common header for PMTT subtables that follow main table */ 2813 2814 typedef struct acpi_pmtt_header 2815 { 2816 UINT8 Type; 2817 UINT8 Reserved1; 2818 UINT16 Length; 2819 UINT16 Flags; 2820 UINT16 Reserved2; 2821 UINT32 MemoryDeviceCount; /* Zero means no memory device structs follow */ 2822 /* 2823 * Immediately followed by: 2824 * UINT8 TypeSpecificData[] 2825 * MEMORY_DEVICE MemoryDeviceStruct[MemoryDeviceCount]; 2826 */ 2827 2828 } ACPI_PMTT_HEADER; 2829 2830 /* Values for Type field above */ 2831 2832 #define ACPI_PMTT_TYPE_SOCKET 0 2833 #define ACPI_PMTT_TYPE_CONTROLLER 1 2834 #define ACPI_PMTT_TYPE_DIMM 2 2835 #define ACPI_PMTT_TYPE_RESERVED 3 /* 0x03-0xFE are reserved */ 2836 #define ACPI_PMTT_TYPE_VENDOR 0xFF 2837 2838 /* Values for Flags field above */ 2839 2840 #define ACPI_PMTT_TOP_LEVEL 0x0001 2841 #define ACPI_PMTT_PHYSICAL 0x0002 2842 #define ACPI_PMTT_MEMORY_TYPE 0x000C 2843 2844 2845 /* 2846 * PMTT subtables, correspond to Type in acpi_pmtt_header 2847 */ 2848 2849 2850 /* 0: Socket Structure */ 2851 2852 typedef struct acpi_pmtt_socket 2853 { 2854 ACPI_PMTT_HEADER Header; 2855 UINT16 SocketId; 2856 UINT16 Reserved; 2857 2858 } ACPI_PMTT_SOCKET; 2859 /* 2860 * Immediately followed by: 2861 * MEMORY_DEVICE MemoryDeviceStruct[MemoryDeviceCount]; 2862 */ 2863 2864 2865 /* 1: Memory Controller subtable */ 2866 2867 typedef struct acpi_pmtt_controller 2868 { 2869 ACPI_PMTT_HEADER Header; 2870 UINT16 ControllerId; 2871 UINT16 Reserved; 2872 2873 } ACPI_PMTT_CONTROLLER; 2874 /* 2875 * Immediately followed by: 2876 * MEMORY_DEVICE MemoryDeviceStruct[MemoryDeviceCount]; 2877 */ 2878 2879 2880 /* 2: Physical Component Identifier (DIMM) */ 2881 2882 typedef struct acpi_pmtt_physical_component 2883 { 2884 ACPI_PMTT_HEADER Header; 2885 UINT32 BiosHandle; 2886 2887 } ACPI_PMTT_PHYSICAL_COMPONENT; 2888 2889 2890 /* 0xFF: Vendor Specific Data */ 2891 2892 typedef struct acpi_pmtt_vendor_specific 2893 { 2894 ACPI_PMTT_HEADER Header; 2895 UINT8 TypeUuid[16]; 2896 UINT8 Specific[]; 2897 /* 2898 * Immediately followed by: 2899 * UINT8 VendorSpecificData[]; 2900 * MEMORY_DEVICE MemoryDeviceStruct[MemoryDeviceCount]; 2901 */ 2902 2903 } ACPI_PMTT_VENDOR_SPECIFIC; 2904 2905 2906 /******************************************************************************* 2907 * 2908 * PPTT - Processor Properties Topology Table (ACPI 6.2) 2909 * Version 1 2910 * 2911 ******************************************************************************/ 2912 2913 typedef struct acpi_table_pptt 2914 { 2915 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 2916 2917 } ACPI_TABLE_PPTT; 2918 2919 /* Values for Type field above */ 2920 2921 enum AcpiPpttType 2922 { 2923 ACPI_PPTT_TYPE_PROCESSOR = 0, 2924 ACPI_PPTT_TYPE_CACHE = 1, 2925 ACPI_PPTT_TYPE_ID = 2, 2926 ACPI_PPTT_TYPE_RESERVED = 3 2927 }; 2928 2929 2930 /* 0: Processor Hierarchy Node Structure */ 2931 2932 typedef struct acpi_pptt_processor 2933 { 2934 ACPI_SUBTABLE_HEADER Header; 2935 UINT16 Reserved; 2936 UINT32 Flags; 2937 UINT32 Parent; 2938 UINT32 AcpiProcessorId; 2939 UINT32 NumberOfPrivResources; 2940 2941 } ACPI_PPTT_PROCESSOR; 2942 2943 /* Flags */ 2944 2945 #define ACPI_PPTT_PHYSICAL_PACKAGE (1) 2946 #define ACPI_PPTT_ACPI_PROCESSOR_ID_VALID (1<<1) 2947 #define ACPI_PPTT_ACPI_PROCESSOR_IS_THREAD (1<<2) /* ACPI 6.3 */ 2948 #define ACPI_PPTT_ACPI_LEAF_NODE (1<<3) /* ACPI 6.3 */ 2949 #define ACPI_PPTT_ACPI_IDENTICAL (1<<4) /* ACPI 6.3 */ 2950 2951 2952 /* 1: Cache Type Structure */ 2953 2954 typedef struct acpi_pptt_cache 2955 { 2956 ACPI_SUBTABLE_HEADER Header; 2957 UINT16 Reserved; 2958 UINT32 Flags; 2959 UINT32 NextLevelOfCache; 2960 UINT32 Size; 2961 UINT32 NumberOfSets; 2962 UINT8 Associativity; 2963 UINT8 Attributes; 2964 UINT16 LineSize; 2965 2966 } ACPI_PPTT_CACHE; 2967 2968 /* 1: Cache Type Structure for PPTT version 3 */ 2969 2970 typedef struct acpi_pptt_cache_v1 2971 { 2972 UINT32 CacheId; 2973 2974 } ACPI_PPTT_CACHE_V1; 2975 2976 2977 /* Flags */ 2978 2979 #define ACPI_PPTT_SIZE_PROPERTY_VALID (1) /* Physical property valid */ 2980 #define ACPI_PPTT_NUMBER_OF_SETS_VALID (1<<1) /* Number of sets valid */ 2981 #define ACPI_PPTT_ASSOCIATIVITY_VALID (1<<2) /* Associativity valid */ 2982 #define ACPI_PPTT_ALLOCATION_TYPE_VALID (1<<3) /* Allocation type valid */ 2983 #define ACPI_PPTT_CACHE_TYPE_VALID (1<<4) /* Cache type valid */ 2984 #define ACPI_PPTT_WRITE_POLICY_VALID (1<<5) /* Write policy valid */ 2985 #define ACPI_PPTT_LINE_SIZE_VALID (1<<6) /* Line size valid */ 2986 #define ACPI_PPTT_CACHE_ID_VALID (1<<7) /* Cache ID valid */ 2987 2988 /* Masks for Attributes */ 2989 2990 #define ACPI_PPTT_MASK_ALLOCATION_TYPE (0x03) /* Allocation type */ 2991 #define ACPI_PPTT_MASK_CACHE_TYPE (0x0C) /* Cache type */ 2992 #define ACPI_PPTT_MASK_WRITE_POLICY (0x10) /* Write policy */ 2993 2994 /* Attributes describing cache */ 2995 #define ACPI_PPTT_CACHE_READ_ALLOCATE (0x0) /* Cache line is allocated on read */ 2996 #define ACPI_PPTT_CACHE_WRITE_ALLOCATE (0x01) /* Cache line is allocated on write */ 2997 #define ACPI_PPTT_CACHE_RW_ALLOCATE (0x02) /* Cache line is allocated on read and write */ 2998 #define ACPI_PPTT_CACHE_RW_ALLOCATE_ALT (0x03) /* Alternate representation of above */ 2999 3000 #define ACPI_PPTT_CACHE_TYPE_DATA (0x0) /* Data cache */ 3001 #define ACPI_PPTT_CACHE_TYPE_INSTR (1<<2) /* Instruction cache */ 3002 #define ACPI_PPTT_CACHE_TYPE_UNIFIED (2<<2) /* Unified I & D cache */ 3003 #define ACPI_PPTT_CACHE_TYPE_UNIFIED_ALT (3<<2) /* Alternate representation of above */ 3004 3005 #define ACPI_PPTT_CACHE_POLICY_WB (0x0) /* Cache is write back */ 3006 #define ACPI_PPTT_CACHE_POLICY_WT (1<<4) /* Cache is write through */ 3007 3008 /* 2: ID Structure */ 3009 3010 typedef struct acpi_pptt_id 3011 { 3012 ACPI_SUBTABLE_HEADER Header; 3013 UINT16 Reserved; 3014 UINT32 VendorId; 3015 UINT64 Level1Id; 3016 UINT64 Level2Id; 3017 UINT16 MajorRev; 3018 UINT16 MinorRev; 3019 UINT16 SpinRev; 3020 3021 } ACPI_PPTT_ID; 3022 3023 3024 /******************************************************************************* 3025 * 3026 * PRMT - Platform Runtime Mechanism Table 3027 * Version 1 3028 * 3029 ******************************************************************************/ 3030 3031 typedef struct acpi_table_prmt 3032 { 3033 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 3034 3035 } ACPI_TABLE_PRMT; 3036 3037 typedef struct acpi_table_prmt_header 3038 { 3039 UINT8 PlatformGuid[16]; 3040 UINT32 ModuleInfoOffset; 3041 UINT32 ModuleInfoCount; 3042 3043 } ACPI_TABLE_PRMT_HEADER; 3044 3045 typedef struct acpi_prmt_module_header 3046 { 3047 UINT16 Revision; 3048 UINT16 Length; 3049 3050 } ACPI_PRMT_MODULE_HEADER; 3051 3052 typedef struct acpi_prmt_module_info 3053 { 3054 UINT16 Revision; 3055 UINT16 Length; 3056 UINT8 ModuleGuid[16]; 3057 UINT16 MajorRev; 3058 UINT16 MinorRev; 3059 UINT16 HandlerInfoCount; 3060 UINT32 HandlerInfoOffset; 3061 UINT64 MmioListPointer; 3062 3063 } ACPI_PRMT_MODULE_INFO; 3064 3065 typedef struct acpi_prmt_handler_info 3066 { 3067 UINT16 Revision; 3068 UINT16 Length; 3069 UINT8 HandlerGuid[16]; 3070 UINT64 HandlerAddress; 3071 UINT64 StaticDataBufferAddress; 3072 UINT64 AcpiParamBufferAddress; 3073 3074 } ACPI_PRMT_HANDLER_INFO; 3075 3076 3077 /******************************************************************************* 3078 * 3079 * RASF - RAS Feature Table (ACPI 5.0) 3080 * Version 1 3081 * 3082 ******************************************************************************/ 3083 3084 typedef struct acpi_table_rasf 3085 { 3086 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 3087 UINT8 ChannelId[12]; 3088 3089 } ACPI_TABLE_RASF; 3090 3091 /* RASF Platform Communication Channel Shared Memory Region */ 3092 3093 typedef struct acpi_rasf_shared_memory 3094 { 3095 UINT32 Signature; 3096 UINT16 Command; 3097 UINT16 Status; 3098 UINT16 Version; 3099 UINT8 Capabilities[16]; 3100 UINT8 SetCapabilities[16]; 3101 UINT16 NumParameterBlocks; 3102 UINT32 SetCapabilitiesStatus; 3103 3104 } ACPI_RASF_SHARED_MEMORY; 3105 3106 /* RASF Parameter Block Structure Header */ 3107 3108 typedef struct acpi_rasf_parameter_block 3109 { 3110 UINT16 Type; 3111 UINT16 Version; 3112 UINT16 Length; 3113 3114 } ACPI_RASF_PARAMETER_BLOCK; 3115 3116 /* RASF Parameter Block Structure for PATROL_SCRUB */ 3117 3118 typedef struct acpi_rasf_patrol_scrub_parameter 3119 { 3120 ACPI_RASF_PARAMETER_BLOCK Header; 3121 UINT16 PatrolScrubCommand; 3122 UINT64 RequestedAddressRange[2]; 3123 UINT64 ActualAddressRange[2]; 3124 UINT16 Flags; 3125 UINT8 RequestedSpeed; 3126 3127 } ACPI_RASF_PATROL_SCRUB_PARAMETER; 3128 3129 /* Masks for Flags and Speed fields above */ 3130 3131 #define ACPI_RASF_SCRUBBER_RUNNING 1 3132 #define ACPI_RASF_SPEED (7<<1) 3133 #define ACPI_RASF_SPEED_SLOW (0<<1) 3134 #define ACPI_RASF_SPEED_MEDIUM (4<<1) 3135 #define ACPI_RASF_SPEED_FAST (7<<1) 3136 3137 /* Channel Commands */ 3138 3139 enum AcpiRasfCommands 3140 { 3141 ACPI_RASF_EXECUTE_RASF_COMMAND = 1 3142 }; 3143 3144 /* Platform RAS Capabilities */ 3145 3146 enum AcpiRasfCapabiliities 3147 { 3148 ACPI_HW_PATROL_SCRUB_SUPPORTED = 0, 3149 ACPI_SW_PATROL_SCRUB_EXPOSED = 1 3150 }; 3151 3152 /* Patrol Scrub Commands */ 3153 3154 enum AcpiRasfPatrolScrubCommands 3155 { 3156 ACPI_RASF_GET_PATROL_PARAMETERS = 1, 3157 ACPI_RASF_START_PATROL_SCRUBBER = 2, 3158 ACPI_RASF_STOP_PATROL_SCRUBBER = 3 3159 }; 3160 3161 /* Channel Command flags */ 3162 3163 #define ACPI_RASF_GENERATE_SCI (1<<15) 3164 3165 /* Status values */ 3166 3167 enum AcpiRasfStatus 3168 { 3169 ACPI_RASF_SUCCESS = 0, 3170 ACPI_RASF_NOT_VALID = 1, 3171 ACPI_RASF_NOT_SUPPORTED = 2, 3172 ACPI_RASF_BUSY = 3, 3173 ACPI_RASF_FAILED = 4, 3174 ACPI_RASF_ABORTED = 5, 3175 ACPI_RASF_INVALID_DATA = 6 3176 }; 3177 3178 /* Status flags */ 3179 3180 #define ACPI_RASF_COMMAND_COMPLETE (1) 3181 #define ACPI_RASF_SCI_DOORBELL (1<<1) 3182 #define ACPI_RASF_ERROR (1<<2) 3183 #define ACPI_RASF_STATUS (0x1F<<3) 3184 3185 3186 /******************************************************************************* 3187 * 3188 * RAS2 - RAS2 Feature Table (ACPI 6.5) 3189 * Version 1 3190 * 3191 * 3192 ******************************************************************************/ 3193 3194 typedef struct acpi_table_ras2 { 3195 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 3196 UINT16 Reserved; 3197 UINT16 NumPccDescs; 3198 3199 } ACPI_TABLE_RAS2; 3200 3201 /* RAS2 Platform Communication Channel Descriptor */ 3202 3203 typedef struct acpi_ras2_pcc_desc { 3204 UINT8 ChannelId; 3205 UINT16 Reserved; 3206 UINT8 FeatureType; 3207 UINT32 Instance; 3208 3209 } ACPI_RAS2_PCC_DESC; 3210 3211 /* RAS2 Platform Communication Channel Shared Memory Region */ 3212 3213 typedef struct acpi_ras2_shared_memory { 3214 UINT32 Signature; 3215 UINT16 Command; 3216 UINT16 Status; 3217 UINT16 Version; 3218 UINT8 Features[16]; 3219 UINT8 SetCapabilities[16]; 3220 UINT16 NumParameterBlocks; 3221 UINT32 SetCapabilitiesStatus; 3222 3223 } ACPI_RAS2_SHARED_MEMORY; 3224 3225 /* RAS2 Parameter Block Structure for PATROL_SCRUB */ 3226 3227 typedef struct acpi_ras2_parameter_block 3228 { 3229 UINT16 Type; 3230 UINT16 Version; 3231 UINT16 Length; 3232 3233 } ACPI_RAS2_PARAMETER_BLOCK; 3234 3235 /* RAS2 Parameter Block Structure for PATROL_SCRUB */ 3236 3237 typedef struct acpi_ras2_patrol_scrub_parameter { 3238 ACPI_RAS2_PARAMETER_BLOCK Header; 3239 UINT16 PatrolScrubCommand; 3240 UINT64 RequestedAddressRange[2]; 3241 UINT64 ActualAddressRange[2]; 3242 UINT32 Flags; 3243 UINT32 ScrubParamsOut; 3244 UINT32 ScrubParamsIn; 3245 3246 } ACPI_RAS2_PATROL_SCRUB_PARAMETER; 3247 3248 /* Masks for Flags field above */ 3249 3250 #define ACPI_RAS2_SCRUBBER_RUNNING 1 3251 3252 /* RAS2 Parameter Block Structure for LA2PA_TRANSLATION */ 3253 3254 typedef struct acpi_ras2_la2pa_translation_parameter { 3255 ACPI_RAS2_PARAMETER_BLOCK Header; 3256 UINT16 AddrTranslationCommand; 3257 UINT64 SubInstId; 3258 UINT64 LogicalAddress; 3259 UINT64 PhysicalAddress; 3260 UINT32 Status; 3261 3262 } ACPI_RAS2_LA2PA_TRANSLATION_PARAM; 3263 3264 /* Channel Commands */ 3265 3266 enum AcpiRas2Commands 3267 { 3268 ACPI_RAS2_EXECUTE_RAS2_COMMAND = 1 3269 }; 3270 3271 /* Platform RAS2 Features */ 3272 3273 enum AcpiRas2Features 3274 { 3275 ACPI_RAS2_PATROL_SCRUB_SUPPORTED = 0, 3276 ACPI_RAS2_LA2PA_TRANSLATION = 1 3277 }; 3278 3279 /* RAS2 Patrol Scrub Commands */ 3280 3281 enum AcpiRas2PatrolScrubCommands 3282 { 3283 ACPI_RAS2_GET_PATROL_PARAMETERS = 1, 3284 ACPI_RAS2_START_PATROL_SCRUBBER = 2, 3285 ACPI_RAS2_STOP_PATROL_SCRUBBER = 3 3286 }; 3287 3288 /* RAS2 LA2PA Translation Commands */ 3289 3290 enum AcpiRas2La2PaTranslationCommands 3291 { 3292 ACPI_RAS2_GET_LA2PA_TRANSLATION = 1, 3293 }; 3294 3295 /* RAS2 LA2PA Translation Status values */ 3296 3297 enum AcpiRas2La2PaTranslationStatus 3298 { 3299 ACPI_RAS2_LA2PA_TRANSLATION_SUCCESS = 0, 3300 ACPI_RAS2_LA2PA_TRANSLATION_FAIL = 1, 3301 }; 3302 3303 /* Channel Command flags */ 3304 3305 #define ACPI_RAS2_GENERATE_SCI (1<<15) 3306 3307 /* Status values */ 3308 3309 enum AcpiRas2Status 3310 { 3311 ACPI_RAS2_SUCCESS = 0, 3312 ACPI_RAS2_NOT_VALID = 1, 3313 ACPI_RAS2_NOT_SUPPORTED = 2, 3314 ACPI_RAS2_BUSY = 3, 3315 ACPI_RAS2_FAILED = 4, 3316 ACPI_RAS2_ABORTED = 5, 3317 ACPI_RAS2_INVALID_DATA = 6 3318 }; 3319 3320 /* Status flags */ 3321 3322 #define ACPI_RAS2_COMMAND_COMPLETE (1) 3323 #define ACPI_RAS2_SCI_DOORBELL (1<<1) 3324 #define ACPI_RAS2_ERROR (1<<2) 3325 #define ACPI_RAS2_STATUS (0x1F<<3) 3326 3327 3328 /******************************************************************************* 3329 * 3330 * RGRT - Regulatory Graphics Resource Table 3331 * Version 1 3332 * 3333 * Conforms to "ACPI RGRT" available at: 3334 * https://microsoft.github.io/mu/dyn/mu_plus/MsCorePkg/AcpiRGRT/feature_acpi_rgrt/ 3335 * 3336 ******************************************************************************/ 3337 3338 typedef struct acpi_table_rgrt 3339 { 3340 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 3341 UINT16 Version; 3342 UINT8 ImageType; 3343 UINT8 Reserved; 3344 UINT8 Image[]; 3345 3346 } ACPI_TABLE_RGRT; 3347 3348 /* ImageType values */ 3349 3350 enum AcpiRgrtImageType 3351 { 3352 ACPI_RGRT_TYPE_RESERVED0 = 0, 3353 ACPI_RGRT_IMAGE_TYPE_PNG = 1, 3354 ACPI_RGRT_TYPE_RESERVED = 2 /* 2 and greater are reserved */ 3355 }; 3356 3357 3358 /******************************************************************************* 3359 * 3360 * RHCT - RISC-V Hart Capabilities Table 3361 * Version 1 3362 * 3363 ******************************************************************************/ 3364 3365 typedef struct acpi_table_rhct { 3366 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 3367 UINT32 Flags; /* RHCT flags */ 3368 UINT64 TimeBaseFreq; 3369 UINT32 NodeCount; 3370 UINT32 NodeOffset; 3371 } ACPI_TABLE_RHCT; 3372 3373 /* RHCT Flags */ 3374 3375 #define ACPI_RHCT_TIMER_CANNOT_WAKEUP_CPU (1) 3376 /* 3377 * RHCT subtables 3378 */ 3379 typedef struct acpi_rhct_node_header { 3380 UINT16 Type; 3381 UINT16 Length; 3382 UINT16 Revision; 3383 } ACPI_RHCT_NODE_HEADER; 3384 3385 /* Values for RHCT subtable Type above */ 3386 3387 enum acpi_rhct_node_type { 3388 ACPI_RHCT_NODE_TYPE_ISA_STRING = 0x0000, 3389 ACPI_RHCT_NODE_TYPE_CMO = 0x0001, 3390 ACPI_RHCT_NODE_TYPE_MMU = 0x0002, 3391 ACPI_RHCT_NODE_TYPE_RESERVED = 0x0003, 3392 ACPI_RHCT_NODE_TYPE_HART_INFO = 0xFFFF, 3393 }; 3394 3395 /* 3396 * RHCT node specific subtables 3397 */ 3398 3399 /* ISA string node structure */ 3400 typedef struct acpi_rhct_isa_string { 3401 UINT16 IsaLength; 3402 char Isa[]; 3403 } ACPI_RHCT_ISA_STRING; 3404 3405 typedef struct acpi_rhct_cmo_node { 3406 UINT8 Reserved; /* Must be zero */ 3407 UINT8 CbomSize; /* CBOM size in powerof 2 */ 3408 UINT8 CbopSize; /* CBOP size in powerof 2 */ 3409 UINT8 CbozSize; /* CBOZ size in powerof 2 */ 3410 } ACPI_RHCT_CMO_NODE; 3411 3412 typedef struct acpi_rhct_mmu_node { 3413 UINT8 Reserved; /* Must be zero */ 3414 UINT8 MmuType; /* Virtual Address Scheme */ 3415 } ACPI_RHCT_MMU_NODE; 3416 3417 enum acpi_rhct_mmu_type { 3418 ACPI_RHCT_MMU_TYPE_SV39 = 0, 3419 ACPI_RHCT_MMU_TYPE_SV48 = 1, 3420 ACPI_RHCT_MMU_TYPE_SV57 = 2 3421 }; 3422 3423 /* Hart Info node structure */ 3424 typedef struct acpi_rhct_hart_info { 3425 UINT16 NumOffsets; 3426 UINT32 Uid; /* ACPI processor UID */ 3427 } ACPI_RHCT_HART_INFO; 3428 3429 /******************************************************************************* 3430 * 3431 * SBST - Smart Battery Specification Table 3432 * Version 1 3433 * 3434 ******************************************************************************/ 3435 3436 typedef struct acpi_table_sbst 3437 { 3438 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 3439 UINT32 WarningLevel; 3440 UINT32 LowLevel; 3441 UINT32 CriticalLevel; 3442 3443 } ACPI_TABLE_SBST; 3444 3445 3446 /******************************************************************************* 3447 * 3448 * SDEI - Software Delegated Exception Interface Descriptor Table 3449 * 3450 * Conforms to "Software Delegated Exception Interface (SDEI)" ARM DEN0054A, 3451 * May 8th, 2017. Copyright 2017 ARM Ltd. 3452 * 3453 ******************************************************************************/ 3454 3455 typedef struct acpi_table_sdei 3456 { 3457 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 3458 3459 } ACPI_TABLE_SDEI; 3460 3461 3462 /******************************************************************************* 3463 * 3464 * SDEV - Secure Devices Table (ACPI 6.2) 3465 * Version 1 3466 * 3467 ******************************************************************************/ 3468 3469 typedef struct acpi_table_sdev 3470 { 3471 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 3472 3473 } ACPI_TABLE_SDEV; 3474 3475 3476 typedef struct acpi_sdev_header 3477 { 3478 UINT8 Type; 3479 UINT8 Flags; 3480 UINT16 Length; 3481 3482 } ACPI_SDEV_HEADER; 3483 3484 3485 /* Values for subtable type above */ 3486 3487 enum AcpiSdevType 3488 { 3489 ACPI_SDEV_TYPE_NAMESPACE_DEVICE = 0, 3490 ACPI_SDEV_TYPE_PCIE_ENDPOINT_DEVICE = 1, 3491 ACPI_SDEV_TYPE_RESERVED = 2 /* 2 and greater are reserved */ 3492 }; 3493 3494 /* Values for flags above */ 3495 3496 #define ACPI_SDEV_HANDOFF_TO_UNSECURE_OS (1) 3497 #define ACPI_SDEV_SECURE_COMPONENTS_PRESENT (1<<1) 3498 3499 /* 3500 * SDEV subtables 3501 */ 3502 3503 /* 0: Namespace Device Based Secure Device Structure */ 3504 3505 typedef struct acpi_sdev_namespace 3506 { 3507 ACPI_SDEV_HEADER Header; 3508 UINT16 DeviceIdOffset; 3509 UINT16 DeviceIdLength; 3510 UINT16 VendorDataOffset; 3511 UINT16 VendorDataLength; 3512 3513 } ACPI_SDEV_NAMESPACE; 3514 3515 typedef struct acpi_sdev_secure_component 3516 { 3517 UINT16 SecureComponentOffset; 3518 UINT16 SecureComponentLength; 3519 3520 } ACPI_SDEV_SECURE_COMPONENT; 3521 3522 3523 /* 3524 * SDEV sub-subtables ("Components") for above 3525 */ 3526 typedef struct acpi_sdev_component 3527 { 3528 ACPI_SDEV_HEADER Header; 3529 3530 } ACPI_SDEV_COMPONENT; 3531 3532 3533 /* Values for sub-subtable type above */ 3534 3535 enum AcpiSacType 3536 { 3537 ACPI_SDEV_TYPE_ID_COMPONENT = 0, 3538 ACPI_SDEV_TYPE_MEM_COMPONENT = 1 3539 }; 3540 3541 typedef struct acpi_sdev_id_component 3542 { 3543 ACPI_SDEV_HEADER Header; 3544 UINT16 HardwareIdOffset; 3545 UINT16 HardwareIdLength; 3546 UINT16 SubsystemIdOffset; 3547 UINT16 SubsystemIdLength; 3548 UINT16 HardwareRevision; 3549 UINT8 HardwareRevPresent; 3550 UINT8 ClassCodePresent; 3551 UINT8 PciBaseClass; 3552 UINT8 PciSubClass; 3553 UINT8 PciProgrammingXface; 3554 3555 } ACPI_SDEV_ID_COMPONENT; 3556 3557 typedef struct acpi_sdev_mem_component 3558 { 3559 ACPI_SDEV_HEADER Header; 3560 UINT32 Reserved; 3561 UINT64 MemoryBaseAddress; 3562 UINT64 MemoryLength; 3563 3564 } ACPI_SDEV_MEM_COMPONENT; 3565 3566 3567 /* 1: PCIe Endpoint Device Based Device Structure */ 3568 3569 typedef struct acpi_sdev_pcie 3570 { 3571 ACPI_SDEV_HEADER Header; 3572 UINT16 Segment; 3573 UINT16 StartBus; 3574 UINT16 PathOffset; 3575 UINT16 PathLength; 3576 UINT16 VendorDataOffset; 3577 UINT16 VendorDataLength; 3578 3579 } ACPI_SDEV_PCIE; 3580 3581 /* 1a: PCIe Endpoint path entry */ 3582 3583 typedef struct acpi_sdev_pcie_path 3584 { 3585 UINT8 Device; 3586 UINT8 Function; 3587 3588 } ACPI_SDEV_PCIE_PATH; 3589 3590 3591 /******************************************************************************* 3592 * 3593 * SVKL - Storage Volume Key Location Table (ACPI 6.4) 3594 * From: "Guest-Host-Communication Interface (GHCI) for Intel 3595 * Trust Domain Extensions (Intel TDX)". 3596 * Version 1 3597 * 3598 ******************************************************************************/ 3599 3600 typedef struct acpi_table_svkl 3601 { 3602 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 3603 UINT32 Count; 3604 3605 } ACPI_TABLE_SVKL; 3606 3607 typedef struct acpi_svkl_key 3608 { 3609 UINT16 Type; 3610 UINT16 Format; 3611 UINT32 Size; 3612 UINT64 Address; 3613 3614 } ACPI_SVKL_KEY; 3615 3616 enum acpi_svkl_type 3617 { 3618 ACPI_SVKL_TYPE_MAIN_STORAGE = 0, 3619 ACPI_SVKL_TYPE_RESERVED = 1 /* 1 and greater are reserved */ 3620 }; 3621 3622 enum acpi_svkl_format 3623 { 3624 ACPI_SVKL_FORMAT_RAW_BINARY = 0, 3625 ACPI_SVKL_FORMAT_RESERVED = 1 /* 1 and greater are reserved */ 3626 }; 3627 3628 3629 /******************************************************************************* 3630 * 3631 * TDEL - TD-Event Log 3632 * From: "Guest-Host-Communication Interface (GHCI) for Intel 3633 * Trust Domain Extensions (Intel TDX)". 3634 * September 2020 3635 * 3636 ******************************************************************************/ 3637 3638 typedef struct acpi_table_tdel 3639 { 3640 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 3641 UINT32 Reserved; 3642 UINT64 LogAreaMinimumLength; 3643 UINT64 LogAreaStartAddress; 3644 3645 } ACPI_TABLE_TDEL; 3646 3647 /* Reset to default packing */ 3648 3649 #pragma pack() 3650 3651 #endif /* __ACTBL2_H__ */ 3652
Indexes created Wed Oct 01 19:09:53 GMT 2025