actbl2.h revision 1.1.1.26
1 /****************************************************************************** 2 * 3 * Name: actbl2.h - ACPI Table Definitions (tables not in ACPI spec) 4 * 5 *****************************************************************************/ 6 7 /****************************************************************************** 8 * 9 * 1. Copyright Notice 10 * 11 * Some or all of this work - Copyright (c) 1999 - 2024, Intel Corp. 12 * All rights reserved. 13 * 14 * 2. License 15 * 16 * 2.1. This is your license from Intel Corp. under its intellectual property 17 * rights. You may have additional license terms from the party that provided 18 * you this software, covering your right to use that party's intellectual 19 * property rights. 20 * 21 * 2.2. Intel grants, free of charge, to any person ("Licensee") obtaining a 22 * copy of the source code appearing in this file ("Covered Code") an 23 * irrevocable, perpetual, worldwide license under Intel's copyrights in the 24 * base code distributed originally by Intel ("Original Intel Code") to copy, 25 * make derivatives, distribute, use and display any portion of the Covered 26 * Code in any form, with the right to sublicense such rights; and 27 * 28 * 2.3. Intel grants Licensee a non-exclusive and non-transferable patent 29 * license (with the right to sublicense), under only those claims of Intel 30 * patents that are infringed by the Original Intel Code, to make, use, sell, 31 * offer to sell, and import the Covered Code and derivative works thereof 32 * solely to the minimum extent necessary to exercise the above copyright 33 * license, and in no event shall the patent license extend to any additions 34 * to or modifications of the Original Intel Code. No other license or right 35 * is granted directly or by implication, estoppel or otherwise; 36 * 37 * The above copyright and patent license is granted only if the following 38 * conditions are met: 39 * 40 * 3. Conditions 41 * 42 * 3.1. Redistribution of Source with Rights to Further Distribute Source. 43 * Redistribution of source code of any substantial portion of the Covered 44 * Code or modification with rights to further distribute source must include 45 * the above Copyright Notice, the above License, this list of Conditions, 46 * and the following Disclaimer and Export Compliance provision. In addition, 47 * Licensee must cause all Covered Code to which Licensee contributes to 48 * contain a file documenting the changes Licensee made to create that Covered 49 * Code and the date of any change. Licensee must include in that file the 50 * documentation of any changes made by any predecessor Licensee. Licensee 51 * must include a prominent statement that the modification is derived, 52 * directly or indirectly, from Original Intel Code. 53 * 54 * 3.2. Redistribution of Source with no Rights to Further Distribute Source. 55 * Redistribution of source code of any substantial portion of the Covered 56 * Code or modification without rights to further distribute source must 57 * include the following Disclaimer and Export Compliance provision in the 58 * documentation and/or other materials provided with distribution. In 59 * addition, Licensee may not authorize further sublicense of source of any 60 * portion of the Covered Code, and must include terms to the effect that the 61 * license from Licensee to its licensee is limited to the intellectual 62 * property embodied in the software Licensee provides to its licensee, and 63 * not to intellectual property embodied in modifications its licensee may 64 * make. 65 * 66 * 3.3. Redistribution of Executable. Redistribution in executable form of any 67 * substantial portion of the Covered Code or modification must reproduce the 68 * above Copyright Notice, and the following Disclaimer and Export Compliance 69 * provision in the documentation and/or other materials provided with the 70 * distribution. 71 * 72 * 3.4. Intel retains all right, title, and interest in and to the Original 73 * Intel Code. 74 * 75 * 3.5. Neither the name Intel nor any other trademark owned or controlled by 76 * Intel shall be used in advertising or otherwise to promote the sale, use or 77 * other dealings in products derived from or relating to the Covered Code 78 * without prior written authorization from Intel. 79 * 80 * 4. Disclaimer and Export Compliance 81 * 82 * 4.1. INTEL MAKES NO WARRANTY OF ANY KIND REGARDING ANY SOFTWARE PROVIDED 83 * HERE. ANY SOFTWARE ORIGINATING FROM INTEL OR DERIVED FROM INTEL SOFTWARE 84 * IS PROVIDED "AS IS," AND INTEL WILL NOT PROVIDE ANY SUPPORT, ASSISTANCE, 85 * INSTALLATION, TRAINING OR OTHER SERVICES. INTEL WILL NOT PROVIDE ANY 86 * UPDATES, ENHANCEMENTS OR EXTENSIONS. INTEL SPECIFICALLY DISCLAIMS ANY 87 * IMPLIED WARRANTIES OF MERCHANTABILITY, NONINFRINGEMENT AND FITNESS FOR A 88 * PARTICULAR PURPOSE. 89 * 90 * 4.2. IN NO EVENT SHALL INTEL HAVE ANY LIABILITY TO LICENSEE, ITS LICENSEES 91 * OR ANY OTHER THIRD PARTY, FOR ANY LOST PROFITS, LOST DATA, LOSS OF USE OR 92 * COSTS OF PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES, OR FOR ANY INDIRECT, 93 * SPECIAL OR CONSEQUENTIAL DAMAGES ARISING OUT OF THIS AGREEMENT, UNDER ANY 94 * CAUSE OF ACTION OR THEORY OF LIABILITY, AND IRRESPECTIVE OF WHETHER INTEL 95 * HAS ADVANCE NOTICE OF THE POSSIBILITY OF SUCH DAMAGES. THESE LIMITATIONS 96 * SHALL APPLY NOTWITHSTANDING THE FAILURE OF THE ESSENTIAL PURPOSE OF ANY 97 * LIMITED REMEDY. 98 * 99 * 4.3. Licensee shall not export, either directly or indirectly, any of this 100 * software or system incorporating such software without first obtaining any 101 * required license or other approval from the U. S. Department of Commerce or 102 * any other agency or department of the United States Government. In the 103 * event Licensee exports any such software from the United States or 104 * re-exports any such software from a foreign destination, Licensee shall 105 * ensure that the distribution and export/re-export of the software is in 106 * compliance with all laws, regulations, orders, or other restrictions of the 107 * U.S. Export Administration Regulations. Licensee agrees that neither it nor 108 * any of its subsidiaries will export/re-export any technical data, process, 109 * software, or service, directly or indirectly, to any country for which the 110 * United States government or any agency thereof requires an export license, 111 * other governmental approval, or letter of assurance, without first obtaining 112 * such license, approval or letter. 113 * 114 ***************************************************************************** 115 * 116 * Alternatively, you may choose to be licensed under the terms of the 117 * following license: 118 * 119 * Redistribution and use in source and binary forms, with or without 120 * modification, are permitted provided that the following conditions 121 * are met: 122 * 1. Redistributions of source code must retain the above copyright 123 * notice, this list of conditions, and the following disclaimer, 124 * without modification. 125 * 2. Redistributions in binary form must reproduce at minimum a disclaimer 126 * substantially similar to the "NO WARRANTY" disclaimer below 127 * ("Disclaimer") and any redistribution must be conditioned upon 128 * including a substantially similar Disclaimer requirement for further 129 * binary redistribution. 130 * 3. Neither the names of the above-listed copyright holders nor the names 131 * of any contributors may be used to endorse or promote products derived 132 * from this software without specific prior written permission. 133 * 134 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 135 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 136 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 137 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 138 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 139 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 140 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 141 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 142 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 143 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 144 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 145 * 146 * Alternatively, you may choose to be licensed under the terms of the 147 * GNU General Public License ("GPL") version 2 as published by the Free 148 * Software Foundation. 149 * 150 *****************************************************************************/ 151 152 #ifndef __ACTBL2_H__ 153 #define __ACTBL2_H__ 154 155 156 /******************************************************************************* 157 * 158 * Additional ACPI Tables (2) 159 * 160 * These tables are not consumed directly by the ACPICA subsystem, but are 161 * included here to support device drivers and the AML disassembler. 162 * 163 ******************************************************************************/ 164 165 166 /* 167 * Values for description table header signatures for tables defined in this 168 * file. Useful because they make it more difficult to inadvertently type in 169 * the wrong signature. 170 */ 171 #define ACPI_SIG_AGDI "AGDI" /* Arm Generic Diagnostic Dump and Reset Device Interface */ 172 #define ACPI_SIG_APMT "APMT" /* Arm Performance Monitoring Unit table */ 173 #define ACPI_SIG_BDAT "BDAT" /* BIOS Data ACPI Table */ 174 #define ACPI_SIG_CCEL "CCEL" /* CC Event Log Table */ 175 #define ACPI_SIG_CDAT "CDAT" /* Coherent Device Attribute Table */ 176 #define ACPI_SIG_IORT "IORT" /* IO Remapping Table */ 177 #define ACPI_SIG_IVRS "IVRS" /* I/O Virtualization Reporting Structure */ 178 #define ACPI_SIG_LPIT "LPIT" /* Low Power Idle Table */ 179 #define ACPI_SIG_MADT "APIC" /* Multiple APIC Description Table */ 180 #define ACPI_SIG_MCFG "MCFG" /* PCI Memory Mapped Configuration table */ 181 #define ACPI_SIG_MCHI "MCHI" /* Management Controller Host Interface table */ 182 #define ACPI_SIG_MPAM "MPAM" /* Memory System Resource Partitioning and Monitoring Table */ 183 #define ACPI_SIG_MPST "MPST" /* Memory Power State Table */ 184 #define ACPI_SIG_MSDM "MSDM" /* Microsoft Data Management Table */ 185 #define ACPI_SIG_NFIT "NFIT" /* NVDIMM Firmware Interface Table */ 186 #define ACPI_SIG_NHLT "NHLT" /* Non HD Audio Link Table */ 187 #define ACPI_SIG_PCCT "PCCT" /* Platform Communications Channel Table */ 188 #define ACPI_SIG_PDTT "PDTT" /* Platform Debug Trigger Table */ 189 #define ACPI_SIG_PHAT "PHAT" /* Platform Health Assessment Table */ 190 #define ACPI_SIG_PMTT "PMTT" /* Platform Memory Topology Table */ 191 #define ACPI_SIG_PPTT "PPTT" /* Processor Properties Topology Table */ 192 #define ACPI_SIG_PRMT "PRMT" /* Platform Runtime Mechanism Table */ 193 #define ACPI_SIG_RASF "RASF" /* RAS Feature table */ 194 #define ACPI_SIG_RAS2 "RAS2" /* RAS2 Feature table */ 195 #define ACPI_SIG_RGRT "RGRT" /* Regulatory Graphics Resource Table */ 196 #define ACPI_SIG_RHCT "RHCT" /* RISC-V Hart Capabilities Table */ 197 #define ACPI_SIG_SBST "SBST" /* Smart Battery Specification Table */ 198 #define ACPI_SIG_SDEI "SDEI" /* Software Delegated Exception Interface Table */ 199 #define ACPI_SIG_SDEV "SDEV" /* Secure Devices table */ 200 #define ACPI_SIG_SVKL "SVKL" /* Storage Volume Key Location Table */ 201 #define ACPI_SIG_TDEL "TDEL" /* TD Event Log Table */ 202 203 204 /* 205 * All tables must be byte-packed to match the ACPI specification, since 206 * the tables are provided by the system BIOS. 207 */ 208 #pragma pack(1) 209 210 /* 211 * Note: C bitfields are not used for this reason: 212 * 213 * "Bitfields are great and easy to read, but unfortunately the C language 214 * does not specify the layout of bitfields in memory, which means they are 215 * essentially useless for dealing with packed data in on-disk formats or 216 * binary wire protocols." (Or ACPI tables and buffers.) "If you ask me, 217 * this decision was a design error in C. Ritchie could have picked an order 218 * and stuck with it." Norman Ramsey. 219 * See http://stackoverflow.com/a/1053662/41661 220 */ 221 222 223 /******************************************************************************* 224 * 225 * AEST - Arm Error Source Table 226 * 227 * Conforms to: ACPI for the Armv8 RAS Extensions 1.1 Platform Design Document 228 * September 2020. 229 * 230 ******************************************************************************/ 231 232 typedef struct acpi_table_aest 233 { 234 ACPI_TABLE_HEADER Header; 235 236 } ACPI_TABLE_AEST; 237 238 /* Common Subtable header - one per Node Structure (Subtable) */ 239 240 typedef struct acpi_aest_hdr 241 { 242 UINT8 Type; 243 UINT16 Length; 244 UINT8 Reserved; 245 UINT32 NodeSpecificOffset; 246 UINT32 NodeInterfaceOffset; 247 UINT32 NodeInterruptOffset; 248 UINT32 NodeInterruptCount; 249 UINT64 TimestampRate; 250 UINT64 Reserved1; 251 UINT64 ErrorInjectionRate; 252 253 } ACPI_AEST_HEADER; 254 255 /* Values for Type above */ 256 257 #define ACPI_AEST_PROCESSOR_ERROR_NODE 0 258 #define ACPI_AEST_MEMORY_ERROR_NODE 1 259 #define ACPI_AEST_SMMU_ERROR_NODE 2 260 #define ACPI_AEST_VENDOR_ERROR_NODE 3 261 #define ACPI_AEST_GIC_ERROR_NODE 4 262 #define ACPI_AEST_PCIE_ERROR_NODE 5 263 #define ACPI_AEST_PROXY_ERROR_NODE 6 264 #define ACPI_AEST_NODE_TYPE_RESERVED 7 /* 7 and above are reserved */ 265 266 267 /* 268 * AEST subtables (Error nodes) 269 */ 270 271 /* 0: Processor Error */ 272 273 typedef struct acpi_aest_processor 274 { 275 UINT32 ProcessorId; 276 UINT8 ResourceType; 277 UINT8 Reserved; 278 UINT8 Flags; 279 UINT8 Revision; 280 UINT64 ProcessorAffinity; 281 282 } ACPI_AEST_PROCESSOR; 283 284 /* Values for ResourceType above, related structs below */ 285 286 #define ACPI_AEST_CACHE_RESOURCE 0 287 #define ACPI_AEST_TLB_RESOURCE 1 288 #define ACPI_AEST_GENERIC_RESOURCE 2 289 #define ACPI_AEST_RESOURCE_RESERVED 3 /* 3 and above are reserved */ 290 291 /* 0R: Processor Cache Resource Substructure */ 292 293 typedef struct acpi_aest_processor_cache 294 { 295 UINT32 CacheReference; 296 UINT32 Reserved; 297 298 } ACPI_AEST_PROCESSOR_CACHE; 299 300 /* Values for CacheType above */ 301 302 #define ACPI_AEST_CACHE_DATA 0 303 #define ACPI_AEST_CACHE_INSTRUCTION 1 304 #define ACPI_AEST_CACHE_UNIFIED 2 305 #define ACPI_AEST_CACHE_RESERVED 3 /* 3 and above are reserved */ 306 307 /* 1R: Processor TLB Resource Substructure */ 308 309 typedef struct acpi_aest_processor_tlb 310 { 311 UINT32 TlbLevel; 312 UINT32 Reserved; 313 314 } ACPI_AEST_PROCESSOR_TLB; 315 316 /* 2R: Processor Generic Resource Substructure */ 317 318 typedef struct acpi_aest_processor_generic 319 { 320 UINT32 Resource; 321 322 } ACPI_AEST_PROCESSOR_GENERIC; 323 324 /* 1: Memory Error */ 325 326 typedef struct acpi_aest_memory 327 { 328 UINT32 SratProximityDomain; 329 330 } ACPI_AEST_MEMORY; 331 332 /* 2: Smmu Error */ 333 334 typedef struct acpi_aest_smmu 335 { 336 UINT32 IortNodeReference; 337 UINT32 SubcomponentReference; 338 339 } ACPI_AEST_SMMU; 340 341 /* 3: Vendor Defined */ 342 343 typedef struct acpi_aest_vendor 344 { 345 UINT32 AcpiHid; 346 UINT32 AcpiUid; 347 UINT8 VendorSpecificData[16]; 348 349 } ACPI_AEST_VENDOR; 350 351 /* 3: Vendor Defined V2 */ 352 353 typedef struct acpi_aest_vendor_v2 354 { 355 UINT64 AcpiHid; 356 UINT32 AcpiUid; 357 UINT8 VendorSpecificData[16]; 358 359 } ACPI_AEST_VENDOR_V2; 360 361 /* 4: Gic Error */ 362 363 typedef struct acpi_aest_gic 364 { 365 UINT32 InterfaceType; 366 UINT32 InstanceId; 367 368 } ACPI_AEST_GIC; 369 370 /* Values for InterfaceType above */ 371 372 #define ACPI_AEST_GIC_CPU 0 373 #define ACPI_AEST_GIC_DISTRIBUTOR 1 374 #define ACPI_AEST_GIC_REDISTRIBUTOR 2 375 #define ACPI_AEST_GIC_ITS 3 376 #define ACPI_AEST_GIC_RESERVED 4 /* 4 and above are reserved */ 377 378 /* 5: PCIe Error */ 379 380 typedef struct acpi_aest_pcie 381 { 382 UINT32 IortNodeReference; 383 384 } ACPI_AEST_PCIE; 385 386 387 /* 6: Proxy Error */ 388 389 typedef struct acpi_aest_proxy 390 { 391 UINT64 NodeAddress; 392 393 } ACPI_AEST_PROXY; 394 395 /* Node Interface Structure */ 396 397 typedef struct acpi_aest_node_interface 398 { 399 UINT8 Type; 400 UINT8 Reserved[3]; 401 UINT32 Flags; 402 UINT64 Address; 403 UINT32 ErrorRecordIndex; 404 UINT32 ErrorRecordCount; 405 UINT64 ErrorRecordImplemented; 406 UINT64 ErrorStatusReporting; 407 UINT64 AddressingMode; 408 409 } ACPI_AEST_NODE_INTERFACE; 410 411 /* Node Interface Structure V2*/ 412 413 typedef struct acpi_aest_node_interface_header 414 { 415 UINT8 Type; 416 UINT8 GroupFormat; 417 UINT8 Reserved[2]; 418 UINT32 Flags; 419 UINT64 Address; 420 UINT32 ErrorRecordIndex; 421 UINT32 ErrorRecordCount; 422 423 } ACPI_AEST_NODE_INTERFACE_HEADER; 424 425 #define ACPI_AEST_NODE_GROUP_FORMAT_4K 0 426 #define ACPI_AEST_NODE_GROUP_FORMAT_16K 1 427 #define ACPI_AEST_NODE_GROUP_FORMAT_64K 2 428 429 typedef struct acpi_aest_node_interface_common 430 { 431 UINT32 ErrorNodeDevice; 432 UINT32 ProcessorAffinity; 433 UINT64 ErrorGroupRegisterBase; 434 UINT64 FaultInjectRegisterBase; 435 UINT64 InterruptConfigRegisterBase; 436 437 } ACPI_AEST_NODE_INTERFACE_COMMON; 438 439 typedef struct acpi_aest_node_interface_4k 440 { 441 UINT64 ErrorRecordImplemented; 442 UINT64 ErrorStatusReporting; 443 UINT64 AddressingMode; 444 ACPI_AEST_NODE_INTERFACE_COMMON Common; 445 446 } ACPI_AEST_NODE_INTERFACE_4K; 447 448 typedef struct acpi_aest_node_interface_16k 449 { 450 UINT64 ErrorRecordImplemented[4]; 451 UINT64 ErrorStatusReporting[4]; 452 UINT64 AddressingMode[4]; 453 ACPI_AEST_NODE_INTERFACE_COMMON Common; 454 455 } ACPI_AEST_NODE_INTERFACE_16K; 456 457 typedef struct acpi_aest_node_interface_64k 458 { 459 INT64 ErrorRecordImplemented[14]; 460 UINT64 ErrorStatusReporting[14]; 461 UINT64 AddressingMode[14]; 462 ACPI_AEST_NODE_INTERFACE_COMMON Common; 463 464 } ACPI_AEST_NODE_INTERFACE_64K; 465 466 /* Values for Type field above */ 467 468 #define ACPI_AEST_NODE_SYSTEM_REGISTER 0 469 #define ACPI_AEST_NODE_MEMORY_MAPPED 1 470 #define ACPI_AEST_NODE_SINGLE_RECORD_MEMORY_MAPPED 2 471 #define ACPI_AEST_XFACE_RESERVED 3 /* 2 and above are reserved */ 472 473 /* Node Interrupt Structure */ 474 475 typedef struct acpi_aest_node_interrupt 476 { 477 UINT8 Type; 478 UINT8 Reserved[2]; 479 UINT8 Flags; 480 UINT32 Gsiv; 481 UINT8 IortId; 482 UINT8 Reserved1[3]; 483 484 } ACPI_AEST_NODE_INTERRUPT; 485 486 /* Node Interrupt Structure V2 */ 487 488 typedef struct acpi_aest_node_interrupt_v2 489 { 490 UINT8 Type; 491 UINT8 Reserved[2]; 492 UINT8 Flags; 493 UINT32 Gsiv; 494 UINT8 Reserved1[4]; 495 496 } ACPI_AEST_NODE_INTERRUPT_V2; 497 498 /* Values for Type field above */ 499 500 #define ACPI_AEST_NODE_FAULT_HANDLING 0 501 #define ACPI_AEST_NODE_ERROR_RECOVERY 1 502 #define ACPI_AEST_XRUPT_RESERVED 2 /* 2 and above are reserved */ 503 504 505 /******************************************************************************* 506 * AGDI - Arm Generic Diagnostic Dump and Reset Device Interface 507 * 508 * Conforms to "ACPI for Arm Components 1.1, Platform Design Document" 509 * ARM DEN0093 v1.1 510 * 511 ******************************************************************************/ 512 typedef struct acpi_table_agdi 513 { 514 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 515 UINT8 Flags; 516 UINT8 Reserved[3]; 517 UINT32 SdeiEvent; 518 UINT32 Gsiv; 519 520 } ACPI_TABLE_AGDI; 521 522 /* Mask for Flags field above */ 523 524 #define ACPI_AGDI_SIGNALING_MODE (1) 525 526 527 /******************************************************************************* 528 * 529 * APMT - ARM Performance Monitoring Unit Table 530 * 531 * Conforms to: 532 * ARM Performance Monitoring Unit Architecture 1.0 Platform Design Document 533 * ARM DEN0117 v1.0 November 25, 2021 534 * 535 ******************************************************************************/ 536 537 typedef struct acpi_table_apmt { 538 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 539 } ACPI_TABLE_APMT; 540 541 #define ACPI_APMT_NODE_ID_LENGTH 4 542 543 /* 544 * APMT subtables 545 */ 546 typedef struct acpi_apmt_node { 547 UINT16 Length; 548 UINT8 Flags; 549 UINT8 Type; 550 UINT32 Id; 551 UINT64 InstPrimary; 552 UINT32 InstSecondary; 553 UINT64 BaseAddress0; 554 UINT64 BaseAddress1; 555 UINT32 OvflwIrq; 556 UINT32 Reserved; 557 UINT32 OvflwIrqFlags; 558 UINT32 ProcAffinity; 559 UINT32 ImplId; 560 } ACPI_APMT_NODE; 561 562 /* Masks for Flags field above */ 563 564 #define ACPI_APMT_FLAGS_DUAL_PAGE (1<<0) 565 #define ACPI_APMT_FLAGS_AFFINITY (1<<1) 566 #define ACPI_APMT_FLAGS_ATOMIC (1<<2) 567 568 /* Values for Flags dual page field above */ 569 570 #define ACPI_APMT_FLAGS_DUAL_PAGE_NSUPP (0<<0) 571 #define ACPI_APMT_FLAGS_DUAL_PAGE_SUPP (1<<0) 572 573 /* Values for Flags processor affinity field above */ 574 #define ACPI_APMT_FLAGS_AFFINITY_PROC (0<<1) 575 #define ACPI_APMT_FLAGS_AFFINITY_PROC_CONTAINER (1<<1) 576 577 /* Values for Flags 64-bit atomic field above */ 578 #define ACPI_APMT_FLAGS_ATOMIC_NSUPP (0<<2) 579 #define ACPI_APMT_FLAGS_ATOMIC_SUPP (1<<2) 580 581 /* Values for Type field above */ 582 583 enum acpi_apmt_node_type { 584 ACPI_APMT_NODE_TYPE_MC = 0x00, 585 ACPI_APMT_NODE_TYPE_SMMU = 0x01, 586 ACPI_APMT_NODE_TYPE_PCIE_ROOT = 0x02, 587 ACPI_APMT_NODE_TYPE_ACPI = 0x03, 588 ACPI_APMT_NODE_TYPE_CACHE = 0x04, 589 ACPI_APMT_NODE_TYPE_COUNT 590 }; 591 592 /* Masks for ovflw_irq_flags field above */ 593 594 #define ACPI_APMT_OVFLW_IRQ_FLAGS_MODE (1<<0) 595 #define ACPI_APMT_OVFLW_IRQ_FLAGS_TYPE (1<<1) 596 597 /* Values for ovflw_irq_flags mode field above */ 598 599 #define ACPI_APMT_OVFLW_IRQ_FLAGS_MODE_LEVEL (0<<0) 600 #define ACPI_APMT_OVFLW_IRQ_FLAGS_MODE_EDGE (1<<0) 601 602 /* Values for ovflw_irq_flags type field above */ 603 604 #define ACPI_APMT_OVFLW_IRQ_FLAGS_TYPE_WIRED (0<<1) 605 606 607 /******************************************************************************* 608 * 609 * BDAT - BIOS Data ACPI Table 610 * 611 * Conforms to "BIOS Data ACPI Table", Interface Specification v4.0 Draft 5 612 * Nov 2020 613 * 614 ******************************************************************************/ 615 616 typedef struct acpi_table_bdat 617 { 618 ACPI_TABLE_HEADER Header; 619 ACPI_GENERIC_ADDRESS Gas; 620 621 } ACPI_TABLE_BDAT; 622 623 /******************************************************************************* 624 * 625 * CCEL - CC-Event Log 626 * From: "Guest-Host-Communication Interface (GHCI) for Intel 627 * Trust Domain Extensions (Intel TDX)". Feb 2022 628 * 629 ******************************************************************************/ 630 631 typedef struct acpi_table_ccel 632 { 633 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 634 UINT8 CCType; 635 UINT8 CCSubType; 636 UINT16 Reserved; 637 UINT64 LogAreaMinimumLength; 638 UINT64 LogAreaStartAddress; 639 640 } ACPI_TABLE_CCEL; 641 642 /******************************************************************************* 643 * 644 * IORT - IO Remapping Table 645 * 646 * Conforms to "IO Remapping Table System Software on ARM Platforms", 647 * Document number: ARM DEN 0049E.f, Apr 2024 648 * 649 ******************************************************************************/ 650 651 typedef struct acpi_table_iort 652 { 653 ACPI_TABLE_HEADER Header; 654 UINT32 NodeCount; 655 UINT32 NodeOffset; 656 UINT32 Reserved; 657 658 } ACPI_TABLE_IORT; 659 660 661 /* 662 * IORT subtables 663 */ 664 typedef struct acpi_iort_node 665 { 666 UINT8 Type; 667 UINT16 Length; 668 UINT8 Revision; 669 UINT32 Identifier; 670 UINT32 MappingCount; 671 UINT32 MappingOffset; 672 char NodeData[]; 673 674 } ACPI_IORT_NODE; 675 676 /* Values for subtable Type above */ 677 678 enum AcpiIortNodeType 679 { 680 ACPI_IORT_NODE_ITS_GROUP = 0x00, 681 ACPI_IORT_NODE_NAMED_COMPONENT = 0x01, 682 ACPI_IORT_NODE_PCI_ROOT_COMPLEX = 0x02, 683 ACPI_IORT_NODE_SMMU = 0x03, 684 ACPI_IORT_NODE_SMMU_V3 = 0x04, 685 ACPI_IORT_NODE_PMCG = 0x05, 686 ACPI_IORT_NODE_RMR = 0x06, 687 }; 688 689 690 typedef struct acpi_iort_id_mapping 691 { 692 UINT32 InputBase; /* Lowest value in input range */ 693 UINT32 IdCount; /* Number of IDs */ 694 UINT32 OutputBase; /* Lowest value in output range */ 695 UINT32 OutputReference; /* A reference to the output node */ 696 UINT32 Flags; 697 698 } ACPI_IORT_ID_MAPPING; 699 700 /* Masks for Flags field above for IORT subtable */ 701 702 #define ACPI_IORT_ID_SINGLE_MAPPING (1) 703 704 705 typedef struct acpi_iort_memory_access 706 { 707 UINT32 CacheCoherency; 708 UINT8 Hints; 709 UINT16 Reserved; 710 UINT8 MemoryFlags; 711 712 } ACPI_IORT_MEMORY_ACCESS; 713 714 /* Values for CacheCoherency field above */ 715 716 #define ACPI_IORT_NODE_COHERENT 0x00000001 /* The device node is fully coherent */ 717 #define ACPI_IORT_NODE_NOT_COHERENT 0x00000000 /* The device node is not coherent */ 718 719 /* Masks for Hints field above */ 720 721 #define ACPI_IORT_HT_TRANSIENT (1) 722 #define ACPI_IORT_HT_WRITE (1<<1) 723 #define ACPI_IORT_HT_READ (1<<2) 724 #define ACPI_IORT_HT_OVERRIDE (1<<3) 725 726 /* Masks for MemoryFlags field above */ 727 728 #define ACPI_IORT_MF_COHERENCY (1) 729 #define ACPI_IORT_MF_ATTRIBUTES (1<<1) 730 #define ACPI_IORT_MF_CANWBS (1<<2) 731 732 733 /* 734 * IORT node specific subtables 735 */ 736 typedef struct acpi_iort_its_group 737 { 738 UINT32 ItsCount; 739 UINT32 Identifiers[]; /* GIC ITS identifier array */ 740 741 } ACPI_IORT_ITS_GROUP; 742 743 744 typedef struct acpi_iort_named_component 745 { 746 UINT32 NodeFlags; 747 UINT64 MemoryProperties; /* Memory access properties */ 748 UINT8 MemoryAddressLimit; /* Memory address size limit */ 749 char DeviceName[]; /* Path of namespace object */ 750 751 } ACPI_IORT_NAMED_COMPONENT; 752 753 /* Masks for Flags field above */ 754 755 #define ACPI_IORT_NC_STALL_SUPPORTED (1) 756 #define ACPI_IORT_NC_PASID_BITS (31<<1) 757 758 typedef struct acpi_iort_root_complex 759 { 760 UINT64 MemoryProperties; /* Memory access properties */ 761 UINT32 AtsAttribute; 762 UINT32 PciSegmentNumber; 763 UINT8 MemoryAddressLimit; /* Memory address size limit */ 764 UINT16 PasidCapabilities; /* PASID Capabilities */ 765 UINT8 Reserved[]; /* Reserved, must be zero */ 766 767 } ACPI_IORT_ROOT_COMPLEX; 768 769 /* Masks for AtsAttribute field above */ 770 771 #define ACPI_IORT_ATS_SUPPORTED (1) /* The root complex ATS support */ 772 #define ACPI_IORT_PRI_SUPPORTED (1<<1) /* The root complex PRI support */ 773 #define ACPI_IORT_PASID_FWD_SUPPORTED (1<<2) /* The root complex PASID forward support */ 774 775 /* Masks for PasidCapabilities field above */ 776 #define ACPI_IORT_PASID_MAX_WIDTH (0x1F) /* Bits 0-4 */ 777 778 typedef struct acpi_iort_smmu 779 { 780 UINT64 BaseAddress; /* SMMU base address */ 781 UINT64 Span; /* Length of memory range */ 782 UINT32 Model; 783 UINT32 Flags; 784 UINT32 GlobalInterruptOffset; 785 UINT32 ContextInterruptCount; 786 UINT32 ContextInterruptOffset; 787 UINT32 PmuInterruptCount; 788 UINT32 PmuInterruptOffset; 789 UINT64 Interrupts[]; /* Interrupt array */ 790 791 } ACPI_IORT_SMMU; 792 793 /* Values for Model field above */ 794 795 #define ACPI_IORT_SMMU_V1 0x00000000 /* Generic SMMUv1 */ 796 #define ACPI_IORT_SMMU_V2 0x00000001 /* Generic SMMUv2 */ 797 #define ACPI_IORT_SMMU_CORELINK_MMU400 0x00000002 /* ARM Corelink MMU-400 */ 798 #define ACPI_IORT_SMMU_CORELINK_MMU500 0x00000003 /* ARM Corelink MMU-500 */ 799 #define ACPI_IORT_SMMU_CORELINK_MMU401 0x00000004 /* ARM Corelink MMU-401 */ 800 #define ACPI_IORT_SMMU_CAVIUM_THUNDERX 0x00000005 /* Cavium ThunderX SMMUv2 */ 801 802 /* Masks for Flags field above */ 803 804 #define ACPI_IORT_SMMU_DVM_SUPPORTED (1) 805 #define ACPI_IORT_SMMU_COHERENT_WALK (1<<1) 806 807 /* Global interrupt format */ 808 809 typedef struct acpi_iort_smmu_gsi 810 { 811 UINT32 NSgIrpt; 812 UINT32 NSgIrptFlags; 813 UINT32 NSgCfgIrpt; 814 UINT32 NSgCfgIrptFlags; 815 816 } ACPI_IORT_SMMU_GSI; 817 818 819 typedef struct acpi_iort_smmu_v3 820 { 821 UINT64 BaseAddress; /* SMMUv3 base address */ 822 UINT32 Flags; 823 UINT32 Reserved; 824 UINT64 VatosAddress; 825 UINT32 Model; 826 UINT32 EventGsiv; 827 UINT32 PriGsiv; 828 UINT32 GerrGsiv; 829 UINT32 SyncGsiv; 830 UINT32 Pxm; 831 UINT32 IdMappingIndex; 832 833 } ACPI_IORT_SMMU_V3; 834 835 /* Values for Model field above */ 836 837 #define ACPI_IORT_SMMU_V3_GENERIC 0x00000000 /* Generic SMMUv3 */ 838 #define ACPI_IORT_SMMU_V3_HISILICON_HI161X 0x00000001 /* HiSilicon Hi161x SMMUv3 */ 839 #define ACPI_IORT_SMMU_V3_CAVIUM_CN99XX 0x00000002 /* Cavium CN99xx SMMUv3 */ 840 841 /* Masks for Flags field above */ 842 843 #define ACPI_IORT_SMMU_V3_COHACC_OVERRIDE (1) 844 #define ACPI_IORT_SMMU_V3_HTTU_OVERRIDE (3<<1) 845 #define ACPI_IORT_SMMU_V3_PXM_VALID (1<<3) 846 #define ACPI_IORT_SMMU_V3_DEVICEID_VALID (1<<4) 847 848 typedef struct acpi_iort_pmcg 849 { 850 UINT64 Page0BaseAddress; 851 UINT32 OverflowGsiv; 852 UINT32 NodeReference; 853 UINT64 Page1BaseAddress; 854 855 } ACPI_IORT_PMCG; 856 857 typedef struct acpi_iort_rmr { 858 UINT32 Flags; 859 UINT32 RmrCount; 860 UINT32 RmrOffset; 861 862 } ACPI_IORT_RMR; 863 864 /* Masks for Flags field above */ 865 #define ACPI_IORT_RMR_REMAP_PERMITTED (1) 866 #define ACPI_IORT_RMR_ACCESS_PRIVILEGE (1<<1) 867 868 /* 869 * Macro to access the Access Attributes in flags field above: 870 * Access Attributes is encoded in bits 9:2 871 */ 872 #define ACPI_IORT_RMR_ACCESS_ATTRIBUTES(flags) (((flags) >> 2) & 0xFF) 873 874 /* Values for above Access Attributes */ 875 876 #define ACPI_IORT_RMR_ATTR_DEVICE_NGNRNE 0x00 877 #define ACPI_IORT_RMR_ATTR_DEVICE_NGNRE 0x01 878 #define ACPI_IORT_RMR_ATTR_DEVICE_NGRE 0x02 879 #define ACPI_IORT_RMR_ATTR_DEVICE_GRE 0x03 880 #define ACPI_IORT_RMR_ATTR_NORMAL_NC 0x04 881 #define ACPI_IORT_RMR_ATTR_NORMAL_IWB_OWB 0x05 882 883 typedef struct acpi_iort_rmr_desc { 884 UINT64 BaseAddress; 885 UINT64 Length; 886 UINT32 Reserved; 887 888 } ACPI_IORT_RMR_DESC; 889 890 /******************************************************************************* 891 * 892 * IVRS - I/O Virtualization Reporting Structure 893 * Version 1 894 * 895 * Conforms to "AMD I/O Virtualization Technology (IOMMU) Specification", 896 * Revision 1.26, February 2009. 897 * 898 ******************************************************************************/ 899 900 typedef struct acpi_table_ivrs 901 { 902 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 903 UINT32 Info; /* Common virtualization info */ 904 UINT64 Reserved; 905 906 } ACPI_TABLE_IVRS; 907 908 /* Values for Info field above */ 909 910 #define ACPI_IVRS_PHYSICAL_SIZE 0x00007F00 /* 7 bits, physical address size */ 911 #define ACPI_IVRS_VIRTUAL_SIZE 0x003F8000 /* 7 bits, virtual address size */ 912 #define ACPI_IVRS_ATS_RESERVED 0x00400000 /* ATS address translation range reserved */ 913 914 915 /* IVRS subtable header */ 916 917 typedef struct acpi_ivrs_header 918 { 919 UINT8 Type; /* Subtable type */ 920 UINT8 Flags; 921 UINT16 Length; /* Subtable length */ 922 UINT16 DeviceId; /* ID of IOMMU */ 923 924 } ACPI_IVRS_HEADER; 925 926 /* Values for subtable Type above */ 927 928 enum AcpiIvrsType 929 { 930 ACPI_IVRS_TYPE_HARDWARE1 = 0x10, 931 ACPI_IVRS_TYPE_HARDWARE2 = 0x11, 932 ACPI_IVRS_TYPE_HARDWARE3 = 0x40, 933 ACPI_IVRS_TYPE_MEMORY1 = 0x20, 934 ACPI_IVRS_TYPE_MEMORY2 = 0x21, 935 ACPI_IVRS_TYPE_MEMORY3 = 0x22 936 }; 937 938 /* Masks for Flags field above for IVHD subtable */ 939 940 #define ACPI_IVHD_TT_ENABLE (1) 941 #define ACPI_IVHD_PASS_PW (1<<1) 942 #define ACPI_IVHD_RES_PASS_PW (1<<2) 943 #define ACPI_IVHD_ISOC (1<<3) 944 #define ACPI_IVHD_IOTLB (1<<4) 945 946 /* Masks for Flags field above for IVMD subtable */ 947 948 #define ACPI_IVMD_UNITY (1) 949 #define ACPI_IVMD_READ (1<<1) 950 #define ACPI_IVMD_WRITE (1<<2) 951 #define ACPI_IVMD_EXCLUSION_RANGE (1<<3) 952 953 954 /* 955 * IVRS subtables, correspond to Type in ACPI_IVRS_HEADER 956 */ 957 958 /* 0x10: I/O Virtualization Hardware Definition Block (IVHD) */ 959 960 typedef struct acpi_ivrs_hardware_10 961 { 962 ACPI_IVRS_HEADER Header; 963 UINT16 CapabilityOffset; /* Offset for IOMMU control fields */ 964 UINT64 BaseAddress; /* IOMMU control registers */ 965 UINT16 PciSegmentGroup; 966 UINT16 Info; /* MSI number and unit ID */ 967 UINT32 FeatureReporting; 968 969 } ACPI_IVRS_HARDWARE1; 970 971 /* 0x11: I/O Virtualization Hardware Definition Block (IVHD) */ 972 973 typedef struct acpi_ivrs_hardware_11 974 { 975 ACPI_IVRS_HEADER Header; 976 UINT16 CapabilityOffset; /* Offset for IOMMU control fields */ 977 UINT64 BaseAddress; /* IOMMU control registers */ 978 UINT16 PciSegmentGroup; 979 UINT16 Info; /* MSI number and unit ID */ 980 UINT32 Attributes; 981 UINT64 EfrRegisterImage; 982 UINT64 Reserved; 983 } ACPI_IVRS_HARDWARE2; 984 985 /* Masks for Info field above */ 986 987 #define ACPI_IVHD_MSI_NUMBER_MASK 0x001F /* 5 bits, MSI message number */ 988 #define ACPI_IVHD_UNIT_ID_MASK 0x1F00 /* 5 bits, UnitID */ 989 990 991 /* 992 * Device Entries for IVHD subtable, appear after ACPI_IVRS_HARDWARE structure. 993 * Upper two bits of the Type field are the (encoded) length of the structure. 994 * Currently, only 4 and 8 byte entries are defined. 16 and 32 byte entries 995 * are reserved for future use but not defined. 996 */ 997 typedef struct acpi_ivrs_de_header 998 { 999 UINT8 Type; 1000 UINT16 Id; 1001 UINT8 DataSetting; 1002 1003 } ACPI_IVRS_DE_HEADER; 1004 1005 /* Length of device entry is in the top two bits of Type field above */ 1006 1007 #define ACPI_IVHD_ENTRY_LENGTH 0xC0 1008 1009 /* Values for device entry Type field above */ 1010 1011 enum AcpiIvrsDeviceEntryType 1012 { 1013 /* 4-byte device entries, all use ACPI_IVRS_DEVICE4 */ 1014 1015 ACPI_IVRS_TYPE_PAD4 = 0, 1016 ACPI_IVRS_TYPE_ALL = 1, 1017 ACPI_IVRS_TYPE_SELECT = 2, 1018 ACPI_IVRS_TYPE_START = 3, 1019 ACPI_IVRS_TYPE_END = 4, 1020 1021 /* 8-byte device entries */ 1022 1023 ACPI_IVRS_TYPE_PAD8 = 64, 1024 ACPI_IVRS_TYPE_NOT_USED = 65, 1025 ACPI_IVRS_TYPE_ALIAS_SELECT = 66, /* Uses ACPI_IVRS_DEVICE8A */ 1026 ACPI_IVRS_TYPE_ALIAS_START = 67, /* Uses ACPI_IVRS_DEVICE8A */ 1027 ACPI_IVRS_TYPE_EXT_SELECT = 70, /* Uses ACPI_IVRS_DEVICE8B */ 1028 ACPI_IVRS_TYPE_EXT_START = 71, /* Uses ACPI_IVRS_DEVICE8B */ 1029 ACPI_IVRS_TYPE_SPECIAL = 72, /* Uses ACPI_IVRS_DEVICE8C */ 1030 1031 /* Variable-length device entries */ 1032 1033 ACPI_IVRS_TYPE_HID = 240 /* Uses ACPI_IVRS_DEVICE_HID */ 1034 }; 1035 1036 /* Values for Data field above */ 1037 1038 #define ACPI_IVHD_INIT_PASS (1) 1039 #define ACPI_IVHD_EINT_PASS (1<<1) 1040 #define ACPI_IVHD_NMI_PASS (1<<2) 1041 #define ACPI_IVHD_SYSTEM_MGMT (3<<4) 1042 #define ACPI_IVHD_LINT0_PASS (1<<6) 1043 #define ACPI_IVHD_LINT1_PASS (1<<7) 1044 1045 1046 /* Types 0-4: 4-byte device entry */ 1047 1048 typedef struct acpi_ivrs_device4 1049 { 1050 ACPI_IVRS_DE_HEADER Header; 1051 1052 } ACPI_IVRS_DEVICE4; 1053 1054 /* Types 66-67: 8-byte device entry */ 1055 1056 typedef struct acpi_ivrs_device8a 1057 { 1058 ACPI_IVRS_DE_HEADER Header; 1059 UINT8 Reserved1; 1060 UINT16 UsedId; 1061 UINT8 Reserved2; 1062 1063 } ACPI_IVRS_DEVICE8A; 1064 1065 /* Types 70-71: 8-byte device entry */ 1066 1067 typedef struct acpi_ivrs_device8b 1068 { 1069 ACPI_IVRS_DE_HEADER Header; 1070 UINT32 ExtendedData; 1071 1072 } ACPI_IVRS_DEVICE8B; 1073 1074 /* Values for ExtendedData above */ 1075 1076 #define ACPI_IVHD_ATS_DISABLED (1<<31) 1077 1078 /* Type 72: 8-byte device entry */ 1079 1080 typedef struct acpi_ivrs_device8c 1081 { 1082 ACPI_IVRS_DE_HEADER Header; 1083 UINT8 Handle; 1084 UINT16 UsedId; 1085 UINT8 Variety; 1086 1087 } ACPI_IVRS_DEVICE8C; 1088 1089 /* Values for Variety field above */ 1090 1091 #define ACPI_IVHD_IOAPIC 1 1092 #define ACPI_IVHD_HPET 2 1093 1094 /* Type 240: variable-length device entry */ 1095 1096 typedef struct acpi_ivrs_device_hid 1097 { 1098 ACPI_IVRS_DE_HEADER Header; 1099 UINT64 AcpiHid; 1100 UINT64 AcpiCid; 1101 UINT8 UidType; 1102 UINT8 UidLength; 1103 1104 } ACPI_IVRS_DEVICE_HID; 1105 1106 /* Values for UidType above */ 1107 1108 #define ACPI_IVRS_UID_NOT_PRESENT 0 1109 #define ACPI_IVRS_UID_IS_INTEGER 1 1110 #define ACPI_IVRS_UID_IS_STRING 2 1111 1112 /* 0x20, 0x21, 0x22: I/O Virtualization Memory Definition Block (IVMD) */ 1113 1114 typedef struct acpi_ivrs_memory 1115 { 1116 ACPI_IVRS_HEADER Header; 1117 UINT16 AuxData; 1118 UINT64 Reserved; 1119 UINT64 StartAddress; 1120 UINT64 MemoryLength; 1121 1122 } ACPI_IVRS_MEMORY; 1123 1124 1125 /******************************************************************************* 1126 * 1127 * LPIT - Low Power Idle Table 1128 * 1129 * Conforms to "ACPI Low Power Idle Table (LPIT)" July 2014. 1130 * 1131 ******************************************************************************/ 1132 1133 typedef struct acpi_table_lpit 1134 { 1135 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1136 1137 } ACPI_TABLE_LPIT; 1138 1139 1140 /* LPIT subtable header */ 1141 1142 typedef struct acpi_lpit_header 1143 { 1144 UINT32 Type; /* Subtable type */ 1145 UINT32 Length; /* Subtable length */ 1146 UINT16 UniqueId; 1147 UINT16 Reserved; 1148 UINT32 Flags; 1149 1150 } ACPI_LPIT_HEADER; 1151 1152 /* Values for subtable Type above */ 1153 1154 enum AcpiLpitType 1155 { 1156 ACPI_LPIT_TYPE_NATIVE_CSTATE = 0x00, 1157 ACPI_LPIT_TYPE_RESERVED = 0x01 /* 1 and above are reserved */ 1158 }; 1159 1160 /* Masks for Flags field above */ 1161 1162 #define ACPI_LPIT_STATE_DISABLED (1) 1163 #define ACPI_LPIT_NO_COUNTER (1<<1) 1164 1165 /* 1166 * LPIT subtables, correspond to Type in ACPI_LPIT_HEADER 1167 */ 1168 1169 /* 0x00: Native C-state instruction based LPI structure */ 1170 1171 typedef struct acpi_lpit_native 1172 { 1173 ACPI_LPIT_HEADER Header; 1174 ACPI_GENERIC_ADDRESS EntryTrigger; 1175 UINT32 Residency; 1176 UINT32 Latency; 1177 ACPI_GENERIC_ADDRESS ResidencyCounter; 1178 UINT64 CounterFrequency; 1179 1180 } ACPI_LPIT_NATIVE; 1181 1182 1183 /******************************************************************************* 1184 * 1185 * MADT - Multiple APIC Description Table 1186 * Version 3 1187 * 1188 ******************************************************************************/ 1189 1190 typedef struct acpi_table_madt 1191 { 1192 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1193 UINT32 Address; /* Physical address of local APIC */ 1194 UINT32 Flags; 1195 1196 } ACPI_TABLE_MADT; 1197 1198 /* Masks for Flags field above */ 1199 1200 #define ACPI_MADT_PCAT_COMPAT (1) /* 00: System also has dual 8259s */ 1201 1202 /* Values for PCATCompat flag */ 1203 1204 #define ACPI_MADT_DUAL_PIC 1 1205 #define ACPI_MADT_MULTIPLE_APIC 0 1206 1207 1208 /* Values for MADT subtable type in ACPI_SUBTABLE_HEADER */ 1209 1210 enum AcpiMadtType 1211 { 1212 ACPI_MADT_TYPE_LOCAL_APIC = 0, 1213 ACPI_MADT_TYPE_IO_APIC = 1, 1214 ACPI_MADT_TYPE_INTERRUPT_OVERRIDE = 2, 1215 ACPI_MADT_TYPE_NMI_SOURCE = 3, 1216 ACPI_MADT_TYPE_LOCAL_APIC_NMI = 4, 1217 ACPI_MADT_TYPE_LOCAL_APIC_OVERRIDE = 5, 1218 ACPI_MADT_TYPE_IO_SAPIC = 6, 1219 ACPI_MADT_TYPE_LOCAL_SAPIC = 7, 1220 ACPI_MADT_TYPE_INTERRUPT_SOURCE = 8, 1221 ACPI_MADT_TYPE_LOCAL_X2APIC = 9, 1222 ACPI_MADT_TYPE_LOCAL_X2APIC_NMI = 10, 1223 ACPI_MADT_TYPE_GENERIC_INTERRUPT = 11, 1224 ACPI_MADT_TYPE_GENERIC_DISTRIBUTOR = 12, 1225 ACPI_MADT_TYPE_GENERIC_MSI_FRAME = 13, 1226 ACPI_MADT_TYPE_GENERIC_REDISTRIBUTOR = 14, 1227 ACPI_MADT_TYPE_GENERIC_TRANSLATOR = 15, 1228 ACPI_MADT_TYPE_MULTIPROC_WAKEUP = 16, 1229 ACPI_MADT_TYPE_CORE_PIC = 17, 1230 ACPI_MADT_TYPE_LIO_PIC = 18, 1231 ACPI_MADT_TYPE_HT_PIC = 19, 1232 ACPI_MADT_TYPE_EIO_PIC = 20, 1233 ACPI_MADT_TYPE_MSI_PIC = 21, 1234 ACPI_MADT_TYPE_BIO_PIC = 22, 1235 ACPI_MADT_TYPE_LPC_PIC = 23, 1236 ACPI_MADT_TYPE_RINTC = 24, 1237 ACPI_MADT_TYPE_IMSIC = 25, 1238 ACPI_MADT_TYPE_APLIC = 26, 1239 ACPI_MADT_TYPE_PLIC = 27, 1240 ACPI_MADT_TYPE_RESERVED = 28, /* 28 to 0x7F are reserved */ 1241 ACPI_MADT_TYPE_OEM_RESERVED = 0x80 /* 0x80 to 0xFF are reserved for OEM use */ 1242 }; 1243 1244 1245 /* 1246 * MADT Subtables, correspond to Type in ACPI_SUBTABLE_HEADER 1247 */ 1248 1249 /* 0: Processor Local APIC */ 1250 1251 typedef struct acpi_madt_local_apic 1252 { 1253 ACPI_SUBTABLE_HEADER Header; 1254 UINT8 ProcessorId; /* ACPI processor id */ 1255 UINT8 Id; /* Processor's local APIC id */ 1256 UINT32 LapicFlags; 1257 1258 } ACPI_MADT_LOCAL_APIC; 1259 1260 1261 /* 1: IO APIC */ 1262 1263 typedef struct acpi_madt_io_apic 1264 { 1265 ACPI_SUBTABLE_HEADER Header; 1266 UINT8 Id; /* I/O APIC ID */ 1267 UINT8 Reserved; /* Reserved - must be zero */ 1268 UINT32 Address; /* APIC physical address */ 1269 UINT32 GlobalIrqBase; /* Global system interrupt where INTI lines start */ 1270 1271 } ACPI_MADT_IO_APIC; 1272 1273 1274 /* 2: Interrupt Override */ 1275 1276 typedef struct acpi_madt_interrupt_override 1277 { 1278 ACPI_SUBTABLE_HEADER Header; 1279 UINT8 Bus; /* 0 - ISA */ 1280 UINT8 SourceIrq; /* Interrupt source (IRQ) */ 1281 UINT32 GlobalIrq; /* Global system interrupt */ 1282 UINT16 IntiFlags; 1283 1284 } ACPI_MADT_INTERRUPT_OVERRIDE; 1285 1286 1287 /* 3: NMI Source */ 1288 1289 typedef struct acpi_madt_nmi_source 1290 { 1291 ACPI_SUBTABLE_HEADER Header; 1292 UINT16 IntiFlags; 1293 UINT32 GlobalIrq; /* Global system interrupt */ 1294 1295 } ACPI_MADT_NMI_SOURCE; 1296 1297 1298 /* 4: Local APIC NMI */ 1299 1300 typedef struct acpi_madt_local_apic_nmi 1301 { 1302 ACPI_SUBTABLE_HEADER Header; 1303 UINT8 ProcessorId; /* ACPI processor id */ 1304 UINT16 IntiFlags; 1305 UINT8 Lint; /* LINTn to which NMI is connected */ 1306 1307 } ACPI_MADT_LOCAL_APIC_NMI; 1308 1309 1310 /* 5: Address Override */ 1311 1312 typedef struct acpi_madt_local_apic_override 1313 { 1314 ACPI_SUBTABLE_HEADER Header; 1315 UINT16 Reserved; /* Reserved, must be zero */ 1316 UINT64 Address; /* APIC physical address */ 1317 1318 } ACPI_MADT_LOCAL_APIC_OVERRIDE; 1319 1320 1321 /* 6: I/O Sapic */ 1322 1323 typedef struct acpi_madt_io_sapic 1324 { 1325 ACPI_SUBTABLE_HEADER Header; 1326 UINT8 Id; /* I/O SAPIC ID */ 1327 UINT8 Reserved; /* Reserved, must be zero */ 1328 UINT32 GlobalIrqBase; /* Global interrupt for SAPIC start */ 1329 UINT64 Address; /* SAPIC physical address */ 1330 1331 } ACPI_MADT_IO_SAPIC; 1332 1333 1334 /* 7: Local Sapic */ 1335 1336 typedef struct acpi_madt_local_sapic 1337 { 1338 ACPI_SUBTABLE_HEADER Header; 1339 UINT8 ProcessorId; /* ACPI processor id */ 1340 UINT8 Id; /* SAPIC ID */ 1341 UINT8 Eid; /* SAPIC EID */ 1342 UINT8 Reserved[3]; /* Reserved, must be zero */ 1343 UINT32 LapicFlags; 1344 UINT32 Uid; /* Numeric UID - ACPI 3.0 */ 1345 char UidString[]; /* String UID - ACPI 3.0 */ 1346 1347 } ACPI_MADT_LOCAL_SAPIC; 1348 1349 1350 /* 8: Platform Interrupt Source */ 1351 1352 typedef struct acpi_madt_interrupt_source 1353 { 1354 ACPI_SUBTABLE_HEADER Header; 1355 UINT16 IntiFlags; 1356 UINT8 Type; /* 1=PMI, 2=INIT, 3=corrected */ 1357 UINT8 Id; /* Processor ID */ 1358 UINT8 Eid; /* Processor EID */ 1359 UINT8 IoSapicVector; /* Vector value for PMI interrupts */ 1360 UINT32 GlobalIrq; /* Global system interrupt */ 1361 UINT32 Flags; /* Interrupt Source Flags */ 1362 1363 } ACPI_MADT_INTERRUPT_SOURCE; 1364 1365 /* Masks for Flags field above */ 1366 1367 #define ACPI_MADT_CPEI_OVERRIDE (1) 1368 1369 1370 /* 9: Processor Local X2APIC (ACPI 4.0) */ 1371 1372 typedef struct acpi_madt_local_x2apic 1373 { 1374 ACPI_SUBTABLE_HEADER Header; 1375 UINT16 Reserved; /* Reserved - must be zero */ 1376 UINT32 LocalApicId; /* Processor x2APIC ID */ 1377 UINT32 LapicFlags; 1378 UINT32 Uid; /* ACPI processor UID */ 1379 1380 } ACPI_MADT_LOCAL_X2APIC; 1381 1382 1383 /* 10: Local X2APIC NMI (ACPI 4.0) */ 1384 1385 typedef struct acpi_madt_local_x2apic_nmi 1386 { 1387 ACPI_SUBTABLE_HEADER Header; 1388 UINT16 IntiFlags; 1389 UINT32 Uid; /* ACPI processor UID */ 1390 UINT8 Lint; /* LINTn to which NMI is connected */ 1391 UINT8 Reserved[3]; /* Reserved - must be zero */ 1392 1393 } ACPI_MADT_LOCAL_X2APIC_NMI; 1394 1395 1396 /* 11: Generic Interrupt - GICC (ACPI 5.0 + ACPI 6.0 + ACPI 6.3 + ACPI 6.5 changes) */ 1397 1398 typedef struct acpi_madt_generic_interrupt 1399 { 1400 ACPI_SUBTABLE_HEADER Header; 1401 UINT16 Reserved; /* Reserved - must be zero */ 1402 UINT32 CpuInterfaceNumber; 1403 UINT32 Uid; 1404 UINT32 Flags; 1405 UINT32 ParkingVersion; 1406 UINT32 PerformanceInterrupt; 1407 UINT64 ParkedAddress; 1408 UINT64 BaseAddress; 1409 UINT64 GicvBaseAddress; 1410 UINT64 GichBaseAddress; 1411 UINT32 VgicInterrupt; 1412 UINT64 GicrBaseAddress; 1413 UINT64 ArmMpidr; 1414 UINT8 EfficiencyClass; 1415 UINT8 Reserved2[1]; 1416 UINT16 SpeInterrupt; /* ACPI 6.3 */ 1417 UINT16 TrbeInterrupt; /* ACPI 6.5 */ 1418 1419 } ACPI_MADT_GENERIC_INTERRUPT; 1420 1421 /* Masks for Flags field above */ 1422 1423 /* ACPI_MADT_ENABLED (1) Processor is usable if set */ 1424 #define ACPI_MADT_PERFORMANCE_IRQ_MODE (1<<1) /* 01: Performance Interrupt Mode */ 1425 #define ACPI_MADT_VGIC_IRQ_MODE (1<<2) /* 02: VGIC Maintenance Interrupt mode */ 1426 #define ACPI_MADT_GICC_ONLINE_CAPABLE (1<<3) /* 03: Processor is online capable */ 1427 #define ACPI_MADT_GICC_NON_COHERENT (1<<4) /* 04: GIC redistributor is not coherent */ 1428 1429 /* 12: Generic Distributor (ACPI 5.0 + ACPI 6.0 changes) */ 1430 1431 typedef struct acpi_madt_generic_distributor 1432 { 1433 ACPI_SUBTABLE_HEADER Header; 1434 UINT16 Reserved; /* Reserved - must be zero */ 1435 UINT32 GicId; 1436 UINT64 BaseAddress; 1437 UINT32 GlobalIrqBase; 1438 UINT8 Version; 1439 UINT8 Reserved2[3]; /* Reserved - must be zero */ 1440 1441 } ACPI_MADT_GENERIC_DISTRIBUTOR; 1442 1443 /* Values for Version field above */ 1444 1445 enum AcpiMadtGicVersion 1446 { 1447 ACPI_MADT_GIC_VERSION_NONE = 0, 1448 ACPI_MADT_GIC_VERSION_V1 = 1, 1449 ACPI_MADT_GIC_VERSION_V2 = 2, 1450 ACPI_MADT_GIC_VERSION_V3 = 3, 1451 ACPI_MADT_GIC_VERSION_V4 = 4, 1452 ACPI_MADT_GIC_VERSION_RESERVED = 5 /* 5 and greater are reserved */ 1453 }; 1454 1455 1456 /* 13: Generic MSI Frame (ACPI 5.1) */ 1457 1458 typedef struct acpi_madt_generic_msi_frame 1459 { 1460 ACPI_SUBTABLE_HEADER Header; 1461 UINT16 Reserved; /* Reserved - must be zero */ 1462 UINT32 MsiFrameId; 1463 UINT64 BaseAddress; 1464 UINT32 Flags; 1465 UINT16 SpiCount; 1466 UINT16 SpiBase; 1467 1468 } ACPI_MADT_GENERIC_MSI_FRAME; 1469 1470 /* Masks for Flags field above */ 1471 1472 #define ACPI_MADT_OVERRIDE_SPI_VALUES (1) 1473 1474 1475 /* 14: Generic Redistributor (ACPI 5.1) */ 1476 1477 typedef struct acpi_madt_generic_redistributor 1478 { 1479 ACPI_SUBTABLE_HEADER Header; 1480 UINT8 Flags; 1481 UINT8 Reserved; /* reserved - must be zero */ 1482 UINT64 BaseAddress; 1483 UINT32 Length; 1484 1485 } ACPI_MADT_GENERIC_REDISTRIBUTOR; 1486 1487 #define ACPI_MADT_GICR_NON_COHERENT (1) 1488 1489 /* 15: Generic Translator (ACPI 6.0) */ 1490 1491 typedef struct acpi_madt_generic_translator 1492 { 1493 ACPI_SUBTABLE_HEADER Header; 1494 UINT8 Flags; 1495 UINT8 Reserved; /* reserved - must be zero */ 1496 UINT32 TranslationId; 1497 UINT64 BaseAddress; 1498 UINT32 Reserved2; 1499 1500 } ACPI_MADT_GENERIC_TRANSLATOR; 1501 1502 #define ACPI_MADT_ITS_NON_COHERENT (1) 1503 1504 /* 16: Multiprocessor wakeup (ACPI 6.4) */ 1505 1506 typedef struct acpi_madt_multiproc_wakeup 1507 { 1508 ACPI_SUBTABLE_HEADER Header; 1509 UINT16 MailboxVersion; 1510 UINT32 Reserved; /* reserved - must be zero */ 1511 UINT64 BaseAddress; 1512 1513 } ACPI_MADT_MULTIPROC_WAKEUP; 1514 1515 #define ACPI_MULTIPROC_WAKEUP_MB_OS_SIZE 2032 1516 #define ACPI_MULTIPROC_WAKEUP_MB_FIRMWARE_SIZE 2048 1517 1518 typedef struct acpi_madt_multiproc_wakeup_mailbox 1519 { 1520 UINT16 Command; 1521 UINT16 Reserved; /* reserved - must be zero */ 1522 UINT32 ApicId; 1523 UINT64 WakeupVector; 1524 UINT8 ReservedOs[ACPI_MULTIPROC_WAKEUP_MB_OS_SIZE]; /* reserved for OS use */ 1525 UINT8 ReservedFirmware[ACPI_MULTIPROC_WAKEUP_MB_FIRMWARE_SIZE]; /* reserved for firmware use */ 1526 1527 } ACPI_MADT_MULTIPROC_WAKEUP_MAILBOX; 1528 1529 #define ACPI_MP_WAKE_COMMAND_WAKEUP 1 1530 1531 /* 17: CPU Core Interrupt Controller (ACPI 6.5) */ 1532 1533 typedef struct acpi_madt_core_pic { 1534 ACPI_SUBTABLE_HEADER Header; 1535 UINT8 Version; 1536 UINT32 ProcessorId; 1537 UINT32 CoreId; 1538 UINT32 Flags; 1539 } ACPI_MADT_CORE_PIC; 1540 1541 /* Values for Version field above */ 1542 1543 enum AcpiMadtCorePicVersion { 1544 ACPI_MADT_CORE_PIC_VERSION_NONE = 0, 1545 ACPI_MADT_CORE_PIC_VERSION_V1 = 1, 1546 ACPI_MADT_CORE_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */ 1547 }; 1548 1549 /* 18: Legacy I/O Interrupt Controller (ACPI 6.5) */ 1550 1551 typedef struct acpi_madt_lio_pic { 1552 ACPI_SUBTABLE_HEADER Header; 1553 UINT8 Version; 1554 UINT64 Address; 1555 UINT16 Size; 1556 UINT8 Cascade[2]; 1557 UINT32 CascadeMap[2]; 1558 } ACPI_MADT_LIO_PIC; 1559 1560 /* Values for Version field above */ 1561 1562 enum AcpiMadtLioPicVersion { 1563 ACPI_MADT_LIO_PIC_VERSION_NONE = 0, 1564 ACPI_MADT_LIO_PIC_VERSION_V1 = 1, 1565 ACPI_MADT_LIO_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */ 1566 }; 1567 1568 /* 19: HT Interrupt Controller (ACPI 6.5) */ 1569 1570 typedef struct acpi_madt_ht_pic { 1571 ACPI_SUBTABLE_HEADER Header; 1572 UINT8 Version; 1573 UINT64 Address; 1574 UINT16 Size; 1575 UINT8 Cascade[8]; 1576 } ACPI_MADT_HT_PIC; 1577 1578 /* Values for Version field above */ 1579 1580 enum AcpiMadtHtPicVersion { 1581 ACPI_MADT_HT_PIC_VERSION_NONE = 0, 1582 ACPI_MADT_HT_PIC_VERSION_V1 = 1, 1583 ACPI_MADT_HT_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */ 1584 }; 1585 1586 /* 20: Extend I/O Interrupt Controller (ACPI 6.5) */ 1587 1588 typedef struct acpi_madt_eio_pic { 1589 ACPI_SUBTABLE_HEADER Header; 1590 UINT8 Version; 1591 UINT8 Cascade; 1592 UINT8 Node; 1593 UINT64 NodeMap; 1594 } ACPI_MADT_EIO_PIC; 1595 1596 /* Values for Version field above */ 1597 1598 enum AcpiMadtEioPicVersion { 1599 ACPI_MADT_EIO_PIC_VERSION_NONE = 0, 1600 ACPI_MADT_EIO_PIC_VERSION_V1 = 1, 1601 ACPI_MADT_EIO_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */ 1602 }; 1603 1604 /* 21: MSI Interrupt Controller (ACPI 6.5) */ 1605 1606 typedef struct acpi_madt_msi_pic { 1607 ACPI_SUBTABLE_HEADER Header; 1608 UINT8 Version; 1609 UINT64 MsgAddress; 1610 UINT32 Start; 1611 UINT32 Count; 1612 } ACPI_MADT_MSI_PIC; 1613 1614 /* Values for Version field above */ 1615 1616 enum AcpiMadtMsiPicVersion { 1617 ACPI_MADT_MSI_PIC_VERSION_NONE = 0, 1618 ACPI_MADT_MSI_PIC_VERSION_V1 = 1, 1619 ACPI_MADT_MSI_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */ 1620 }; 1621 1622 /* 22: Bridge I/O Interrupt Controller (ACPI 6.5) */ 1623 1624 typedef struct acpi_madt_bio_pic { 1625 ACPI_SUBTABLE_HEADER Header; 1626 UINT8 Version; 1627 UINT64 Address; 1628 UINT16 Size; 1629 UINT16 Id; 1630 UINT16 GsiBase; 1631 } ACPI_MADT_BIO_PIC; 1632 1633 /* Values for Version field above */ 1634 1635 enum AcpiMadtBioPicVersion { 1636 ACPI_MADT_BIO_PIC_VERSION_NONE = 0, 1637 ACPI_MADT_BIO_PIC_VERSION_V1 = 1, 1638 ACPI_MADT_BIO_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */ 1639 }; 1640 1641 /* 23: LPC Interrupt Controller (ACPI 6.5) */ 1642 1643 typedef struct acpi_madt_lpc_pic { 1644 ACPI_SUBTABLE_HEADER Header; 1645 UINT8 Version; 1646 UINT64 Address; 1647 UINT16 Size; 1648 UINT8 Cascade; 1649 } ACPI_MADT_LPC_PIC; 1650 1651 /* Values for Version field above */ 1652 1653 enum AcpiMadtLpcPicVersion { 1654 ACPI_MADT_LPC_PIC_VERSION_NONE = 0, 1655 ACPI_MADT_LPC_PIC_VERSION_V1 = 1, 1656 ACPI_MADT_LPC_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */ 1657 }; 1658 1659 /* 24: RISC-V INTC */ 1660 typedef struct acpi_madt_rintc { 1661 ACPI_SUBTABLE_HEADER Header; 1662 UINT8 Version; 1663 UINT8 Reserved; 1664 UINT32 Flags; 1665 UINT64 HartId; 1666 UINT32 Uid; /* ACPI processor UID */ 1667 UINT32 ExtIntcId; /* External INTC Id */ 1668 UINT64 ImsicAddr; /* IMSIC base address */ 1669 UINT32 ImsicSize; /* IMSIC size */ 1670 } ACPI_MADT_RINTC; 1671 1672 /* Values for RISC-V INTC Version field above */ 1673 1674 enum AcpiMadtRintcVersion { 1675 ACPI_MADT_RINTC_VERSION_NONE = 0, 1676 ACPI_MADT_RINTC_VERSION_V1 = 1, 1677 ACPI_MADT_RINTC_VERSION_RESERVED = 2 /* 2 and greater are reserved */ 1678 }; 1679 1680 /* 25: RISC-V IMSIC */ 1681 typedef struct acpi_madt_imsic { 1682 ACPI_SUBTABLE_HEADER Header; 1683 UINT8 Version; 1684 UINT8 Reserved; 1685 UINT32 Flags; 1686 UINT16 NumIds; 1687 UINT16 NumGuestIds; 1688 UINT8 GuestIndexBits; 1689 UINT8 HartIndexBits; 1690 UINT8 GroupIndexBits; 1691 UINT8 GroupIndexShift; 1692 } ACPI_MADT_IMSIC; 1693 1694 /* 26: RISC-V APLIC */ 1695 typedef struct acpi_madt_aplic { 1696 ACPI_SUBTABLE_HEADER Header; 1697 UINT8 Version; 1698 UINT8 Id; 1699 UINT32 Flags; 1700 UINT8 HwId[8]; 1701 UINT16 NumIdcs; 1702 UINT16 NumSources; 1703 UINT32 GsiBase; 1704 UINT64 BaseAddr; 1705 UINT32 Size; 1706 } ACPI_MADT_APLIC; 1707 1708 /* 27: RISC-V PLIC */ 1709 typedef struct acpi_madt_plic { 1710 ACPI_SUBTABLE_HEADER Header; 1711 UINT8 Version; 1712 UINT8 Id; 1713 UINT8 HwId[8]; 1714 UINT16 NumIrqs; 1715 UINT16 MaxPrio; 1716 UINT32 Flags; 1717 UINT32 Size; 1718 UINT64 BaseAddr; 1719 UINT32 GsiBase; 1720 } ACPI_MADT_PLIC; 1721 1722 1723 /* 80: OEM data */ 1724 1725 typedef struct acpi_madt_oem_data 1726 { 1727 ACPI_FLEX_ARRAY(UINT8, OemData); 1728 } ACPI_MADT_OEM_DATA; 1729 1730 1731 /* 1732 * Common flags fields for MADT subtables 1733 */ 1734 1735 /* MADT Local APIC flags */ 1736 1737 #define ACPI_MADT_ENABLED (1) /* 00: Processor is usable if set */ 1738 #define ACPI_MADT_ONLINE_CAPABLE (2) /* 01: System HW supports enabling processor at runtime */ 1739 1740 /* MADT MPS INTI flags (IntiFlags) */ 1741 1742 #define ACPI_MADT_POLARITY_MASK (3) /* 00-01: Polarity of APIC I/O input signals */ 1743 #define ACPI_MADT_TRIGGER_MASK (3<<2) /* 02-03: Trigger mode of APIC input signals */ 1744 1745 /* Values for MPS INTI flags */ 1746 1747 #define ACPI_MADT_POLARITY_CONFORMS 0 1748 #define ACPI_MADT_POLARITY_ACTIVE_HIGH 1 1749 #define ACPI_MADT_POLARITY_RESERVED 2 1750 #define ACPI_MADT_POLARITY_ACTIVE_LOW 3 1751 1752 #define ACPI_MADT_TRIGGER_CONFORMS (0) 1753 #define ACPI_MADT_TRIGGER_EDGE (1<<2) 1754 #define ACPI_MADT_TRIGGER_RESERVED (2<<2) 1755 #define ACPI_MADT_TRIGGER_LEVEL (3<<2) 1756 1757 1758 /******************************************************************************* 1759 * 1760 * MCFG - PCI Memory Mapped Configuration table and subtable 1761 * Version 1 1762 * 1763 * Conforms to "PCI Firmware Specification", Revision 3.0, June 20, 2005 1764 * 1765 ******************************************************************************/ 1766 1767 typedef struct acpi_table_mcfg 1768 { 1769 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1770 UINT8 Reserved[8]; 1771 1772 } ACPI_TABLE_MCFG; 1773 1774 1775 /* Subtable */ 1776 1777 typedef struct acpi_mcfg_allocation 1778 { 1779 UINT64 Address; /* Base address, processor-relative */ 1780 UINT16 PciSegment; /* PCI segment group number */ 1781 UINT8 StartBusNumber; /* Starting PCI Bus number */ 1782 UINT8 EndBusNumber; /* Final PCI Bus number */ 1783 UINT32 Reserved; 1784 1785 } ACPI_MCFG_ALLOCATION; 1786 1787 1788 /******************************************************************************* 1789 * 1790 * MCHI - Management Controller Host Interface Table 1791 * Version 1 1792 * 1793 * Conforms to "Management Component Transport Protocol (MCTP) Host 1794 * Interface Specification", Revision 1.0.0a, October 13, 2009 1795 * 1796 ******************************************************************************/ 1797 1798 typedef struct acpi_table_mchi 1799 { 1800 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1801 UINT8 InterfaceType; 1802 UINT8 Protocol; 1803 UINT64 ProtocolData; 1804 UINT8 InterruptType; 1805 UINT8 Gpe; 1806 UINT8 PciDeviceFlag; 1807 UINT32 GlobalInterrupt; 1808 ACPI_GENERIC_ADDRESS ControlRegister; 1809 UINT8 PciSegment; 1810 UINT8 PciBus; 1811 UINT8 PciDevice; 1812 UINT8 PciFunction; 1813 1814 } ACPI_TABLE_MCHI; 1815 1816 /******************************************************************************* 1817 * 1818 * MPAM - Memory System Resource Partitioning and Monitoring 1819 * 1820 * Conforms to "ACPI for Memory System Resource Partitioning and Monitoring 2.0" 1821 * Document number: ARM DEN 0065, December, 2022. 1822 * 1823 ******************************************************************************/ 1824 1825 /* MPAM RIS locator types. Table 11, Location types */ 1826 enum AcpiMpamLocatorType { 1827 ACPI_MPAM_LOCATION_TYPE_PROCESSOR_CACHE = 0, 1828 ACPI_MPAM_LOCATION_TYPE_MEMORY = 1, 1829 ACPI_MPAM_LOCATION_TYPE_SMMU = 2, 1830 ACPI_MPAM_LOCATION_TYPE_MEMORY_CACHE = 3, 1831 ACPI_MPAM_LOCATION_TYPE_ACPI_DEVICE = 4, 1832 ACPI_MPAM_LOCATION_TYPE_INTERCONNECT = 5, 1833 ACPI_MPAM_LOCATION_TYPE_UNKNOWN = 0xFF 1834 }; 1835 1836 /* MPAM Functional dependency descriptor. Table 10 */ 1837 typedef struct acpi_mpam_func_deps 1838 { 1839 UINT32 Producer; 1840 UINT32 Reserved; 1841 } ACPI_MPAM_FUNC_DEPS; 1842 1843 /* MPAM Processor cache locator descriptor. Table 13 */ 1844 typedef struct acpi_mpam_resource_cache_locator 1845 { 1846 UINT64 CacheReference; 1847 UINT32 Reserved; 1848 } ACPI_MPAM_RESOURCE_CACHE_LOCATOR; 1849 1850 /* MPAM Memory locator descriptor. Table 14 */ 1851 typedef struct acpi_mpam_resource_memory_locator 1852 { 1853 UINT64 ProximityDomain; 1854 UINT32 Reserved; 1855 } ACPI_MPAM_RESOURCE_MEMORY_LOCATOR; 1856 1857 /* MPAM SMMU locator descriptor. Table 15 */ 1858 typedef struct acpi_mpam_resource_smmu_locator 1859 { 1860 UINT64 SmmuInterface; 1861 UINT32 Reserved; 1862 } ACPI_MPAM_RESOURCE_SMMU_INTERFACE; 1863 1864 /* MPAM Memory-side cache locator descriptor. Table 16 */ 1865 typedef struct acpi_mpam_resource_memcache_locator 1866 { 1867 UINT8 Reserved[7]; 1868 UINT8 Level; 1869 UINT32 Reference; 1870 } ACPI_MPAM_RESOURCE_MEMCACHE_INTERFACE; 1871 1872 /* MPAM ACPI device locator descriptor. Table 17 */ 1873 typedef struct acpi_mpam_resource_acpi_locator 1874 { 1875 UINT64 AcpiHwId; 1876 UINT32 AcpiUniqueId; 1877 } ACPI_MPAM_RESOURCE_ACPI_INTERFACE; 1878 1879 /* MPAM Interconnect locator descriptor. Table 18 */ 1880 typedef struct acpi_mpam_resource_interconnect_locator 1881 { 1882 UINT64 InterConnectDescTblOff; 1883 UINT32 Reserved; 1884 } ACPI_MPAM_RESOURCE_INTERCONNECT_INTERFACE; 1885 1886 /* MPAM Locator structure. Table 12 */ 1887 typedef struct acpi_mpam_resource_generic_locator 1888 { 1889 UINT64 Descriptor1; 1890 UINT32 Descriptor2; 1891 } ACPI_MPAM_RESOURCE_GENERIC_LOCATOR; 1892 1893 typedef union acpi_mpam_resource_locator 1894 { 1895 ACPI_MPAM_RESOURCE_CACHE_LOCATOR CacheLocator; 1896 ACPI_MPAM_RESOURCE_MEMORY_LOCATOR MemoryLocator; 1897 ACPI_MPAM_RESOURCE_SMMU_INTERFACE SmmuLocator; 1898 ACPI_MPAM_RESOURCE_MEMCACHE_INTERFACE MemCacheLocator; 1899 ACPI_MPAM_RESOURCE_ACPI_INTERFACE AcpiLocator; 1900 ACPI_MPAM_RESOURCE_INTERCONNECT_INTERFACE InterconnectIfcLocator; 1901 ACPI_MPAM_RESOURCE_GENERIC_LOCATOR GenericLocator; 1902 } ACPI_MPAM_RESOURCE_LOCATOR; 1903 1904 /* Memory System Component Resource Node Structure Table 9 */ 1905 typedef struct acpi_mpam_resource_node 1906 { 1907 UINT32 Identifier; 1908 UINT8 RISIndex; 1909 UINT16 Reserved1; 1910 UINT8 LocatorType; 1911 ACPI_MPAM_RESOURCE_LOCATOR Locator; 1912 UINT32 NumFunctionalDeps; 1913 } ACPI_MPAM_RESOURCE_NODE; 1914 1915 /* Memory System Component (MSC) Node Structure. Table 4 */ 1916 typedef struct acpi_mpam_msc_node 1917 { 1918 UINT16 Length; 1919 UINT8 InterfaceType; 1920 UINT8 Reserved; 1921 UINT32 Identifier; 1922 UINT64 BaseAddress; 1923 UINT32 MMIOSize; 1924 UINT32 OverflowInterrupt; 1925 UINT32 OverflowInterruptFlags; 1926 UINT32 Reserved1; 1927 UINT32 OverflowInterruptAffinity; 1928 UINT32 ErrorInterrupt; 1929 UINT32 ErrorInterruptFlags; 1930 UINT32 Reserved2; 1931 UINT32 ErrorInterruptAffinity; 1932 UINT32 MaxNrdyUsec; 1933 UINT64 HardwareIdLinkedDevice; 1934 UINT32 InstanceIdLinkedDevice; 1935 UINT32 NumResourceNodes; 1936 } ACPI_MPAM_MSC_NODE; 1937 1938 typedef struct acpi_table_mpam 1939 { 1940 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1941 } ACPI_TABLE_MPAM; 1942 1943 /******************************************************************************* 1944 * 1945 * MPST - Memory Power State Table (ACPI 5.0) 1946 * Version 1 1947 * 1948 ******************************************************************************/ 1949 1950 #define ACPI_MPST_CHANNEL_INFO \ 1951 UINT8 ChannelId; \ 1952 UINT8 Reserved1[3]; \ 1953 UINT16 PowerNodeCount; \ 1954 UINT16 Reserved2; 1955 1956 /* Main table */ 1957 1958 typedef struct acpi_table_mpst 1959 { 1960 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1961 ACPI_MPST_CHANNEL_INFO /* Platform Communication Channel */ 1962 1963 } ACPI_TABLE_MPST; 1964 1965 1966 /* Memory Platform Communication Channel Info */ 1967 1968 typedef struct acpi_mpst_channel 1969 { 1970 ACPI_MPST_CHANNEL_INFO /* Platform Communication Channel */ 1971 1972 } ACPI_MPST_CHANNEL; 1973 1974 1975 /* Memory Power Node Structure */ 1976 1977 typedef struct acpi_mpst_power_node 1978 { 1979 UINT8 Flags; 1980 UINT8 Reserved1; 1981 UINT16 NodeId; 1982 UINT32 Length; 1983 UINT64 RangeAddress; 1984 UINT64 RangeLength; 1985 UINT32 NumPowerStates; 1986 UINT32 NumPhysicalComponents; 1987 1988 } ACPI_MPST_POWER_NODE; 1989 1990 /* Values for Flags field above */ 1991 1992 #define ACPI_MPST_ENABLED 1 1993 #define ACPI_MPST_POWER_MANAGED 2 1994 #define ACPI_MPST_HOT_PLUG_CAPABLE 4 1995 1996 1997 /* Memory Power State Structure (follows POWER_NODE above) */ 1998 1999 typedef struct acpi_mpst_power_state 2000 { 2001 UINT8 PowerState; 2002 UINT8 InfoIndex; 2003 2004 } ACPI_MPST_POWER_STATE; 2005 2006 2007 /* Physical Component ID Structure (follows POWER_STATE above) */ 2008 2009 typedef struct acpi_mpst_component 2010 { 2011 UINT16 ComponentId; 2012 2013 } ACPI_MPST_COMPONENT; 2014 2015 2016 /* Memory Power State Characteristics Structure (follows all POWER_NODEs) */ 2017 2018 typedef struct acpi_mpst_data_hdr 2019 { 2020 UINT16 CharacteristicsCount; 2021 UINT16 Reserved; 2022 2023 } ACPI_MPST_DATA_HDR; 2024 2025 typedef struct acpi_mpst_power_data 2026 { 2027 UINT8 StructureId; 2028 UINT8 Flags; 2029 UINT16 Reserved1; 2030 UINT32 AveragePower; 2031 UINT32 PowerSaving; 2032 UINT64 ExitLatency; 2033 UINT64 Reserved2; 2034 2035 } ACPI_MPST_POWER_DATA; 2036 2037 /* Values for Flags field above */ 2038 2039 #define ACPI_MPST_PRESERVE 1 2040 #define ACPI_MPST_AUTOENTRY 2 2041 #define ACPI_MPST_AUTOEXIT 4 2042 2043 2044 /* Shared Memory Region (not part of an ACPI table) */ 2045 2046 typedef struct acpi_mpst_shared 2047 { 2048 UINT32 Signature; 2049 UINT16 PccCommand; 2050 UINT16 PccStatus; 2051 UINT32 CommandRegister; 2052 UINT32 StatusRegister; 2053 UINT32 PowerStateId; 2054 UINT32 PowerNodeId; 2055 UINT64 EnergyConsumed; 2056 UINT64 AveragePower; 2057 2058 } ACPI_MPST_SHARED; 2059 2060 2061 /******************************************************************************* 2062 * 2063 * MSCT - Maximum System Characteristics Table (ACPI 4.0) 2064 * Version 1 2065 * 2066 ******************************************************************************/ 2067 2068 typedef struct acpi_table_msct 2069 { 2070 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 2071 UINT32 ProximityOffset; /* Location of proximity info struct(s) */ 2072 UINT32 MaxProximityDomains;/* Max number of proximity domains */ 2073 UINT32 MaxClockDomains; /* Max number of clock domains */ 2074 UINT64 MaxAddress; /* Max physical address in system */ 2075 2076 } ACPI_TABLE_MSCT; 2077 2078 2079 /* Subtable - Maximum Proximity Domain Information. Version 1 */ 2080 2081 typedef struct acpi_msct_proximity 2082 { 2083 UINT8 Revision; 2084 UINT8 Length; 2085 UINT32 RangeStart; /* Start of domain range */ 2086 UINT32 RangeEnd; /* End of domain range */ 2087 UINT32 ProcessorCapacity; 2088 UINT64 MemoryCapacity; /* In bytes */ 2089 2090 } ACPI_MSCT_PROXIMITY; 2091 2092 2093 /******************************************************************************* 2094 * 2095 * MSDM - Microsoft Data Management table 2096 * 2097 * Conforms to "Microsoft Software Licensing Tables (SLIC and MSDM)", 2098 * November 29, 2011. Copyright 2011 Microsoft 2099 * 2100 ******************************************************************************/ 2101 2102 /* Basic MSDM table is only the common ACPI header */ 2103 2104 typedef struct acpi_table_msdm 2105 { 2106 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 2107 2108 } ACPI_TABLE_MSDM; 2109 2110 2111 /******************************************************************************* 2112 * 2113 * NFIT - NVDIMM Interface Table (ACPI 6.0+) 2114 * Version 1 2115 * 2116 ******************************************************************************/ 2117 2118 typedef struct acpi_table_nfit 2119 { 2120 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 2121 UINT32 Reserved; /* Reserved, must be zero */ 2122 2123 } ACPI_TABLE_NFIT; 2124 2125 /* Subtable header for NFIT */ 2126 2127 typedef struct acpi_nfit_header 2128 { 2129 UINT16 Type; 2130 UINT16 Length; 2131 2132 } ACPI_NFIT_HEADER; 2133 2134 2135 /* Values for subtable type in ACPI_NFIT_HEADER */ 2136 2137 enum AcpiNfitType 2138 { 2139 ACPI_NFIT_TYPE_SYSTEM_ADDRESS = 0, 2140 ACPI_NFIT_TYPE_MEMORY_MAP = 1, 2141 ACPI_NFIT_TYPE_INTERLEAVE = 2, 2142 ACPI_NFIT_TYPE_SMBIOS = 3, 2143 ACPI_NFIT_TYPE_CONTROL_REGION = 4, 2144 ACPI_NFIT_TYPE_DATA_REGION = 5, 2145 ACPI_NFIT_TYPE_FLUSH_ADDRESS = 6, 2146 ACPI_NFIT_TYPE_CAPABILITIES = 7, 2147 ACPI_NFIT_TYPE_RESERVED = 8 /* 8 and greater are reserved */ 2148 }; 2149 2150 /* 2151 * NFIT Subtables 2152 */ 2153 2154 /* 0: System Physical Address Range Structure */ 2155 2156 typedef struct acpi_nfit_system_address 2157 { 2158 ACPI_NFIT_HEADER Header; 2159 UINT16 RangeIndex; 2160 UINT16 Flags; 2161 UINT32 Reserved; /* Reserved, must be zero */ 2162 UINT32 ProximityDomain; 2163 UINT8 RangeGuid[16]; 2164 UINT64 Address; 2165 UINT64 Length; 2166 UINT64 MemoryMapping; 2167 UINT64 LocationCookie; /* ACPI 6.4 */ 2168 2169 } ACPI_NFIT_SYSTEM_ADDRESS; 2170 2171 /* Flags */ 2172 2173 #define ACPI_NFIT_ADD_ONLINE_ONLY (1) /* 00: Add/Online Operation Only */ 2174 #define ACPI_NFIT_PROXIMITY_VALID (1<<1) /* 01: Proximity Domain Valid */ 2175 #define ACPI_NFIT_LOCATION_COOKIE_VALID (1<<2) /* 02: SPA location cookie valid (ACPI 6.4) */ 2176 2177 /* Range Type GUIDs appear in the include/acuuid.h file */ 2178 2179 2180 /* 1: Memory Device to System Address Range Map Structure */ 2181 2182 typedef struct acpi_nfit_memory_map 2183 { 2184 ACPI_NFIT_HEADER Header; 2185 UINT32 DeviceHandle; 2186 UINT16 PhysicalId; 2187 UINT16 RegionId; 2188 UINT16 RangeIndex; 2189 UINT16 RegionIndex; 2190 UINT64 RegionSize; 2191 UINT64 RegionOffset; 2192 UINT64 Address; 2193 UINT16 InterleaveIndex; 2194 UINT16 InterleaveWays; 2195 UINT16 Flags; 2196 UINT16 Reserved; /* Reserved, must be zero */ 2197 2198 } ACPI_NFIT_MEMORY_MAP; 2199 2200 /* Flags */ 2201 2202 #define ACPI_NFIT_MEM_SAVE_FAILED (1) /* 00: Last SAVE to Memory Device failed */ 2203 #define ACPI_NFIT_MEM_RESTORE_FAILED (1<<1) /* 01: Last RESTORE from Memory Device failed */ 2204 #define ACPI_NFIT_MEM_FLUSH_FAILED (1<<2) /* 02: Platform flush failed */ 2205 #define ACPI_NFIT_MEM_NOT_ARMED (1<<3) /* 03: Memory Device is not armed */ 2206 #define ACPI_NFIT_MEM_HEALTH_OBSERVED (1<<4) /* 04: Memory Device observed SMART/health events */ 2207 #define ACPI_NFIT_MEM_HEALTH_ENABLED (1<<5) /* 05: SMART/health events enabled */ 2208 #define ACPI_NFIT_MEM_MAP_FAILED (1<<6) /* 06: Mapping to SPA failed */ 2209 2210 2211 /* 2: Interleave Structure */ 2212 2213 typedef struct acpi_nfit_interleave 2214 { 2215 ACPI_NFIT_HEADER Header; 2216 UINT16 InterleaveIndex; 2217 UINT16 Reserved; /* Reserved, must be zero */ 2218 UINT32 LineCount; 2219 UINT32 LineSize; 2220 UINT32 LineOffset[]; /* Variable length */ 2221 2222 } ACPI_NFIT_INTERLEAVE; 2223 2224 2225 /* 3: SMBIOS Management Information Structure */ 2226 2227 typedef struct acpi_nfit_smbios 2228 { 2229 ACPI_NFIT_HEADER Header; 2230 UINT32 Reserved; /* Reserved, must be zero */ 2231 UINT8 Data[]; /* Variable length */ 2232 2233 } ACPI_NFIT_SMBIOS; 2234 2235 2236 /* 4: NVDIMM Control Region Structure */ 2237 2238 typedef struct acpi_nfit_control_region 2239 { 2240 ACPI_NFIT_HEADER Header; 2241 UINT16 RegionIndex; 2242 UINT16 VendorId; 2243 UINT16 DeviceId; 2244 UINT16 RevisionId; 2245 UINT16 SubsystemVendorId; 2246 UINT16 SubsystemDeviceId; 2247 UINT16 SubsystemRevisionId; 2248 UINT8 ValidFields; 2249 UINT8 ManufacturingLocation; 2250 UINT16 ManufacturingDate; 2251 UINT8 Reserved[2]; /* Reserved, must be zero */ 2252 UINT32 SerialNumber; 2253 UINT16 Code; 2254 UINT16 Windows; 2255 UINT64 WindowSize; 2256 UINT64 CommandOffset; 2257 UINT64 CommandSize; 2258 UINT64 StatusOffset; 2259 UINT64 StatusSize; 2260 UINT16 Flags; 2261 UINT8 Reserved1[6]; /* Reserved, must be zero */ 2262 2263 } ACPI_NFIT_CONTROL_REGION; 2264 2265 /* Flags */ 2266 2267 #define ACPI_NFIT_CONTROL_BUFFERED (1) /* Block Data Windows implementation is buffered */ 2268 2269 /* ValidFields bits */ 2270 2271 #define ACPI_NFIT_CONTROL_MFG_INFO_VALID (1) /* Manufacturing fields are valid */ 2272 2273 2274 /* 5: NVDIMM Block Data Window Region Structure */ 2275 2276 typedef struct acpi_nfit_data_region 2277 { 2278 ACPI_NFIT_HEADER Header; 2279 UINT16 RegionIndex; 2280 UINT16 Windows; 2281 UINT64 Offset; 2282 UINT64 Size; 2283 UINT64 Capacity; 2284 UINT64 StartAddress; 2285 2286 } ACPI_NFIT_DATA_REGION; 2287 2288 2289 /* 6: Flush Hint Address Structure */ 2290 2291 typedef struct acpi_nfit_flush_address 2292 { 2293 ACPI_NFIT_HEADER Header; 2294 UINT32 DeviceHandle; 2295 UINT16 HintCount; 2296 UINT8 Reserved[6]; /* Reserved, must be zero */ 2297 UINT64 HintAddress[]; /* Variable length */ 2298 2299 } ACPI_NFIT_FLUSH_ADDRESS; 2300 2301 2302 /* 7: Platform Capabilities Structure */ 2303 2304 typedef struct acpi_nfit_capabilities 2305 { 2306 ACPI_NFIT_HEADER Header; 2307 UINT8 HighestCapability; 2308 UINT8 Reserved[3]; /* Reserved, must be zero */ 2309 UINT32 Capabilities; 2310 UINT32 Reserved2; 2311 2312 } ACPI_NFIT_CAPABILITIES; 2313 2314 /* Capabilities Flags */ 2315 2316 #define ACPI_NFIT_CAPABILITY_CACHE_FLUSH (1) /* 00: Cache Flush to NVDIMM capable */ 2317 #define ACPI_NFIT_CAPABILITY_MEM_FLUSH (1<<1) /* 01: Memory Flush to NVDIMM capable */ 2318 #define ACPI_NFIT_CAPABILITY_MEM_MIRRORING (1<<2) /* 02: Memory Mirroring capable */ 2319 2320 2321 /* 2322 * NFIT/DVDIMM device handle support - used as the _ADR for each NVDIMM 2323 */ 2324 typedef struct nfit_device_handle 2325 { 2326 UINT32 Handle; 2327 2328 } NFIT_DEVICE_HANDLE; 2329 2330 /* Device handle construction and extraction macros */ 2331 2332 #define ACPI_NFIT_DIMM_NUMBER_MASK 0x0000000F 2333 #define ACPI_NFIT_CHANNEL_NUMBER_MASK 0x000000F0 2334 #define ACPI_NFIT_MEMORY_ID_MASK 0x00000F00 2335 #define ACPI_NFIT_SOCKET_ID_MASK 0x0000F000 2336 #define ACPI_NFIT_NODE_ID_MASK 0x0FFF0000 2337 2338 #define ACPI_NFIT_DIMM_NUMBER_OFFSET 0 2339 #define ACPI_NFIT_CHANNEL_NUMBER_OFFSET 4 2340 #define ACPI_NFIT_MEMORY_ID_OFFSET 8 2341 #define ACPI_NFIT_SOCKET_ID_OFFSET 12 2342 #define ACPI_NFIT_NODE_ID_OFFSET 16 2343 2344 /* Macro to construct a NFIT/NVDIMM device handle */ 2345 2346 #define ACPI_NFIT_BUILD_DEVICE_HANDLE(dimm, channel, memory, socket, node) \ 2347 ((dimm) | \ 2348 ((channel) << ACPI_NFIT_CHANNEL_NUMBER_OFFSET) | \ 2349 ((memory) << ACPI_NFIT_MEMORY_ID_OFFSET) | \ 2350 ((socket) << ACPI_NFIT_SOCKET_ID_OFFSET) | \ 2351 ((node) << ACPI_NFIT_NODE_ID_OFFSET)) 2352 2353 /* Macros to extract individual fields from a NFIT/NVDIMM device handle */ 2354 2355 #define ACPI_NFIT_GET_DIMM_NUMBER(handle) \ 2356 ((handle) & ACPI_NFIT_DIMM_NUMBER_MASK) 2357 2358 #define ACPI_NFIT_GET_CHANNEL_NUMBER(handle) \ 2359 (((handle) & ACPI_NFIT_CHANNEL_NUMBER_MASK) >> ACPI_NFIT_CHANNEL_NUMBER_OFFSET) 2360 2361 #define ACPI_NFIT_GET_MEMORY_ID(handle) \ 2362 (((handle) & ACPI_NFIT_MEMORY_ID_MASK) >> ACPI_NFIT_MEMORY_ID_OFFSET) 2363 2364 #define ACPI_NFIT_GET_SOCKET_ID(handle) \ 2365 (((handle) & ACPI_NFIT_SOCKET_ID_MASK) >> ACPI_NFIT_SOCKET_ID_OFFSET) 2366 2367 #define ACPI_NFIT_GET_NODE_ID(handle) \ 2368 (((handle) & ACPI_NFIT_NODE_ID_MASK) >> ACPI_NFIT_NODE_ID_OFFSET) 2369 2370 2371 /******************************************************************************* 2372 * 2373 * NHLT - Non HDAudio Link Table 2374 * Version 1 2375 * 2376 ******************************************************************************/ 2377 2378 typedef struct acpi_table_nhlt 2379 { 2380 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 2381 UINT8 EndpointsCount; 2382 /* 2383 * ACPI_NHLT_ENDPOINT Endpoints[]; 2384 * ACPI_NHLT_CONFIG OEDConfig; 2385 */ 2386 2387 } ACPI_TABLE_NHLT; 2388 2389 typedef struct acpi_nhlt_endpoint 2390 { 2391 UINT32 Length; 2392 UINT8 LinkType; 2393 UINT8 InstanceId; 2394 UINT16 VendorId; 2395 UINT16 DeviceId; 2396 UINT16 RevisionId; 2397 UINT32 SubsystemId; 2398 UINT8 DeviceType; 2399 UINT8 Direction; 2400 UINT8 VirtualBusId; 2401 /* 2402 * ACPI_NHLT_CONFIG DeviceConfig; 2403 * ACPI_NHLT_FORMATS_CONFIG FormatsConfig; 2404 * ACPI_NHLT_DEVICES_INFO DevicesInfo; 2405 */ 2406 2407 } ACPI_NHLT_ENDPOINT; 2408 2409 /* Values for LinkType field above */ 2410 2411 #define ACPI_NHLT_LINKTYPE_HDA 0 2412 #define ACPI_NHLT_LINKTYPE_DSP 1 2413 #define ACPI_NHLT_LINKTYPE_PDM 2 2414 #define ACPI_NHLT_LINKTYPE_SSP 3 2415 #define ACPI_NHLT_LINKTYPE_SLIMBUS 4 2416 #define ACPI_NHLT_LINKTYPE_SDW 5 2417 #define ACPI_NHLT_LINKTYPE_UAOL 6 2418 2419 /* Values for DeviceId field above */ 2420 2421 #define ACPI_NHLT_DEVICEID_DMIC 0xAE20 2422 #define ACPI_NHLT_DEVICEID_BT 0xAE30 2423 #define ACPI_NHLT_DEVICEID_I2S 0xAE34 2424 2425 /* Values for DeviceType field above */ 2426 2427 /* Device types unique to endpoint of LinkType=PDM */ 2428 #define ACPI_NHLT_DEVICETYPE_PDM 0 2429 #define ACPI_NHLT_DEVICETYPE_PDM_SKL 1 2430 /* Device types unique to endpoint of LinkType=SSP */ 2431 #define ACPI_NHLT_DEVICETYPE_BT 0 2432 #define ACPI_NHLT_DEVICETYPE_FM 1 2433 #define ACPI_NHLT_DEVICETYPE_MODEM 2 2434 #define ACPI_NHLT_DEVICETYPE_CODEC 4 2435 2436 /* Values for Direction field above */ 2437 2438 #define ACPI_NHLT_DIR_RENDER 0 2439 #define ACPI_NHLT_DIR_CAPTURE 1 2440 2441 typedef struct acpi_nhlt_config 2442 { 2443 UINT32 CapabilitiesSize; 2444 UINT8 Capabilities[1]; 2445 2446 } ACPI_NHLT_CONFIG; 2447 2448 typedef struct acpi_nhlt_gendevice_config 2449 { 2450 UINT8 VirtualSlot; 2451 UINT8 ConfigType; 2452 2453 } ACPI_NHLT_GENDEVICE_CONFIG; 2454 2455 /* Values for ConfigType field above */ 2456 2457 #define ACPI_NHLT_CONFIGTYPE_GENERIC 0 2458 #define ACPI_NHLT_CONFIGTYPE_MICARRAY 1 2459 2460 typedef struct acpi_nhlt_micdevice_config 2461 { 2462 UINT8 VirtualSlot; 2463 UINT8 ConfigType; 2464 UINT8 ArrayType; 2465 2466 } ACPI_NHLT_MICDEVICE_CONFIG; 2467 2468 /* Values for ArrayType field above */ 2469 2470 #define ACPI_NHLT_ARRAYTYPE_LINEAR2_SMALL 0xA 2471 #define ACPI_NHLT_ARRAYTYPE_LINEAR2_BIG 0xB 2472 #define ACPI_NHLT_ARRAYTYPE_LINEAR4_GEO1 0xC 2473 #define ACPI_NHLT_ARRAYTYPE_PLANAR4_LSHAPED 0xD 2474 #define ACPI_NHLT_ARRAYTYPE_LINEAR4_GEO2 0xE 2475 #define ACPI_NHLT_ARRAYTYPE_VENDOR 0xF 2476 2477 typedef struct acpi_nhlt_vendor_mic_config 2478 { 2479 UINT8 Type; 2480 UINT8 Panel; 2481 UINT16 SpeakerPositionDistance; /* mm */ 2482 UINT16 HorizontalOffset; /* mm */ 2483 UINT16 VerticalOffset; /* mm */ 2484 UINT8 FrequencyLowBand; /* 5*Hz */ 2485 UINT8 FrequencyHighBand; /* 500*Hz */ 2486 UINT16 DirectionAngle; /* -180 - +180 */ 2487 UINT16 ElevationAngle; /* -180 - +180 */ 2488 UINT16 WorkVerticalAngleBegin; /* -180 - +180 with 2 deg step */ 2489 UINT16 WorkVerticalAngleEnd; /* -180 - +180 with 2 deg step */ 2490 UINT16 WorkHorizontalAngleBegin; /* -180 - +180 with 2 deg step */ 2491 UINT16 WorkHorizontalAngleEnd; /* -180 - +180 with 2 deg step */ 2492 2493 } ACPI_NHLT_VENDOR_MIC_CONFIG; 2494 2495 /* Values for Type field above */ 2496 2497 #define ACPI_NHLT_MICTYPE_OMNIDIRECTIONAL 0 2498 #define ACPI_NHLT_MICTYPE_SUBCARDIOID 1 2499 #define ACPI_NHLT_MICTYPE_CARDIOID 2 2500 #define ACPI_NHLT_MICTYPE_SUPERCARDIOID 3 2501 #define ACPI_NHLT_MICTYPE_HYPERCARDIOID 4 2502 #define ACPI_NHLT_MICTYPE_8SHAPED 5 2503 #define ACPI_NHLT_MICTYPE_RESERVED 6 2504 #define ACPI_NHLT_MICTYPE_VENDORDEFINED 7 2505 2506 /* Values for Panel field above */ 2507 2508 #define ACPI_NHLT_MICLOCATION_TOP 0 2509 #define ACPI_NHLT_MICLOCATION_BOTTOM 1 2510 #define ACPI_NHLT_MICLOCATION_LEFT 2 2511 #define ACPI_NHLT_MICLOCATION_RIGHT 3 2512 #define ACPI_NHLT_MICLOCATION_FRONT 4 2513 #define ACPI_NHLT_MICLOCATION_REAR 5 2514 2515 typedef struct acpi_nhlt_vendor_micdevice_config 2516 { 2517 UINT8 VirtualSlot; 2518 UINT8 ConfigType; 2519 UINT8 ArrayType; 2520 UINT8 MicsCount; 2521 ACPI_NHLT_VENDOR_MIC_CONFIG Mics[]; 2522 2523 } ACPI_NHLT_VENDOR_MICDEVICE_CONFIG; 2524 2525 typedef union acpi_nhlt_device_config 2526 { 2527 UINT8 VirtualSlot; 2528 ACPI_NHLT_GENDEVICE_CONFIG Gen; 2529 ACPI_NHLT_MICDEVICE_CONFIG Mic; 2530 ACPI_NHLT_VENDOR_MICDEVICE_CONFIG VendorMic; 2531 2532 } ACPI_NHLT_DEVICE_CONFIG; 2533 2534 /* Inherited from Microsoft's WAVEFORMATEXTENSIBLE. */ 2535 typedef struct acpi_nhlt_wave_formatext 2536 { 2537 UINT16 FormatTag; 2538 UINT16 ChannelCount; 2539 UINT32 SamplesPerSec; 2540 UINT32 AvgBytesPerSec; 2541 UINT16 BlockAlign; 2542 UINT16 BitsPerSample; 2543 UINT16 ExtraFormatSize; 2544 UINT16 ValidBitsPerSample; 2545 UINT32 ChannelMask; 2546 UINT8 Subformat[16]; 2547 2548 } ACPI_NHLT_WAVE_FORMATEXT; 2549 2550 typedef struct acpi_nhlt_format_config 2551 { 2552 ACPI_NHLT_WAVE_FORMATEXT Format; 2553 ACPI_NHLT_CONFIG Config; 2554 2555 } ACPI_NHLT_FORMAT_CONFIG; 2556 2557 typedef struct acpi_nhlt_formats_config 2558 { 2559 UINT8 FormatsCount; 2560 ACPI_NHLT_FORMAT_CONFIG Formats[]; 2561 2562 } ACPI_NHLT_FORMATS_CONFIG; 2563 2564 typedef struct acpi_nhlt_device_info 2565 { 2566 UINT8 Id[16]; 2567 UINT8 InstanceId; 2568 UINT8 PortId; 2569 2570 } ACPI_NHLT_DEVICE_INFO; 2571 2572 typedef struct acpi_nhlt_devices_info 2573 { 2574 UINT8 DevicesCount; 2575 ACPI_NHLT_DEVICE_INFO Devices[]; 2576 2577 } ACPI_NHLT_DEVICES_INFO; 2578 2579 2580 /******************************************************************************* 2581 * 2582 * PCCT - Platform Communications Channel Table (ACPI 5.0) 2583 * Version 2 (ACPI 6.2) 2584 * 2585 ******************************************************************************/ 2586 2587 typedef struct acpi_table_pcct 2588 { 2589 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 2590 UINT32 Flags; 2591 UINT64 Reserved; 2592 2593 } ACPI_TABLE_PCCT; 2594 2595 /* Values for Flags field above */ 2596 2597 #define ACPI_PCCT_DOORBELL 1 2598 2599 /* Values for subtable type in ACPI_SUBTABLE_HEADER */ 2600 2601 enum AcpiPcctType 2602 { 2603 ACPI_PCCT_TYPE_GENERIC_SUBSPACE = 0, 2604 ACPI_PCCT_TYPE_HW_REDUCED_SUBSPACE = 1, 2605 ACPI_PCCT_TYPE_HW_REDUCED_SUBSPACE_TYPE2 = 2, /* ACPI 6.1 */ 2606 ACPI_PCCT_TYPE_EXT_PCC_MASTER_SUBSPACE = 3, /* ACPI 6.2 */ 2607 ACPI_PCCT_TYPE_EXT_PCC_SLAVE_SUBSPACE = 4, /* ACPI 6.2 */ 2608 ACPI_PCCT_TYPE_HW_REG_COMM_SUBSPACE = 5, /* ACPI 6.4 */ 2609 ACPI_PCCT_TYPE_RESERVED = 6 /* 6 and greater are reserved */ 2610 }; 2611 2612 /* 2613 * PCCT Subtables, correspond to Type in ACPI_SUBTABLE_HEADER 2614 */ 2615 2616 /* 0: Generic Communications Subspace */ 2617 2618 typedef struct acpi_pcct_subspace 2619 { 2620 ACPI_SUBTABLE_HEADER Header; 2621 UINT8 Reserved[6]; 2622 UINT64 BaseAddress; 2623 UINT64 Length; 2624 ACPI_GENERIC_ADDRESS DoorbellRegister; 2625 UINT64 PreserveMask; 2626 UINT64 WriteMask; 2627 UINT32 Latency; 2628 UINT32 MaxAccessRate; 2629 UINT16 MinTurnaroundTime; 2630 2631 } ACPI_PCCT_SUBSPACE; 2632 2633 2634 /* 1: HW-reduced Communications Subspace (ACPI 5.1) */ 2635 2636 typedef struct acpi_pcct_hw_reduced 2637 { 2638 ACPI_SUBTABLE_HEADER Header; 2639 UINT32 PlatformInterrupt; 2640 UINT8 Flags; 2641 UINT8 Reserved; 2642 UINT64 BaseAddress; 2643 UINT64 Length; 2644 ACPI_GENERIC_ADDRESS DoorbellRegister; 2645 UINT64 PreserveMask; 2646 UINT64 WriteMask; 2647 UINT32 Latency; 2648 UINT32 MaxAccessRate; 2649 UINT16 MinTurnaroundTime; 2650 2651 } ACPI_PCCT_HW_REDUCED; 2652 2653 2654 /* 2: HW-reduced Communications Subspace Type 2 (ACPI 6.1) */ 2655 2656 typedef struct acpi_pcct_hw_reduced_type2 2657 { 2658 ACPI_SUBTABLE_HEADER Header; 2659 UINT32 PlatformInterrupt; 2660 UINT8 Flags; 2661 UINT8 Reserved; 2662 UINT64 BaseAddress; 2663 UINT64 Length; 2664 ACPI_GENERIC_ADDRESS DoorbellRegister; 2665 UINT64 PreserveMask; 2666 UINT64 WriteMask; 2667 UINT32 Latency; 2668 UINT32 MaxAccessRate; 2669 UINT16 MinTurnaroundTime; 2670 ACPI_GENERIC_ADDRESS PlatformAckRegister; 2671 UINT64 AckPreserveMask; 2672 UINT64 AckWriteMask; 2673 2674 } ACPI_PCCT_HW_REDUCED_TYPE2; 2675 2676 2677 /* 3: Extended PCC Master Subspace Type 3 (ACPI 6.2) */ 2678 2679 typedef struct acpi_pcct_ext_pcc_master 2680 { 2681 ACPI_SUBTABLE_HEADER Header; 2682 UINT32 PlatformInterrupt; 2683 UINT8 Flags; 2684 UINT8 Reserved1; 2685 UINT64 BaseAddress; 2686 UINT32 Length; 2687 ACPI_GENERIC_ADDRESS DoorbellRegister; 2688 UINT64 PreserveMask; 2689 UINT64 WriteMask; 2690 UINT32 Latency; 2691 UINT32 MaxAccessRate; 2692 UINT32 MinTurnaroundTime; 2693 ACPI_GENERIC_ADDRESS PlatformAckRegister; 2694 UINT64 AckPreserveMask; 2695 UINT64 AckSetMask; 2696 UINT64 Reserved2; 2697 ACPI_GENERIC_ADDRESS CmdCompleteRegister; 2698 UINT64 CmdCompleteMask; 2699 ACPI_GENERIC_ADDRESS CmdUpdateRegister; 2700 UINT64 CmdUpdatePreserveMask; 2701 UINT64 CmdUpdateSetMask; 2702 ACPI_GENERIC_ADDRESS ErrorStatusRegister; 2703 UINT64 ErrorStatusMask; 2704 2705 } ACPI_PCCT_EXT_PCC_MASTER; 2706 2707 2708 /* 4: Extended PCC Slave Subspace Type 4 (ACPI 6.2) */ 2709 2710 typedef struct acpi_pcct_ext_pcc_slave 2711 { 2712 ACPI_SUBTABLE_HEADER Header; 2713 UINT32 PlatformInterrupt; 2714 UINT8 Flags; 2715 UINT8 Reserved1; 2716 UINT64 BaseAddress; 2717 UINT32 Length; 2718 ACPI_GENERIC_ADDRESS DoorbellRegister; 2719 UINT64 PreserveMask; 2720 UINT64 WriteMask; 2721 UINT32 Latency; 2722 UINT32 MaxAccessRate; 2723 UINT32 MinTurnaroundTime; 2724 ACPI_GENERIC_ADDRESS PlatformAckRegister; 2725 UINT64 AckPreserveMask; 2726 UINT64 AckSetMask; 2727 UINT64 Reserved2; 2728 ACPI_GENERIC_ADDRESS CmdCompleteRegister; 2729 UINT64 CmdCompleteMask; 2730 ACPI_GENERIC_ADDRESS CmdUpdateRegister; 2731 UINT64 CmdUpdatePreserveMask; 2732 UINT64 CmdUpdateSetMask; 2733 ACPI_GENERIC_ADDRESS ErrorStatusRegister; 2734 UINT64 ErrorStatusMask; 2735 2736 } ACPI_PCCT_EXT_PCC_SLAVE; 2737 2738 /* 5: HW Registers based Communications Subspace */ 2739 2740 typedef struct acpi_pcct_hw_reg 2741 { 2742 ACPI_SUBTABLE_HEADER Header; 2743 UINT16 Version; 2744 UINT64 BaseAddress; 2745 UINT64 Length; 2746 ACPI_GENERIC_ADDRESS DoorbellRegister; 2747 UINT64 DoorbellPreserve; 2748 UINT64 DoorbellWrite; 2749 ACPI_GENERIC_ADDRESS CmdCompleteRegister; 2750 UINT64 CmdCompleteMask; 2751 ACPI_GENERIC_ADDRESS ErrorStatusRegister; 2752 UINT64 ErrorStatusMask; 2753 UINT32 NominalLatency; 2754 UINT32 MinTurnaroundTime; 2755 2756 } ACPI_PCCT_HW_REG; 2757 2758 2759 /* Values for doorbell flags above */ 2760 2761 #define ACPI_PCCT_INTERRUPT_POLARITY (1) 2762 #define ACPI_PCCT_INTERRUPT_MODE (1<<1) 2763 2764 2765 /* 2766 * PCC memory structures (not part of the ACPI table) 2767 */ 2768 2769 /* Shared Memory Region */ 2770 2771 typedef struct acpi_pcct_shared_memory 2772 { 2773 UINT32 Signature; 2774 UINT16 Command; 2775 UINT16 Status; 2776 2777 } ACPI_PCCT_SHARED_MEMORY; 2778 2779 2780 /* Extended PCC Subspace Shared Memory Region (ACPI 6.2) */ 2781 2782 typedef struct acpi_pcct_ext_pcc_shared_memory 2783 { 2784 UINT32 Signature; 2785 UINT32 Flags; 2786 UINT32 Length; 2787 UINT32 Command; 2788 2789 } ACPI_PCCT_EXT_PCC_SHARED_MEMORY; 2790 2791 2792 /******************************************************************************* 2793 * 2794 * PDTT - Platform Debug Trigger Table (ACPI 6.2) 2795 * Version 0 2796 * 2797 ******************************************************************************/ 2798 2799 typedef struct acpi_table_pdtt 2800 { 2801 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 2802 UINT8 TriggerCount; 2803 UINT8 Reserved[3]; 2804 UINT32 ArrayOffset; 2805 2806 } ACPI_TABLE_PDTT; 2807 2808 2809 /* 2810 * PDTT Communication Channel Identifier Structure. 2811 * The number of these structures is defined by TriggerCount above, 2812 * starting at ArrayOffset. 2813 */ 2814 typedef struct acpi_pdtt_channel 2815 { 2816 UINT8 SubchannelId; 2817 UINT8 Flags; 2818 2819 } ACPI_PDTT_CHANNEL; 2820 2821 /* Flags for above */ 2822 2823 #define ACPI_PDTT_RUNTIME_TRIGGER (1) 2824 #define ACPI_PDTT_WAIT_COMPLETION (1<<1) 2825 #define ACPI_PDTT_TRIGGER_ORDER (1<<2) 2826 2827 2828 /******************************************************************************* 2829 * 2830 * PHAT - Platform Health Assessment Table (ACPI 6.4) 2831 * Version 1 2832 * 2833 ******************************************************************************/ 2834 2835 typedef struct acpi_table_phat 2836 { 2837 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 2838 2839 } ACPI_TABLE_PHAT; 2840 2841 /* Common header for PHAT subtables that follow main table */ 2842 2843 typedef struct acpi_phat_header 2844 { 2845 UINT16 Type; 2846 UINT16 Length; 2847 UINT8 Revision; 2848 2849 } ACPI_PHAT_HEADER; 2850 2851 2852 /* Values for Type field above */ 2853 2854 #define ACPI_PHAT_TYPE_FW_VERSION_DATA 0 2855 #define ACPI_PHAT_TYPE_FW_HEALTH_DATA 1 2856 #define ACPI_PHAT_TYPE_RESERVED 2 /* 0x02-0xFFFF are reserved */ 2857 2858 /* 2859 * PHAT subtables, correspond to Type in ACPI_PHAT_HEADER 2860 */ 2861 2862 /* 0: Firmware Version Data Record */ 2863 2864 typedef struct acpi_phat_version_data 2865 { 2866 ACPI_PHAT_HEADER Header; 2867 UINT8 Reserved[3]; 2868 UINT32 ElementCount; 2869 2870 } ACPI_PHAT_VERSION_DATA; 2871 2872 typedef struct acpi_phat_version_element 2873 { 2874 UINT8 Guid[16]; 2875 UINT64 VersionValue; 2876 UINT32 ProducerId; 2877 2878 } ACPI_PHAT_VERSION_ELEMENT; 2879 2880 2881 /* 1: Firmware Health Data Record */ 2882 2883 typedef struct acpi_phat_health_data 2884 { 2885 ACPI_PHAT_HEADER Header; 2886 UINT8 Reserved[2]; 2887 UINT8 Health; 2888 UINT8 DeviceGuid[16]; 2889 UINT32 DeviceSpecificOffset; /* Zero if no Device-specific data */ 2890 2891 } ACPI_PHAT_HEALTH_DATA; 2892 2893 /* Values for Health field above */ 2894 2895 #define ACPI_PHAT_ERRORS_FOUND 0 2896 #define ACPI_PHAT_NO_ERRORS 1 2897 #define ACPI_PHAT_UNKNOWN_ERRORS 2 2898 #define ACPI_PHAT_ADVISORY 3 2899 2900 2901 /******************************************************************************* 2902 * 2903 * PMTT - Platform Memory Topology Table (ACPI 5.0) 2904 * Version 1 2905 * 2906 ******************************************************************************/ 2907 2908 typedef struct acpi_table_pmtt 2909 { 2910 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 2911 UINT32 MemoryDeviceCount; 2912 /* 2913 * Immediately followed by: 2914 * MEMORY_DEVICE MemoryDeviceStruct[MemoryDeviceCount]; 2915 */ 2916 2917 } ACPI_TABLE_PMTT; 2918 2919 2920 /* Common header for PMTT subtables that follow main table */ 2921 2922 typedef struct acpi_pmtt_header 2923 { 2924 UINT8 Type; 2925 UINT8 Reserved1; 2926 UINT16 Length; 2927 UINT16 Flags; 2928 UINT16 Reserved2; 2929 UINT32 MemoryDeviceCount; /* Zero means no memory device structs follow */ 2930 /* 2931 * Immediately followed by: 2932 * UINT8 TypeSpecificData[] 2933 * MEMORY_DEVICE MemoryDeviceStruct[MemoryDeviceCount]; 2934 */ 2935 2936 } ACPI_PMTT_HEADER; 2937 2938 /* Values for Type field above */ 2939 2940 #define ACPI_PMTT_TYPE_SOCKET 0 2941 #define ACPI_PMTT_TYPE_CONTROLLER 1 2942 #define ACPI_PMTT_TYPE_DIMM 2 2943 #define ACPI_PMTT_TYPE_RESERVED 3 /* 0x03-0xFE are reserved */ 2944 #define ACPI_PMTT_TYPE_VENDOR 0xFF 2945 2946 /* Values for Flags field above */ 2947 2948 #define ACPI_PMTT_TOP_LEVEL 0x0001 2949 #define ACPI_PMTT_PHYSICAL 0x0002 2950 #define ACPI_PMTT_MEMORY_TYPE 0x000C 2951 2952 2953 /* 2954 * PMTT subtables, correspond to Type in acpi_pmtt_header 2955 */ 2956 2957 2958 /* 0: Socket Structure */ 2959 2960 typedef struct acpi_pmtt_socket 2961 { 2962 ACPI_PMTT_HEADER Header; 2963 UINT16 SocketId; 2964 UINT16 Reserved; 2965 2966 } ACPI_PMTT_SOCKET; 2967 /* 2968 * Immediately followed by: 2969 * MEMORY_DEVICE MemoryDeviceStruct[MemoryDeviceCount]; 2970 */ 2971 2972 2973 /* 1: Memory Controller subtable */ 2974 2975 typedef struct acpi_pmtt_controller 2976 { 2977 ACPI_PMTT_HEADER Header; 2978 UINT16 ControllerId; 2979 UINT16 Reserved; 2980 2981 } ACPI_PMTT_CONTROLLER; 2982 /* 2983 * Immediately followed by: 2984 * MEMORY_DEVICE MemoryDeviceStruct[MemoryDeviceCount]; 2985 */ 2986 2987 2988 /* 2: Physical Component Identifier (DIMM) */ 2989 2990 typedef struct acpi_pmtt_physical_component 2991 { 2992 ACPI_PMTT_HEADER Header; 2993 UINT32 BiosHandle; 2994 2995 } ACPI_PMTT_PHYSICAL_COMPONENT; 2996 2997 2998 /* 0xFF: Vendor Specific Data */ 2999 3000 typedef struct acpi_pmtt_vendor_specific 3001 { 3002 ACPI_PMTT_HEADER Header; 3003 UINT8 TypeUuid[16]; 3004 UINT8 Specific[]; 3005 /* 3006 * Immediately followed by: 3007 * UINT8 VendorSpecificData[]; 3008 * MEMORY_DEVICE MemoryDeviceStruct[MemoryDeviceCount]; 3009 */ 3010 3011 } ACPI_PMTT_VENDOR_SPECIFIC; 3012 3013 3014 /******************************************************************************* 3015 * 3016 * PPTT - Processor Properties Topology Table (ACPI 6.2) 3017 * Version 1 3018 * 3019 ******************************************************************************/ 3020 3021 typedef struct acpi_table_pptt 3022 { 3023 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 3024 3025 } ACPI_TABLE_PPTT; 3026 3027 /* Values for Type field above */ 3028 3029 enum AcpiPpttType 3030 { 3031 ACPI_PPTT_TYPE_PROCESSOR = 0, 3032 ACPI_PPTT_TYPE_CACHE = 1, 3033 ACPI_PPTT_TYPE_ID = 2, 3034 ACPI_PPTT_TYPE_RESERVED = 3 3035 }; 3036 3037 3038 /* 0: Processor Hierarchy Node Structure */ 3039 3040 typedef struct acpi_pptt_processor 3041 { 3042 ACPI_SUBTABLE_HEADER Header; 3043 UINT16 Reserved; 3044 UINT32 Flags; 3045 UINT32 Parent; 3046 UINT32 AcpiProcessorId; 3047 UINT32 NumberOfPrivResources; 3048 3049 } ACPI_PPTT_PROCESSOR; 3050 3051 /* Flags */ 3052 3053 #define ACPI_PPTT_PHYSICAL_PACKAGE (1) 3054 #define ACPI_PPTT_ACPI_PROCESSOR_ID_VALID (1<<1) 3055 #define ACPI_PPTT_ACPI_PROCESSOR_IS_THREAD (1<<2) /* ACPI 6.3 */ 3056 #define ACPI_PPTT_ACPI_LEAF_NODE (1<<3) /* ACPI 6.3 */ 3057 #define ACPI_PPTT_ACPI_IDENTICAL (1<<4) /* ACPI 6.3 */ 3058 3059 3060 /* 1: Cache Type Structure */ 3061 3062 typedef struct acpi_pptt_cache 3063 { 3064 ACPI_SUBTABLE_HEADER Header; 3065 UINT16 Reserved; 3066 UINT32 Flags; 3067 UINT32 NextLevelOfCache; 3068 UINT32 Size; 3069 UINT32 NumberOfSets; 3070 UINT8 Associativity; 3071 UINT8 Attributes; 3072 UINT16 LineSize; 3073 3074 } ACPI_PPTT_CACHE; 3075 3076 /* 1: Cache Type Structure for PPTT version 3 */ 3077 3078 typedef struct acpi_pptt_cache_v1 3079 { 3080 UINT32 CacheId; 3081 3082 } ACPI_PPTT_CACHE_V1; 3083 3084 3085 /* Flags */ 3086 3087 #define ACPI_PPTT_SIZE_PROPERTY_VALID (1) /* Physical property valid */ 3088 #define ACPI_PPTT_NUMBER_OF_SETS_VALID (1<<1) /* Number of sets valid */ 3089 #define ACPI_PPTT_ASSOCIATIVITY_VALID (1<<2) /* Associativity valid */ 3090 #define ACPI_PPTT_ALLOCATION_TYPE_VALID (1<<3) /* Allocation type valid */ 3091 #define ACPI_PPTT_CACHE_TYPE_VALID (1<<4) /* Cache type valid */ 3092 #define ACPI_PPTT_WRITE_POLICY_VALID (1<<5) /* Write policy valid */ 3093 #define ACPI_PPTT_LINE_SIZE_VALID (1<<6) /* Line size valid */ 3094 #define ACPI_PPTT_CACHE_ID_VALID (1<<7) /* Cache ID valid */ 3095 3096 /* Masks for Attributes */ 3097 3098 #define ACPI_PPTT_MASK_ALLOCATION_TYPE (0x03) /* Allocation type */ 3099 #define ACPI_PPTT_MASK_CACHE_TYPE (0x0C) /* Cache type */ 3100 #define ACPI_PPTT_MASK_WRITE_POLICY (0x10) /* Write policy */ 3101 3102 /* Attributes describing cache */ 3103 #define ACPI_PPTT_CACHE_READ_ALLOCATE (0x0) /* Cache line is allocated on read */ 3104 #define ACPI_PPTT_CACHE_WRITE_ALLOCATE (0x01) /* Cache line is allocated on write */ 3105 #define ACPI_PPTT_CACHE_RW_ALLOCATE (0x02) /* Cache line is allocated on read and write */ 3106 #define ACPI_PPTT_CACHE_RW_ALLOCATE_ALT (0x03) /* Alternate representation of above */ 3107 3108 #define ACPI_PPTT_CACHE_TYPE_DATA (0x0) /* Data cache */ 3109 #define ACPI_PPTT_CACHE_TYPE_INSTR (1<<2) /* Instruction cache */ 3110 #define ACPI_PPTT_CACHE_TYPE_UNIFIED (2<<2) /* Unified I & D cache */ 3111 #define ACPI_PPTT_CACHE_TYPE_UNIFIED_ALT (3<<2) /* Alternate representation of above */ 3112 3113 #define ACPI_PPTT_CACHE_POLICY_WB (0x0) /* Cache is write back */ 3114 #define ACPI_PPTT_CACHE_POLICY_WT (1<<4) /* Cache is write through */ 3115 3116 /* 2: ID Structure */ 3117 3118 typedef struct acpi_pptt_id 3119 { 3120 ACPI_SUBTABLE_HEADER Header; 3121 UINT16 Reserved; 3122 UINT32 VendorId; 3123 UINT64 Level1Id; 3124 UINT64 Level2Id; 3125 UINT16 MajorRev; 3126 UINT16 MinorRev; 3127 UINT16 SpinRev; 3128 3129 } ACPI_PPTT_ID; 3130 3131 3132 /******************************************************************************* 3133 * 3134 * PRMT - Platform Runtime Mechanism Table 3135 * Version 1 3136 * 3137 ******************************************************************************/ 3138 3139 typedef struct acpi_table_prmt 3140 { 3141 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 3142 3143 } ACPI_TABLE_PRMT; 3144 3145 typedef struct acpi_table_prmt_header 3146 { 3147 UINT8 PlatformGuid[16]; 3148 UINT32 ModuleInfoOffset; 3149 UINT32 ModuleInfoCount; 3150 3151 } ACPI_TABLE_PRMT_HEADER; 3152 3153 typedef struct acpi_prmt_module_header 3154 { 3155 UINT16 Revision; 3156 UINT16 Length; 3157 3158 } ACPI_PRMT_MODULE_HEADER; 3159 3160 typedef struct acpi_prmt_module_info 3161 { 3162 UINT16 Revision; 3163 UINT16 Length; 3164 UINT8 ModuleGuid[16]; 3165 UINT16 MajorRev; 3166 UINT16 MinorRev; 3167 UINT16 HandlerInfoCount; 3168 UINT32 HandlerInfoOffset; 3169 UINT64 MmioListPointer; 3170 3171 } ACPI_PRMT_MODULE_INFO; 3172 3173 typedef struct acpi_prmt_handler_info 3174 { 3175 UINT16 Revision; 3176 UINT16 Length; 3177 UINT8 HandlerGuid[16]; 3178 UINT64 HandlerAddress; 3179 UINT64 StaticDataBufferAddress; 3180 UINT64 AcpiParamBufferAddress; 3181 3182 } ACPI_PRMT_HANDLER_INFO; 3183 3184 3185 /******************************************************************************* 3186 * 3187 * RASF - RAS Feature Table (ACPI 5.0) 3188 * Version 1 3189 * 3190 ******************************************************************************/ 3191 3192 typedef struct acpi_table_rasf 3193 { 3194 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 3195 UINT8 ChannelId[12]; 3196 3197 } ACPI_TABLE_RASF; 3198 3199 /* RASF Platform Communication Channel Shared Memory Region */ 3200 3201 typedef struct acpi_rasf_shared_memory 3202 { 3203 UINT32 Signature; 3204 UINT16 Command; 3205 UINT16 Status; 3206 UINT16 Version; 3207 UINT8 Capabilities[16]; 3208 UINT8 SetCapabilities[16]; 3209 UINT16 NumParameterBlocks; 3210 UINT32 SetCapabilitiesStatus; 3211 3212 } ACPI_RASF_SHARED_MEMORY; 3213 3214 /* RASF Parameter Block Structure Header */ 3215 3216 typedef struct acpi_rasf_parameter_block 3217 { 3218 UINT16 Type; 3219 UINT16 Version; 3220 UINT16 Length; 3221 3222 } ACPI_RASF_PARAMETER_BLOCK; 3223 3224 /* RASF Parameter Block Structure for PATROL_SCRUB */ 3225 3226 typedef struct acpi_rasf_patrol_scrub_parameter 3227 { 3228 ACPI_RASF_PARAMETER_BLOCK Header; 3229 UINT16 PatrolScrubCommand; 3230 UINT64 RequestedAddressRange[2]; 3231 UINT64 ActualAddressRange[2]; 3232 UINT16 Flags; 3233 UINT8 RequestedSpeed; 3234 3235 } ACPI_RASF_PATROL_SCRUB_PARAMETER; 3236 3237 /* Masks for Flags and Speed fields above */ 3238 3239 #define ACPI_RASF_SCRUBBER_RUNNING 1 3240 #define ACPI_RASF_SPEED (7<<1) 3241 #define ACPI_RASF_SPEED_SLOW (0<<1) 3242 #define ACPI_RASF_SPEED_MEDIUM (4<<1) 3243 #define ACPI_RASF_SPEED_FAST (7<<1) 3244 3245 /* Channel Commands */ 3246 3247 enum AcpiRasfCommands 3248 { 3249 ACPI_RASF_EXECUTE_RASF_COMMAND = 1 3250 }; 3251 3252 /* Platform RAS Capabilities */ 3253 3254 enum AcpiRasfCapabiliities 3255 { 3256 ACPI_HW_PATROL_SCRUB_SUPPORTED = 0, 3257 ACPI_SW_PATROL_SCRUB_EXPOSED = 1 3258 }; 3259 3260 /* Patrol Scrub Commands */ 3261 3262 enum AcpiRasfPatrolScrubCommands 3263 { 3264 ACPI_RASF_GET_PATROL_PARAMETERS = 1, 3265 ACPI_RASF_START_PATROL_SCRUBBER = 2, 3266 ACPI_RASF_STOP_PATROL_SCRUBBER = 3 3267 }; 3268 3269 /* Channel Command flags */ 3270 3271 #define ACPI_RASF_GENERATE_SCI (1<<15) 3272 3273 /* Status values */ 3274 3275 enum AcpiRasfStatus 3276 { 3277 ACPI_RASF_SUCCESS = 0, 3278 ACPI_RASF_NOT_VALID = 1, 3279 ACPI_RASF_NOT_SUPPORTED = 2, 3280 ACPI_RASF_BUSY = 3, 3281 ACPI_RASF_FAILED = 4, 3282 ACPI_RASF_ABORTED = 5, 3283 ACPI_RASF_INVALID_DATA = 6 3284 }; 3285 3286 /* Status flags */ 3287 3288 #define ACPI_RASF_COMMAND_COMPLETE (1) 3289 #define ACPI_RASF_SCI_DOORBELL (1<<1) 3290 #define ACPI_RASF_ERROR (1<<2) 3291 #define ACPI_RASF_STATUS (0x1F<<3) 3292 3293 3294 /******************************************************************************* 3295 * 3296 * RAS2 - RAS2 Feature Table (ACPI 6.5) 3297 * Version 1 3298 * 3299 * 3300 ******************************************************************************/ 3301 3302 typedef struct acpi_table_ras2 { 3303 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 3304 UINT16 Reserved; 3305 UINT16 NumPccDescs; 3306 3307 } ACPI_TABLE_RAS2; 3308 3309 /* RAS2 Platform Communication Channel Descriptor */ 3310 3311 typedef struct acpi_ras2_pcc_desc { 3312 UINT8 ChannelId; 3313 UINT16 Reserved; 3314 UINT8 FeatureType; 3315 UINT32 Instance; 3316 3317 } ACPI_RAS2_PCC_DESC; 3318 3319 /* RAS2 Platform Communication Channel Shared Memory Region */ 3320 3321 typedef struct acpi_ras2_shared_memory { 3322 UINT32 Signature; 3323 UINT16 Command; 3324 UINT16 Status; 3325 UINT16 Version; 3326 UINT8 Features[16]; 3327 UINT8 SetCapabilities[16]; 3328 UINT16 NumParameterBlocks; 3329 UINT32 SetCapabilitiesStatus; 3330 3331 } ACPI_RAS2_SHARED_MEMORY; 3332 3333 /* RAS2 Parameter Block Structure for PATROL_SCRUB */ 3334 3335 typedef struct acpi_ras2_parameter_block 3336 { 3337 UINT16 Type; 3338 UINT16 Version; 3339 UINT16 Length; 3340 3341 } ACPI_RAS2_PARAMETER_BLOCK; 3342 3343 /* RAS2 Parameter Block Structure for PATROL_SCRUB */ 3344 3345 typedef struct acpi_ras2_patrol_scrub_parameter { 3346 ACPI_RAS2_PARAMETER_BLOCK Header; 3347 UINT16 PatrolScrubCommand; 3348 UINT64 RequestedAddressRange[2]; 3349 UINT64 ActualAddressRange[2]; 3350 UINT32 Flags; 3351 UINT32 ScrubParamsOut; 3352 UINT32 ScrubParamsIn; 3353 3354 } ACPI_RAS2_PATROL_SCRUB_PARAMETER; 3355 3356 /* Masks for Flags field above */ 3357 3358 #define ACPI_RAS2_SCRUBBER_RUNNING 1 3359 3360 /* RAS2 Parameter Block Structure for LA2PA_TRANSLATION */ 3361 3362 typedef struct acpi_ras2_la2pa_translation_parameter { 3363 ACPI_RAS2_PARAMETER_BLOCK Header; 3364 UINT16 AddrTranslationCommand; 3365 UINT64 SubInstId; 3366 UINT64 LogicalAddress; 3367 UINT64 PhysicalAddress; 3368 UINT32 Status; 3369 3370 } ACPI_RAS2_LA2PA_TRANSLATION_PARAM; 3371 3372 /* Channel Commands */ 3373 3374 enum AcpiRas2Commands 3375 { 3376 ACPI_RAS2_EXECUTE_RAS2_COMMAND = 1 3377 }; 3378 3379 /* Platform RAS2 Features */ 3380 3381 enum AcpiRas2Features 3382 { 3383 ACPI_RAS2_PATROL_SCRUB_SUPPORTED = 0, 3384 ACPI_RAS2_LA2PA_TRANSLATION = 1 3385 }; 3386 3387 /* RAS2 Patrol Scrub Commands */ 3388 3389 enum AcpiRas2PatrolScrubCommands 3390 { 3391 ACPI_RAS2_GET_PATROL_PARAMETERS = 1, 3392 ACPI_RAS2_START_PATROL_SCRUBBER = 2, 3393 ACPI_RAS2_STOP_PATROL_SCRUBBER = 3 3394 }; 3395 3396 /* RAS2 LA2PA Translation Commands */ 3397 3398 enum AcpiRas2La2PaTranslationCommands 3399 { 3400 ACPI_RAS2_GET_LA2PA_TRANSLATION = 1, 3401 }; 3402 3403 /* RAS2 LA2PA Translation Status values */ 3404 3405 enum AcpiRas2La2PaTranslationStatus 3406 { 3407 ACPI_RAS2_LA2PA_TRANSLATION_SUCCESS = 0, 3408 ACPI_RAS2_LA2PA_TRANSLATION_FAIL = 1, 3409 }; 3410 3411 /* Channel Command flags */ 3412 3413 #define ACPI_RAS2_GENERATE_SCI (1<<15) 3414 3415 /* Status values */ 3416 3417 enum AcpiRas2Status 3418 { 3419 ACPI_RAS2_SUCCESS = 0, 3420 ACPI_RAS2_NOT_VALID = 1, 3421 ACPI_RAS2_NOT_SUPPORTED = 2, 3422 ACPI_RAS2_BUSY = 3, 3423 ACPI_RAS2_FAILED = 4, 3424 ACPI_RAS2_ABORTED = 5, 3425 ACPI_RAS2_INVALID_DATA = 6 3426 }; 3427 3428 /* Status flags */ 3429 3430 #define ACPI_RAS2_COMMAND_COMPLETE (1) 3431 #define ACPI_RAS2_SCI_DOORBELL (1<<1) 3432 #define ACPI_RAS2_ERROR (1<<2) 3433 #define ACPI_RAS2_STATUS (0x1F<<3) 3434 3435 3436 /******************************************************************************* 3437 * 3438 * RGRT - Regulatory Graphics Resource Table 3439 * Version 1 3440 * 3441 * Conforms to "ACPI RGRT" available at: 3442 * https://microsoft.github.io/mu/dyn/mu_plus/MsCorePkg/AcpiRGRT/feature_acpi_rgrt/ 3443 * 3444 ******************************************************************************/ 3445 3446 typedef struct acpi_table_rgrt 3447 { 3448 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 3449 UINT16 Version; 3450 UINT8 ImageType; 3451 UINT8 Reserved; 3452 UINT8 Image[]; 3453 3454 } ACPI_TABLE_RGRT; 3455 3456 /* ImageType values */ 3457 3458 enum AcpiRgrtImageType 3459 { 3460 ACPI_RGRT_TYPE_RESERVED0 = 0, 3461 ACPI_RGRT_IMAGE_TYPE_PNG = 1, 3462 ACPI_RGRT_TYPE_RESERVED = 2 /* 2 and greater are reserved */ 3463 }; 3464 3465 3466 /******************************************************************************* 3467 * 3468 * RHCT - RISC-V Hart Capabilities Table 3469 * Version 1 3470 * 3471 ******************************************************************************/ 3472 3473 typedef struct acpi_table_rhct { 3474 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 3475 UINT32 Flags; /* RHCT flags */ 3476 UINT64 TimeBaseFreq; 3477 UINT32 NodeCount; 3478 UINT32 NodeOffset; 3479 } ACPI_TABLE_RHCT; 3480 3481 /* RHCT Flags */ 3482 3483 #define ACPI_RHCT_TIMER_CANNOT_WAKEUP_CPU (1) 3484 /* 3485 * RHCT subtables 3486 */ 3487 typedef struct acpi_rhct_node_header { 3488 UINT16 Type; 3489 UINT16 Length; 3490 UINT16 Revision; 3491 } ACPI_RHCT_NODE_HEADER; 3492 3493 /* Values for RHCT subtable Type above */ 3494 3495 enum acpi_rhct_node_type { 3496 ACPI_RHCT_NODE_TYPE_ISA_STRING = 0x0000, 3497 ACPI_RHCT_NODE_TYPE_CMO = 0x0001, 3498 ACPI_RHCT_NODE_TYPE_MMU = 0x0002, 3499 ACPI_RHCT_NODE_TYPE_RESERVED = 0x0003, 3500 ACPI_RHCT_NODE_TYPE_HART_INFO = 0xFFFF, 3501 }; 3502 3503 /* 3504 * RHCT node specific subtables 3505 */ 3506 3507 /* ISA string node structure */ 3508 typedef struct acpi_rhct_isa_string { 3509 UINT16 IsaLength; 3510 char Isa[]; 3511 } ACPI_RHCT_ISA_STRING; 3512 3513 typedef struct acpi_rhct_cmo_node { 3514 UINT8 Reserved; /* Must be zero */ 3515 UINT8 CbomSize; /* CBOM size in powerof 2 */ 3516 UINT8 CbopSize; /* CBOP size in powerof 2 */ 3517 UINT8 CbozSize; /* CBOZ size in powerof 2 */ 3518 } ACPI_RHCT_CMO_NODE; 3519 3520 typedef struct acpi_rhct_mmu_node { 3521 UINT8 Reserved; /* Must be zero */ 3522 UINT8 MmuType; /* Virtual Address Scheme */ 3523 } ACPI_RHCT_MMU_NODE; 3524 3525 enum acpi_rhct_mmu_type { 3526 ACPI_RHCT_MMU_TYPE_SV39 = 0, 3527 ACPI_RHCT_MMU_TYPE_SV48 = 1, 3528 ACPI_RHCT_MMU_TYPE_SV57 = 2 3529 }; 3530 3531 /* Hart Info node structure */ 3532 typedef struct acpi_rhct_hart_info { 3533 UINT16 NumOffsets; 3534 UINT32 Uid; /* ACPI processor UID */ 3535 } ACPI_RHCT_HART_INFO; 3536 3537 /******************************************************************************* 3538 * 3539 * SBST - Smart Battery Specification Table 3540 * Version 1 3541 * 3542 ******************************************************************************/ 3543 3544 typedef struct acpi_table_sbst 3545 { 3546 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 3547 UINT32 WarningLevel; 3548 UINT32 LowLevel; 3549 UINT32 CriticalLevel; 3550 3551 } ACPI_TABLE_SBST; 3552 3553 3554 /******************************************************************************* 3555 * 3556 * SDEI - Software Delegated Exception Interface Descriptor Table 3557 * 3558 * Conforms to "Software Delegated Exception Interface (SDEI)" ARM DEN0054A, 3559 * May 8th, 2017. Copyright 2017 ARM Ltd. 3560 * 3561 ******************************************************************************/ 3562 3563 typedef struct acpi_table_sdei 3564 { 3565 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 3566 3567 } ACPI_TABLE_SDEI; 3568 3569 3570 /******************************************************************************* 3571 * 3572 * SDEV - Secure Devices Table (ACPI 6.2) 3573 * Version 1 3574 * 3575 ******************************************************************************/ 3576 3577 typedef struct acpi_table_sdev 3578 { 3579 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 3580 3581 } ACPI_TABLE_SDEV; 3582 3583 3584 typedef struct acpi_sdev_header 3585 { 3586 UINT8 Type; 3587 UINT8 Flags; 3588 UINT16 Length; 3589 3590 } ACPI_SDEV_HEADER; 3591 3592 3593 /* Values for subtable type above */ 3594 3595 enum AcpiSdevType 3596 { 3597 ACPI_SDEV_TYPE_NAMESPACE_DEVICE = 0, 3598 ACPI_SDEV_TYPE_PCIE_ENDPOINT_DEVICE = 1, 3599 ACPI_SDEV_TYPE_RESERVED = 2 /* 2 and greater are reserved */ 3600 }; 3601 3602 /* Values for flags above */ 3603 3604 #define ACPI_SDEV_HANDOFF_TO_UNSECURE_OS (1) 3605 #define ACPI_SDEV_SECURE_COMPONENTS_PRESENT (1<<1) 3606 3607 /* 3608 * SDEV subtables 3609 */ 3610 3611 /* 0: Namespace Device Based Secure Device Structure */ 3612 3613 typedef struct acpi_sdev_namespace 3614 { 3615 ACPI_SDEV_HEADER Header; 3616 UINT16 DeviceIdOffset; 3617 UINT16 DeviceIdLength; 3618 UINT16 VendorDataOffset; 3619 UINT16 VendorDataLength; 3620 3621 } ACPI_SDEV_NAMESPACE; 3622 3623 typedef struct acpi_sdev_secure_component 3624 { 3625 UINT16 SecureComponentOffset; 3626 UINT16 SecureComponentLength; 3627 3628 } ACPI_SDEV_SECURE_COMPONENT; 3629 3630 3631 /* 3632 * SDEV sub-subtables ("Components") for above 3633 */ 3634 typedef struct acpi_sdev_component 3635 { 3636 ACPI_SDEV_HEADER Header; 3637 3638 } ACPI_SDEV_COMPONENT; 3639 3640 3641 /* Values for sub-subtable type above */ 3642 3643 enum AcpiSacType 3644 { 3645 ACPI_SDEV_TYPE_ID_COMPONENT = 0, 3646 ACPI_SDEV_TYPE_MEM_COMPONENT = 1 3647 }; 3648 3649 typedef struct acpi_sdev_id_component 3650 { 3651 ACPI_SDEV_HEADER Header; 3652 UINT16 HardwareIdOffset; 3653 UINT16 HardwareIdLength; 3654 UINT16 SubsystemIdOffset; 3655 UINT16 SubsystemIdLength; 3656 UINT16 HardwareRevision; 3657 UINT8 HardwareRevPresent; 3658 UINT8 ClassCodePresent; 3659 UINT8 PciBaseClass; 3660 UINT8 PciSubClass; 3661 UINT8 PciProgrammingXface; 3662 3663 } ACPI_SDEV_ID_COMPONENT; 3664 3665 typedef struct acpi_sdev_mem_component 3666 { 3667 ACPI_SDEV_HEADER Header; 3668 UINT32 Reserved; 3669 UINT64 MemoryBaseAddress; 3670 UINT64 MemoryLength; 3671 3672 } ACPI_SDEV_MEM_COMPONENT; 3673 3674 3675 /* 1: PCIe Endpoint Device Based Device Structure */ 3676 3677 typedef struct acpi_sdev_pcie 3678 { 3679 ACPI_SDEV_HEADER Header; 3680 UINT16 Segment; 3681 UINT16 StartBus; 3682 UINT16 PathOffset; 3683 UINT16 PathLength; 3684 UINT16 VendorDataOffset; 3685 UINT16 VendorDataLength; 3686 3687 } ACPI_SDEV_PCIE; 3688 3689 /* 1a: PCIe Endpoint path entry */ 3690 3691 typedef struct acpi_sdev_pcie_path 3692 { 3693 UINT8 Device; 3694 UINT8 Function; 3695 3696 } ACPI_SDEV_PCIE_PATH; 3697 3698 3699 /******************************************************************************* 3700 * 3701 * SVKL - Storage Volume Key Location Table (ACPI 6.4) 3702 * From: "Guest-Host-Communication Interface (GHCI) for Intel 3703 * Trust Domain Extensions (Intel TDX)". 3704 * Version 1 3705 * 3706 ******************************************************************************/ 3707 3708 typedef struct acpi_table_svkl 3709 { 3710 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 3711 UINT32 Count; 3712 3713 } ACPI_TABLE_SVKL; 3714 3715 typedef struct acpi_svkl_key 3716 { 3717 UINT16 Type; 3718 UINT16 Format; 3719 UINT32 Size; 3720 UINT64 Address; 3721 3722 } ACPI_SVKL_KEY; 3723 3724 enum acpi_svkl_type 3725 { 3726 ACPI_SVKL_TYPE_MAIN_STORAGE = 0, 3727 ACPI_SVKL_TYPE_RESERVED = 1 /* 1 and greater are reserved */ 3728 }; 3729 3730 enum acpi_svkl_format 3731 { 3732 ACPI_SVKL_FORMAT_RAW_BINARY = 0, 3733 ACPI_SVKL_FORMAT_RESERVED = 1 /* 1 and greater are reserved */ 3734 }; 3735 3736 3737 /******************************************************************************* 3738 * 3739 * TDEL - TD-Event Log 3740 * From: "Guest-Host-Communication Interface (GHCI) for Intel 3741 * Trust Domain Extensions (Intel TDX)". 3742 * September 2020 3743 * 3744 ******************************************************************************/ 3745 3746 typedef struct acpi_table_tdel 3747 { 3748 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 3749 UINT32 Reserved; 3750 UINT64 LogAreaMinimumLength; 3751 UINT64 LogAreaStartAddress; 3752 3753 } ACPI_TABLE_TDEL; 3754 3755 /* Reset to default packing */ 3756 3757 #pragma pack() 3758 3759 #endif /* __ACTBL2_H__ */ 3760
Indexes created Tue Sep 30 17:09:57 GMT 2025