actbl2.h revision 1.1.1.27
1 /****************************************************************************** 2 * 3 * Name: actbl2.h - ACPI Table Definitions 4 * 5 *****************************************************************************/ 6 7 /****************************************************************************** 8 * 9 * 1. Copyright Notice 10 * 11 * Some or all of this work - Copyright (c) 1999 - 2025, Intel Corp. 12 * All rights reserved. 13 * 14 * 2. License 15 * 16 * 2.1. This is your license from Intel Corp. under its intellectual property 17 * rights. You may have additional license terms from the party that provided 18 * you this software, covering your right to use that party's intellectual 19 * property rights. 20 * 21 * 2.2. Intel grants, free of charge, to any person ("Licensee") obtaining a 22 * copy of the source code appearing in this file ("Covered Code") an 23 * irrevocable, perpetual, worldwide license under Intel's copyrights in the 24 * base code distributed originally by Intel ("Original Intel Code") to copy, 25 * make derivatives, distribute, use and display any portion of the Covered 26 * Code in any form, with the right to sublicense such rights; and 27 * 28 * 2.3. Intel grants Licensee a non-exclusive and non-transferable patent 29 * license (with the right to sublicense), under only those claims of Intel 30 * patents that are infringed by the Original Intel Code, to make, use, sell, 31 * offer to sell, and import the Covered Code and derivative works thereof 32 * solely to the minimum extent necessary to exercise the above copyright 33 * license, and in no event shall the patent license extend to any additions 34 * to or modifications of the Original Intel Code. No other license or right 35 * is granted directly or by implication, estoppel or otherwise; 36 * 37 * The above copyright and patent license is granted only if the following 38 * conditions are met: 39 * 40 * 3. Conditions 41 * 42 * 3.1. Redistribution of Source with Rights to Further Distribute Source. 43 * Redistribution of source code of any substantial portion of the Covered 44 * Code or modification with rights to further distribute source must include 45 * the above Copyright Notice, the above License, this list of Conditions, 46 * and the following Disclaimer and Export Compliance provision. In addition, 47 * Licensee must cause all Covered Code to which Licensee contributes to 48 * contain a file documenting the changes Licensee made to create that Covered 49 * Code and the date of any change. Licensee must include in that file the 50 * documentation of any changes made by any predecessor Licensee. Licensee 51 * must include a prominent statement that the modification is derived, 52 * directly or indirectly, from Original Intel Code. 53 * 54 * 3.2. Redistribution of Source with no Rights to Further Distribute Source. 55 * Redistribution of source code of any substantial portion of the Covered 56 * Code or modification without rights to further distribute source must 57 * include the following Disclaimer and Export Compliance provision in the 58 * documentation and/or other materials provided with distribution. In 59 * addition, Licensee may not authorize further sublicense of source of any 60 * portion of the Covered Code, and must include terms to the effect that the 61 * license from Licensee to its licensee is limited to the intellectual 62 * property embodied in the software Licensee provides to its licensee, and 63 * not to intellectual property embodied in modifications its licensee may 64 * make. 65 * 66 * 3.3. Redistribution of Executable. Redistribution in executable form of any 67 * substantial portion of the Covered Code or modification must reproduce the 68 * above Copyright Notice, and the following Disclaimer and Export Compliance 69 * provision in the documentation and/or other materials provided with the 70 * distribution. 71 * 72 * 3.4. Intel retains all right, title, and interest in and to the Original 73 * Intel Code. 74 * 75 * 3.5. Neither the name Intel nor any other trademark owned or controlled by 76 * Intel shall be used in advertising or otherwise to promote the sale, use or 77 * other dealings in products derived from or relating to the Covered Code 78 * without prior written authorization from Intel. 79 * 80 * 4. Disclaimer and Export Compliance 81 * 82 * 4.1. INTEL MAKES NO WARRANTY OF ANY KIND REGARDING ANY SOFTWARE PROVIDED 83 * HERE. ANY SOFTWARE ORIGINATING FROM INTEL OR DERIVED FROM INTEL SOFTWARE 84 * IS PROVIDED "AS IS," AND INTEL WILL NOT PROVIDE ANY SUPPORT, ASSISTANCE, 85 * INSTALLATION, TRAINING OR OTHER SERVICES. INTEL WILL NOT PROVIDE ANY 86 * UPDATES, ENHANCEMENTS OR EXTENSIONS. INTEL SPECIFICALLY DISCLAIMS ANY 87 * IMPLIED WARRANTIES OF MERCHANTABILITY, NONINFRINGEMENT AND FITNESS FOR A 88 * PARTICULAR PURPOSE. 89 * 90 * 4.2. IN NO EVENT SHALL INTEL HAVE ANY LIABILITY TO LICENSEE, ITS LICENSEES 91 * OR ANY OTHER THIRD PARTY, FOR ANY LOST PROFITS, LOST DATA, LOSS OF USE OR 92 * COSTS OF PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES, OR FOR ANY INDIRECT, 93 * SPECIAL OR CONSEQUENTIAL DAMAGES ARISING OUT OF THIS AGREEMENT, UNDER ANY 94 * CAUSE OF ACTION OR THEORY OF LIABILITY, AND IRRESPECTIVE OF WHETHER INTEL 95 * HAS ADVANCE NOTICE OF THE POSSIBILITY OF SUCH DAMAGES. THESE LIMITATIONS 96 * SHALL APPLY NOTWITHSTANDING THE FAILURE OF THE ESSENTIAL PURPOSE OF ANY 97 * LIMITED REMEDY. 98 * 99 * 4.3. Licensee shall not export, either directly or indirectly, any of this 100 * software or system incorporating such software without first obtaining any 101 * required license or other approval from the U. S. Department of Commerce or 102 * any other agency or department of the United States Government. In the 103 * event Licensee exports any such software from the United States or 104 * re-exports any such software from a foreign destination, Licensee shall 105 * ensure that the distribution and export/re-export of the software is in 106 * compliance with all laws, regulations, orders, or other restrictions of the 107 * U.S. Export Administration Regulations. Licensee agrees that neither it nor 108 * any of its subsidiaries will export/re-export any technical data, process, 109 * software, or service, directly or indirectly, to any country for which the 110 * United States government or any agency thereof requires an export license, 111 * other governmental approval, or letter of assurance, without first obtaining 112 * such license, approval or letter. 113 * 114 ***************************************************************************** 115 * 116 * Alternatively, you may choose to be licensed under the terms of the 117 * following license: 118 * 119 * Redistribution and use in source and binary forms, with or without 120 * modification, are permitted provided that the following conditions 121 * are met: 122 * 1. Redistributions of source code must retain the above copyright 123 * notice, this list of conditions, and the following disclaimer, 124 * without modification. 125 * 2. Redistributions in binary form must reproduce at minimum a disclaimer 126 * substantially similar to the "NO WARRANTY" disclaimer below 127 * ("Disclaimer") and any redistribution must be conditioned upon 128 * including a substantially similar Disclaimer requirement for further 129 * binary redistribution. 130 * 3. Neither the names of the above-listed copyright holders nor the names 131 * of any contributors may be used to endorse or promote products derived 132 * from this software without specific prior written permission. 133 * 134 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 135 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 136 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 137 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 138 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 139 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 140 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 141 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 142 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 143 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 144 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 145 * 146 * Alternatively, you may choose to be licensed under the terms of the 147 * GNU General Public License ("GPL") version 2 as published by the Free 148 * Software Foundation. 149 * 150 *****************************************************************************/ 151 152 #ifndef __ACTBL2_H__ 153 #define __ACTBL2_H__ 154 155 156 /******************************************************************************* 157 * 158 * Additional ACPI Tables (2) 159 * 160 * These tables are not consumed directly by the ACPICA subsystem, but are 161 * included here to support device drivers and the AML disassembler. 162 * 163 ******************************************************************************/ 164 165 166 /* 167 * Values for description table header signatures for tables defined in this 168 * file. Useful because they make it more difficult to inadvertently type in 169 * the wrong signature. 170 */ 171 #define ACPI_SIG_AGDI "AGDI" /* Arm Generic Diagnostic Dump and Reset Device Interface */ 172 #define ACPI_SIG_APMT "APMT" /* Arm Performance Monitoring Unit table */ 173 #define ACPI_SIG_BDAT "BDAT" /* BIOS Data ACPI Table */ 174 #define ACPI_SIG_CCEL "CCEL" /* CC Event Log Table */ 175 #define ACPI_SIG_CDAT "CDAT" /* Coherent Device Attribute Table */ 176 #define ACPI_SIG_ERDT "ERDT" /* Enhanced Resource Director Technology */ 177 #define ACPI_SIG_IORT "IORT" /* IO Remapping Table */ 178 #define ACPI_SIG_IVRS "IVRS" /* I/O Virtualization Reporting Structure */ 179 #define ACPI_SIG_LPIT "LPIT" /* Low Power Idle Table */ 180 #define ACPI_SIG_MADT "APIC" /* Multiple APIC Description Table */ 181 #define ACPI_SIG_MCFG "MCFG" /* PCI Memory Mapped Configuration table */ 182 #define ACPI_SIG_MCHI "MCHI" /* Management Controller Host Interface table */ 183 #define ACPI_SIG_MPAM "MPAM" /* Memory System Resource Partitioning and Monitoring Table */ 184 #define ACPI_SIG_MPST "MPST" /* Memory Power State Table */ 185 #define ACPI_SIG_MRRM "MRRM" /* Memory Range and Region Mapping table */ 186 #define ACPI_SIG_MSDM "MSDM" /* Microsoft Data Management Table */ 187 #define ACPI_SIG_NFIT "NFIT" /* NVDIMM Firmware Interface Table */ 188 #define ACPI_SIG_NHLT "NHLT" /* Non HD Audio Link Table */ 189 #define ACPI_SIG_PCCT "PCCT" /* Platform Communications Channel Table */ 190 #define ACPI_SIG_PDTT "PDTT" /* Platform Debug Trigger Table */ 191 #define ACPI_SIG_PHAT "PHAT" /* Platform Health Assessment Table */ 192 #define ACPI_SIG_PMTT "PMTT" /* Platform Memory Topology Table */ 193 #define ACPI_SIG_PPTT "PPTT" /* Processor Properties Topology Table */ 194 #define ACPI_SIG_PRMT "PRMT" /* Platform Runtime Mechanism Table */ 195 #define ACPI_SIG_RASF "RASF" /* RAS Feature table */ 196 #define ACPI_SIG_RAS2 "RAS2" /* RAS2 Feature table */ 197 #define ACPI_SIG_RGRT "RGRT" /* Regulatory Graphics Resource Table */ 198 #define ACPI_SIG_RHCT "RHCT" /* RISC-V Hart Capabilities Table */ 199 #define ACPI_SIG_RIMT "RIMT" /* RISC-V IO Mapping Table */ 200 #define ACPI_SIG_SBST "SBST" /* Smart Battery Specification Table */ 201 #define ACPI_SIG_SDEI "SDEI" /* Software Delegated Exception Interface Table */ 202 #define ACPI_SIG_SDEV "SDEV" /* Secure Devices table */ 203 #define ACPI_SIG_SVKL "SVKL" /* Storage Volume Key Location Table */ 204 #define ACPI_SIG_SWFT "SWFT" /* SoundWire File Table */ 205 #define ACPI_SIG_TDEL "TDEL" /* TD Event Log Table */ 206 207 208 /* 209 * All tables must be byte-packed to match the ACPI specification, since 210 * the tables are provided by the system BIOS. 211 */ 212 #pragma pack(1) 213 214 /* 215 * Note: C bitfields are not used for this reason: 216 * 217 * "Bitfields are great and easy to read, but unfortunately the C language 218 * does not specify the layout of bitfields in memory, which means they are 219 * essentially useless for dealing with packed data in on-disk formats or 220 * binary wire protocols." (Or ACPI tables and buffers.) "If you ask me, 221 * this decision was a design error in C. Ritchie could have picked an order 222 * and stuck with it." Norman Ramsey. 223 * See http://stackoverflow.com/a/1053662/41661 224 */ 225 226 227 /******************************************************************************* 228 * 229 * AEST - Arm Error Source Table 230 * 231 * Conforms to: ACPI for the Armv8 RAS Extensions 1.1 Platform Design Document 232 * September 2020. 233 * 234 ******************************************************************************/ 235 236 typedef struct acpi_table_aest 237 { 238 ACPI_TABLE_HEADER Header; 239 240 } ACPI_TABLE_AEST; 241 242 /* Common Subtable header - one per Node Structure (Subtable) */ 243 244 typedef struct acpi_aest_hdr 245 { 246 UINT8 Type; 247 UINT16 Length; 248 UINT8 Reserved; 249 UINT32 NodeSpecificOffset; 250 UINT32 NodeInterfaceOffset; 251 UINT32 NodeInterruptOffset; 252 UINT32 NodeInterruptCount; 253 UINT64 TimestampRate; 254 UINT64 Reserved1; 255 UINT64 ErrorInjectionRate; 256 257 } ACPI_AEST_HEADER; 258 259 /* Values for Type above */ 260 261 #define ACPI_AEST_PROCESSOR_ERROR_NODE 0 262 #define ACPI_AEST_MEMORY_ERROR_NODE 1 263 #define ACPI_AEST_SMMU_ERROR_NODE 2 264 #define ACPI_AEST_VENDOR_ERROR_NODE 3 265 #define ACPI_AEST_GIC_ERROR_NODE 4 266 #define ACPI_AEST_PCIE_ERROR_NODE 5 267 #define ACPI_AEST_PROXY_ERROR_NODE 6 268 #define ACPI_AEST_NODE_TYPE_RESERVED 7 /* 7 and above are reserved */ 269 270 271 /* 272 * AEST subtables (Error nodes) 273 */ 274 275 /* 0: Processor Error */ 276 277 typedef struct acpi_aest_processor 278 { 279 UINT32 ProcessorId; 280 UINT8 ResourceType; 281 UINT8 Reserved; 282 UINT8 Flags; 283 UINT8 Revision; 284 UINT64 ProcessorAffinity; 285 286 } ACPI_AEST_PROCESSOR; 287 288 /* Values for ResourceType above, related structs below */ 289 290 #define ACPI_AEST_CACHE_RESOURCE 0 291 #define ACPI_AEST_TLB_RESOURCE 1 292 #define ACPI_AEST_GENERIC_RESOURCE 2 293 #define ACPI_AEST_RESOURCE_RESERVED 3 /* 3 and above are reserved */ 294 295 /* 0R: Processor Cache Resource Substructure */ 296 297 typedef struct acpi_aest_processor_cache 298 { 299 UINT32 CacheReference; 300 UINT32 Reserved; 301 302 } ACPI_AEST_PROCESSOR_CACHE; 303 304 /* Values for CacheType above */ 305 306 #define ACPI_AEST_CACHE_DATA 0 307 #define ACPI_AEST_CACHE_INSTRUCTION 1 308 #define ACPI_AEST_CACHE_UNIFIED 2 309 #define ACPI_AEST_CACHE_RESERVED 3 /* 3 and above are reserved */ 310 311 /* 1R: Processor TLB Resource Substructure */ 312 313 typedef struct acpi_aest_processor_tlb 314 { 315 UINT32 TlbLevel; 316 UINT32 Reserved; 317 318 } ACPI_AEST_PROCESSOR_TLB; 319 320 /* 2R: Processor Generic Resource Substructure */ 321 322 typedef struct acpi_aest_processor_generic 323 { 324 UINT32 Resource; 325 326 } ACPI_AEST_PROCESSOR_GENERIC; 327 328 /* 1: Memory Error */ 329 330 typedef struct acpi_aest_memory 331 { 332 UINT32 SratProximityDomain; 333 334 } ACPI_AEST_MEMORY; 335 336 /* 2: Smmu Error */ 337 338 typedef struct acpi_aest_smmu 339 { 340 UINT32 IortNodeReference; 341 UINT32 SubcomponentReference; 342 343 } ACPI_AEST_SMMU; 344 345 /* 3: Vendor Defined */ 346 347 typedef struct acpi_aest_vendor 348 { 349 UINT32 AcpiHid; 350 UINT32 AcpiUid; 351 UINT8 VendorSpecificData[16]; 352 353 } ACPI_AEST_VENDOR; 354 355 /* 3: Vendor Defined V2 */ 356 357 typedef struct acpi_aest_vendor_v2 358 { 359 UINT64 AcpiHid; 360 UINT32 AcpiUid; 361 UINT8 VendorSpecificData[16]; 362 363 } ACPI_AEST_VENDOR_V2; 364 365 /* 4: Gic Error */ 366 367 typedef struct acpi_aest_gic 368 { 369 UINT32 InterfaceType; 370 UINT32 InstanceId; 371 372 } ACPI_AEST_GIC; 373 374 /* Values for InterfaceType above */ 375 376 #define ACPI_AEST_GIC_CPU 0 377 #define ACPI_AEST_GIC_DISTRIBUTOR 1 378 #define ACPI_AEST_GIC_REDISTRIBUTOR 2 379 #define ACPI_AEST_GIC_ITS 3 380 #define ACPI_AEST_GIC_RESERVED 4 /* 4 and above are reserved */ 381 382 /* 5: PCIe Error */ 383 384 typedef struct acpi_aest_pcie 385 { 386 UINT32 IortNodeReference; 387 388 } ACPI_AEST_PCIE; 389 390 391 /* 6: Proxy Error */ 392 393 typedef struct acpi_aest_proxy 394 { 395 UINT64 NodeAddress; 396 397 } ACPI_AEST_PROXY; 398 399 /* Node Interface Structure */ 400 401 typedef struct acpi_aest_node_interface 402 { 403 UINT8 Type; 404 UINT8 Reserved[3]; 405 UINT32 Flags; 406 UINT64 Address; 407 UINT32 ErrorRecordIndex; 408 UINT32 ErrorRecordCount; 409 UINT64 ErrorRecordImplemented; 410 UINT64 ErrorStatusReporting; 411 UINT64 AddressingMode; 412 413 } ACPI_AEST_NODE_INTERFACE; 414 415 /* Node Interface Structure V2*/ 416 417 typedef struct acpi_aest_node_interface_header 418 { 419 UINT8 Type; 420 UINT8 GroupFormat; 421 UINT8 Reserved[2]; 422 UINT32 Flags; 423 UINT64 Address; 424 UINT32 ErrorRecordIndex; 425 UINT32 ErrorRecordCount; 426 427 } ACPI_AEST_NODE_INTERFACE_HEADER; 428 429 #define ACPI_AEST_NODE_GROUP_FORMAT_4K 0 430 #define ACPI_AEST_NODE_GROUP_FORMAT_16K 1 431 #define ACPI_AEST_NODE_GROUP_FORMAT_64K 2 432 433 typedef struct acpi_aest_node_interface_common 434 { 435 UINT32 ErrorNodeDevice; 436 UINT32 ProcessorAffinity; 437 UINT64 ErrorGroupRegisterBase; 438 UINT64 FaultInjectRegisterBase; 439 UINT64 InterruptConfigRegisterBase; 440 441 } ACPI_AEST_NODE_INTERFACE_COMMON; 442 443 typedef struct acpi_aest_node_interface_4k 444 { 445 UINT64 ErrorRecordImplemented; 446 UINT64 ErrorStatusReporting; 447 UINT64 AddressingMode; 448 ACPI_AEST_NODE_INTERFACE_COMMON Common; 449 450 } ACPI_AEST_NODE_INTERFACE_4K; 451 452 typedef struct acpi_aest_node_interface_16k 453 { 454 UINT64 ErrorRecordImplemented[4]; 455 UINT64 ErrorStatusReporting[4]; 456 UINT64 AddressingMode[4]; 457 ACPI_AEST_NODE_INTERFACE_COMMON Common; 458 459 } ACPI_AEST_NODE_INTERFACE_16K; 460 461 typedef struct acpi_aest_node_interface_64k 462 { 463 INT64 ErrorRecordImplemented[14]; 464 UINT64 ErrorStatusReporting[14]; 465 UINT64 AddressingMode[14]; 466 ACPI_AEST_NODE_INTERFACE_COMMON Common; 467 468 } ACPI_AEST_NODE_INTERFACE_64K; 469 470 /* Values for Type field above */ 471 472 #define ACPI_AEST_NODE_SYSTEM_REGISTER 0 473 #define ACPI_AEST_NODE_MEMORY_MAPPED 1 474 #define ACPI_AEST_NODE_SINGLE_RECORD_MEMORY_MAPPED 2 475 #define ACPI_AEST_XFACE_RESERVED 3 /* 2 and above are reserved */ 476 477 /* Node Interrupt Structure */ 478 479 typedef struct acpi_aest_node_interrupt 480 { 481 UINT8 Type; 482 UINT8 Reserved[2]; 483 UINT8 Flags; 484 UINT32 Gsiv; 485 UINT8 IortId; 486 UINT8 Reserved1[3]; 487 488 } ACPI_AEST_NODE_INTERRUPT; 489 490 /* Node Interrupt Structure V2 */ 491 492 typedef struct acpi_aest_node_interrupt_v2 493 { 494 UINT8 Type; 495 UINT8 Reserved[2]; 496 UINT8 Flags; 497 UINT32 Gsiv; 498 UINT8 Reserved1[4]; 499 500 } ACPI_AEST_NODE_INTERRUPT_V2; 501 502 /* Values for Type field above */ 503 504 #define ACPI_AEST_NODE_FAULT_HANDLING 0 505 #define ACPI_AEST_NODE_ERROR_RECOVERY 1 506 #define ACPI_AEST_XRUPT_RESERVED 2 /* 2 and above are reserved */ 507 508 509 /******************************************************************************* 510 * AGDI - Arm Generic Diagnostic Dump and Reset Device Interface 511 * 512 * Conforms to "ACPI for Arm Components 1.1, Platform Design Document" 513 * ARM DEN0093 v1.1 514 * 515 ******************************************************************************/ 516 typedef struct acpi_table_agdi 517 { 518 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 519 UINT8 Flags; 520 UINT8 Reserved[3]; 521 UINT32 SdeiEvent; 522 UINT32 Gsiv; 523 524 } ACPI_TABLE_AGDI; 525 526 /* Mask for Flags field above */ 527 528 #define ACPI_AGDI_SIGNALING_MODE (1) 529 530 531 /******************************************************************************* 532 * 533 * APMT - ARM Performance Monitoring Unit Table 534 * 535 * Conforms to: 536 * ARM Performance Monitoring Unit Architecture 1.0 Platform Design Document 537 * ARM DEN0117 v1.0 November 25, 2021 538 * 539 ******************************************************************************/ 540 541 typedef struct acpi_table_apmt { 542 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 543 } ACPI_TABLE_APMT; 544 545 #define ACPI_APMT_NODE_ID_LENGTH 4 546 547 /* 548 * APMT subtables 549 */ 550 typedef struct acpi_apmt_node { 551 UINT16 Length; 552 UINT8 Flags; 553 UINT8 Type; 554 UINT32 Id; 555 UINT64 InstPrimary; 556 UINT32 InstSecondary; 557 UINT64 BaseAddress0; 558 UINT64 BaseAddress1; 559 UINT32 OvflwIrq; 560 UINT32 Reserved; 561 UINT32 OvflwIrqFlags; 562 UINT32 ProcAffinity; 563 UINT32 ImplId; 564 } ACPI_APMT_NODE; 565 566 /* Masks for Flags field above */ 567 568 #define ACPI_APMT_FLAGS_DUAL_PAGE (1<<0) 569 #define ACPI_APMT_FLAGS_AFFINITY (1<<1) 570 #define ACPI_APMT_FLAGS_ATOMIC (1<<2) 571 572 /* Values for Flags dual page field above */ 573 574 #define ACPI_APMT_FLAGS_DUAL_PAGE_NSUPP (0<<0) 575 #define ACPI_APMT_FLAGS_DUAL_PAGE_SUPP (1<<0) 576 577 /* Values for Flags processor affinity field above */ 578 #define ACPI_APMT_FLAGS_AFFINITY_PROC (0<<1) 579 #define ACPI_APMT_FLAGS_AFFINITY_PROC_CONTAINER (1<<1) 580 581 /* Values for Flags 64-bit atomic field above */ 582 #define ACPI_APMT_FLAGS_ATOMIC_NSUPP (0<<2) 583 #define ACPI_APMT_FLAGS_ATOMIC_SUPP (1<<2) 584 585 /* Values for Type field above */ 586 587 enum acpi_apmt_node_type { 588 ACPI_APMT_NODE_TYPE_MC = 0x00, 589 ACPI_APMT_NODE_TYPE_SMMU = 0x01, 590 ACPI_APMT_NODE_TYPE_PCIE_ROOT = 0x02, 591 ACPI_APMT_NODE_TYPE_ACPI = 0x03, 592 ACPI_APMT_NODE_TYPE_CACHE = 0x04, 593 ACPI_APMT_NODE_TYPE_COUNT 594 }; 595 596 /* Masks for ovflw_irq_flags field above */ 597 598 #define ACPI_APMT_OVFLW_IRQ_FLAGS_MODE (1<<0) 599 #define ACPI_APMT_OVFLW_IRQ_FLAGS_TYPE (1<<1) 600 601 /* Values for ovflw_irq_flags mode field above */ 602 603 #define ACPI_APMT_OVFLW_IRQ_FLAGS_MODE_LEVEL (0<<0) 604 #define ACPI_APMT_OVFLW_IRQ_FLAGS_MODE_EDGE (1<<0) 605 606 /* Values for ovflw_irq_flags type field above */ 607 608 #define ACPI_APMT_OVFLW_IRQ_FLAGS_TYPE_WIRED (0<<1) 609 610 611 /******************************************************************************* 612 * 613 * BDAT - BIOS Data ACPI Table 614 * 615 * Conforms to "BIOS Data ACPI Table", Interface Specification v4.0 Draft 5 616 * Nov 2020 617 * 618 ******************************************************************************/ 619 620 typedef struct acpi_table_bdat 621 { 622 ACPI_TABLE_HEADER Header; 623 ACPI_GENERIC_ADDRESS Gas; 624 625 } ACPI_TABLE_BDAT; 626 627 /******************************************************************************* 628 * 629 * CCEL - CC-Event Log 630 * From: "Guest-Host-Communication Interface (GHCI) for Intel 631 * Trust Domain Extensions (Intel TDX)". Feb 2022 632 * 633 ******************************************************************************/ 634 635 typedef struct acpi_table_ccel 636 { 637 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 638 UINT8 CCType; 639 UINT8 CCSubType; 640 UINT16 Reserved; 641 UINT64 LogAreaMinimumLength; 642 UINT64 LogAreaStartAddress; 643 644 } ACPI_TABLE_CCEL; 645 646 /******************************************************************************* 647 * 648 * ERDT - Enhanced Resource Director Technology (ERDT) table 649 * 650 * Conforms to "Intel Resource Director Technology Architecture Specification" 651 * Version 1.1, January 2025 652 * 653 ******************************************************************************/ 654 655 typedef struct acpi_table_erdt 656 { 657 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 658 UINT32 MaxClos; /* Maximum classes of service */ 659 UINT8 Reserved[24]; 660 UINT8 Erdt_Substructures[]; 661 662 } ACPI_TABLE_ERDT; 663 664 665 /* Values for subtable type in ACPI_SUBTBL_HDR_16 */ 666 667 enum AcpiErdtType 668 { 669 ACPI_ERDT_TYPE_RMDD = 0, 670 ACPI_ERDT_TYPE_CACD = 1, 671 ACPI_ERDT_TYPE_DACD = 2, 672 ACPI_ERDT_TYPE_CMRC = 3, 673 ACPI_ERDT_TYPE_MMRC = 4, 674 ACPI_ERDT_TYPE_MARC = 5, 675 ACPI_ERDT_TYPE_CARC = 6, 676 ACPI_ERDT_TYPE_CMRD = 7, 677 ACPI_ERDT_TYPE_IBRD = 8, 678 ACPI_ERDT_TYPE_IBAD = 9, 679 ACPI_ERDT_TYPE_CARD = 10, 680 ACPI_ERDT_TYPE_RESERVED = 11 /* 11 and above are reserved */ 681 682 }; 683 684 /* 685 * ERDT Subtables, correspond to Type in ACPI_SUBTBL_HDR_16 686 */ 687 688 /* 0: RMDD - Resource Management Domain Description */ 689 690 typedef struct acpi_erdt_rmdd 691 { 692 ACPI_SUBTBL_HDR_16 Header; 693 UINT16 Flags; 694 UINT16 IO_l3_Slices; /* Number of slices in IO cache */ 695 UINT8 IO_l3_Sets; /* Number of sets in IO cache */ 696 UINT8 IO_l3_Ways; /* Number of ways in IO cache */ 697 UINT64 Reserved; 698 UINT16 DomainId; /* Unique domain ID */ 699 UINT32 MaxRmid; /* Maximun RMID supported */ 700 UINT64 CregBase; /* Control Register Base Address */ 701 UINT16 CregSize; /* Control Register Size (4K pages) */ 702 UINT8 RmddStructs[]; 703 704 } ACPI_ERDT_RMDD; 705 706 707 /* 1: CACD - CPU Agent Collection Description */ 708 709 typedef struct acpi_erdt_cacd 710 { 711 ACPI_SUBTBL_HDR_16 Header; 712 UINT16 Reserved; 713 UINT16 DomainId; /* Unique domain ID */ 714 UINT32 X2APICIDS[]; 715 716 } ACPI_ERDT_CACD; 717 718 719 /* 2: DACD - Device Agent Collection Description */ 720 721 typedef struct acpi_erdt_dacd 722 { 723 ACPI_SUBTBL_HDR_16 Header; 724 UINT16 Reserved; 725 UINT16 DomainId; /* Unique domain ID */ 726 UINT8 DevPaths[]; 727 728 } ACPI_ERDT_DACD; 729 730 typedef struct acpi_erdt_dacd_dev_paths 731 { 732 ACPI_SUBTABLE_HEADER Header; 733 UINT16 Segment; 734 UINT8 Reserved; 735 UINT8 StartBus; 736 UINT8 Path[]; 737 738 } ACPI_ERDT_DACD_PATHS; 739 740 741 /* 3: CMRC - Cache Monitoring Registers for CPU Agents */ 742 743 typedef struct acpi_erdt_cmrc 744 { 745 ACPI_SUBTBL_HDR_16 Header; 746 UINT32 Reserved1; 747 UINT32 Flags; 748 UINT8 IndexFn; 749 UINT8 Reserved2[11]; 750 UINT64 CmtRegBase; 751 UINT32 CmtRegSize; 752 UINT16 ClumpSize; 753 UINT16 ClumpStride; 754 UINT64 UpScale; 755 756 } ACPI_ERDT_CMRC; 757 758 759 /* 4: MMRC - Memory-bandwidth Monitoring Registers for CPU Agents */ 760 761 typedef struct acpi_erdt_mmrc 762 { 763 ACPI_SUBTBL_HDR_16 Header; 764 UINT32 Reserved1; 765 UINT32 Flags; 766 UINT8 IndexFn; 767 UINT8 Reserved2[11]; 768 UINT64 RegBase; 769 UINT32 RegSize; 770 UINT8 CounterWidth; 771 UINT64 UpScale; 772 UINT8 Reserved3[7]; 773 UINT32 CorrFactorListLen; 774 UINT32 CorrFactorList[]; 775 776 } ACPI_ERDT_MMRC; 777 778 779 /* 5: MARC - Memory-bandwidth Allocation Registers for CPU Agents */ 780 781 typedef struct acpi_erdt_marc 782 { 783 ACPI_SUBTBL_HDR_16 Header; 784 UINT16 Reserved1; 785 UINT16 Flags; 786 UINT8 IndexFn; 787 UINT8 Reserved2[7]; 788 UINT64 RegBaseOpt; 789 UINT64 RegBaseMin; 790 UINT64 RegBaseMax; 791 UINT32 MbaRegSize; 792 UINT32 MbaCtrlRange; 793 794 } ACPI_ERDT_MARC; 795 796 797 /* 6: CARC - Cache Allocation Registers for CPU Agents */ 798 799 typedef struct acpi_erdt_carc 800 { 801 ACPI_SUBTBL_HDR_16 Header; 802 803 } ACPI_ERDT_CARC; 804 805 806 /* 7: CMRD - Cache Monitoring Registers for Device Agents */ 807 808 typedef struct acpi_erdt_cmrd 809 { 810 ACPI_SUBTBL_HDR_16 Header; 811 UINT32 Reserved1; 812 UINT32 Flags; 813 UINT8 IndexFn; 814 UINT8 Reserved2[11]; 815 UINT64 RegBase; 816 UINT32 RegSize; 817 UINT16 CmtRegOff; 818 UINT16 CmtClumpSize; 819 UINT64 UpScale; 820 821 } ACPI_ERDT_CMRD; 822 823 824 /* 8: IBRD - Cache Monitoring Registers for Device Agents */ 825 826 typedef struct acpi_erdt_ibrd 827 { 828 ACPI_SUBTBL_HDR_16 Header; 829 UINT32 Reserved1; 830 UINT32 Flags; 831 UINT8 IndexFn; 832 UINT8 Reserved2[11]; 833 UINT64 RegBase; 834 UINT32 RegSize; 835 UINT16 TotalBwOffset; 836 UINT16 IOMissBwOffset; 837 UINT16 TotalBwClump; 838 UINT16 IOMissBwClump; 839 UINT8 Reserved3[7]; 840 UINT8 CounterWidth; 841 UINT64 UpScale; 842 UINT32 CorrFactorListLen; 843 UINT32 CorrFactorList[]; 844 845 } ACPI_ERDT_IBRD; 846 847 848 /* 9: IBAD - IO bandwidth Allocation Registers for device agents */ 849 850 typedef struct acpi_erdt_ibad 851 { 852 ACPI_SUBTBL_HDR_16 Header; 853 854 } ACPI_ERDT_IBAD; 855 856 857 /* 10: CARD - IO bandwidth Allocation Registers for Device Agents */ 858 859 typedef struct acpi_erdt_card 860 { 861 ACPI_SUBTBL_HDR_16 Header; 862 UINT32 Reserved1; 863 UINT32 Flags; 864 UINT32 ContentionMask; 865 UINT8 IndexFn; 866 UINT8 Reserved2[7]; 867 UINT64 RegBase; 868 UINT32 RegSize; 869 UINT16 CatRegOffset; 870 UINT16 CatRegBlockSize; 871 872 } ACPI_ERDT_CARD; 873 874 875 /******************************************************************************* 876 * 877 * IORT - IO Remapping Table 878 * 879 * Conforms to "IO Remapping Table System Software on ARM Platforms", 880 * Document number: ARM DEN 0049E.f, Apr 2024 881 * 882 ******************************************************************************/ 883 884 typedef struct acpi_table_iort 885 { 886 ACPI_TABLE_HEADER Header; 887 UINT32 NodeCount; 888 UINT32 NodeOffset; 889 UINT32 Reserved; 890 891 } ACPI_TABLE_IORT; 892 893 894 /* 895 * IORT subtables 896 */ 897 typedef struct acpi_iort_node 898 { 899 UINT8 Type; 900 UINT16 Length; 901 UINT8 Revision; 902 UINT32 Identifier; 903 UINT32 MappingCount; 904 UINT32 MappingOffset; 905 char NodeData[]; 906 907 } ACPI_IORT_NODE; 908 909 /* Values for subtable Type above */ 910 911 enum AcpiIortNodeType 912 { 913 ACPI_IORT_NODE_ITS_GROUP = 0x00, 914 ACPI_IORT_NODE_NAMED_COMPONENT = 0x01, 915 ACPI_IORT_NODE_PCI_ROOT_COMPLEX = 0x02, 916 ACPI_IORT_NODE_SMMU = 0x03, 917 ACPI_IORT_NODE_SMMU_V3 = 0x04, 918 ACPI_IORT_NODE_PMCG = 0x05, 919 ACPI_IORT_NODE_RMR = 0x06, 920 }; 921 922 923 typedef struct acpi_iort_id_mapping 924 { 925 UINT32 InputBase; /* Lowest value in input range */ 926 UINT32 IdCount; /* Number of IDs */ 927 UINT32 OutputBase; /* Lowest value in output range */ 928 UINT32 OutputReference; /* A reference to the output node */ 929 UINT32 Flags; 930 931 } ACPI_IORT_ID_MAPPING; 932 933 /* Masks for Flags field above for IORT subtable */ 934 935 #define ACPI_IORT_ID_SINGLE_MAPPING (1) 936 937 938 typedef struct acpi_iort_memory_access 939 { 940 UINT32 CacheCoherency; 941 UINT8 Hints; 942 UINT16 Reserved; 943 UINT8 MemoryFlags; 944 945 } ACPI_IORT_MEMORY_ACCESS; 946 947 /* Values for CacheCoherency field above */ 948 949 #define ACPI_IORT_NODE_COHERENT 0x00000001 /* The device node is fully coherent */ 950 #define ACPI_IORT_NODE_NOT_COHERENT 0x00000000 /* The device node is not coherent */ 951 952 /* Masks for Hints field above */ 953 954 #define ACPI_IORT_HT_TRANSIENT (1) 955 #define ACPI_IORT_HT_WRITE (1<<1) 956 #define ACPI_IORT_HT_READ (1<<2) 957 #define ACPI_IORT_HT_OVERRIDE (1<<3) 958 959 /* Masks for MemoryFlags field above */ 960 961 #define ACPI_IORT_MF_COHERENCY (1) 962 #define ACPI_IORT_MF_ATTRIBUTES (1<<1) 963 #define ACPI_IORT_MF_CANWBS (1<<2) 964 965 966 /* 967 * IORT node specific subtables 968 */ 969 typedef struct acpi_iort_its_group 970 { 971 UINT32 ItsCount; 972 UINT32 Identifiers[]; /* GIC ITS identifier array */ 973 974 } ACPI_IORT_ITS_GROUP; 975 976 977 typedef struct acpi_iort_named_component 978 { 979 UINT32 NodeFlags; 980 UINT64 MemoryProperties; /* Memory access properties */ 981 UINT8 MemoryAddressLimit; /* Memory address size limit */ 982 char DeviceName[]; /* Path of namespace object */ 983 984 } ACPI_IORT_NAMED_COMPONENT; 985 986 /* Masks for Flags field above */ 987 988 #define ACPI_IORT_NC_STALL_SUPPORTED (1) 989 #define ACPI_IORT_NC_PASID_BITS (31<<1) 990 991 typedef struct acpi_iort_root_complex 992 { 993 UINT64 MemoryProperties; /* Memory access properties */ 994 UINT32 AtsAttribute; 995 UINT32 PciSegmentNumber; 996 UINT8 MemoryAddressLimit; /* Memory address size limit */ 997 UINT16 PasidCapabilities; /* PASID Capabilities */ 998 UINT8 Reserved[]; /* Reserved, must be zero */ 999 1000 } ACPI_IORT_ROOT_COMPLEX; 1001 1002 /* Masks for AtsAttribute field above */ 1003 1004 #define ACPI_IORT_ATS_SUPPORTED (1) /* The root complex ATS support */ 1005 #define ACPI_IORT_PRI_SUPPORTED (1<<1) /* The root complex PRI support */ 1006 #define ACPI_IORT_PASID_FWD_SUPPORTED (1<<2) /* The root complex PASID forward support */ 1007 1008 /* Masks for PasidCapabilities field above */ 1009 #define ACPI_IORT_PASID_MAX_WIDTH (0x1F) /* Bits 0-4 */ 1010 1011 typedef struct acpi_iort_smmu 1012 { 1013 UINT64 BaseAddress; /* SMMU base address */ 1014 UINT64 Span; /* Length of memory range */ 1015 UINT32 Model; 1016 UINT32 Flags; 1017 UINT32 GlobalInterruptOffset; 1018 UINT32 ContextInterruptCount; 1019 UINT32 ContextInterruptOffset; 1020 UINT32 PmuInterruptCount; 1021 UINT32 PmuInterruptOffset; 1022 UINT64 Interrupts[]; /* Interrupt array */ 1023 1024 } ACPI_IORT_SMMU; 1025 1026 /* Values for Model field above */ 1027 1028 #define ACPI_IORT_SMMU_V1 0x00000000 /* Generic SMMUv1 */ 1029 #define ACPI_IORT_SMMU_V2 0x00000001 /* Generic SMMUv2 */ 1030 #define ACPI_IORT_SMMU_CORELINK_MMU400 0x00000002 /* ARM Corelink MMU-400 */ 1031 #define ACPI_IORT_SMMU_CORELINK_MMU500 0x00000003 /* ARM Corelink MMU-500 */ 1032 #define ACPI_IORT_SMMU_CORELINK_MMU401 0x00000004 /* ARM Corelink MMU-401 */ 1033 #define ACPI_IORT_SMMU_CAVIUM_THUNDERX 0x00000005 /* Cavium ThunderX SMMUv2 */ 1034 1035 /* Masks for Flags field above */ 1036 1037 #define ACPI_IORT_SMMU_DVM_SUPPORTED (1) 1038 #define ACPI_IORT_SMMU_COHERENT_WALK (1<<1) 1039 1040 /* Global interrupt format */ 1041 1042 typedef struct acpi_iort_smmu_gsi 1043 { 1044 UINT32 NSgIrpt; 1045 UINT32 NSgIrptFlags; 1046 UINT32 NSgCfgIrpt; 1047 UINT32 NSgCfgIrptFlags; 1048 1049 } ACPI_IORT_SMMU_GSI; 1050 1051 1052 typedef struct acpi_iort_smmu_v3 1053 { 1054 UINT64 BaseAddress; /* SMMUv3 base address */ 1055 UINT32 Flags; 1056 UINT32 Reserved; 1057 UINT64 VatosAddress; 1058 UINT32 Model; 1059 UINT32 EventGsiv; 1060 UINT32 PriGsiv; 1061 UINT32 GerrGsiv; 1062 UINT32 SyncGsiv; 1063 UINT32 Pxm; 1064 UINT32 IdMappingIndex; 1065 1066 } ACPI_IORT_SMMU_V3; 1067 1068 /* Values for Model field above */ 1069 1070 #define ACPI_IORT_SMMU_V3_GENERIC 0x00000000 /* Generic SMMUv3 */ 1071 #define ACPI_IORT_SMMU_V3_HISILICON_HI161X 0x00000001 /* HiSilicon Hi161x SMMUv3 */ 1072 #define ACPI_IORT_SMMU_V3_CAVIUM_CN99XX 0x00000002 /* Cavium CN99xx SMMUv3 */ 1073 1074 /* Masks for Flags field above */ 1075 1076 #define ACPI_IORT_SMMU_V3_COHACC_OVERRIDE (1) 1077 #define ACPI_IORT_SMMU_V3_HTTU_OVERRIDE (3<<1) 1078 #define ACPI_IORT_SMMU_V3_PXM_VALID (1<<3) 1079 #define ACPI_IORT_SMMU_V3_DEVICEID_VALID (1<<4) 1080 1081 typedef struct acpi_iort_pmcg 1082 { 1083 UINT64 Page0BaseAddress; 1084 UINT32 OverflowGsiv; 1085 UINT32 NodeReference; 1086 UINT64 Page1BaseAddress; 1087 1088 } ACPI_IORT_PMCG; 1089 1090 typedef struct acpi_iort_rmr { 1091 UINT32 Flags; 1092 UINT32 RmrCount; 1093 UINT32 RmrOffset; 1094 1095 } ACPI_IORT_RMR; 1096 1097 /* Masks for Flags field above */ 1098 #define ACPI_IORT_RMR_REMAP_PERMITTED (1) 1099 #define ACPI_IORT_RMR_ACCESS_PRIVILEGE (1<<1) 1100 1101 /* 1102 * Macro to access the Access Attributes in flags field above: 1103 * Access Attributes is encoded in bits 9:2 1104 */ 1105 #define ACPI_IORT_RMR_ACCESS_ATTRIBUTES(flags) (((flags) >> 2) & 0xFF) 1106 1107 /* Values for above Access Attributes */ 1108 1109 #define ACPI_IORT_RMR_ATTR_DEVICE_NGNRNE 0x00 1110 #define ACPI_IORT_RMR_ATTR_DEVICE_NGNRE 0x01 1111 #define ACPI_IORT_RMR_ATTR_DEVICE_NGRE 0x02 1112 #define ACPI_IORT_RMR_ATTR_DEVICE_GRE 0x03 1113 #define ACPI_IORT_RMR_ATTR_NORMAL_NC 0x04 1114 #define ACPI_IORT_RMR_ATTR_NORMAL_IWB_OWB 0x05 1115 1116 typedef struct acpi_iort_rmr_desc { 1117 UINT64 BaseAddress; 1118 UINT64 Length; 1119 UINT32 Reserved; 1120 1121 } ACPI_IORT_RMR_DESC; 1122 1123 /******************************************************************************* 1124 * 1125 * IVRS - I/O Virtualization Reporting Structure 1126 * Version 1 1127 * 1128 * Conforms to "AMD I/O Virtualization Technology (IOMMU) Specification", 1129 * Revision 1.26, February 2009. 1130 * 1131 ******************************************************************************/ 1132 1133 typedef struct acpi_table_ivrs 1134 { 1135 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1136 UINT32 Info; /* Common virtualization info */ 1137 UINT64 Reserved; 1138 1139 } ACPI_TABLE_IVRS; 1140 1141 /* Values for Info field above */ 1142 1143 #define ACPI_IVRS_PHYSICAL_SIZE 0x00007F00 /* 7 bits, physical address size */ 1144 #define ACPI_IVRS_VIRTUAL_SIZE 0x003F8000 /* 7 bits, virtual address size */ 1145 #define ACPI_IVRS_ATS_RESERVED 0x00400000 /* ATS address translation range reserved */ 1146 1147 1148 /* IVRS subtable header */ 1149 1150 typedef struct acpi_ivrs_header 1151 { 1152 UINT8 Type; /* Subtable type */ 1153 UINT8 Flags; 1154 UINT16 Length; /* Subtable length */ 1155 UINT16 DeviceId; /* ID of IOMMU */ 1156 1157 } ACPI_IVRS_HEADER; 1158 1159 /* Values for subtable Type above */ 1160 1161 enum AcpiIvrsType 1162 { 1163 ACPI_IVRS_TYPE_HARDWARE1 = 0x10, 1164 ACPI_IVRS_TYPE_HARDWARE2 = 0x11, 1165 ACPI_IVRS_TYPE_HARDWARE3 = 0x40, 1166 ACPI_IVRS_TYPE_MEMORY1 = 0x20, 1167 ACPI_IVRS_TYPE_MEMORY2 = 0x21, 1168 ACPI_IVRS_TYPE_MEMORY3 = 0x22 1169 }; 1170 1171 /* Masks for Flags field above for IVHD subtable */ 1172 1173 #define ACPI_IVHD_TT_ENABLE (1) 1174 #define ACPI_IVHD_PASS_PW (1<<1) 1175 #define ACPI_IVHD_RES_PASS_PW (1<<2) 1176 #define ACPI_IVHD_ISOC (1<<3) 1177 #define ACPI_IVHD_IOTLB (1<<4) 1178 1179 /* Masks for Flags field above for IVMD subtable */ 1180 1181 #define ACPI_IVMD_UNITY (1) 1182 #define ACPI_IVMD_READ (1<<1) 1183 #define ACPI_IVMD_WRITE (1<<2) 1184 #define ACPI_IVMD_EXCLUSION_RANGE (1<<3) 1185 1186 1187 /* 1188 * IVRS subtables, correspond to Type in ACPI_IVRS_HEADER 1189 */ 1190 1191 /* 0x10: I/O Virtualization Hardware Definition Block (IVHD) */ 1192 1193 typedef struct acpi_ivrs_hardware_10 1194 { 1195 ACPI_IVRS_HEADER Header; 1196 UINT16 CapabilityOffset; /* Offset for IOMMU control fields */ 1197 UINT64 BaseAddress; /* IOMMU control registers */ 1198 UINT16 PciSegmentGroup; 1199 UINT16 Info; /* MSI number and unit ID */ 1200 UINT32 FeatureReporting; 1201 1202 } ACPI_IVRS_HARDWARE1; 1203 1204 /* 0x11: I/O Virtualization Hardware Definition Block (IVHD) */ 1205 1206 typedef struct acpi_ivrs_hardware_11 1207 { 1208 ACPI_IVRS_HEADER Header; 1209 UINT16 CapabilityOffset; /* Offset for IOMMU control fields */ 1210 UINT64 BaseAddress; /* IOMMU control registers */ 1211 UINT16 PciSegmentGroup; 1212 UINT16 Info; /* MSI number and unit ID */ 1213 UINT32 Attributes; 1214 UINT64 EfrRegisterImage; 1215 UINT64 Reserved; 1216 } ACPI_IVRS_HARDWARE2; 1217 1218 /* Masks for Info field above */ 1219 1220 #define ACPI_IVHD_MSI_NUMBER_MASK 0x001F /* 5 bits, MSI message number */ 1221 #define ACPI_IVHD_UNIT_ID_MASK 0x1F00 /* 5 bits, UnitID */ 1222 1223 1224 /* 1225 * Device Entries for IVHD subtable, appear after ACPI_IVRS_HARDWARE structure. 1226 * Upper two bits of the Type field are the (encoded) length of the structure. 1227 * Currently, only 4 and 8 byte entries are defined. 16 and 32 byte entries 1228 * are reserved for future use but not defined. 1229 */ 1230 typedef struct acpi_ivrs_de_header 1231 { 1232 UINT8 Type; 1233 UINT16 Id; 1234 UINT8 DataSetting; 1235 1236 } ACPI_IVRS_DE_HEADER; 1237 1238 /* Length of device entry is in the top two bits of Type field above */ 1239 1240 #define ACPI_IVHD_ENTRY_LENGTH 0xC0 1241 1242 /* Values for device entry Type field above */ 1243 1244 enum AcpiIvrsDeviceEntryType 1245 { 1246 /* 4-byte device entries, all use ACPI_IVRS_DEVICE4 */ 1247 1248 ACPI_IVRS_TYPE_PAD4 = 0, 1249 ACPI_IVRS_TYPE_ALL = 1, 1250 ACPI_IVRS_TYPE_SELECT = 2, 1251 ACPI_IVRS_TYPE_START = 3, 1252 ACPI_IVRS_TYPE_END = 4, 1253 1254 /* 8-byte device entries */ 1255 1256 ACPI_IVRS_TYPE_PAD8 = 64, 1257 ACPI_IVRS_TYPE_NOT_USED = 65, 1258 ACPI_IVRS_TYPE_ALIAS_SELECT = 66, /* Uses ACPI_IVRS_DEVICE8A */ 1259 ACPI_IVRS_TYPE_ALIAS_START = 67, /* Uses ACPI_IVRS_DEVICE8A */ 1260 ACPI_IVRS_TYPE_EXT_SELECT = 70, /* Uses ACPI_IVRS_DEVICE8B */ 1261 ACPI_IVRS_TYPE_EXT_START = 71, /* Uses ACPI_IVRS_DEVICE8B */ 1262 ACPI_IVRS_TYPE_SPECIAL = 72, /* Uses ACPI_IVRS_DEVICE8C */ 1263 1264 /* Variable-length device entries */ 1265 1266 ACPI_IVRS_TYPE_HID = 240 /* Uses ACPI_IVRS_DEVICE_HID */ 1267 }; 1268 1269 /* Values for Data field above */ 1270 1271 #define ACPI_IVHD_INIT_PASS (1) 1272 #define ACPI_IVHD_EINT_PASS (1<<1) 1273 #define ACPI_IVHD_NMI_PASS (1<<2) 1274 #define ACPI_IVHD_SYSTEM_MGMT (3<<4) 1275 #define ACPI_IVHD_LINT0_PASS (1<<6) 1276 #define ACPI_IVHD_LINT1_PASS (1<<7) 1277 1278 1279 /* Types 0-4: 4-byte device entry */ 1280 1281 typedef struct acpi_ivrs_device4 1282 { 1283 ACPI_IVRS_DE_HEADER Header; 1284 1285 } ACPI_IVRS_DEVICE4; 1286 1287 /* Types 66-67: 8-byte device entry */ 1288 1289 typedef struct acpi_ivrs_device8a 1290 { 1291 ACPI_IVRS_DE_HEADER Header; 1292 UINT8 Reserved1; 1293 UINT16 UsedId; 1294 UINT8 Reserved2; 1295 1296 } ACPI_IVRS_DEVICE8A; 1297 1298 /* Types 70-71: 8-byte device entry */ 1299 1300 typedef struct acpi_ivrs_device8b 1301 { 1302 ACPI_IVRS_DE_HEADER Header; 1303 UINT32 ExtendedData; 1304 1305 } ACPI_IVRS_DEVICE8B; 1306 1307 /* Values for ExtendedData above */ 1308 1309 #define ACPI_IVHD_ATS_DISABLED (1<<31) 1310 1311 /* Type 72: 8-byte device entry */ 1312 1313 typedef struct acpi_ivrs_device8c 1314 { 1315 ACPI_IVRS_DE_HEADER Header; 1316 UINT8 Handle; 1317 UINT16 UsedId; 1318 UINT8 Variety; 1319 1320 } ACPI_IVRS_DEVICE8C; 1321 1322 /* Values for Variety field above */ 1323 1324 #define ACPI_IVHD_IOAPIC 1 1325 #define ACPI_IVHD_HPET 2 1326 1327 /* Type 240: variable-length device entry */ 1328 1329 typedef struct acpi_ivrs_device_hid 1330 { 1331 ACPI_IVRS_DE_HEADER Header; 1332 UINT64 AcpiHid; 1333 UINT64 AcpiCid; 1334 UINT8 UidType; 1335 UINT8 UidLength; 1336 1337 } ACPI_IVRS_DEVICE_HID; 1338 1339 /* Values for UidType above */ 1340 1341 #define ACPI_IVRS_UID_NOT_PRESENT 0 1342 #define ACPI_IVRS_UID_IS_INTEGER 1 1343 #define ACPI_IVRS_UID_IS_STRING 2 1344 1345 /* 0x20, 0x21, 0x22: I/O Virtualization Memory Definition Block (IVMD) */ 1346 1347 typedef struct acpi_ivrs_memory 1348 { 1349 ACPI_IVRS_HEADER Header; 1350 UINT16 AuxData; 1351 UINT64 Reserved; 1352 UINT64 StartAddress; 1353 UINT64 MemoryLength; 1354 1355 } ACPI_IVRS_MEMORY; 1356 1357 1358 /******************************************************************************* 1359 * 1360 * LPIT - Low Power Idle Table 1361 * 1362 * Conforms to "ACPI Low Power Idle Table (LPIT)" July 2014. 1363 * 1364 ******************************************************************************/ 1365 1366 typedef struct acpi_table_lpit 1367 { 1368 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1369 1370 } ACPI_TABLE_LPIT; 1371 1372 1373 /* LPIT subtable header */ 1374 1375 typedef struct acpi_lpit_header 1376 { 1377 UINT32 Type; /* Subtable type */ 1378 UINT32 Length; /* Subtable length */ 1379 UINT16 UniqueId; 1380 UINT16 Reserved; 1381 UINT32 Flags; 1382 1383 } ACPI_LPIT_HEADER; 1384 1385 /* Values for subtable Type above */ 1386 1387 enum AcpiLpitType 1388 { 1389 ACPI_LPIT_TYPE_NATIVE_CSTATE = 0x00, 1390 ACPI_LPIT_TYPE_RESERVED = 0x01 /* 1 and above are reserved */ 1391 }; 1392 1393 /* Masks for Flags field above */ 1394 1395 #define ACPI_LPIT_STATE_DISABLED (1) 1396 #define ACPI_LPIT_NO_COUNTER (1<<1) 1397 1398 /* 1399 * LPIT subtables, correspond to Type in ACPI_LPIT_HEADER 1400 */ 1401 1402 /* 0x00: Native C-state instruction based LPI structure */ 1403 1404 typedef struct acpi_lpit_native 1405 { 1406 ACPI_LPIT_HEADER Header; 1407 ACPI_GENERIC_ADDRESS EntryTrigger; 1408 UINT32 Residency; 1409 UINT32 Latency; 1410 ACPI_GENERIC_ADDRESS ResidencyCounter; 1411 UINT64 CounterFrequency; 1412 1413 } ACPI_LPIT_NATIVE; 1414 1415 1416 /******************************************************************************* 1417 * 1418 * MADT - Multiple APIC Description Table 1419 * Version 3 1420 * 1421 ******************************************************************************/ 1422 1423 typedef struct acpi_table_madt 1424 { 1425 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1426 UINT32 Address; /* Physical address of local APIC */ 1427 UINT32 Flags; 1428 1429 } ACPI_TABLE_MADT; 1430 1431 /* Masks for Flags field above */ 1432 1433 #define ACPI_MADT_PCAT_COMPAT (1) /* 00: System also has dual 8259s */ 1434 1435 /* Values for PCATCompat flag */ 1436 1437 #define ACPI_MADT_DUAL_PIC 1 1438 #define ACPI_MADT_MULTIPLE_APIC 0 1439 1440 1441 /* Values for MADT subtable type in ACPI_SUBTABLE_HEADER */ 1442 1443 enum AcpiMadtType 1444 { 1445 ACPI_MADT_TYPE_LOCAL_APIC = 0, 1446 ACPI_MADT_TYPE_IO_APIC = 1, 1447 ACPI_MADT_TYPE_INTERRUPT_OVERRIDE = 2, 1448 ACPI_MADT_TYPE_NMI_SOURCE = 3, 1449 ACPI_MADT_TYPE_LOCAL_APIC_NMI = 4, 1450 ACPI_MADT_TYPE_LOCAL_APIC_OVERRIDE = 5, 1451 ACPI_MADT_TYPE_IO_SAPIC = 6, 1452 ACPI_MADT_TYPE_LOCAL_SAPIC = 7, 1453 ACPI_MADT_TYPE_INTERRUPT_SOURCE = 8, 1454 ACPI_MADT_TYPE_LOCAL_X2APIC = 9, 1455 ACPI_MADT_TYPE_LOCAL_X2APIC_NMI = 10, 1456 ACPI_MADT_TYPE_GENERIC_INTERRUPT = 11, 1457 ACPI_MADT_TYPE_GENERIC_DISTRIBUTOR = 12, 1458 ACPI_MADT_TYPE_GENERIC_MSI_FRAME = 13, 1459 ACPI_MADT_TYPE_GENERIC_REDISTRIBUTOR = 14, 1460 ACPI_MADT_TYPE_GENERIC_TRANSLATOR = 15, 1461 ACPI_MADT_TYPE_MULTIPROC_WAKEUP = 16, 1462 ACPI_MADT_TYPE_CORE_PIC = 17, 1463 ACPI_MADT_TYPE_LIO_PIC = 18, 1464 ACPI_MADT_TYPE_HT_PIC = 19, 1465 ACPI_MADT_TYPE_EIO_PIC = 20, 1466 ACPI_MADT_TYPE_MSI_PIC = 21, 1467 ACPI_MADT_TYPE_BIO_PIC = 22, 1468 ACPI_MADT_TYPE_LPC_PIC = 23, 1469 ACPI_MADT_TYPE_RINTC = 24, 1470 ACPI_MADT_TYPE_IMSIC = 25, 1471 ACPI_MADT_TYPE_APLIC = 26, 1472 ACPI_MADT_TYPE_PLIC = 27, 1473 ACPI_MADT_TYPE_RESERVED = 28, /* 28 to 0x7F are reserved */ 1474 ACPI_MADT_TYPE_OEM_RESERVED = 0x80 /* 0x80 to 0xFF are reserved for OEM use */ 1475 }; 1476 1477 1478 /* 1479 * MADT Subtables, correspond to Type in ACPI_SUBTABLE_HEADER 1480 */ 1481 1482 /* 0: Processor Local APIC */ 1483 1484 typedef struct acpi_madt_local_apic 1485 { 1486 ACPI_SUBTABLE_HEADER Header; 1487 UINT8 ProcessorId; /* ACPI processor id */ 1488 UINT8 Id; /* Processor's local APIC id */ 1489 UINT32 LapicFlags; 1490 1491 } ACPI_MADT_LOCAL_APIC; 1492 1493 1494 /* 1: IO APIC */ 1495 1496 typedef struct acpi_madt_io_apic 1497 { 1498 ACPI_SUBTABLE_HEADER Header; 1499 UINT8 Id; /* I/O APIC ID */ 1500 UINT8 Reserved; /* Reserved - must be zero */ 1501 UINT32 Address; /* APIC physical address */ 1502 UINT32 GlobalIrqBase; /* Global system interrupt where INTI lines start */ 1503 1504 } ACPI_MADT_IO_APIC; 1505 1506 1507 /* 2: Interrupt Override */ 1508 1509 typedef struct acpi_madt_interrupt_override 1510 { 1511 ACPI_SUBTABLE_HEADER Header; 1512 UINT8 Bus; /* 0 - ISA */ 1513 UINT8 SourceIrq; /* Interrupt source (IRQ) */ 1514 UINT32 GlobalIrq; /* Global system interrupt */ 1515 UINT16 IntiFlags; 1516 1517 } ACPI_MADT_INTERRUPT_OVERRIDE; 1518 1519 1520 /* 3: NMI Source */ 1521 1522 typedef struct acpi_madt_nmi_source 1523 { 1524 ACPI_SUBTABLE_HEADER Header; 1525 UINT16 IntiFlags; 1526 UINT32 GlobalIrq; /* Global system interrupt */ 1527 1528 } ACPI_MADT_NMI_SOURCE; 1529 1530 1531 /* 4: Local APIC NMI */ 1532 1533 typedef struct acpi_madt_local_apic_nmi 1534 { 1535 ACPI_SUBTABLE_HEADER Header; 1536 UINT8 ProcessorId; /* ACPI processor id */ 1537 UINT16 IntiFlags; 1538 UINT8 Lint; /* LINTn to which NMI is connected */ 1539 1540 } ACPI_MADT_LOCAL_APIC_NMI; 1541 1542 1543 /* 5: Address Override */ 1544 1545 typedef struct acpi_madt_local_apic_override 1546 { 1547 ACPI_SUBTABLE_HEADER Header; 1548 UINT16 Reserved; /* Reserved, must be zero */ 1549 UINT64 Address; /* APIC physical address */ 1550 1551 } ACPI_MADT_LOCAL_APIC_OVERRIDE; 1552 1553 1554 /* 6: I/O Sapic */ 1555 1556 typedef struct acpi_madt_io_sapic 1557 { 1558 ACPI_SUBTABLE_HEADER Header; 1559 UINT8 Id; /* I/O SAPIC ID */ 1560 UINT8 Reserved; /* Reserved, must be zero */ 1561 UINT32 GlobalIrqBase; /* Global interrupt for SAPIC start */ 1562 UINT64 Address; /* SAPIC physical address */ 1563 1564 } ACPI_MADT_IO_SAPIC; 1565 1566 1567 /* 7: Local Sapic */ 1568 1569 typedef struct acpi_madt_local_sapic 1570 { 1571 ACPI_SUBTABLE_HEADER Header; 1572 UINT8 ProcessorId; /* ACPI processor id */ 1573 UINT8 Id; /* SAPIC ID */ 1574 UINT8 Eid; /* SAPIC EID */ 1575 UINT8 Reserved[3]; /* Reserved, must be zero */ 1576 UINT32 LapicFlags; 1577 UINT32 Uid; /* Numeric UID - ACPI 3.0 */ 1578 char UidString[]; /* String UID - ACPI 3.0 */ 1579 1580 } ACPI_MADT_LOCAL_SAPIC; 1581 1582 1583 /* 8: Platform Interrupt Source */ 1584 1585 typedef struct acpi_madt_interrupt_source 1586 { 1587 ACPI_SUBTABLE_HEADER Header; 1588 UINT16 IntiFlags; 1589 UINT8 Type; /* 1=PMI, 2=INIT, 3=corrected */ 1590 UINT8 Id; /* Processor ID */ 1591 UINT8 Eid; /* Processor EID */ 1592 UINT8 IoSapicVector; /* Vector value for PMI interrupts */ 1593 UINT32 GlobalIrq; /* Global system interrupt */ 1594 UINT32 Flags; /* Interrupt Source Flags */ 1595 1596 } ACPI_MADT_INTERRUPT_SOURCE; 1597 1598 /* Masks for Flags field above */ 1599 1600 #define ACPI_MADT_CPEI_OVERRIDE (1) 1601 1602 1603 /* 9: Processor Local X2APIC (ACPI 4.0) */ 1604 1605 typedef struct acpi_madt_local_x2apic 1606 { 1607 ACPI_SUBTABLE_HEADER Header; 1608 UINT16 Reserved; /* Reserved - must be zero */ 1609 UINT32 LocalApicId; /* Processor x2APIC ID */ 1610 UINT32 LapicFlags; 1611 UINT32 Uid; /* ACPI processor UID */ 1612 1613 } ACPI_MADT_LOCAL_X2APIC; 1614 1615 1616 /* 10: Local X2APIC NMI (ACPI 4.0) */ 1617 1618 typedef struct acpi_madt_local_x2apic_nmi 1619 { 1620 ACPI_SUBTABLE_HEADER Header; 1621 UINT16 IntiFlags; 1622 UINT32 Uid; /* ACPI processor UID */ 1623 UINT8 Lint; /* LINTn to which NMI is connected */ 1624 UINT8 Reserved[3]; /* Reserved - must be zero */ 1625 1626 } ACPI_MADT_LOCAL_X2APIC_NMI; 1627 1628 1629 /* 11: Generic Interrupt - GICC (ACPI 5.0 + ACPI 6.0 + ACPI 6.3 + ACPI 6.5 changes) */ 1630 1631 typedef struct acpi_madt_generic_interrupt 1632 { 1633 ACPI_SUBTABLE_HEADER Header; 1634 UINT16 Reserved; /* Reserved - must be zero */ 1635 UINT32 CpuInterfaceNumber; 1636 UINT32 Uid; 1637 UINT32 Flags; 1638 UINT32 ParkingVersion; 1639 UINT32 PerformanceInterrupt; 1640 UINT64 ParkedAddress; 1641 UINT64 BaseAddress; 1642 UINT64 GicvBaseAddress; 1643 UINT64 GichBaseAddress; 1644 UINT32 VgicInterrupt; 1645 UINT64 GicrBaseAddress; 1646 UINT64 ArmMpidr; 1647 UINT8 EfficiencyClass; 1648 UINT8 Reserved2[1]; 1649 UINT16 SpeInterrupt; /* ACPI 6.3 */ 1650 UINT16 TrbeInterrupt; /* ACPI 6.5 */ 1651 1652 } ACPI_MADT_GENERIC_INTERRUPT; 1653 1654 /* Masks for Flags field above */ 1655 1656 /* ACPI_MADT_ENABLED (1) Processor is usable if set */ 1657 #define ACPI_MADT_PERFORMANCE_IRQ_MODE (1<<1) /* 01: Performance Interrupt Mode */ 1658 #define ACPI_MADT_VGIC_IRQ_MODE (1<<2) /* 02: VGIC Maintenance Interrupt mode */ 1659 #define ACPI_MADT_GICC_ONLINE_CAPABLE (1<<3) /* 03: Processor is online capable */ 1660 #define ACPI_MADT_GICC_NON_COHERENT (1<<4) /* 04: GIC redistributor is not coherent */ 1661 1662 /* 12: Generic Distributor (ACPI 5.0 + ACPI 6.0 changes) */ 1663 1664 typedef struct acpi_madt_generic_distributor 1665 { 1666 ACPI_SUBTABLE_HEADER Header; 1667 UINT16 Reserved; /* Reserved - must be zero */ 1668 UINT32 GicId; 1669 UINT64 BaseAddress; 1670 UINT32 GlobalIrqBase; 1671 UINT8 Version; 1672 UINT8 Reserved2[3]; /* Reserved - must be zero */ 1673 1674 } ACPI_MADT_GENERIC_DISTRIBUTOR; 1675 1676 /* Values for Version field above */ 1677 1678 enum AcpiMadtGicVersion 1679 { 1680 ACPI_MADT_GIC_VERSION_NONE = 0, 1681 ACPI_MADT_GIC_VERSION_V1 = 1, 1682 ACPI_MADT_GIC_VERSION_V2 = 2, 1683 ACPI_MADT_GIC_VERSION_V3 = 3, 1684 ACPI_MADT_GIC_VERSION_V4 = 4, 1685 ACPI_MADT_GIC_VERSION_RESERVED = 5 /* 5 and greater are reserved */ 1686 }; 1687 1688 1689 /* 13: Generic MSI Frame (ACPI 5.1) */ 1690 1691 typedef struct acpi_madt_generic_msi_frame 1692 { 1693 ACPI_SUBTABLE_HEADER Header; 1694 UINT16 Reserved; /* Reserved - must be zero */ 1695 UINT32 MsiFrameId; 1696 UINT64 BaseAddress; 1697 UINT32 Flags; 1698 UINT16 SpiCount; 1699 UINT16 SpiBase; 1700 1701 } ACPI_MADT_GENERIC_MSI_FRAME; 1702 1703 /* Masks for Flags field above */ 1704 1705 #define ACPI_MADT_OVERRIDE_SPI_VALUES (1) 1706 1707 1708 /* 14: Generic Redistributor (ACPI 5.1) */ 1709 1710 typedef struct acpi_madt_generic_redistributor 1711 { 1712 ACPI_SUBTABLE_HEADER Header; 1713 UINT8 Flags; 1714 UINT8 Reserved; /* reserved - must be zero */ 1715 UINT64 BaseAddress; 1716 UINT32 Length; 1717 1718 } ACPI_MADT_GENERIC_REDISTRIBUTOR; 1719 1720 #define ACPI_MADT_GICR_NON_COHERENT (1) 1721 1722 /* 15: Generic Translator (ACPI 6.0) */ 1723 1724 typedef struct acpi_madt_generic_translator 1725 { 1726 ACPI_SUBTABLE_HEADER Header; 1727 UINT8 Flags; 1728 UINT8 Reserved; /* reserved - must be zero */ 1729 UINT32 TranslationId; 1730 UINT64 BaseAddress; 1731 UINT32 Reserved2; 1732 1733 } ACPI_MADT_GENERIC_TRANSLATOR; 1734 1735 #define ACPI_MADT_ITS_NON_COHERENT (1) 1736 1737 /* 16: Multiprocessor wakeup (ACPI 6.4) */ 1738 1739 typedef struct acpi_madt_multiproc_wakeup 1740 { 1741 ACPI_SUBTABLE_HEADER Header; 1742 UINT16 MailboxVersion; 1743 UINT32 Reserved; /* reserved - must be zero */ 1744 UINT64 BaseAddress; 1745 1746 } ACPI_MADT_MULTIPROC_WAKEUP; 1747 1748 #define ACPI_MULTIPROC_WAKEUP_MB_OS_SIZE 2032 1749 #define ACPI_MULTIPROC_WAKEUP_MB_FIRMWARE_SIZE 2048 1750 1751 typedef struct acpi_madt_multiproc_wakeup_mailbox 1752 { 1753 UINT16 Command; 1754 UINT16 Reserved; /* reserved - must be zero */ 1755 UINT32 ApicId; 1756 UINT64 WakeupVector; 1757 UINT8 ReservedOs[ACPI_MULTIPROC_WAKEUP_MB_OS_SIZE]; /* reserved for OS use */ 1758 UINT8 ReservedFirmware[ACPI_MULTIPROC_WAKEUP_MB_FIRMWARE_SIZE]; /* reserved for firmware use */ 1759 1760 } ACPI_MADT_MULTIPROC_WAKEUP_MAILBOX; 1761 1762 #define ACPI_MP_WAKE_COMMAND_WAKEUP 1 1763 1764 /* 17: CPU Core Interrupt Controller (ACPI 6.5) */ 1765 1766 typedef struct acpi_madt_core_pic { 1767 ACPI_SUBTABLE_HEADER Header; 1768 UINT8 Version; 1769 UINT32 ProcessorId; 1770 UINT32 CoreId; 1771 UINT32 Flags; 1772 } ACPI_MADT_CORE_PIC; 1773 1774 /* Values for Version field above */ 1775 1776 enum AcpiMadtCorePicVersion { 1777 ACPI_MADT_CORE_PIC_VERSION_NONE = 0, 1778 ACPI_MADT_CORE_PIC_VERSION_V1 = 1, 1779 ACPI_MADT_CORE_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */ 1780 }; 1781 1782 /* 18: Legacy I/O Interrupt Controller (ACPI 6.5) */ 1783 1784 typedef struct acpi_madt_lio_pic { 1785 ACPI_SUBTABLE_HEADER Header; 1786 UINT8 Version; 1787 UINT64 Address; 1788 UINT16 Size; 1789 UINT8 Cascade[2]; 1790 UINT32 CascadeMap[2]; 1791 } ACPI_MADT_LIO_PIC; 1792 1793 /* Values for Version field above */ 1794 1795 enum AcpiMadtLioPicVersion { 1796 ACPI_MADT_LIO_PIC_VERSION_NONE = 0, 1797 ACPI_MADT_LIO_PIC_VERSION_V1 = 1, 1798 ACPI_MADT_LIO_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */ 1799 }; 1800 1801 /* 19: HT Interrupt Controller (ACPI 6.5) */ 1802 1803 typedef struct acpi_madt_ht_pic { 1804 ACPI_SUBTABLE_HEADER Header; 1805 UINT8 Version; 1806 UINT64 Address; 1807 UINT16 Size; 1808 UINT8 Cascade[8]; 1809 } ACPI_MADT_HT_PIC; 1810 1811 /* Values for Version field above */ 1812 1813 enum AcpiMadtHtPicVersion { 1814 ACPI_MADT_HT_PIC_VERSION_NONE = 0, 1815 ACPI_MADT_HT_PIC_VERSION_V1 = 1, 1816 ACPI_MADT_HT_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */ 1817 }; 1818 1819 /* 20: Extend I/O Interrupt Controller (ACPI 6.5) */ 1820 1821 typedef struct acpi_madt_eio_pic { 1822 ACPI_SUBTABLE_HEADER Header; 1823 UINT8 Version; 1824 UINT8 Cascade; 1825 UINT8 Node; 1826 UINT64 NodeMap; 1827 } ACPI_MADT_EIO_PIC; 1828 1829 /* Values for Version field above */ 1830 1831 enum AcpiMadtEioPicVersion { 1832 ACPI_MADT_EIO_PIC_VERSION_NONE = 0, 1833 ACPI_MADT_EIO_PIC_VERSION_V1 = 1, 1834 ACPI_MADT_EIO_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */ 1835 }; 1836 1837 /* 21: MSI Interrupt Controller (ACPI 6.5) */ 1838 1839 typedef struct acpi_madt_msi_pic { 1840 ACPI_SUBTABLE_HEADER Header; 1841 UINT8 Version; 1842 UINT64 MsgAddress; 1843 UINT32 Start; 1844 UINT32 Count; 1845 } ACPI_MADT_MSI_PIC; 1846 1847 /* Values for Version field above */ 1848 1849 enum AcpiMadtMsiPicVersion { 1850 ACPI_MADT_MSI_PIC_VERSION_NONE = 0, 1851 ACPI_MADT_MSI_PIC_VERSION_V1 = 1, 1852 ACPI_MADT_MSI_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */ 1853 }; 1854 1855 /* 22: Bridge I/O Interrupt Controller (ACPI 6.5) */ 1856 1857 typedef struct acpi_madt_bio_pic { 1858 ACPI_SUBTABLE_HEADER Header; 1859 UINT8 Version; 1860 UINT64 Address; 1861 UINT16 Size; 1862 UINT16 Id; 1863 UINT16 GsiBase; 1864 } ACPI_MADT_BIO_PIC; 1865 1866 /* Values for Version field above */ 1867 1868 enum AcpiMadtBioPicVersion { 1869 ACPI_MADT_BIO_PIC_VERSION_NONE = 0, 1870 ACPI_MADT_BIO_PIC_VERSION_V1 = 1, 1871 ACPI_MADT_BIO_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */ 1872 }; 1873 1874 /* 23: LPC Interrupt Controller (ACPI 6.5) */ 1875 1876 typedef struct acpi_madt_lpc_pic { 1877 ACPI_SUBTABLE_HEADER Header; 1878 UINT8 Version; 1879 UINT64 Address; 1880 UINT16 Size; 1881 UINT8 Cascade; 1882 } ACPI_MADT_LPC_PIC; 1883 1884 /* Values for Version field above */ 1885 1886 enum AcpiMadtLpcPicVersion { 1887 ACPI_MADT_LPC_PIC_VERSION_NONE = 0, 1888 ACPI_MADT_LPC_PIC_VERSION_V1 = 1, 1889 ACPI_MADT_LPC_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */ 1890 }; 1891 1892 /* 24: RISC-V INTC */ 1893 typedef struct acpi_madt_rintc { 1894 ACPI_SUBTABLE_HEADER Header; 1895 UINT8 Version; 1896 UINT8 Reserved; 1897 UINT32 Flags; 1898 UINT64 HartId; 1899 UINT32 Uid; /* ACPI processor UID */ 1900 UINT32 ExtIntcId; /* External INTC Id */ 1901 UINT64 ImsicAddr; /* IMSIC base address */ 1902 UINT32 ImsicSize; /* IMSIC size */ 1903 } ACPI_MADT_RINTC; 1904 1905 /* Values for RISC-V INTC Version field above */ 1906 1907 enum AcpiMadtRintcVersion { 1908 ACPI_MADT_RINTC_VERSION_NONE = 0, 1909 ACPI_MADT_RINTC_VERSION_V1 = 1, 1910 ACPI_MADT_RINTC_VERSION_RESERVED = 2 /* 2 and greater are reserved */ 1911 }; 1912 1913 /* 25: RISC-V IMSIC */ 1914 typedef struct acpi_madt_imsic { 1915 ACPI_SUBTABLE_HEADER Header; 1916 UINT8 Version; 1917 UINT8 Reserved; 1918 UINT32 Flags; 1919 UINT16 NumIds; 1920 UINT16 NumGuestIds; 1921 UINT8 GuestIndexBits; 1922 UINT8 HartIndexBits; 1923 UINT8 GroupIndexBits; 1924 UINT8 GroupIndexShift; 1925 } ACPI_MADT_IMSIC; 1926 1927 /* 26: RISC-V APLIC */ 1928 typedef struct acpi_madt_aplic { 1929 ACPI_SUBTABLE_HEADER Header; 1930 UINT8 Version; 1931 UINT8 Id; 1932 UINT32 Flags; 1933 UINT8 HwId[8]; 1934 UINT16 NumIdcs; 1935 UINT16 NumSources; 1936 UINT32 GsiBase; 1937 UINT64 BaseAddr; 1938 UINT32 Size; 1939 } ACPI_MADT_APLIC; 1940 1941 /* 27: RISC-V PLIC */ 1942 typedef struct acpi_madt_plic { 1943 ACPI_SUBTABLE_HEADER Header; 1944 UINT8 Version; 1945 UINT8 Id; 1946 UINT8 HwId[8]; 1947 UINT16 NumIrqs; 1948 UINT16 MaxPrio; 1949 UINT32 Flags; 1950 UINT32 Size; 1951 UINT64 BaseAddr; 1952 UINT32 GsiBase; 1953 } ACPI_MADT_PLIC; 1954 1955 1956 /* 80: OEM data */ 1957 1958 typedef struct acpi_madt_oem_data 1959 { 1960 ACPI_FLEX_ARRAY(UINT8, OemData); 1961 } ACPI_MADT_OEM_DATA; 1962 1963 1964 /* 1965 * Common flags fields for MADT subtables 1966 */ 1967 1968 /* MADT Local APIC flags */ 1969 1970 #define ACPI_MADT_ENABLED (1) /* 00: Processor is usable if set */ 1971 #define ACPI_MADT_ONLINE_CAPABLE (2) /* 01: System HW supports enabling processor at runtime */ 1972 1973 /* MADT MPS INTI flags (IntiFlags) */ 1974 1975 #define ACPI_MADT_POLARITY_MASK (3) /* 00-01: Polarity of APIC I/O input signals */ 1976 #define ACPI_MADT_TRIGGER_MASK (3<<2) /* 02-03: Trigger mode of APIC input signals */ 1977 1978 /* Values for MPS INTI flags */ 1979 1980 #define ACPI_MADT_POLARITY_CONFORMS 0 1981 #define ACPI_MADT_POLARITY_ACTIVE_HIGH 1 1982 #define ACPI_MADT_POLARITY_RESERVED 2 1983 #define ACPI_MADT_POLARITY_ACTIVE_LOW 3 1984 1985 #define ACPI_MADT_TRIGGER_CONFORMS (0) 1986 #define ACPI_MADT_TRIGGER_EDGE (1<<2) 1987 #define ACPI_MADT_TRIGGER_RESERVED (2<<2) 1988 #define ACPI_MADT_TRIGGER_LEVEL (3<<2) 1989 1990 1991 /******************************************************************************* 1992 * 1993 * MCFG - PCI Memory Mapped Configuration table and subtable 1994 * Version 1 1995 * 1996 * Conforms to "PCI Firmware Specification", Revision 3.0, June 20, 2005 1997 * 1998 ******************************************************************************/ 1999 2000 typedef struct acpi_table_mcfg 2001 { 2002 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 2003 UINT8 Reserved[8]; 2004 2005 } ACPI_TABLE_MCFG; 2006 2007 2008 /* Subtable */ 2009 2010 typedef struct acpi_mcfg_allocation 2011 { 2012 UINT64 Address; /* Base address, processor-relative */ 2013 UINT16 PciSegment; /* PCI segment group number */ 2014 UINT8 StartBusNumber; /* Starting PCI Bus number */ 2015 UINT8 EndBusNumber; /* Final PCI Bus number */ 2016 UINT32 Reserved; 2017 2018 } ACPI_MCFG_ALLOCATION; 2019 2020 2021 /******************************************************************************* 2022 * 2023 * MCHI - Management Controller Host Interface Table 2024 * Version 1 2025 * 2026 * Conforms to "Management Component Transport Protocol (MCTP) Host 2027 * Interface Specification", Revision 1.0.0a, October 13, 2009 2028 * 2029 ******************************************************************************/ 2030 2031 typedef struct acpi_table_mchi 2032 { 2033 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 2034 UINT8 InterfaceType; 2035 UINT8 Protocol; 2036 UINT64 ProtocolData; 2037 UINT8 InterruptType; 2038 UINT8 Gpe; 2039 UINT8 PciDeviceFlag; 2040 UINT32 GlobalInterrupt; 2041 ACPI_GENERIC_ADDRESS ControlRegister; 2042 UINT8 PciSegment; 2043 UINT8 PciBus; 2044 UINT8 PciDevice; 2045 UINT8 PciFunction; 2046 2047 } ACPI_TABLE_MCHI; 2048 2049 /******************************************************************************* 2050 * 2051 * MPAM - Memory System Resource Partitioning and Monitoring 2052 * 2053 * Conforms to "ACPI for Memory System Resource Partitioning and Monitoring 2.0" 2054 * Document number: ARM DEN 0065, December, 2022. 2055 * 2056 ******************************************************************************/ 2057 2058 /* MPAM RIS locator types. Table 11, Location types */ 2059 enum AcpiMpamLocatorType { 2060 ACPI_MPAM_LOCATION_TYPE_PROCESSOR_CACHE = 0, 2061 ACPI_MPAM_LOCATION_TYPE_MEMORY = 1, 2062 ACPI_MPAM_LOCATION_TYPE_SMMU = 2, 2063 ACPI_MPAM_LOCATION_TYPE_MEMORY_CACHE = 3, 2064 ACPI_MPAM_LOCATION_TYPE_ACPI_DEVICE = 4, 2065 ACPI_MPAM_LOCATION_TYPE_INTERCONNECT = 5, 2066 ACPI_MPAM_LOCATION_TYPE_UNKNOWN = 0xFF 2067 }; 2068 2069 /* MPAM Functional dependency descriptor. Table 10 */ 2070 typedef struct acpi_mpam_func_deps 2071 { 2072 UINT32 Producer; 2073 UINT32 Reserved; 2074 } ACPI_MPAM_FUNC_DEPS; 2075 2076 /* MPAM Processor cache locator descriptor. Table 13 */ 2077 typedef struct acpi_mpam_resource_cache_locator 2078 { 2079 UINT64 CacheReference; 2080 UINT32 Reserved; 2081 } ACPI_MPAM_RESOURCE_CACHE_LOCATOR; 2082 2083 /* MPAM Memory locator descriptor. Table 14 */ 2084 typedef struct acpi_mpam_resource_memory_locator 2085 { 2086 UINT64 ProximityDomain; 2087 UINT32 Reserved; 2088 } ACPI_MPAM_RESOURCE_MEMORY_LOCATOR; 2089 2090 /* MPAM SMMU locator descriptor. Table 15 */ 2091 typedef struct acpi_mpam_resource_smmu_locator 2092 { 2093 UINT64 SmmuInterface; 2094 UINT32 Reserved; 2095 } ACPI_MPAM_RESOURCE_SMMU_INTERFACE; 2096 2097 /* MPAM Memory-side cache locator descriptor. Table 16 */ 2098 typedef struct acpi_mpam_resource_memcache_locator 2099 { 2100 UINT8 Reserved[7]; 2101 UINT8 Level; 2102 UINT32 Reference; 2103 } ACPI_MPAM_RESOURCE_MEMCACHE_INTERFACE; 2104 2105 /* MPAM ACPI device locator descriptor. Table 17 */ 2106 typedef struct acpi_mpam_resource_acpi_locator 2107 { 2108 UINT64 AcpiHwId; 2109 UINT32 AcpiUniqueId; 2110 } ACPI_MPAM_RESOURCE_ACPI_INTERFACE; 2111 2112 /* MPAM Interconnect locator descriptor. Table 18 */ 2113 typedef struct acpi_mpam_resource_interconnect_locator 2114 { 2115 UINT64 InterConnectDescTblOff; 2116 UINT32 Reserved; 2117 } ACPI_MPAM_RESOURCE_INTERCONNECT_INTERFACE; 2118 2119 /* MPAM Locator structure. Table 12 */ 2120 typedef struct acpi_mpam_resource_generic_locator 2121 { 2122 UINT64 Descriptor1; 2123 UINT32 Descriptor2; 2124 } ACPI_MPAM_RESOURCE_GENERIC_LOCATOR; 2125 2126 typedef union acpi_mpam_resource_locator 2127 { 2128 ACPI_MPAM_RESOURCE_CACHE_LOCATOR CacheLocator; 2129 ACPI_MPAM_RESOURCE_MEMORY_LOCATOR MemoryLocator; 2130 ACPI_MPAM_RESOURCE_SMMU_INTERFACE SmmuLocator; 2131 ACPI_MPAM_RESOURCE_MEMCACHE_INTERFACE MemCacheLocator; 2132 ACPI_MPAM_RESOURCE_ACPI_INTERFACE AcpiLocator; 2133 ACPI_MPAM_RESOURCE_INTERCONNECT_INTERFACE InterconnectIfcLocator; 2134 ACPI_MPAM_RESOURCE_GENERIC_LOCATOR GenericLocator; 2135 } ACPI_MPAM_RESOURCE_LOCATOR; 2136 2137 /* Memory System Component Resource Node Structure Table 9 */ 2138 typedef struct acpi_mpam_resource_node 2139 { 2140 UINT32 Identifier; 2141 UINT8 RISIndex; 2142 UINT16 Reserved1; 2143 UINT8 LocatorType; 2144 ACPI_MPAM_RESOURCE_LOCATOR Locator; 2145 UINT32 NumFunctionalDeps; 2146 } ACPI_MPAM_RESOURCE_NODE; 2147 2148 /* Memory System Component (MSC) Node Structure. Table 4 */ 2149 typedef struct acpi_mpam_msc_node 2150 { 2151 UINT16 Length; 2152 UINT8 InterfaceType; 2153 UINT8 Reserved; 2154 UINT32 Identifier; 2155 UINT64 BaseAddress; 2156 UINT32 MMIOSize; 2157 UINT32 OverflowInterrupt; 2158 UINT32 OverflowInterruptFlags; 2159 UINT32 Reserved1; 2160 UINT32 OverflowInterruptAffinity; 2161 UINT32 ErrorInterrupt; 2162 UINT32 ErrorInterruptFlags; 2163 UINT32 Reserved2; 2164 UINT32 ErrorInterruptAffinity; 2165 UINT32 MaxNrdyUsec; 2166 UINT64 HardwareIdLinkedDevice; 2167 UINT32 InstanceIdLinkedDevice; 2168 UINT32 NumResourceNodes; 2169 } ACPI_MPAM_MSC_NODE; 2170 2171 typedef struct acpi_table_mpam 2172 { 2173 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 2174 } ACPI_TABLE_MPAM; 2175 2176 /******************************************************************************* 2177 * 2178 * MPST - Memory Power State Table (ACPI 5.0) 2179 * Version 1 2180 * 2181 ******************************************************************************/ 2182 2183 #define ACPI_MPST_CHANNEL_INFO \ 2184 UINT8 ChannelId; \ 2185 UINT8 Reserved1[3]; \ 2186 UINT16 PowerNodeCount; \ 2187 UINT16 Reserved2; 2188 2189 /* Main table */ 2190 2191 typedef struct acpi_table_mpst 2192 { 2193 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 2194 ACPI_MPST_CHANNEL_INFO /* Platform Communication Channel */ 2195 2196 } ACPI_TABLE_MPST; 2197 2198 2199 /* Memory Platform Communication Channel Info */ 2200 2201 typedef struct acpi_mpst_channel 2202 { 2203 ACPI_MPST_CHANNEL_INFO /* Platform Communication Channel */ 2204 2205 } ACPI_MPST_CHANNEL; 2206 2207 2208 /* Memory Power Node Structure */ 2209 2210 typedef struct acpi_mpst_power_node 2211 { 2212 UINT8 Flags; 2213 UINT8 Reserved1; 2214 UINT16 NodeId; 2215 UINT32 Length; 2216 UINT64 RangeAddress; 2217 UINT64 RangeLength; 2218 UINT32 NumPowerStates; 2219 UINT32 NumPhysicalComponents; 2220 2221 } ACPI_MPST_POWER_NODE; 2222 2223 /* Values for Flags field above */ 2224 2225 #define ACPI_MPST_ENABLED 1 2226 #define ACPI_MPST_POWER_MANAGED 2 2227 #define ACPI_MPST_HOT_PLUG_CAPABLE 4 2228 2229 2230 /* Memory Power State Structure (follows POWER_NODE above) */ 2231 2232 typedef struct acpi_mpst_power_state 2233 { 2234 UINT8 PowerState; 2235 UINT8 InfoIndex; 2236 2237 } ACPI_MPST_POWER_STATE; 2238 2239 2240 /* Physical Component ID Structure (follows POWER_STATE above) */ 2241 2242 typedef struct acpi_mpst_component 2243 { 2244 UINT16 ComponentId; 2245 2246 } ACPI_MPST_COMPONENT; 2247 2248 2249 /* Memory Power State Characteristics Structure (follows all POWER_NODEs) */ 2250 2251 typedef struct acpi_mpst_data_hdr 2252 { 2253 UINT16 CharacteristicsCount; 2254 UINT16 Reserved; 2255 2256 } ACPI_MPST_DATA_HDR; 2257 2258 typedef struct acpi_mpst_power_data 2259 { 2260 UINT8 StructureId; 2261 UINT8 Flags; 2262 UINT16 Reserved1; 2263 UINT32 AveragePower; 2264 UINT32 PowerSaving; 2265 UINT64 ExitLatency; 2266 UINT64 Reserved2; 2267 2268 } ACPI_MPST_POWER_DATA; 2269 2270 /* Values for Flags field above */ 2271 2272 #define ACPI_MPST_PRESERVE 1 2273 #define ACPI_MPST_AUTOENTRY 2 2274 #define ACPI_MPST_AUTOEXIT 4 2275 2276 2277 /* Shared Memory Region (not part of an ACPI table) */ 2278 2279 typedef struct acpi_mpst_shared 2280 { 2281 UINT32 Signature; 2282 UINT16 PccCommand; 2283 UINT16 PccStatus; 2284 UINT32 CommandRegister; 2285 UINT32 StatusRegister; 2286 UINT32 PowerStateId; 2287 UINT32 PowerNodeId; 2288 UINT64 EnergyConsumed; 2289 UINT64 AveragePower; 2290 2291 } ACPI_MPST_SHARED; 2292 2293 2294 /******************************************************************************* 2295 * 2296 * MSCT - Maximum System Characteristics Table (ACPI 4.0) 2297 * Version 1 2298 * 2299 ******************************************************************************/ 2300 2301 typedef struct acpi_table_msct 2302 { 2303 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 2304 UINT32 ProximityOffset; /* Location of proximity info struct(s) */ 2305 UINT32 MaxProximityDomains;/* Max number of proximity domains */ 2306 UINT32 MaxClockDomains; /* Max number of clock domains */ 2307 UINT64 MaxAddress; /* Max physical address in system */ 2308 2309 } ACPI_TABLE_MSCT; 2310 2311 2312 /* Subtable - Maximum Proximity Domain Information. Version 1 */ 2313 2314 typedef struct acpi_msct_proximity 2315 { 2316 UINT8 Revision; 2317 UINT8 Length; 2318 UINT32 RangeStart; /* Start of domain range */ 2319 UINT32 RangeEnd; /* End of domain range */ 2320 UINT32 ProcessorCapacity; 2321 UINT64 MemoryCapacity; /* In bytes */ 2322 2323 } ACPI_MSCT_PROXIMITY; 2324 2325 2326 /******************************************************************************* 2327 * 2328 * MRRM - Memory Range and Region Mapping (MRRM) table 2329 * Conforms to "Intel Resource Director Technology Architecture Specification" 2330 * Version 1.1, January 2025 2331 * 2332 ******************************************************************************/ 2333 2334 typedef struct acpi_table_mrrm 2335 { 2336 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 2337 UINT8 MaxMemRegion; /* Max Memory Regions supported */ 2338 UINT8 Flags; /* Region assignment type */ 2339 UINT8 Reserved[26]; 2340 UINT8 Memory_Range_Entry[]; 2341 2342 } ACPI_TABLE_MRRM; 2343 2344 /* Flags */ 2345 #define ACPI_MRRM_FLAGS_REGION_ASSIGNMENT_OS (1<<0) 2346 2347 /******************************************************************************* 2348 * 2349 * Memory Range entry - Memory Range entry in MRRM table 2350 * 2351 ******************************************************************************/ 2352 2353 typedef struct acpi_mrrm_mem_range_entry 2354 { 2355 ACPI_SUBTBL_HDR_16 Header; 2356 UINT32 Reserved0; /* Reserved */ 2357 UINT64 AddrBase; /* Base addr of the mem range */ 2358 UINT64 AddrLen; /* Length of the mem range */ 2359 UINT16 RegionIdFlags; /* Valid local or remote Region-ID */ 2360 UINT8 LocalRegionId; /* Platform-assigned static local Region-ID */ 2361 UINT8 RemoteRegionId; /* Platform-assigned static remote Region-ID */ 2362 UINT32 Reserved1; /* Reserved */ 2363 /* Region-ID Programming Registers[] */ 2364 2365 } ACPI_MRRM_MEM_RANGE_ENTRY; 2366 2367 /* Values for RegionIdFlags above */ 2368 #define ACPI_MRRM_VALID_REGION_ID_FLAGS_LOCAL (1<<0) 2369 #define ACPI_MRRM_VALID_REGION_ID_FLAGS_REMOTE (1<<1) 2370 2371 2372 /******************************************************************************* 2373 * 2374 * MSDM - Microsoft Data Management table 2375 * 2376 * Conforms to "Microsoft Software Licensing Tables (SLIC and MSDM)", 2377 * November 29, 2011. Copyright 2011 Microsoft 2378 * 2379 ******************************************************************************/ 2380 2381 /* Basic MSDM table is only the common ACPI header */ 2382 2383 typedef struct acpi_table_msdm 2384 { 2385 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 2386 2387 } ACPI_TABLE_MSDM; 2388 2389 2390 /******************************************************************************* 2391 * 2392 * NFIT - NVDIMM Interface Table (ACPI 6.0+) 2393 * Version 1 2394 * 2395 ******************************************************************************/ 2396 2397 typedef struct acpi_table_nfit 2398 { 2399 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 2400 UINT32 Reserved; /* Reserved, must be zero */ 2401 2402 } ACPI_TABLE_NFIT; 2403 2404 /* Subtable header for NFIT */ 2405 2406 typedef struct acpi_nfit_header 2407 { 2408 UINT16 Type; 2409 UINT16 Length; 2410 2411 } ACPI_NFIT_HEADER; 2412 2413 2414 /* Values for subtable type in ACPI_NFIT_HEADER */ 2415 2416 enum AcpiNfitType 2417 { 2418 ACPI_NFIT_TYPE_SYSTEM_ADDRESS = 0, 2419 ACPI_NFIT_TYPE_MEMORY_MAP = 1, 2420 ACPI_NFIT_TYPE_INTERLEAVE = 2, 2421 ACPI_NFIT_TYPE_SMBIOS = 3, 2422 ACPI_NFIT_TYPE_CONTROL_REGION = 4, 2423 ACPI_NFIT_TYPE_DATA_REGION = 5, 2424 ACPI_NFIT_TYPE_FLUSH_ADDRESS = 6, 2425 ACPI_NFIT_TYPE_CAPABILITIES = 7, 2426 ACPI_NFIT_TYPE_RESERVED = 8 /* 8 and greater are reserved */ 2427 }; 2428 2429 /* 2430 * NFIT Subtables 2431 */ 2432 2433 /* 0: System Physical Address Range Structure */ 2434 2435 typedef struct acpi_nfit_system_address 2436 { 2437 ACPI_NFIT_HEADER Header; 2438 UINT16 RangeIndex; 2439 UINT16 Flags; 2440 UINT32 Reserved; /* Reserved, must be zero */ 2441 UINT32 ProximityDomain; 2442 UINT8 RangeGuid[16]; 2443 UINT64 Address; 2444 UINT64 Length; 2445 UINT64 MemoryMapping; 2446 UINT64 LocationCookie; /* ACPI 6.4 */ 2447 2448 } ACPI_NFIT_SYSTEM_ADDRESS; 2449 2450 /* Flags */ 2451 2452 #define ACPI_NFIT_ADD_ONLINE_ONLY (1) /* 00: Add/Online Operation Only */ 2453 #define ACPI_NFIT_PROXIMITY_VALID (1<<1) /* 01: Proximity Domain Valid */ 2454 #define ACPI_NFIT_LOCATION_COOKIE_VALID (1<<2) /* 02: SPA location cookie valid (ACPI 6.4) */ 2455 2456 /* Range Type GUIDs appear in the include/acuuid.h file */ 2457 2458 2459 /* 1: Memory Device to System Address Range Map Structure */ 2460 2461 typedef struct acpi_nfit_memory_map 2462 { 2463 ACPI_NFIT_HEADER Header; 2464 UINT32 DeviceHandle; 2465 UINT16 PhysicalId; 2466 UINT16 RegionId; 2467 UINT16 RangeIndex; 2468 UINT16 RegionIndex; 2469 UINT64 RegionSize; 2470 UINT64 RegionOffset; 2471 UINT64 Address; 2472 UINT16 InterleaveIndex; 2473 UINT16 InterleaveWays; 2474 UINT16 Flags; 2475 UINT16 Reserved; /* Reserved, must be zero */ 2476 2477 } ACPI_NFIT_MEMORY_MAP; 2478 2479 /* Flags */ 2480 2481 #define ACPI_NFIT_MEM_SAVE_FAILED (1) /* 00: Last SAVE to Memory Device failed */ 2482 #define ACPI_NFIT_MEM_RESTORE_FAILED (1<<1) /* 01: Last RESTORE from Memory Device failed */ 2483 #define ACPI_NFIT_MEM_FLUSH_FAILED (1<<2) /* 02: Platform flush failed */ 2484 #define ACPI_NFIT_MEM_NOT_ARMED (1<<3) /* 03: Memory Device is not armed */ 2485 #define ACPI_NFIT_MEM_HEALTH_OBSERVED (1<<4) /* 04: Memory Device observed SMART/health events */ 2486 #define ACPI_NFIT_MEM_HEALTH_ENABLED (1<<5) /* 05: SMART/health events enabled */ 2487 #define ACPI_NFIT_MEM_MAP_FAILED (1<<6) /* 06: Mapping to SPA failed */ 2488 2489 2490 /* 2: Interleave Structure */ 2491 2492 typedef struct acpi_nfit_interleave 2493 { 2494 ACPI_NFIT_HEADER Header; 2495 UINT16 InterleaveIndex; 2496 UINT16 Reserved; /* Reserved, must be zero */ 2497 UINT32 LineCount; 2498 UINT32 LineSize; 2499 UINT32 LineOffset[]; /* Variable length */ 2500 2501 } ACPI_NFIT_INTERLEAVE; 2502 2503 2504 /* 3: SMBIOS Management Information Structure */ 2505 2506 typedef struct acpi_nfit_smbios 2507 { 2508 ACPI_NFIT_HEADER Header; 2509 UINT32 Reserved; /* Reserved, must be zero */ 2510 UINT8 Data[]; /* Variable length */ 2511 2512 } ACPI_NFIT_SMBIOS; 2513 2514 2515 /* 4: NVDIMM Control Region Structure */ 2516 2517 typedef struct acpi_nfit_control_region 2518 { 2519 ACPI_NFIT_HEADER Header; 2520 UINT16 RegionIndex; 2521 UINT16 VendorId; 2522 UINT16 DeviceId; 2523 UINT16 RevisionId; 2524 UINT16 SubsystemVendorId; 2525 UINT16 SubsystemDeviceId; 2526 UINT16 SubsystemRevisionId; 2527 UINT8 ValidFields; 2528 UINT8 ManufacturingLocation; 2529 UINT16 ManufacturingDate; 2530 UINT8 Reserved[2]; /* Reserved, must be zero */ 2531 UINT32 SerialNumber; 2532 UINT16 Code; 2533 UINT16 Windows; 2534 UINT64 WindowSize; 2535 UINT64 CommandOffset; 2536 UINT64 CommandSize; 2537 UINT64 StatusOffset; 2538 UINT64 StatusSize; 2539 UINT16 Flags; 2540 UINT8 Reserved1[6]; /* Reserved, must be zero */ 2541 2542 } ACPI_NFIT_CONTROL_REGION; 2543 2544 /* Flags */ 2545 2546 #define ACPI_NFIT_CONTROL_BUFFERED (1) /* Block Data Windows implementation is buffered */ 2547 2548 /* ValidFields bits */ 2549 2550 #define ACPI_NFIT_CONTROL_MFG_INFO_VALID (1) /* Manufacturing fields are valid */ 2551 2552 2553 /* 5: NVDIMM Block Data Window Region Structure */ 2554 2555 typedef struct acpi_nfit_data_region 2556 { 2557 ACPI_NFIT_HEADER Header; 2558 UINT16 RegionIndex; 2559 UINT16 Windows; 2560 UINT64 Offset; 2561 UINT64 Size; 2562 UINT64 Capacity; 2563 UINT64 StartAddress; 2564 2565 } ACPI_NFIT_DATA_REGION; 2566 2567 2568 /* 6: Flush Hint Address Structure */ 2569 2570 typedef struct acpi_nfit_flush_address 2571 { 2572 ACPI_NFIT_HEADER Header; 2573 UINT32 DeviceHandle; 2574 UINT16 HintCount; 2575 UINT8 Reserved[6]; /* Reserved, must be zero */ 2576 UINT64 HintAddress[]; /* Variable length */ 2577 2578 } ACPI_NFIT_FLUSH_ADDRESS; 2579 2580 2581 /* 7: Platform Capabilities Structure */ 2582 2583 typedef struct acpi_nfit_capabilities 2584 { 2585 ACPI_NFIT_HEADER Header; 2586 UINT8 HighestCapability; 2587 UINT8 Reserved[3]; /* Reserved, must be zero */ 2588 UINT32 Capabilities; 2589 UINT32 Reserved2; 2590 2591 } ACPI_NFIT_CAPABILITIES; 2592 2593 /* Capabilities Flags */ 2594 2595 #define ACPI_NFIT_CAPABILITY_CACHE_FLUSH (1) /* 00: Cache Flush to NVDIMM capable */ 2596 #define ACPI_NFIT_CAPABILITY_MEM_FLUSH (1<<1) /* 01: Memory Flush to NVDIMM capable */ 2597 #define ACPI_NFIT_CAPABILITY_MEM_MIRRORING (1<<2) /* 02: Memory Mirroring capable */ 2598 2599 2600 /* 2601 * NFIT/DVDIMM device handle support - used as the _ADR for each NVDIMM 2602 */ 2603 typedef struct nfit_device_handle 2604 { 2605 UINT32 Handle; 2606 2607 } NFIT_DEVICE_HANDLE; 2608 2609 /* Device handle construction and extraction macros */ 2610 2611 #define ACPI_NFIT_DIMM_NUMBER_MASK 0x0000000F 2612 #define ACPI_NFIT_CHANNEL_NUMBER_MASK 0x000000F0 2613 #define ACPI_NFIT_MEMORY_ID_MASK 0x00000F00 2614 #define ACPI_NFIT_SOCKET_ID_MASK 0x0000F000 2615 #define ACPI_NFIT_NODE_ID_MASK 0x0FFF0000 2616 2617 #define ACPI_NFIT_DIMM_NUMBER_OFFSET 0 2618 #define ACPI_NFIT_CHANNEL_NUMBER_OFFSET 4 2619 #define ACPI_NFIT_MEMORY_ID_OFFSET 8 2620 #define ACPI_NFIT_SOCKET_ID_OFFSET 12 2621 #define ACPI_NFIT_NODE_ID_OFFSET 16 2622 2623 /* Macro to construct a NFIT/NVDIMM device handle */ 2624 2625 #define ACPI_NFIT_BUILD_DEVICE_HANDLE(dimm, channel, memory, socket, node) \ 2626 ((dimm) | \ 2627 ((channel) << ACPI_NFIT_CHANNEL_NUMBER_OFFSET) | \ 2628 ((memory) << ACPI_NFIT_MEMORY_ID_OFFSET) | \ 2629 ((socket) << ACPI_NFIT_SOCKET_ID_OFFSET) | \ 2630 ((node) << ACPI_NFIT_NODE_ID_OFFSET)) 2631 2632 /* Macros to extract individual fields from a NFIT/NVDIMM device handle */ 2633 2634 #define ACPI_NFIT_GET_DIMM_NUMBER(handle) \ 2635 ((handle) & ACPI_NFIT_DIMM_NUMBER_MASK) 2636 2637 #define ACPI_NFIT_GET_CHANNEL_NUMBER(handle) \ 2638 (((handle) & ACPI_NFIT_CHANNEL_NUMBER_MASK) >> ACPI_NFIT_CHANNEL_NUMBER_OFFSET) 2639 2640 #define ACPI_NFIT_GET_MEMORY_ID(handle) \ 2641 (((handle) & ACPI_NFIT_MEMORY_ID_MASK) >> ACPI_NFIT_MEMORY_ID_OFFSET) 2642 2643 #define ACPI_NFIT_GET_SOCKET_ID(handle) \ 2644 (((handle) & ACPI_NFIT_SOCKET_ID_MASK) >> ACPI_NFIT_SOCKET_ID_OFFSET) 2645 2646 #define ACPI_NFIT_GET_NODE_ID(handle) \ 2647 (((handle) & ACPI_NFIT_NODE_ID_MASK) >> ACPI_NFIT_NODE_ID_OFFSET) 2648 2649 2650 /******************************************************************************* 2651 * 2652 * NHLT - Non HDAudio Link Table 2653 * Version 1 2654 * 2655 ******************************************************************************/ 2656 2657 typedef struct acpi_table_nhlt 2658 { 2659 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 2660 UINT8 EndpointsCount; 2661 /* 2662 * ACPI_NHLT_ENDPOINT Endpoints[]; 2663 * ACPI_NHLT_CONFIG OEDConfig; 2664 */ 2665 2666 } ACPI_TABLE_NHLT; 2667 2668 typedef struct acpi_nhlt_endpoint 2669 { 2670 UINT32 Length; 2671 UINT8 LinkType; 2672 UINT8 InstanceId; 2673 UINT16 VendorId; 2674 UINT16 DeviceId; 2675 UINT16 RevisionId; 2676 UINT32 SubsystemId; 2677 UINT8 DeviceType; 2678 UINT8 Direction; 2679 UINT8 VirtualBusId; 2680 /* 2681 * ACPI_NHLT_CONFIG DeviceConfig; 2682 * ACPI_NHLT_FORMATS_CONFIG FormatsConfig; 2683 * ACPI_NHLT_DEVICES_INFO DevicesInfo; 2684 */ 2685 2686 } ACPI_NHLT_ENDPOINT; 2687 2688 /* Values for LinkType field above */ 2689 2690 #define ACPI_NHLT_LINKTYPE_HDA 0 2691 #define ACPI_NHLT_LINKTYPE_DSP 1 2692 #define ACPI_NHLT_LINKTYPE_PDM 2 2693 #define ACPI_NHLT_LINKTYPE_SSP 3 2694 #define ACPI_NHLT_LINKTYPE_SLIMBUS 4 2695 #define ACPI_NHLT_LINKTYPE_SDW 5 2696 #define ACPI_NHLT_LINKTYPE_UAOL 6 2697 2698 /* Values for DeviceId field above */ 2699 2700 #define ACPI_NHLT_DEVICEID_DMIC 0xAE20 2701 #define ACPI_NHLT_DEVICEID_BT 0xAE30 2702 #define ACPI_NHLT_DEVICEID_I2S 0xAE34 2703 2704 /* Values for DeviceType field above */ 2705 2706 /* Device types unique to endpoint of LinkType=PDM */ 2707 #define ACPI_NHLT_DEVICETYPE_PDM 0 2708 #define ACPI_NHLT_DEVICETYPE_PDM_SKL 1 2709 /* Device types unique to endpoint of LinkType=SSP */ 2710 #define ACPI_NHLT_DEVICETYPE_BT 0 2711 #define ACPI_NHLT_DEVICETYPE_FM 1 2712 #define ACPI_NHLT_DEVICETYPE_MODEM 2 2713 #define ACPI_NHLT_DEVICETYPE_CODEC 4 2714 2715 /* Values for Direction field above */ 2716 2717 #define ACPI_NHLT_DIR_RENDER 0 2718 #define ACPI_NHLT_DIR_CAPTURE 1 2719 2720 typedef struct acpi_nhlt_config 2721 { 2722 UINT32 CapabilitiesSize; 2723 UINT8 Capabilities[1]; 2724 2725 } ACPI_NHLT_CONFIG; 2726 2727 typedef struct acpi_nhlt_gendevice_config 2728 { 2729 UINT8 VirtualSlot; 2730 UINT8 ConfigType; 2731 2732 } ACPI_NHLT_GENDEVICE_CONFIG; 2733 2734 /* Values for ConfigType field above */ 2735 2736 #define ACPI_NHLT_CONFIGTYPE_GENERIC 0 2737 #define ACPI_NHLT_CONFIGTYPE_MICARRAY 1 2738 2739 typedef struct acpi_nhlt_micdevice_config 2740 { 2741 UINT8 VirtualSlot; 2742 UINT8 ConfigType; 2743 UINT8 ArrayType; 2744 2745 } ACPI_NHLT_MICDEVICE_CONFIG; 2746 2747 /* Values for ArrayType field above */ 2748 2749 #define ACPI_NHLT_ARRAYTYPE_LINEAR2_SMALL 0xA 2750 #define ACPI_NHLT_ARRAYTYPE_LINEAR2_BIG 0xB 2751 #define ACPI_NHLT_ARRAYTYPE_LINEAR4_GEO1 0xC 2752 #define ACPI_NHLT_ARRAYTYPE_PLANAR4_LSHAPED 0xD 2753 #define ACPI_NHLT_ARRAYTYPE_LINEAR4_GEO2 0xE 2754 #define ACPI_NHLT_ARRAYTYPE_VENDOR 0xF 2755 2756 typedef struct acpi_nhlt_vendor_mic_config 2757 { 2758 UINT8 Type; 2759 UINT8 Panel; 2760 UINT16 SpeakerPositionDistance; /* mm */ 2761 UINT16 HorizontalOffset; /* mm */ 2762 UINT16 VerticalOffset; /* mm */ 2763 UINT8 FrequencyLowBand; /* 5*Hz */ 2764 UINT8 FrequencyHighBand; /* 500*Hz */ 2765 UINT16 DirectionAngle; /* -180 - +180 */ 2766 UINT16 ElevationAngle; /* -180 - +180 */ 2767 UINT16 WorkVerticalAngleBegin; /* -180 - +180 with 2 deg step */ 2768 UINT16 WorkVerticalAngleEnd; /* -180 - +180 with 2 deg step */ 2769 UINT16 WorkHorizontalAngleBegin; /* -180 - +180 with 2 deg step */ 2770 UINT16 WorkHorizontalAngleEnd; /* -180 - +180 with 2 deg step */ 2771 2772 } ACPI_NHLT_VENDOR_MIC_CONFIG; 2773 2774 /* Values for Type field above */ 2775 2776 #define ACPI_NHLT_MICTYPE_OMNIDIRECTIONAL 0 2777 #define ACPI_NHLT_MICTYPE_SUBCARDIOID 1 2778 #define ACPI_NHLT_MICTYPE_CARDIOID 2 2779 #define ACPI_NHLT_MICTYPE_SUPERCARDIOID 3 2780 #define ACPI_NHLT_MICTYPE_HYPERCARDIOID 4 2781 #define ACPI_NHLT_MICTYPE_8SHAPED 5 2782 #define ACPI_NHLT_MICTYPE_RESERVED 6 2783 #define ACPI_NHLT_MICTYPE_VENDORDEFINED 7 2784 2785 /* Values for Panel field above */ 2786 2787 #define ACPI_NHLT_MICLOCATION_TOP 0 2788 #define ACPI_NHLT_MICLOCATION_BOTTOM 1 2789 #define ACPI_NHLT_MICLOCATION_LEFT 2 2790 #define ACPI_NHLT_MICLOCATION_RIGHT 3 2791 #define ACPI_NHLT_MICLOCATION_FRONT 4 2792 #define ACPI_NHLT_MICLOCATION_REAR 5 2793 2794 typedef struct acpi_nhlt_vendor_micdevice_config 2795 { 2796 UINT8 VirtualSlot; 2797 UINT8 ConfigType; 2798 UINT8 ArrayType; 2799 UINT8 MicsCount; 2800 ACPI_NHLT_VENDOR_MIC_CONFIG Mics[]; 2801 2802 } ACPI_NHLT_VENDOR_MICDEVICE_CONFIG; 2803 2804 typedef union acpi_nhlt_device_config 2805 { 2806 UINT8 VirtualSlot; 2807 ACPI_NHLT_GENDEVICE_CONFIG Gen; 2808 ACPI_NHLT_MICDEVICE_CONFIG Mic; 2809 ACPI_NHLT_VENDOR_MICDEVICE_CONFIG VendorMic; 2810 2811 } ACPI_NHLT_DEVICE_CONFIG; 2812 2813 /* Inherited from Microsoft's WAVEFORMATEXTENSIBLE. */ 2814 typedef struct acpi_nhlt_wave_formatext 2815 { 2816 UINT16 FormatTag; 2817 UINT16 ChannelCount; 2818 UINT32 SamplesPerSec; 2819 UINT32 AvgBytesPerSec; 2820 UINT16 BlockAlign; 2821 UINT16 BitsPerSample; 2822 UINT16 ExtraFormatSize; 2823 UINT16 ValidBitsPerSample; 2824 UINT32 ChannelMask; 2825 UINT8 Subformat[16]; 2826 2827 } ACPI_NHLT_WAVE_FORMATEXT; 2828 2829 typedef struct acpi_nhlt_format_config 2830 { 2831 ACPI_NHLT_WAVE_FORMATEXT Format; 2832 ACPI_NHLT_CONFIG Config; 2833 2834 } ACPI_NHLT_FORMAT_CONFIG; 2835 2836 typedef struct acpi_nhlt_formats_config 2837 { 2838 UINT8 FormatsCount; 2839 ACPI_NHLT_FORMAT_CONFIG Formats[]; 2840 2841 } ACPI_NHLT_FORMATS_CONFIG; 2842 2843 typedef struct acpi_nhlt_device_info 2844 { 2845 UINT8 Id[16]; 2846 UINT8 InstanceId; 2847 UINT8 PortId; 2848 2849 } ACPI_NHLT_DEVICE_INFO; 2850 2851 typedef struct acpi_nhlt_devices_info 2852 { 2853 UINT8 DevicesCount; 2854 ACPI_NHLT_DEVICE_INFO Devices[]; 2855 2856 } ACPI_NHLT_DEVICES_INFO; 2857 2858 2859 /******************************************************************************* 2860 * 2861 * PCCT - Platform Communications Channel Table (ACPI 5.0) 2862 * Version 2 (ACPI 6.2) 2863 * 2864 ******************************************************************************/ 2865 2866 typedef struct acpi_table_pcct 2867 { 2868 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 2869 UINT32 Flags; 2870 UINT64 Reserved; 2871 2872 } ACPI_TABLE_PCCT; 2873 2874 /* Values for Flags field above */ 2875 2876 #define ACPI_PCCT_DOORBELL 1 2877 2878 /* Values for subtable type in ACPI_SUBTABLE_HEADER */ 2879 2880 enum AcpiPcctType 2881 { 2882 ACPI_PCCT_TYPE_GENERIC_SUBSPACE = 0, 2883 ACPI_PCCT_TYPE_HW_REDUCED_SUBSPACE = 1, 2884 ACPI_PCCT_TYPE_HW_REDUCED_SUBSPACE_TYPE2 = 2, /* ACPI 6.1 */ 2885 ACPI_PCCT_TYPE_EXT_PCC_MASTER_SUBSPACE = 3, /* ACPI 6.2 */ 2886 ACPI_PCCT_TYPE_EXT_PCC_SLAVE_SUBSPACE = 4, /* ACPI 6.2 */ 2887 ACPI_PCCT_TYPE_HW_REG_COMM_SUBSPACE = 5, /* ACPI 6.4 */ 2888 ACPI_PCCT_TYPE_RESERVED = 6 /* 6 and greater are reserved */ 2889 }; 2890 2891 /* 2892 * PCCT Subtables, correspond to Type in ACPI_SUBTABLE_HEADER 2893 */ 2894 2895 /* 0: Generic Communications Subspace */ 2896 2897 typedef struct acpi_pcct_subspace 2898 { 2899 ACPI_SUBTABLE_HEADER Header; 2900 UINT8 Reserved[6]; 2901 UINT64 BaseAddress; 2902 UINT64 Length; 2903 ACPI_GENERIC_ADDRESS DoorbellRegister; 2904 UINT64 PreserveMask; 2905 UINT64 WriteMask; 2906 UINT32 Latency; 2907 UINT32 MaxAccessRate; 2908 UINT16 MinTurnaroundTime; 2909 2910 } ACPI_PCCT_SUBSPACE; 2911 2912 2913 /* 1: HW-reduced Communications Subspace (ACPI 5.1) */ 2914 2915 typedef struct acpi_pcct_hw_reduced 2916 { 2917 ACPI_SUBTABLE_HEADER Header; 2918 UINT32 PlatformInterrupt; 2919 UINT8 Flags; 2920 UINT8 Reserved; 2921 UINT64 BaseAddress; 2922 UINT64 Length; 2923 ACPI_GENERIC_ADDRESS DoorbellRegister; 2924 UINT64 PreserveMask; 2925 UINT64 WriteMask; 2926 UINT32 Latency; 2927 UINT32 MaxAccessRate; 2928 UINT16 MinTurnaroundTime; 2929 2930 } ACPI_PCCT_HW_REDUCED; 2931 2932 2933 /* 2: HW-reduced Communications Subspace Type 2 (ACPI 6.1) */ 2934 2935 typedef struct acpi_pcct_hw_reduced_type2 2936 { 2937 ACPI_SUBTABLE_HEADER Header; 2938 UINT32 PlatformInterrupt; 2939 UINT8 Flags; 2940 UINT8 Reserved; 2941 UINT64 BaseAddress; 2942 UINT64 Length; 2943 ACPI_GENERIC_ADDRESS DoorbellRegister; 2944 UINT64 PreserveMask; 2945 UINT64 WriteMask; 2946 UINT32 Latency; 2947 UINT32 MaxAccessRate; 2948 UINT16 MinTurnaroundTime; 2949 ACPI_GENERIC_ADDRESS PlatformAckRegister; 2950 UINT64 AckPreserveMask; 2951 UINT64 AckWriteMask; 2952 2953 } ACPI_PCCT_HW_REDUCED_TYPE2; 2954 2955 2956 /* 3: Extended PCC Master Subspace Type 3 (ACPI 6.2) */ 2957 2958 typedef struct acpi_pcct_ext_pcc_master 2959 { 2960 ACPI_SUBTABLE_HEADER Header; 2961 UINT32 PlatformInterrupt; 2962 UINT8 Flags; 2963 UINT8 Reserved1; 2964 UINT64 BaseAddress; 2965 UINT32 Length; 2966 ACPI_GENERIC_ADDRESS DoorbellRegister; 2967 UINT64 PreserveMask; 2968 UINT64 WriteMask; 2969 UINT32 Latency; 2970 UINT32 MaxAccessRate; 2971 UINT32 MinTurnaroundTime; 2972 ACPI_GENERIC_ADDRESS PlatformAckRegister; 2973 UINT64 AckPreserveMask; 2974 UINT64 AckSetMask; 2975 UINT64 Reserved2; 2976 ACPI_GENERIC_ADDRESS CmdCompleteRegister; 2977 UINT64 CmdCompleteMask; 2978 ACPI_GENERIC_ADDRESS CmdUpdateRegister; 2979 UINT64 CmdUpdatePreserveMask; 2980 UINT64 CmdUpdateSetMask; 2981 ACPI_GENERIC_ADDRESS ErrorStatusRegister; 2982 UINT64 ErrorStatusMask; 2983 2984 } ACPI_PCCT_EXT_PCC_MASTER; 2985 2986 2987 /* 4: Extended PCC Slave Subspace Type 4 (ACPI 6.2) */ 2988 2989 typedef struct acpi_pcct_ext_pcc_slave 2990 { 2991 ACPI_SUBTABLE_HEADER Header; 2992 UINT32 PlatformInterrupt; 2993 UINT8 Flags; 2994 UINT8 Reserved1; 2995 UINT64 BaseAddress; 2996 UINT32 Length; 2997 ACPI_GENERIC_ADDRESS DoorbellRegister; 2998 UINT64 PreserveMask; 2999 UINT64 WriteMask; 3000 UINT32 Latency; 3001 UINT32 MaxAccessRate; 3002 UINT32 MinTurnaroundTime; 3003 ACPI_GENERIC_ADDRESS PlatformAckRegister; 3004 UINT64 AckPreserveMask; 3005 UINT64 AckSetMask; 3006 UINT64 Reserved2; 3007 ACPI_GENERIC_ADDRESS CmdCompleteRegister; 3008 UINT64 CmdCompleteMask; 3009 ACPI_GENERIC_ADDRESS CmdUpdateRegister; 3010 UINT64 CmdUpdatePreserveMask; 3011 UINT64 CmdUpdateSetMask; 3012 ACPI_GENERIC_ADDRESS ErrorStatusRegister; 3013 UINT64 ErrorStatusMask; 3014 3015 } ACPI_PCCT_EXT_PCC_SLAVE; 3016 3017 /* 5: HW Registers based Communications Subspace */ 3018 3019 typedef struct acpi_pcct_hw_reg 3020 { 3021 ACPI_SUBTABLE_HEADER Header; 3022 UINT16 Version; 3023 UINT64 BaseAddress; 3024 UINT64 Length; 3025 ACPI_GENERIC_ADDRESS DoorbellRegister; 3026 UINT64 DoorbellPreserve; 3027 UINT64 DoorbellWrite; 3028 ACPI_GENERIC_ADDRESS CmdCompleteRegister; 3029 UINT64 CmdCompleteMask; 3030 ACPI_GENERIC_ADDRESS ErrorStatusRegister; 3031 UINT64 ErrorStatusMask; 3032 UINT32 NominalLatency; 3033 UINT32 MinTurnaroundTime; 3034 3035 } ACPI_PCCT_HW_REG; 3036 3037 3038 /* Values for doorbell flags above */ 3039 3040 #define ACPI_PCCT_INTERRUPT_POLARITY (1) 3041 #define ACPI_PCCT_INTERRUPT_MODE (1<<1) 3042 3043 3044 /* 3045 * PCC memory structures (not part of the ACPI table) 3046 */ 3047 3048 /* Shared Memory Region */ 3049 3050 typedef struct acpi_pcct_shared_memory 3051 { 3052 UINT32 Signature; 3053 UINT16 Command; 3054 UINT16 Status; 3055 3056 } ACPI_PCCT_SHARED_MEMORY; 3057 3058 3059 /* Extended PCC Subspace Shared Memory Region (ACPI 6.2) */ 3060 3061 typedef struct acpi_pcct_ext_pcc_shared_memory 3062 { 3063 UINT32 Signature; 3064 UINT32 Flags; 3065 UINT32 Length; 3066 UINT32 Command; 3067 3068 } ACPI_PCCT_EXT_PCC_SHARED_MEMORY; 3069 3070 3071 /******************************************************************************* 3072 * 3073 * PDTT - Platform Debug Trigger Table (ACPI 6.2) 3074 * Version 0 3075 * 3076 ******************************************************************************/ 3077 3078 typedef struct acpi_table_pdtt 3079 { 3080 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 3081 UINT8 TriggerCount; 3082 UINT8 Reserved[3]; 3083 UINT32 ArrayOffset; 3084 3085 } ACPI_TABLE_PDTT; 3086 3087 3088 /* 3089 * PDTT Communication Channel Identifier Structure. 3090 * The number of these structures is defined by TriggerCount above, 3091 * starting at ArrayOffset. 3092 */ 3093 typedef struct acpi_pdtt_channel 3094 { 3095 UINT8 SubchannelId; 3096 UINT8 Flags; 3097 3098 } ACPI_PDTT_CHANNEL; 3099 3100 /* Flags for above */ 3101 3102 #define ACPI_PDTT_RUNTIME_TRIGGER (1) 3103 #define ACPI_PDTT_WAIT_COMPLETION (1<<1) 3104 #define ACPI_PDTT_TRIGGER_ORDER (1<<2) 3105 3106 3107 /******************************************************************************* 3108 * 3109 * PHAT - Platform Health Assessment Table (ACPI 6.4) 3110 * Version 1 3111 * 3112 ******************************************************************************/ 3113 3114 typedef struct acpi_table_phat 3115 { 3116 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 3117 3118 } ACPI_TABLE_PHAT; 3119 3120 /* Common header for PHAT subtables that follow main table */ 3121 3122 typedef struct acpi_phat_header 3123 { 3124 UINT16 Type; 3125 UINT16 Length; 3126 UINT8 Revision; 3127 3128 } ACPI_PHAT_HEADER; 3129 3130 3131 /* Values for Type field above */ 3132 3133 #define ACPI_PHAT_TYPE_FW_VERSION_DATA 0 3134 #define ACPI_PHAT_TYPE_FW_HEALTH_DATA 1 3135 #define ACPI_PHAT_TYPE_RESERVED 2 /* 0x02-0xFFFF are reserved */ 3136 3137 /* 3138 * PHAT subtables, correspond to Type in ACPI_PHAT_HEADER 3139 */ 3140 3141 /* 0: Firmware Version Data Record */ 3142 3143 typedef struct acpi_phat_version_data 3144 { 3145 ACPI_PHAT_HEADER Header; 3146 UINT8 Reserved[3]; 3147 UINT32 ElementCount; 3148 3149 } ACPI_PHAT_VERSION_DATA; 3150 3151 typedef struct acpi_phat_version_element 3152 { 3153 UINT8 Guid[16]; 3154 UINT64 VersionValue; 3155 UINT32 ProducerId; 3156 3157 } ACPI_PHAT_VERSION_ELEMENT; 3158 3159 3160 /* 1: Firmware Health Data Record */ 3161 3162 typedef struct acpi_phat_health_data 3163 { 3164 ACPI_PHAT_HEADER Header; 3165 UINT8 Reserved[2]; 3166 UINT8 Health; 3167 UINT8 DeviceGuid[16]; 3168 UINT32 DeviceSpecificOffset; /* Zero if no Device-specific data */ 3169 3170 } ACPI_PHAT_HEALTH_DATA; 3171 3172 /* Values for Health field above */ 3173 3174 #define ACPI_PHAT_ERRORS_FOUND 0 3175 #define ACPI_PHAT_NO_ERRORS 1 3176 #define ACPI_PHAT_UNKNOWN_ERRORS 2 3177 #define ACPI_PHAT_ADVISORY 3 3178 3179 3180 /******************************************************************************* 3181 * 3182 * PMTT - Platform Memory Topology Table (ACPI 5.0) 3183 * Version 1 3184 * 3185 ******************************************************************************/ 3186 3187 typedef struct acpi_table_pmtt 3188 { 3189 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 3190 UINT32 MemoryDeviceCount; 3191 /* 3192 * Immediately followed by: 3193 * MEMORY_DEVICE MemoryDeviceStruct[MemoryDeviceCount]; 3194 */ 3195 3196 } ACPI_TABLE_PMTT; 3197 3198 3199 /* Common header for PMTT subtables that follow main table */ 3200 3201 typedef struct acpi_pmtt_header 3202 { 3203 UINT8 Type; 3204 UINT8 Reserved1; 3205 UINT16 Length; 3206 UINT16 Flags; 3207 UINT16 Reserved2; 3208 UINT32 MemoryDeviceCount; /* Zero means no memory device structs follow */ 3209 /* 3210 * Immediately followed by: 3211 * UINT8 TypeSpecificData[] 3212 * MEMORY_DEVICE MemoryDeviceStruct[MemoryDeviceCount]; 3213 */ 3214 3215 } ACPI_PMTT_HEADER; 3216 3217 /* Values for Type field above */ 3218 3219 #define ACPI_PMTT_TYPE_SOCKET 0 3220 #define ACPI_PMTT_TYPE_CONTROLLER 1 3221 #define ACPI_PMTT_TYPE_DIMM 2 3222 #define ACPI_PMTT_TYPE_RESERVED 3 /* 0x03-0xFE are reserved */ 3223 #define ACPI_PMTT_TYPE_VENDOR 0xFF 3224 3225 /* Values for Flags field above */ 3226 3227 #define ACPI_PMTT_TOP_LEVEL 0x0001 3228 #define ACPI_PMTT_PHYSICAL 0x0002 3229 #define ACPI_PMTT_MEMORY_TYPE 0x000C 3230 3231 3232 /* 3233 * PMTT subtables, correspond to Type in acpi_pmtt_header 3234 */ 3235 3236 3237 /* 0: Socket Structure */ 3238 3239 typedef struct acpi_pmtt_socket 3240 { 3241 ACPI_PMTT_HEADER Header; 3242 UINT16 SocketId; 3243 UINT16 Reserved; 3244 3245 } ACPI_PMTT_SOCKET; 3246 /* 3247 * Immediately followed by: 3248 * MEMORY_DEVICE MemoryDeviceStruct[MemoryDeviceCount]; 3249 */ 3250 3251 3252 /* 1: Memory Controller subtable */ 3253 3254 typedef struct acpi_pmtt_controller 3255 { 3256 ACPI_PMTT_HEADER Header; 3257 UINT16 ControllerId; 3258 UINT16 Reserved; 3259 3260 } ACPI_PMTT_CONTROLLER; 3261 /* 3262 * Immediately followed by: 3263 * MEMORY_DEVICE MemoryDeviceStruct[MemoryDeviceCount]; 3264 */ 3265 3266 3267 /* 2: Physical Component Identifier (DIMM) */ 3268 3269 typedef struct acpi_pmtt_physical_component 3270 { 3271 ACPI_PMTT_HEADER Header; 3272 UINT32 BiosHandle; 3273 3274 } ACPI_PMTT_PHYSICAL_COMPONENT; 3275 3276 3277 /* 0xFF: Vendor Specific Data */ 3278 3279 typedef struct acpi_pmtt_vendor_specific 3280 { 3281 ACPI_PMTT_HEADER Header; 3282 UINT8 TypeUuid[16]; 3283 UINT8 Specific[]; 3284 /* 3285 * Immediately followed by: 3286 * UINT8 VendorSpecificData[]; 3287 * MEMORY_DEVICE MemoryDeviceStruct[MemoryDeviceCount]; 3288 */ 3289 3290 } ACPI_PMTT_VENDOR_SPECIFIC; 3291 3292 3293 /******************************************************************************* 3294 * 3295 * PPTT - Processor Properties Topology Table (ACPI 6.2) 3296 * Version 1 3297 * 3298 ******************************************************************************/ 3299 3300 typedef struct acpi_table_pptt 3301 { 3302 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 3303 3304 } ACPI_TABLE_PPTT; 3305 3306 /* Values for Type field above */ 3307 3308 enum AcpiPpttType 3309 { 3310 ACPI_PPTT_TYPE_PROCESSOR = 0, 3311 ACPI_PPTT_TYPE_CACHE = 1, 3312 ACPI_PPTT_TYPE_ID = 2, 3313 ACPI_PPTT_TYPE_RESERVED = 3 3314 }; 3315 3316 3317 /* 0: Processor Hierarchy Node Structure */ 3318 3319 typedef struct acpi_pptt_processor 3320 { 3321 ACPI_SUBTABLE_HEADER Header; 3322 UINT16 Reserved; 3323 UINT32 Flags; 3324 UINT32 Parent; 3325 UINT32 AcpiProcessorId; 3326 UINT32 NumberOfPrivResources; 3327 3328 } ACPI_PPTT_PROCESSOR; 3329 3330 /* Flags */ 3331 3332 #define ACPI_PPTT_PHYSICAL_PACKAGE (1) 3333 #define ACPI_PPTT_ACPI_PROCESSOR_ID_VALID (1<<1) 3334 #define ACPI_PPTT_ACPI_PROCESSOR_IS_THREAD (1<<2) /* ACPI 6.3 */ 3335 #define ACPI_PPTT_ACPI_LEAF_NODE (1<<3) /* ACPI 6.3 */ 3336 #define ACPI_PPTT_ACPI_IDENTICAL (1<<4) /* ACPI 6.3 */ 3337 3338 3339 /* 1: Cache Type Structure */ 3340 3341 typedef struct acpi_pptt_cache 3342 { 3343 ACPI_SUBTABLE_HEADER Header; 3344 UINT16 Reserved; 3345 UINT32 Flags; 3346 UINT32 NextLevelOfCache; 3347 UINT32 Size; 3348 UINT32 NumberOfSets; 3349 UINT8 Associativity; 3350 UINT8 Attributes; 3351 UINT16 LineSize; 3352 3353 } ACPI_PPTT_CACHE; 3354 3355 /* 1: Cache Type Structure for PPTT version 3 */ 3356 3357 typedef struct acpi_pptt_cache_v1 3358 { 3359 UINT32 CacheId; 3360 3361 } ACPI_PPTT_CACHE_V1; 3362 3363 3364 /* Flags */ 3365 3366 #define ACPI_PPTT_SIZE_PROPERTY_VALID (1) /* Physical property valid */ 3367 #define ACPI_PPTT_NUMBER_OF_SETS_VALID (1<<1) /* Number of sets valid */ 3368 #define ACPI_PPTT_ASSOCIATIVITY_VALID (1<<2) /* Associativity valid */ 3369 #define ACPI_PPTT_ALLOCATION_TYPE_VALID (1<<3) /* Allocation type valid */ 3370 #define ACPI_PPTT_CACHE_TYPE_VALID (1<<4) /* Cache type valid */ 3371 #define ACPI_PPTT_WRITE_POLICY_VALID (1<<5) /* Write policy valid */ 3372 #define ACPI_PPTT_LINE_SIZE_VALID (1<<6) /* Line size valid */ 3373 #define ACPI_PPTT_CACHE_ID_VALID (1<<7) /* Cache ID valid */ 3374 3375 /* Masks for Attributes */ 3376 3377 #define ACPI_PPTT_MASK_ALLOCATION_TYPE (0x03) /* Allocation type */ 3378 #define ACPI_PPTT_MASK_CACHE_TYPE (0x0C) /* Cache type */ 3379 #define ACPI_PPTT_MASK_WRITE_POLICY (0x10) /* Write policy */ 3380 3381 /* Attributes describing cache */ 3382 #define ACPI_PPTT_CACHE_READ_ALLOCATE (0x0) /* Cache line is allocated on read */ 3383 #define ACPI_PPTT_CACHE_WRITE_ALLOCATE (0x01) /* Cache line is allocated on write */ 3384 #define ACPI_PPTT_CACHE_RW_ALLOCATE (0x02) /* Cache line is allocated on read and write */ 3385 #define ACPI_PPTT_CACHE_RW_ALLOCATE_ALT (0x03) /* Alternate representation of above */ 3386 3387 #define ACPI_PPTT_CACHE_TYPE_DATA (0x0) /* Data cache */ 3388 #define ACPI_PPTT_CACHE_TYPE_INSTR (1<<2) /* Instruction cache */ 3389 #define ACPI_PPTT_CACHE_TYPE_UNIFIED (2<<2) /* Unified I & D cache */ 3390 #define ACPI_PPTT_CACHE_TYPE_UNIFIED_ALT (3<<2) /* Alternate representation of above */ 3391 3392 #define ACPI_PPTT_CACHE_POLICY_WB (0x0) /* Cache is write back */ 3393 #define ACPI_PPTT_CACHE_POLICY_WT (1<<4) /* Cache is write through */ 3394 3395 /* 2: ID Structure */ 3396 3397 typedef struct acpi_pptt_id 3398 { 3399 ACPI_SUBTABLE_HEADER Header; 3400 UINT16 Reserved; 3401 UINT32 VendorId; 3402 UINT64 Level1Id; 3403 UINT64 Level2Id; 3404 UINT16 MajorRev; 3405 UINT16 MinorRev; 3406 UINT16 SpinRev; 3407 3408 } ACPI_PPTT_ID; 3409 3410 3411 /******************************************************************************* 3412 * 3413 * PRMT - Platform Runtime Mechanism Table 3414 * Version 1 3415 * 3416 ******************************************************************************/ 3417 3418 typedef struct acpi_table_prmt 3419 { 3420 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 3421 3422 } ACPI_TABLE_PRMT; 3423 3424 typedef struct acpi_table_prmt_header 3425 { 3426 UINT8 PlatformGuid[16]; 3427 UINT32 ModuleInfoOffset; 3428 UINT32 ModuleInfoCount; 3429 3430 } ACPI_TABLE_PRMT_HEADER; 3431 3432 typedef struct acpi_prmt_module_header 3433 { 3434 UINT16 Revision; 3435 UINT16 Length; 3436 3437 } ACPI_PRMT_MODULE_HEADER; 3438 3439 typedef struct acpi_prmt_module_info 3440 { 3441 UINT16 Revision; 3442 UINT16 Length; 3443 UINT8 ModuleGuid[16]; 3444 UINT16 MajorRev; 3445 UINT16 MinorRev; 3446 UINT16 HandlerInfoCount; 3447 UINT32 HandlerInfoOffset; 3448 UINT64 MmioListPointer; 3449 3450 } ACPI_PRMT_MODULE_INFO; 3451 3452 typedef struct acpi_prmt_handler_info 3453 { 3454 UINT16 Revision; 3455 UINT16 Length; 3456 UINT8 HandlerGuid[16]; 3457 UINT64 HandlerAddress; 3458 UINT64 StaticDataBufferAddress; 3459 UINT64 AcpiParamBufferAddress; 3460 3461 } ACPI_PRMT_HANDLER_INFO; 3462 3463 3464 /******************************************************************************* 3465 * 3466 * RASF - RAS Feature Table (ACPI 5.0) 3467 * Version 1 3468 * 3469 ******************************************************************************/ 3470 3471 typedef struct acpi_table_rasf 3472 { 3473 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 3474 UINT8 ChannelId[12]; 3475 3476 } ACPI_TABLE_RASF; 3477 3478 /* RASF Platform Communication Channel Shared Memory Region */ 3479 3480 typedef struct acpi_rasf_shared_memory 3481 { 3482 UINT32 Signature; 3483 UINT16 Command; 3484 UINT16 Status; 3485 UINT16 Version; 3486 UINT8 Capabilities[16]; 3487 UINT8 SetCapabilities[16]; 3488 UINT16 NumParameterBlocks; 3489 UINT32 SetCapabilitiesStatus; 3490 3491 } ACPI_RASF_SHARED_MEMORY; 3492 3493 /* RASF Parameter Block Structure Header */ 3494 3495 typedef struct acpi_rasf_parameter_block 3496 { 3497 UINT16 Type; 3498 UINT16 Version; 3499 UINT16 Length; 3500 3501 } ACPI_RASF_PARAMETER_BLOCK; 3502 3503 /* RASF Parameter Block Structure for PATROL_SCRUB */ 3504 3505 typedef struct acpi_rasf_patrol_scrub_parameter 3506 { 3507 ACPI_RASF_PARAMETER_BLOCK Header; 3508 UINT16 PatrolScrubCommand; 3509 UINT64 RequestedAddressRange[2]; 3510 UINT64 ActualAddressRange[2]; 3511 UINT16 Flags; 3512 UINT8 RequestedSpeed; 3513 3514 } ACPI_RASF_PATROL_SCRUB_PARAMETER; 3515 3516 /* Masks for Flags and Speed fields above */ 3517 3518 #define ACPI_RASF_SCRUBBER_RUNNING 1 3519 #define ACPI_RASF_SPEED (7<<1) 3520 #define ACPI_RASF_SPEED_SLOW (0<<1) 3521 #define ACPI_RASF_SPEED_MEDIUM (4<<1) 3522 #define ACPI_RASF_SPEED_FAST (7<<1) 3523 3524 /* Channel Commands */ 3525 3526 enum AcpiRasfCommands 3527 { 3528 ACPI_RASF_EXECUTE_RASF_COMMAND = 1 3529 }; 3530 3531 /* Platform RAS Capabilities */ 3532 3533 enum AcpiRasfCapabiliities 3534 { 3535 ACPI_HW_PATROL_SCRUB_SUPPORTED = 0, 3536 ACPI_SW_PATROL_SCRUB_EXPOSED = 1 3537 }; 3538 3539 /* Patrol Scrub Commands */ 3540 3541 enum AcpiRasfPatrolScrubCommands 3542 { 3543 ACPI_RASF_GET_PATROL_PARAMETERS = 1, 3544 ACPI_RASF_START_PATROL_SCRUBBER = 2, 3545 ACPI_RASF_STOP_PATROL_SCRUBBER = 3 3546 }; 3547 3548 /* Channel Command flags */ 3549 3550 #define ACPI_RASF_GENERATE_SCI (1<<15) 3551 3552 /* Status values */ 3553 3554 enum AcpiRasfStatus 3555 { 3556 ACPI_RASF_SUCCESS = 0, 3557 ACPI_RASF_NOT_VALID = 1, 3558 ACPI_RASF_NOT_SUPPORTED = 2, 3559 ACPI_RASF_BUSY = 3, 3560 ACPI_RASF_FAILED = 4, 3561 ACPI_RASF_ABORTED = 5, 3562 ACPI_RASF_INVALID_DATA = 6 3563 }; 3564 3565 /* Status flags */ 3566 3567 #define ACPI_RASF_COMMAND_COMPLETE (1) 3568 #define ACPI_RASF_SCI_DOORBELL (1<<1) 3569 #define ACPI_RASF_ERROR (1<<2) 3570 #define ACPI_RASF_STATUS (0x1F<<3) 3571 3572 3573 /******************************************************************************* 3574 * 3575 * RAS2 - RAS2 Feature Table (ACPI 6.5) 3576 * Version 1 3577 * 3578 * 3579 ******************************************************************************/ 3580 3581 typedef struct acpi_table_ras2 { 3582 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 3583 UINT16 Reserved; 3584 UINT16 NumPccDescs; 3585 3586 } ACPI_TABLE_RAS2; 3587 3588 /* RAS2 Platform Communication Channel Descriptor */ 3589 3590 typedef struct acpi_ras2_pcc_desc { 3591 UINT8 ChannelId; 3592 UINT16 Reserved; 3593 UINT8 FeatureType; 3594 UINT32 Instance; 3595 3596 } ACPI_RAS2_PCC_DESC; 3597 3598 /* RAS2 Platform Communication Channel Shared Memory Region */ 3599 3600 typedef struct acpi_ras2_shmem { 3601 UINT32 Signature; 3602 UINT16 Command; 3603 UINT16 Status; 3604 UINT16 Version; 3605 UINT8 Features[16]; 3606 UINT8 SetCaps[16]; 3607 UINT16 NumParamBlks; 3608 UINT32 SetCapsStatus; 3609 3610 } ACPI_RAS2_SHMEM; 3611 3612 /* RAS2 Parameter Block Structure for PATROL_SCRUB */ 3613 3614 typedef struct acpi_ras2_parameter_block 3615 { 3616 UINT16 Type; 3617 UINT16 Version; 3618 UINT16 Length; 3619 3620 } ACPI_RAS2_PARAMETER_BLOCK; 3621 3622 /* RAS2 Parameter Block Structure for PATROL_SCRUB */ 3623 3624 typedef struct acpi_ras2_patrol_scrub_param { 3625 ACPI_RAS2_PARAMETER_BLOCK Header; 3626 UINT16 Command; 3627 UINT64 ReqAddrRange[2]; 3628 UINT64 ActlAddrRange[2]; 3629 UINT32 Flags; 3630 UINT32 ScrubParamsOut; 3631 UINT32 ScrubParamsIn; 3632 3633 } ACPI_RAS2_PATROL_SCRUB_PARAM; 3634 3635 /* Masks for Flags field above */ 3636 3637 #define ACPI_RAS2_SCRUBBER_RUNNING 1 3638 3639 /* RAS2 Parameter Block Structure for LA2PA_TRANSLATION */ 3640 3641 typedef struct acpi_ras2_la2pa_translation_parameter { 3642 ACPI_RAS2_PARAMETER_BLOCK Header; 3643 UINT16 AddrTranslationCommand; 3644 UINT64 SubInstId; 3645 UINT64 LogicalAddress; 3646 UINT64 PhysicalAddress; 3647 UINT32 Status; 3648 3649 } ACPI_RAS2_LA2PA_TRANSLATION_PARAM; 3650 3651 /* Channel Commands */ 3652 3653 enum AcpiRas2Commands 3654 { 3655 ACPI_RAS2_EXECUTE_RAS2_COMMAND = 1 3656 }; 3657 3658 /* Platform RAS2 Features */ 3659 3660 enum AcpiRas2Features 3661 { 3662 ACPI_RAS2_PATROL_SCRUB_SUPPORTED = 0, 3663 ACPI_RAS2_LA2PA_TRANSLATION = 1 3664 }; 3665 3666 /* RAS2 Patrol Scrub Commands */ 3667 3668 enum AcpiRas2PatrolScrubCommands 3669 { 3670 ACPI_RAS2_GET_PATROL_PARAMETERS = 1, 3671 ACPI_RAS2_START_PATROL_SCRUBBER = 2, 3672 ACPI_RAS2_STOP_PATROL_SCRUBBER = 3 3673 }; 3674 3675 /* RAS2 LA2PA Translation Commands */ 3676 3677 enum AcpiRas2La2PaTranslationCommands 3678 { 3679 ACPI_RAS2_GET_LA2PA_TRANSLATION = 1, 3680 }; 3681 3682 /* RAS2 LA2PA Translation Status values */ 3683 3684 enum AcpiRas2La2PaTranslationStatus 3685 { 3686 ACPI_RAS2_LA2PA_TRANSLATION_SUCCESS = 0, 3687 ACPI_RAS2_LA2PA_TRANSLATION_FAIL = 1, 3688 }; 3689 3690 /* Channel Command flags */ 3691 3692 #define ACPI_RAS2_GENERATE_SCI (1<<15) 3693 3694 /* Status values */ 3695 3696 enum AcpiRas2Status 3697 { 3698 ACPI_RAS2_SUCCESS = 0, 3699 ACPI_RAS2_NOT_VALID = 1, 3700 ACPI_RAS2_NOT_SUPPORTED = 2, 3701 ACPI_RAS2_BUSY = 3, 3702 ACPI_RAS2_FAILED = 4, 3703 ACPI_RAS2_ABORTED = 5, 3704 ACPI_RAS2_INVALID_DATA = 6 3705 }; 3706 3707 /* Status flags */ 3708 3709 #define ACPI_RAS2_COMMAND_COMPLETE (1) 3710 #define ACPI_RAS2_SCI_DOORBELL (1<<1) 3711 #define ACPI_RAS2_ERROR (1<<2) 3712 #define ACPI_RAS2_STATUS (0x1F<<3) 3713 3714 3715 /******************************************************************************* 3716 * 3717 * RGRT - Regulatory Graphics Resource Table 3718 * Version 1 3719 * 3720 * Conforms to "ACPI RGRT" available at: 3721 * https://microsoft.github.io/mu/dyn/mu_plus/MsCorePkg/AcpiRGRT/feature_acpi_rgrt/ 3722 * 3723 ******************************************************************************/ 3724 3725 typedef struct acpi_table_rgrt 3726 { 3727 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 3728 UINT16 Version; 3729 UINT8 ImageType; 3730 UINT8 Reserved; 3731 UINT8 Image[]; 3732 3733 } ACPI_TABLE_RGRT; 3734 3735 /* ImageType values */ 3736 3737 enum AcpiRgrtImageType 3738 { 3739 ACPI_RGRT_TYPE_RESERVED0 = 0, 3740 ACPI_RGRT_IMAGE_TYPE_PNG = 1, 3741 ACPI_RGRT_TYPE_RESERVED = 2 /* 2 and greater are reserved */ 3742 }; 3743 3744 3745 /******************************************************************************* 3746 * 3747 * RHCT - RISC-V Hart Capabilities Table 3748 * Version 1 3749 * 3750 ******************************************************************************/ 3751 3752 typedef struct acpi_table_rhct { 3753 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 3754 UINT32 Flags; /* RHCT flags */ 3755 UINT64 TimeBaseFreq; 3756 UINT32 NodeCount; 3757 UINT32 NodeOffset; 3758 } ACPI_TABLE_RHCT; 3759 3760 /* RHCT Flags */ 3761 3762 #define ACPI_RHCT_TIMER_CANNOT_WAKEUP_CPU (1) 3763 /* 3764 * RHCT subtables 3765 */ 3766 typedef struct acpi_rhct_node_header { 3767 UINT16 Type; 3768 UINT16 Length; 3769 UINT16 Revision; 3770 } ACPI_RHCT_NODE_HEADER; 3771 3772 /* Values for RHCT subtable Type above */ 3773 3774 enum acpi_rhct_node_type { 3775 ACPI_RHCT_NODE_TYPE_ISA_STRING = 0x0000, 3776 ACPI_RHCT_NODE_TYPE_CMO = 0x0001, 3777 ACPI_RHCT_NODE_TYPE_MMU = 0x0002, 3778 ACPI_RHCT_NODE_TYPE_RESERVED = 0x0003, 3779 ACPI_RHCT_NODE_TYPE_HART_INFO = 0xFFFF, 3780 }; 3781 3782 /* 3783 * RHCT node specific subtables 3784 */ 3785 3786 /* ISA string node structure */ 3787 typedef struct acpi_rhct_isa_string { 3788 UINT16 IsaLength; 3789 char Isa[]; 3790 } ACPI_RHCT_ISA_STRING; 3791 3792 typedef struct acpi_rhct_cmo_node { 3793 UINT8 Reserved; /* Must be zero */ 3794 UINT8 CbomSize; /* CBOM size in powerof 2 */ 3795 UINT8 CbopSize; /* CBOP size in powerof 2 */ 3796 UINT8 CbozSize; /* CBOZ size in powerof 2 */ 3797 } ACPI_RHCT_CMO_NODE; 3798 3799 typedef struct acpi_rhct_mmu_node { 3800 UINT8 Reserved; /* Must be zero */ 3801 UINT8 MmuType; /* Virtual Address Scheme */ 3802 } ACPI_RHCT_MMU_NODE; 3803 3804 enum acpi_rhct_mmu_type { 3805 ACPI_RHCT_MMU_TYPE_SV39 = 0, 3806 ACPI_RHCT_MMU_TYPE_SV48 = 1, 3807 ACPI_RHCT_MMU_TYPE_SV57 = 2 3808 }; 3809 3810 /* Hart Info node structure */ 3811 typedef struct acpi_rhct_hart_info { 3812 UINT16 NumOffsets; 3813 UINT32 Uid; /* ACPI processor UID */ 3814 } ACPI_RHCT_HART_INFO; 3815 3816 /******************************************************************************* 3817 * 3818 * RIMT - RISC-V IO Remapping Table 3819 * 3820 * https://github.com/riscv-non-isa/riscv-acpi-rimt 3821 * 3822 ******************************************************************************/ 3823 3824 typedef struct acpi_table_rimt { 3825 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 3826 UINT32 NumNodes; /* Number of RIMT Nodes */ 3827 UINT32 NodeOffset; /* Offset to RIMT Node Array */ 3828 UINT32 Reserved; 3829 } ACPI_TABLE_RIMT; 3830 3831 typedef struct acpi_rimt_node { 3832 UINT8 Type; 3833 UINT8 Revision; 3834 UINT16 Length; 3835 UINT16 Reserved; 3836 UINT16 Id; 3837 char NodeData[]; 3838 } ACPI_RIMT_NODE; 3839 3840 enum acpi_rimt_node_type { 3841 ACPI_RIMT_NODE_TYPE_IOMMU = 0x0, 3842 ACPI_RIMT_NODE_TYPE_PCIE_ROOT_COMPLEX = 0x1, 3843 ACPI_RIMT_NODE_TYPE_PLAT_DEVICE = 0x2, 3844 }; 3845 3846 typedef struct acpi_rimt_iommu { 3847 UINT8 HardwareId[8]; /* Hardware ID */ 3848 UINT64 BaseAddress; /* Base Address */ 3849 UINT32 Flags; /* Flags */ 3850 UINT32 ProximityDomain; /* Proximity Domain */ 3851 UINT16 PcieSegmentNumber; /* PCIe Segment number */ 3852 UINT16 PcieBdf; /* PCIe B/D/F */ 3853 UINT16 NumInterruptWires; /* Number of interrupt wires */ 3854 UINT16 InterruptWireOffset; /* Interrupt wire array offset */ 3855 UINT64 InterruptWire[]; /* Interrupt wire array */ 3856 } ACPI_RIMT_IOMMU; 3857 3858 /* IOMMU Node Flags */ 3859 #define ACPI_RIMT_IOMMU_FLAGS_PCIE (1) 3860 #define ACPI_RIMT_IOMMU_FLAGS_PXM_VALID (1 << 1) 3861 3862 /* Interrupt Wire Structure */ 3863 typedef struct acpi_rimt_iommu_wire_gsi { 3864 UINT32 IrqNum; /* Interrupt Number */ 3865 UINT32 Flags; /* Flags */ 3866 } ACPI_RIMT_IOMMU_WIRE_GSI; 3867 3868 /* Interrupt Wire Flags */ 3869 #define ACPI_RIMT_GSI_LEVEL_TRIGGERRED (1) 3870 #define ACPI_RIMT_GSI_ACTIVE_HIGH (1 << 1) 3871 3872 typedef struct acpi_rimt_id_mapping { 3873 UINT32 SourceIdBase; /* Source ID Base */ 3874 UINT32 NumIds; /* Number of IDs */ 3875 UINT32 DestIdBase; /* Destination Device ID Base */ 3876 UINT32 DestOffset; /* Destination IOMMU Offset */ 3877 UINT32 Flags; /* Flags */ 3878 } ACPI_RIMT_ID_MAPPING; 3879 3880 typedef struct acpi_rimt_pcie_rc { 3881 UINT32 Flags; /* Flags */ 3882 UINT16 Reserved; /* Reserved */ 3883 UINT16 PcieSegmentNumber; /* PCIe Segment number */ 3884 UINT16 IdMappingOffset; /* ID mapping array offset */ 3885 UINT16 NumIdMappings; /* Number of ID mappings */ 3886 } ACPI_RIMT_PCIE_RC; 3887 3888 /* PCIe Root Complex Node Flags */ 3889 #define ACPI_RIMT_PCIE_ATS_SUPPORTED (1) 3890 #define ACPI_RIMT_PCIE_PRI_SUPPORTED (1 << 1) 3891 3892 typedef struct acpi_rimt_platform_device { 3893 UINT16 IdMappingOffset; /* ID Mapping array offset */ 3894 UINT16 NumIdMappings; /* Number of ID mappings */ 3895 char DeviceName[]; /* Device Object Name */ 3896 } ACPI_RIMT_PLATFORM_DEVICE; 3897 3898 3899 /******************************************************************************* 3900 * 3901 * SBST - Smart Battery Specification Table 3902 * Version 1 3903 * 3904 ******************************************************************************/ 3905 3906 typedef struct acpi_table_sbst 3907 { 3908 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 3909 UINT32 WarningLevel; 3910 UINT32 LowLevel; 3911 UINT32 CriticalLevel; 3912 3913 } ACPI_TABLE_SBST; 3914 3915 3916 /******************************************************************************* 3917 * 3918 * SDEI - Software Delegated Exception Interface Descriptor Table 3919 * 3920 * Conforms to "Software Delegated Exception Interface (SDEI)" ARM DEN0054A, 3921 * May 8th, 2017. Copyright 2017 ARM Ltd. 3922 * 3923 ******************************************************************************/ 3924 3925 typedef struct acpi_table_sdei 3926 { 3927 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 3928 3929 } ACPI_TABLE_SDEI; 3930 3931 3932 /******************************************************************************* 3933 * 3934 * SDEV - Secure Devices Table (ACPI 6.2) 3935 * Version 1 3936 * 3937 ******************************************************************************/ 3938 3939 typedef struct acpi_table_sdev 3940 { 3941 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 3942 3943 } ACPI_TABLE_SDEV; 3944 3945 3946 typedef struct acpi_sdev_header 3947 { 3948 UINT8 Type; 3949 UINT8 Flags; 3950 UINT16 Length; 3951 3952 } ACPI_SDEV_HEADER; 3953 3954 3955 /* Values for subtable type above */ 3956 3957 enum AcpiSdevType 3958 { 3959 ACPI_SDEV_TYPE_NAMESPACE_DEVICE = 0, 3960 ACPI_SDEV_TYPE_PCIE_ENDPOINT_DEVICE = 1, 3961 ACPI_SDEV_TYPE_RESERVED = 2 /* 2 and greater are reserved */ 3962 }; 3963 3964 /* Values for flags above */ 3965 3966 #define ACPI_SDEV_HANDOFF_TO_UNSECURE_OS (1) 3967 #define ACPI_SDEV_SECURE_COMPONENTS_PRESENT (1<<1) 3968 3969 /* 3970 * SDEV subtables 3971 */ 3972 3973 /* 0: Namespace Device Based Secure Device Structure */ 3974 3975 typedef struct acpi_sdev_namespace 3976 { 3977 ACPI_SDEV_HEADER Header; 3978 UINT16 DeviceIdOffset; 3979 UINT16 DeviceIdLength; 3980 UINT16 VendorDataOffset; 3981 UINT16 VendorDataLength; 3982 3983 } ACPI_SDEV_NAMESPACE; 3984 3985 typedef struct acpi_sdev_secure_component 3986 { 3987 UINT16 SecureComponentOffset; 3988 UINT16 SecureComponentLength; 3989 3990 } ACPI_SDEV_SECURE_COMPONENT; 3991 3992 3993 /* 3994 * SDEV sub-subtables ("Components") for above 3995 */ 3996 typedef struct acpi_sdev_component 3997 { 3998 ACPI_SDEV_HEADER Header; 3999 4000 } ACPI_SDEV_COMPONENT; 4001 4002 4003 /* Values for sub-subtable type above */ 4004 4005 enum AcpiSacType 4006 { 4007 ACPI_SDEV_TYPE_ID_COMPONENT = 0, 4008 ACPI_SDEV_TYPE_MEM_COMPONENT = 1 4009 }; 4010 4011 typedef struct acpi_sdev_id_component 4012 { 4013 ACPI_SDEV_HEADER Header; 4014 UINT16 HardwareIdOffset; 4015 UINT16 HardwareIdLength; 4016 UINT16 SubsystemIdOffset; 4017 UINT16 SubsystemIdLength; 4018 UINT16 HardwareRevision; 4019 UINT8 HardwareRevPresent; 4020 UINT8 ClassCodePresent; 4021 UINT8 PciBaseClass; 4022 UINT8 PciSubClass; 4023 UINT8 PciProgrammingXface; 4024 4025 } ACPI_SDEV_ID_COMPONENT; 4026 4027 typedef struct acpi_sdev_mem_component 4028 { 4029 ACPI_SDEV_HEADER Header; 4030 UINT32 Reserved; 4031 UINT64 MemoryBaseAddress; 4032 UINT64 MemoryLength; 4033 4034 } ACPI_SDEV_MEM_COMPONENT; 4035 4036 4037 /* 1: PCIe Endpoint Device Based Device Structure */ 4038 4039 typedef struct acpi_sdev_pcie 4040 { 4041 ACPI_SDEV_HEADER Header; 4042 UINT16 Segment; 4043 UINT16 StartBus; 4044 UINT16 PathOffset; 4045 UINT16 PathLength; 4046 UINT16 VendorDataOffset; 4047 UINT16 VendorDataLength; 4048 4049 } ACPI_SDEV_PCIE; 4050 4051 /* 1a: PCIe Endpoint path entry */ 4052 4053 typedef struct acpi_sdev_pcie_path 4054 { 4055 UINT8 Device; 4056 UINT8 Function; 4057 4058 } ACPI_SDEV_PCIE_PATH; 4059 4060 4061 /******************************************************************************* 4062 * 4063 * SVKL - Storage Volume Key Location Table (ACPI 6.4) 4064 * From: "Guest-Host-Communication Interface (GHCI) for Intel 4065 * Trust Domain Extensions (Intel TDX)". 4066 * Version 1 4067 * 4068 ******************************************************************************/ 4069 4070 typedef struct acpi_table_svkl 4071 { 4072 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 4073 UINT32 Count; 4074 4075 } ACPI_TABLE_SVKL; 4076 4077 typedef struct acpi_svkl_key 4078 { 4079 UINT16 Type; 4080 UINT16 Format; 4081 UINT32 Size; 4082 UINT64 Address; 4083 4084 } ACPI_SVKL_KEY; 4085 4086 enum acpi_svkl_type 4087 { 4088 ACPI_SVKL_TYPE_MAIN_STORAGE = 0, 4089 ACPI_SVKL_TYPE_RESERVED = 1 /* 1 and greater are reserved */ 4090 }; 4091 4092 enum acpi_svkl_format 4093 { 4094 ACPI_SVKL_FORMAT_RAW_BINARY = 0, 4095 ACPI_SVKL_FORMAT_RESERVED = 1 /* 1 and greater are reserved */ 4096 }; 4097 4098 /******************************************************************************* 4099 * 4100 * SWFT - SoundWire File Table 4101 * as described in Discovery and Configuration (DisCo) Specification 4102 * for SoundWire 4103 * Version 1 4104 * 4105 ******************************************************************************/ 4106 4107 typedef struct acpi_table_swft 4108 { 4109 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 4110 4111 } ACPI_TABLE_SWFT; 4112 4113 typedef struct acpi_swft_file 4114 { 4115 UINT16 VendorID; 4116 UINT32 FileID; 4117 UINT16 FileVersion; 4118 UINT16 FileLength; 4119 UINT8 FileData[]; 4120 4121 } ACPI_SWFT_FILE; 4122 4123 /******************************************************************************* 4124 * 4125 * TDEL - TD-Event Log 4126 * From: "Guest-Host-Communication Interface (GHCI) for Intel 4127 * Trust Domain Extensions (Intel TDX)". 4128 * September 2020 4129 * 4130 ******************************************************************************/ 4131 4132 typedef struct acpi_table_tdel 4133 { 4134 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 4135 UINT32 Reserved; 4136 UINT64 LogAreaMinimumLength; 4137 UINT64 LogAreaStartAddress; 4138 4139 } ACPI_TABLE_TDEL; 4140 4141 /* Reset to default packing */ 4142 4143 #pragma pack() 4144 4145 #endif /* __ACTBL2_H__ */ 4146
Indexes created Tue Sep 30 20:09:53 GMT 2025