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amdgpu_pci.c revision 1.2
      1  1.1  riastrad /*	$NetBSD: amdgpu_pci.c,v 1.2 2018/08/27 14:11:21 riastradh Exp $	*/
      2  1.1  riastrad 
      3  1.1  riastrad /*-
      4  1.1  riastrad  * Copyright (c) 2018 The NetBSD Foundation, Inc.
      5  1.1  riastrad  * All rights reserved.
      6  1.1  riastrad  *
      7  1.1  riastrad  * This code is derived from software contributed to The NetBSD Foundation
      8  1.1  riastrad  * by Taylor R. Campbell.
      9  1.1  riastrad  *
     10  1.1  riastrad  * Redistribution and use in source and binary forms, with or without
     11  1.1  riastrad  * modification, are permitted provided that the following conditions
     12  1.1  riastrad  * are met:
     13  1.1  riastrad  * 1. Redistributions of source code must retain the above copyright
     14  1.1  riastrad  *    notice, this list of conditions and the following disclaimer.
     15  1.1  riastrad  * 2. Redistributions in binary form must reproduce the above copyright
     16  1.1  riastrad  *    notice, this list of conditions and the following disclaimer in the
     17  1.1  riastrad  *    documentation and/or other materials provided with the distribution.
     18  1.1  riastrad  *
     19  1.1  riastrad  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     20  1.1  riastrad  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     21  1.1  riastrad  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     22  1.1  riastrad  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     23  1.1  riastrad  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     24  1.1  riastrad  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     25  1.1  riastrad  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     26  1.1  riastrad  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     27  1.1  riastrad  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     28  1.1  riastrad  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     29  1.1  riastrad  * POSSIBILITY OF SUCH DAMAGE.
     30  1.1  riastrad  */
     31  1.1  riastrad 
     32  1.1  riastrad #include <sys/cdefs.h>
     33  1.1  riastrad __KERNEL_RCSID(0, "$NetBSD: amdgpu_pci.c,v 1.2 2018/08/27 14:11:21 riastradh Exp $");
     34  1.1  riastrad 
     35  1.1  riastrad #include <sys/types.h>
     36  1.1  riastrad #include <sys/queue.h>
     37  1.1  riastrad #include <sys/systm.h>
     38  1.1  riastrad #include <sys/workqueue.h>
     39  1.1  riastrad 
     40  1.1  riastrad #include <drm/drmP.h>
     41  1.1  riastrad 
     42  1.1  riastrad #include <amdgpu.h>
     43  1.1  riastrad #include "amdgpu_drv.h"
     44  1.1  riastrad #include "amdgpu_task.h"
     45  1.1  riastrad 
     46  1.1  riastrad SIMPLEQ_HEAD(amdgpu_task_head, amdgpu_task);
     47  1.1  riastrad 
     48  1.1  riastrad struct amdgpu_softc {
     49  1.1  riastrad 	device_t			sc_dev;
     50  1.1  riastrad 	struct pci_attach_args		sc_pa;
     51  1.1  riastrad 	enum {
     52  1.1  riastrad 		AMDGPU_TASK_ATTACH,
     53  1.1  riastrad 		AMDGPU_TASK_WORKQUEUE,
     54  1.1  riastrad 	}				sc_task_state;
     55  1.1  riastrad 	union {
     56  1.1  riastrad 		struct workqueue		*workqueue;
     57  1.1  riastrad 		struct amdgpu_task_head		attach;
     58  1.1  riastrad 	}				sc_task_u;
     59  1.1  riastrad 	struct drm_device		*sc_drm_dev;
     60  1.1  riastrad 	struct pci_dev			sc_pci_dev;
     61  1.1  riastrad };
     62  1.1  riastrad 
     63  1.1  riastrad static bool	amdgpu_pci_lookup(const struct pci_attach_args *,
     64  1.1  riastrad 		    unsigned long *);
     65  1.1  riastrad 
     66  1.1  riastrad static int	amdgpu_match(device_t, cfdata_t, void *);
     67  1.1  riastrad static void	amdgpu_attach(device_t, device_t, void *);
     68  1.1  riastrad static void	amdgpu_attach_real(device_t);
     69  1.1  riastrad static int	amdgpu_detach(device_t, int);
     70  1.1  riastrad static bool	amdgpu_do_suspend(device_t, const pmf_qual_t *);
     71  1.1  riastrad static bool	amdgpu_do_resume(device_t, const pmf_qual_t *);
     72  1.1  riastrad 
     73  1.1  riastrad static void	amdgpu_task_work(struct work *, void *);
     74  1.1  riastrad 
     75  1.1  riastrad CFATTACH_DECL_NEW(amdgpu, sizeof(struct amdgpu_softc),
     76  1.1  riastrad     amdgpu_match, amdgpu_attach, amdgpu_detach, NULL);
     77  1.1  riastrad 
     78  1.1  riastrad /* XXX Kludge to get these from amdgpu_drv.c.  */
     79  1.1  riastrad extern struct drm_driver *const amdgpu_drm_driver;
     80  1.1  riastrad extern const struct pci_device_id *const amdgpu_device_ids;
     81  1.1  riastrad extern const size_t amdgpu_n_device_ids;
     82  1.1  riastrad 
     83  1.1  riastrad static bool
     84  1.1  riastrad amdgpu_pci_lookup(const struct pci_attach_args *pa, unsigned long *flags)
     85  1.1  riastrad {
     86  1.1  riastrad 	size_t i;
     87  1.1  riastrad 
     88  1.1  riastrad 	for (i = 0; i < amdgpu_n_device_ids; i++) {
     89  1.1  riastrad 		if ((PCI_VENDOR(pa->pa_id) == amdgpu_device_ids[i].vendor) &&
     90  1.1  riastrad 		    (PCI_PRODUCT(pa->pa_id) == amdgpu_device_ids[i].device))
     91  1.1  riastrad 			break;
     92  1.1  riastrad 	}
     93  1.1  riastrad 
     94  1.1  riastrad 	/* Did we find it?  */
     95  1.1  riastrad 	if (i == amdgpu_n_device_ids)
     96  1.1  riastrad 		return false;
     97  1.1  riastrad 
     98  1.1  riastrad 	if (flags)
     99  1.1  riastrad 		*flags = amdgpu_device_ids[i].driver_data;
    100  1.1  riastrad 	return true;
    101  1.1  riastrad }
    102  1.1  riastrad 
    103  1.1  riastrad static int
    104  1.1  riastrad amdgpu_match(device_t parent, cfdata_t match, void *aux)
    105  1.1  riastrad {
    106  1.1  riastrad 	extern int amdgpu_guarantee_initialized(void);
    107  1.1  riastrad 	const struct pci_attach_args *const pa = aux;
    108  1.1  riastrad 	int error;
    109  1.1  riastrad 
    110  1.1  riastrad 	error = amdgpu_guarantee_initialized();
    111  1.1  riastrad 	if (error) {
    112  1.1  riastrad 		aprint_error("amdgpu: failed to initialize: %d\n", error);
    113  1.1  riastrad 		return 0;
    114  1.1  riastrad 	}
    115  1.1  riastrad 
    116  1.1  riastrad 	if (!amdgpu_pci_lookup(pa, NULL))
    117  1.1  riastrad 		return 0;
    118  1.1  riastrad 
    119  1.1  riastrad 	return 6;		/* XXX Beat genfb_pci...  */
    120  1.1  riastrad }
    121  1.1  riastrad 
    122  1.1  riastrad static void
    123  1.1  riastrad amdgpu_attach(device_t parent, device_t self, void *aux)
    124  1.1  riastrad {
    125  1.1  riastrad 	struct amdgpu_softc *const sc = device_private(self);
    126  1.1  riastrad 	const struct pci_attach_args *const pa = aux;
    127  1.1  riastrad 
    128  1.1  riastrad 	pci_aprint_devinfo(pa, NULL);
    129  1.1  riastrad 
    130  1.1  riastrad 	if (!pmf_device_register(self, &amdgpu_do_suspend, &amdgpu_do_resume))
    131  1.1  riastrad 		aprint_error_dev(self, "unable to establish power handler\n");
    132  1.1  riastrad 
    133  1.1  riastrad 	/*
    134  1.1  riastrad 	 * Trivial initialization first; the rest will come after we
    135  1.1  riastrad 	 * have mounted the root file system and can load firmware
    136  1.1  riastrad 	 * images.
    137  1.1  riastrad 	 */
    138  1.1  riastrad 	sc->sc_dev = NULL;
    139  1.1  riastrad 	sc->sc_pa = *pa;
    140  1.1  riastrad 
    141  1.1  riastrad 	config_mountroot(self, &amdgpu_attach_real);
    142  1.1  riastrad }
    143  1.1  riastrad 
    144  1.1  riastrad static void
    145  1.1  riastrad amdgpu_attach_real(device_t self)
    146  1.1  riastrad {
    147  1.1  riastrad 	struct amdgpu_softc *const sc = device_private(self);
    148  1.1  riastrad 	const struct pci_attach_args *const pa = &sc->sc_pa;
    149  1.1  riastrad 	bool ok __diagused;
    150  1.1  riastrad 	unsigned long flags = 0; /* XXXGCC */
    151  1.1  riastrad 	int error;
    152  1.1  riastrad 
    153  1.1  riastrad 	ok = amdgpu_pci_lookup(pa, &flags);
    154  1.1  riastrad 	KASSERT(ok);
    155  1.1  riastrad 
    156  1.1  riastrad 	sc->sc_task_state = AMDGPU_TASK_ATTACH;
    157  1.1  riastrad 	SIMPLEQ_INIT(&sc->sc_task_u.attach);
    158  1.1  riastrad 
    159  1.2  riastrad 	/* Initialize the Linux PCI device descriptor.  */
    160  1.2  riastrad 	linux_pci_dev_init(&sc->sc_pci_dev, self, pa, 0);
    161  1.2  riastrad 
    162  1.1  riastrad 	/* XXX errno Linux->NetBSD */
    163  1.1  riastrad 	error = -drm_pci_attach(self, pa, &sc->sc_pci_dev, amdgpu_drm_driver,
    164  1.1  riastrad 	    flags, &sc->sc_drm_dev);
    165  1.1  riastrad 	if (error) {
    166  1.1  riastrad 		aprint_error_dev(self, "unable to attach drm: %d\n", error);
    167  1.1  riastrad 		goto out;
    168  1.1  riastrad 	}
    169  1.1  riastrad 
    170  1.1  riastrad 	while (!SIMPLEQ_EMPTY(&sc->sc_task_u.attach)) {
    171  1.1  riastrad 		struct amdgpu_task *const task =
    172  1.1  riastrad 		    SIMPLEQ_FIRST(&sc->sc_task_u.attach);
    173  1.1  riastrad 
    174  1.1  riastrad 		SIMPLEQ_REMOVE_HEAD(&sc->sc_task_u.attach, rt_u.queue);
    175  1.1  riastrad 		(*task->rt_fn)(task);
    176  1.1  riastrad 	}
    177  1.1  riastrad 
    178  1.1  riastrad 	sc->sc_task_state = AMDGPU_TASK_WORKQUEUE;
    179  1.1  riastrad 	error = workqueue_create(&sc->sc_task_u.workqueue, "amdgpufb",
    180  1.1  riastrad 	    &amdgpu_task_work, NULL, PRI_NONE, IPL_NONE, WQ_MPSAFE);
    181  1.1  riastrad 	if (error) {
    182  1.1  riastrad 		aprint_error_dev(self, "unable to create workqueue: %d\n",
    183  1.1  riastrad 		    error);
    184  1.1  riastrad 		sc->sc_task_u.workqueue = NULL;
    185  1.1  riastrad 		goto out;
    186  1.1  riastrad 	}
    187  1.1  riastrad 
    188  1.1  riastrad out:	sc->sc_dev = self;
    189  1.1  riastrad }
    190  1.1  riastrad 
    191  1.1  riastrad static int
    192  1.1  riastrad amdgpu_detach(device_t self, int flags)
    193  1.1  riastrad {
    194  1.1  riastrad 	struct amdgpu_softc *const sc = device_private(self);
    195  1.1  riastrad 	int error;
    196  1.1  riastrad 
    197  1.1  riastrad 	if (sc->sc_dev == NULL)
    198  1.1  riastrad 		/* Not done attaching.  */
    199  1.1  riastrad 		return EBUSY;
    200  1.1  riastrad 
    201  1.1  riastrad 	/* XXX Check for in-use before tearing it all down...  */
    202  1.1  riastrad 	error = config_detach_children(self, flags);
    203  1.1  riastrad 	if (error)
    204  1.1  riastrad 		return error;
    205  1.1  riastrad 
    206  1.1  riastrad 	if (sc->sc_task_state == AMDGPU_TASK_ATTACH)
    207  1.1  riastrad 		goto out;
    208  1.1  riastrad 	if (sc->sc_task_u.workqueue != NULL) {
    209  1.1  riastrad 		workqueue_destroy(sc->sc_task_u.workqueue);
    210  1.1  riastrad 		sc->sc_task_u.workqueue = NULL;
    211  1.1  riastrad 	}
    212  1.1  riastrad 
    213  1.1  riastrad 	if (sc->sc_drm_dev == NULL)
    214  1.1  riastrad 		goto out;
    215  1.1  riastrad 	/* XXX errno Linux->NetBSD */
    216  1.1  riastrad 	error = -drm_pci_detach(sc->sc_drm_dev, flags);
    217  1.1  riastrad 	if (error)
    218  1.1  riastrad 		/* XXX Kinda too late to fail now...  */
    219  1.1  riastrad 		return error;
    220  1.1  riastrad 	sc->sc_drm_dev = NULL;
    221  1.1  riastrad 
    222  1.1  riastrad out:	pmf_device_deregister(self);
    223  1.1  riastrad 
    224  1.1  riastrad 	return 0;
    225  1.1  riastrad }
    226  1.1  riastrad 
    227  1.1  riastrad static bool
    228  1.1  riastrad amdgpu_do_suspend(device_t self, const pmf_qual_t *qual)
    229  1.1  riastrad {
    230  1.1  riastrad 	struct amdgpu_softc *const sc = device_private(self);
    231  1.1  riastrad 	struct drm_device *const dev = sc->sc_drm_dev;
    232  1.1  riastrad 	int ret;
    233  1.1  riastrad 	bool is_console = true; /* XXX */
    234  1.1  riastrad 
    235  1.1  riastrad 	if (dev == NULL)
    236  1.1  riastrad 		return true;
    237  1.1  riastrad 
    238  1.1  riastrad 	ret = amdgpu_suspend_kms(dev, true, is_console);
    239  1.1  riastrad 	if (ret)
    240  1.1  riastrad 		return false;
    241  1.1  riastrad 
    242  1.1  riastrad 	return true;
    243  1.1  riastrad }
    244  1.1  riastrad 
    245  1.1  riastrad static bool
    246  1.1  riastrad amdgpu_do_resume(device_t self, const pmf_qual_t *qual)
    247  1.1  riastrad {
    248  1.1  riastrad 	struct amdgpu_softc *const sc = device_private(self);
    249  1.1  riastrad 	struct drm_device *const dev = sc->sc_drm_dev;
    250  1.1  riastrad 	int ret;
    251  1.1  riastrad 	bool is_console = true; /* XXX */
    252  1.1  riastrad 
    253  1.1  riastrad 	if (dev == NULL)
    254  1.1  riastrad 		return true;
    255  1.1  riastrad 
    256  1.1  riastrad 	ret = amdgpu_resume_kms(dev, true, is_console);
    257  1.1  riastrad 	if (ret)
    258  1.1  riastrad 		return false;
    259  1.1  riastrad 
    260  1.1  riastrad 	return true;
    261  1.1  riastrad }
    262  1.1  riastrad 
    263  1.1  riastrad static void
    264  1.1  riastrad amdgpu_task_work(struct work *work, void *cookie __unused)
    265  1.1  riastrad {
    266  1.1  riastrad 	struct amdgpu_task *const task = container_of(work, struct amdgpu_task,
    267  1.1  riastrad 	    rt_u.work);
    268  1.1  riastrad 
    269  1.1  riastrad 	(*task->rt_fn)(task);
    270  1.1  riastrad }
    271  1.1  riastrad 
    272  1.1  riastrad int
    273  1.1  riastrad amdgpu_task_schedule(device_t self, struct amdgpu_task *task)
    274  1.1  riastrad {
    275  1.1  riastrad 	struct amdgpu_softc *const sc = device_private(self);
    276  1.1  riastrad 
    277  1.1  riastrad 	switch (sc->sc_task_state) {
    278  1.1  riastrad 	case AMDGPU_TASK_ATTACH:
    279  1.1  riastrad 		SIMPLEQ_INSERT_TAIL(&sc->sc_task_u.attach, task, rt_u.queue);
    280  1.1  riastrad 		return 0;
    281  1.1  riastrad 	case AMDGPU_TASK_WORKQUEUE:
    282  1.1  riastrad 		if (sc->sc_task_u.workqueue == NULL) {
    283  1.1  riastrad 			aprint_error_dev(self, "unable to schedule task\n");
    284  1.1  riastrad 			return EIO;
    285  1.1  riastrad 		}
    286  1.1  riastrad 		workqueue_enqueue(sc->sc_task_u.workqueue, &task->rt_u.work,
    287  1.1  riastrad 		    NULL);
    288  1.1  riastrad 		return 0;
    289  1.1  riastrad 	default:
    290  1.1  riastrad 		panic("amdgpu in invalid task state: %d\n",
    291  1.1  riastrad 		    (int)sc->sc_task_state);
    292  1.1  riastrad 	}
    293  1.1  riastrad }
    294