amdgpu_pci.c revision 1.9 1 1.9 riastrad /* $NetBSD: amdgpu_pci.c,v 1.9 2021/12/19 12:21:29 riastradh Exp $ */
2 1.1 riastrad
3 1.1 riastrad /*-
4 1.1 riastrad * Copyright (c) 2018 The NetBSD Foundation, Inc.
5 1.1 riastrad * All rights reserved.
6 1.1 riastrad *
7 1.1 riastrad * This code is derived from software contributed to The NetBSD Foundation
8 1.1 riastrad * by Taylor R. Campbell.
9 1.1 riastrad *
10 1.1 riastrad * Redistribution and use in source and binary forms, with or without
11 1.1 riastrad * modification, are permitted provided that the following conditions
12 1.1 riastrad * are met:
13 1.1 riastrad * 1. Redistributions of source code must retain the above copyright
14 1.1 riastrad * notice, this list of conditions and the following disclaimer.
15 1.1 riastrad * 2. Redistributions in binary form must reproduce the above copyright
16 1.1 riastrad * notice, this list of conditions and the following disclaimer in the
17 1.1 riastrad * documentation and/or other materials provided with the distribution.
18 1.1 riastrad *
19 1.1 riastrad * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20 1.1 riastrad * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21 1.1 riastrad * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 1.1 riastrad * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23 1.1 riastrad * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 1.1 riastrad * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 1.1 riastrad * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 1.1 riastrad * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 1.1 riastrad * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 1.1 riastrad * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 1.1 riastrad * POSSIBILITY OF SUCH DAMAGE.
30 1.1 riastrad */
31 1.1 riastrad
32 1.1 riastrad #include <sys/cdefs.h>
33 1.9 riastrad __KERNEL_RCSID(0, "$NetBSD: amdgpu_pci.c,v 1.9 2021/12/19 12:21:29 riastradh Exp $");
34 1.1 riastrad
35 1.1 riastrad #include <sys/types.h>
36 1.1 riastrad #include <sys/queue.h>
37 1.1 riastrad #include <sys/systm.h>
38 1.1 riastrad #include <sys/workqueue.h>
39 1.1 riastrad
40 1.9 riastrad #include <dev/pci/pcivar.h>
41 1.9 riastrad
42 1.9 riastrad #include <linux/pci.h>
43 1.9 riastrad
44 1.9 riastrad #include <drm/drm_device.h>
45 1.9 riastrad #include <drm/drm_drv.h>
46 1.9 riastrad #include <drm/drm_fb_helper.h>
47 1.9 riastrad #include <drm/drm_pci.h>
48 1.9 riastrad
49 1.1 riastrad #include <amdgpu.h>
50 1.1 riastrad #include "amdgpu_drv.h"
51 1.1 riastrad #include "amdgpu_task.h"
52 1.1 riastrad
53 1.6 riastrad struct drm_device;
54 1.6 riastrad
55 1.1 riastrad SIMPLEQ_HEAD(amdgpu_task_head, amdgpu_task);
56 1.1 riastrad
57 1.1 riastrad struct amdgpu_softc {
58 1.1 riastrad device_t sc_dev;
59 1.1 riastrad struct pci_attach_args sc_pa;
60 1.1 riastrad enum {
61 1.1 riastrad AMDGPU_TASK_ATTACH,
62 1.1 riastrad AMDGPU_TASK_WORKQUEUE,
63 1.1 riastrad } sc_task_state;
64 1.1 riastrad union {
65 1.1 riastrad struct workqueue *workqueue;
66 1.1 riastrad struct amdgpu_task_head attach;
67 1.1 riastrad } sc_task_u;
68 1.1 riastrad struct drm_device *sc_drm_dev;
69 1.1 riastrad struct pci_dev sc_pci_dev;
70 1.7 riastrad bool sc_pci_attached;
71 1.7 riastrad bool sc_dev_registered;
72 1.1 riastrad };
73 1.1 riastrad
74 1.1 riastrad static bool amdgpu_pci_lookup(const struct pci_attach_args *,
75 1.1 riastrad unsigned long *);
76 1.1 riastrad
77 1.1 riastrad static int amdgpu_match(device_t, cfdata_t, void *);
78 1.1 riastrad static void amdgpu_attach(device_t, device_t, void *);
79 1.1 riastrad static void amdgpu_attach_real(device_t);
80 1.1 riastrad static int amdgpu_detach(device_t, int);
81 1.1 riastrad static bool amdgpu_do_suspend(device_t, const pmf_qual_t *);
82 1.1 riastrad static bool amdgpu_do_resume(device_t, const pmf_qual_t *);
83 1.1 riastrad
84 1.1 riastrad static void amdgpu_task_work(struct work *, void *);
85 1.1 riastrad
86 1.1 riastrad CFATTACH_DECL_NEW(amdgpu, sizeof(struct amdgpu_softc),
87 1.1 riastrad amdgpu_match, amdgpu_attach, amdgpu_detach, NULL);
88 1.1 riastrad
89 1.1 riastrad /* XXX Kludge to get these from amdgpu_drv.c. */
90 1.1 riastrad extern struct drm_driver *const amdgpu_drm_driver;
91 1.1 riastrad extern const struct pci_device_id *const amdgpu_device_ids;
92 1.1 riastrad extern const size_t amdgpu_n_device_ids;
93 1.1 riastrad
94 1.1 riastrad static bool
95 1.1 riastrad amdgpu_pci_lookup(const struct pci_attach_args *pa, unsigned long *flags)
96 1.1 riastrad {
97 1.1 riastrad size_t i;
98 1.1 riastrad
99 1.1 riastrad for (i = 0; i < amdgpu_n_device_ids; i++) {
100 1.1 riastrad if ((PCI_VENDOR(pa->pa_id) == amdgpu_device_ids[i].vendor) &&
101 1.1 riastrad (PCI_PRODUCT(pa->pa_id) == amdgpu_device_ids[i].device))
102 1.1 riastrad break;
103 1.1 riastrad }
104 1.1 riastrad
105 1.1 riastrad /* Did we find it? */
106 1.1 riastrad if (i == amdgpu_n_device_ids)
107 1.1 riastrad return false;
108 1.1 riastrad
109 1.1 riastrad if (flags)
110 1.1 riastrad *flags = amdgpu_device_ids[i].driver_data;
111 1.1 riastrad return true;
112 1.1 riastrad }
113 1.1 riastrad
114 1.1 riastrad static int
115 1.1 riastrad amdgpu_match(device_t parent, cfdata_t match, void *aux)
116 1.1 riastrad {
117 1.1 riastrad extern int amdgpu_guarantee_initialized(void);
118 1.1 riastrad const struct pci_attach_args *const pa = aux;
119 1.1 riastrad int error;
120 1.1 riastrad
121 1.1 riastrad error = amdgpu_guarantee_initialized();
122 1.1 riastrad if (error) {
123 1.1 riastrad aprint_error("amdgpu: failed to initialize: %d\n", error);
124 1.1 riastrad return 0;
125 1.1 riastrad }
126 1.1 riastrad
127 1.1 riastrad if (!amdgpu_pci_lookup(pa, NULL))
128 1.1 riastrad return 0;
129 1.1 riastrad
130 1.5 riastrad return 7; /* beat genfb_pci and radeon */
131 1.1 riastrad }
132 1.1 riastrad
133 1.1 riastrad static void
134 1.1 riastrad amdgpu_attach(device_t parent, device_t self, void *aux)
135 1.1 riastrad {
136 1.1 riastrad struct amdgpu_softc *const sc = device_private(self);
137 1.1 riastrad const struct pci_attach_args *const pa = aux;
138 1.1 riastrad
139 1.1 riastrad pci_aprint_devinfo(pa, NULL);
140 1.1 riastrad
141 1.1 riastrad if (!pmf_device_register(self, &amdgpu_do_suspend, &amdgpu_do_resume))
142 1.1 riastrad aprint_error_dev(self, "unable to establish power handler\n");
143 1.1 riastrad
144 1.1 riastrad /*
145 1.1 riastrad * Trivial initialization first; the rest will come after we
146 1.1 riastrad * have mounted the root file system and can load firmware
147 1.1 riastrad * images.
148 1.1 riastrad */
149 1.1 riastrad sc->sc_dev = NULL;
150 1.1 riastrad sc->sc_pa = *pa;
151 1.1 riastrad
152 1.1 riastrad config_mountroot(self, &amdgpu_attach_real);
153 1.1 riastrad }
154 1.1 riastrad
155 1.1 riastrad static void
156 1.1 riastrad amdgpu_attach_real(device_t self)
157 1.1 riastrad {
158 1.1 riastrad struct amdgpu_softc *const sc = device_private(self);
159 1.1 riastrad const struct pci_attach_args *const pa = &sc->sc_pa;
160 1.1 riastrad bool ok __diagused;
161 1.1 riastrad unsigned long flags = 0; /* XXXGCC */
162 1.1 riastrad int error;
163 1.1 riastrad
164 1.1 riastrad ok = amdgpu_pci_lookup(pa, &flags);
165 1.1 riastrad KASSERT(ok);
166 1.1 riastrad
167 1.1 riastrad sc->sc_task_state = AMDGPU_TASK_ATTACH;
168 1.1 riastrad SIMPLEQ_INIT(&sc->sc_task_u.attach);
169 1.1 riastrad
170 1.2 riastrad /* Initialize the Linux PCI device descriptor. */
171 1.3 riastrad linux_pci_dev_init(&sc->sc_pci_dev, self, device_parent(self), pa, 0);
172 1.2 riastrad
173 1.7 riastrad sc->sc_drm_dev = drm_dev_alloc(amdgpu_drm_driver, self);
174 1.7 riastrad if (IS_ERR(sc->sc_drm_dev)) {
175 1.7 riastrad aprint_error_dev(self, "unable to create drm device: %ld\n",
176 1.7 riastrad PTR_ERR(sc->sc_drm_dev));
177 1.7 riastrad sc->sc_drm_dev = NULL;
178 1.7 riastrad goto out;
179 1.7 riastrad }
180 1.7 riastrad
181 1.1 riastrad /* XXX errno Linux->NetBSD */
182 1.8 riastrad error = -drm_pci_attach(sc->sc_drm_dev, &sc->sc_pci_dev);
183 1.1 riastrad if (error) {
184 1.1 riastrad aprint_error_dev(self, "unable to attach drm: %d\n", error);
185 1.1 riastrad goto out;
186 1.1 riastrad }
187 1.7 riastrad sc->sc_pci_attached = true;
188 1.7 riastrad
189 1.7 riastrad /* XXX errno Linux->NetBSD */
190 1.7 riastrad error = -drm_dev_register(sc->sc_drm_dev, flags);
191 1.7 riastrad if (error) {
192 1.7 riastrad aprint_error_dev(self, "unable to register drm: %d\n", error);
193 1.7 riastrad return;
194 1.7 riastrad }
195 1.7 riastrad sc->sc_dev_registered = true;
196 1.1 riastrad
197 1.1 riastrad while (!SIMPLEQ_EMPTY(&sc->sc_task_u.attach)) {
198 1.1 riastrad struct amdgpu_task *const task =
199 1.1 riastrad SIMPLEQ_FIRST(&sc->sc_task_u.attach);
200 1.1 riastrad
201 1.1 riastrad SIMPLEQ_REMOVE_HEAD(&sc->sc_task_u.attach, rt_u.queue);
202 1.1 riastrad (*task->rt_fn)(task);
203 1.1 riastrad }
204 1.1 riastrad
205 1.1 riastrad sc->sc_task_state = AMDGPU_TASK_WORKQUEUE;
206 1.1 riastrad error = workqueue_create(&sc->sc_task_u.workqueue, "amdgpufb",
207 1.1 riastrad &amdgpu_task_work, NULL, PRI_NONE, IPL_NONE, WQ_MPSAFE);
208 1.1 riastrad if (error) {
209 1.1 riastrad aprint_error_dev(self, "unable to create workqueue: %d\n",
210 1.1 riastrad error);
211 1.1 riastrad sc->sc_task_u.workqueue = NULL;
212 1.1 riastrad goto out;
213 1.1 riastrad }
214 1.1 riastrad
215 1.1 riastrad out: sc->sc_dev = self;
216 1.1 riastrad }
217 1.1 riastrad
218 1.1 riastrad static int
219 1.1 riastrad amdgpu_detach(device_t self, int flags)
220 1.1 riastrad {
221 1.1 riastrad struct amdgpu_softc *const sc = device_private(self);
222 1.1 riastrad int error;
223 1.1 riastrad
224 1.1 riastrad if (sc->sc_dev == NULL)
225 1.1 riastrad /* Not done attaching. */
226 1.1 riastrad return EBUSY;
227 1.1 riastrad
228 1.1 riastrad /* XXX Check for in-use before tearing it all down... */
229 1.1 riastrad error = config_detach_children(self, flags);
230 1.1 riastrad if (error)
231 1.1 riastrad return error;
232 1.1 riastrad
233 1.1 riastrad if (sc->sc_task_state == AMDGPU_TASK_ATTACH)
234 1.9 riastrad goto out0;
235 1.1 riastrad if (sc->sc_task_u.workqueue != NULL) {
236 1.1 riastrad workqueue_destroy(sc->sc_task_u.workqueue);
237 1.1 riastrad sc->sc_task_u.workqueue = NULL;
238 1.1 riastrad }
239 1.1 riastrad
240 1.1 riastrad if (sc->sc_drm_dev == NULL)
241 1.9 riastrad goto out1;
242 1.7 riastrad if (!sc->sc_pci_attached)
243 1.9 riastrad goto out2;
244 1.7 riastrad if (!sc->sc_dev_registered)
245 1.9 riastrad goto out3;
246 1.7 riastrad
247 1.7 riastrad drm_dev_unregister(sc->sc_drm_dev);
248 1.9 riastrad out3: drm_pci_detach(sc->sc_drm_dev);
249 1.9 riastrad out2: drm_dev_put(sc->sc_drm_dev);
250 1.1 riastrad sc->sc_drm_dev = NULL;
251 1.9 riastrad out1: linux_pci_dev_destroy(&sc->sc_pci_dev);
252 1.9 riastrad out0: pmf_device_deregister(self);
253 1.1 riastrad return 0;
254 1.1 riastrad }
255 1.1 riastrad
256 1.1 riastrad static bool
257 1.1 riastrad amdgpu_do_suspend(device_t self, const pmf_qual_t *qual)
258 1.1 riastrad {
259 1.1 riastrad struct amdgpu_softc *const sc = device_private(self);
260 1.1 riastrad struct drm_device *const dev = sc->sc_drm_dev;
261 1.1 riastrad int ret;
262 1.1 riastrad
263 1.1 riastrad if (dev == NULL)
264 1.1 riastrad return true;
265 1.1 riastrad
266 1.9 riastrad ret = amdgpu_device_suspend(dev, /*fbcon*/true);
267 1.1 riastrad if (ret)
268 1.1 riastrad return false;
269 1.1 riastrad
270 1.1 riastrad return true;
271 1.1 riastrad }
272 1.1 riastrad
273 1.1 riastrad static bool
274 1.1 riastrad amdgpu_do_resume(device_t self, const pmf_qual_t *qual)
275 1.1 riastrad {
276 1.1 riastrad struct amdgpu_softc *const sc = device_private(self);
277 1.1 riastrad struct drm_device *const dev = sc->sc_drm_dev;
278 1.1 riastrad int ret;
279 1.1 riastrad
280 1.1 riastrad if (dev == NULL)
281 1.1 riastrad return true;
282 1.1 riastrad
283 1.9 riastrad ret = amdgpu_device_resume(dev, /*fbcon*/true);
284 1.1 riastrad if (ret)
285 1.1 riastrad return false;
286 1.1 riastrad
287 1.1 riastrad return true;
288 1.1 riastrad }
289 1.1 riastrad
290 1.1 riastrad static void
291 1.1 riastrad amdgpu_task_work(struct work *work, void *cookie __unused)
292 1.1 riastrad {
293 1.1 riastrad struct amdgpu_task *const task = container_of(work, struct amdgpu_task,
294 1.1 riastrad rt_u.work);
295 1.1 riastrad
296 1.1 riastrad (*task->rt_fn)(task);
297 1.1 riastrad }
298 1.1 riastrad
299 1.1 riastrad int
300 1.1 riastrad amdgpu_task_schedule(device_t self, struct amdgpu_task *task)
301 1.1 riastrad {
302 1.1 riastrad struct amdgpu_softc *const sc = device_private(self);
303 1.1 riastrad
304 1.1 riastrad switch (sc->sc_task_state) {
305 1.1 riastrad case AMDGPU_TASK_ATTACH:
306 1.1 riastrad SIMPLEQ_INSERT_TAIL(&sc->sc_task_u.attach, task, rt_u.queue);
307 1.1 riastrad return 0;
308 1.1 riastrad case AMDGPU_TASK_WORKQUEUE:
309 1.1 riastrad if (sc->sc_task_u.workqueue == NULL) {
310 1.1 riastrad aprint_error_dev(self, "unable to schedule task\n");
311 1.1 riastrad return EIO;
312 1.1 riastrad }
313 1.1 riastrad workqueue_enqueue(sc->sc_task_u.workqueue, &task->rt_u.work,
314 1.1 riastrad NULL);
315 1.1 riastrad return 0;
316 1.1 riastrad default:
317 1.1 riastrad panic("amdgpu in invalid task state: %d\n",
318 1.1 riastrad (int)sc->sc_task_state);
319 1.1 riastrad }
320 1.1 riastrad }
321