amdgpu_pci.c revision 1.1 1 /* $NetBSD: amdgpu_pci.c,v 1.1 2018/08/27 14:02:32 riastradh Exp $ */
2
3 /*-
4 * Copyright (c) 2018 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Taylor R. Campbell.
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 *
19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 * POSSIBILITY OF SUCH DAMAGE.
30 */
31
32 #include <sys/cdefs.h>
33 __KERNEL_RCSID(0, "$NetBSD: amdgpu_pci.c,v 1.1 2018/08/27 14:02:32 riastradh Exp $");
34
35 #include <sys/types.h>
36 #include <sys/queue.h>
37 #include <sys/systm.h>
38 #include <sys/workqueue.h>
39
40 #include <drm/drmP.h>
41
42 #include <amdgpu.h>
43 #include "amdgpu_drv.h"
44 #include "amdgpu_task.h"
45
46 SIMPLEQ_HEAD(amdgpu_task_head, amdgpu_task);
47
48 struct amdgpu_softc {
49 device_t sc_dev;
50 struct pci_attach_args sc_pa;
51 enum {
52 AMDGPU_TASK_ATTACH,
53 AMDGPU_TASK_WORKQUEUE,
54 } sc_task_state;
55 union {
56 struct workqueue *workqueue;
57 struct amdgpu_task_head attach;
58 } sc_task_u;
59 struct drm_device *sc_drm_dev;
60 struct pci_dev sc_pci_dev;
61 };
62
63 static bool amdgpu_pci_lookup(const struct pci_attach_args *,
64 unsigned long *);
65
66 static int amdgpu_match(device_t, cfdata_t, void *);
67 static void amdgpu_attach(device_t, device_t, void *);
68 static void amdgpu_attach_real(device_t);
69 static int amdgpu_detach(device_t, int);
70 static bool amdgpu_do_suspend(device_t, const pmf_qual_t *);
71 static bool amdgpu_do_resume(device_t, const pmf_qual_t *);
72
73 static void amdgpu_task_work(struct work *, void *);
74
75 CFATTACH_DECL_NEW(amdgpu, sizeof(struct amdgpu_softc),
76 amdgpu_match, amdgpu_attach, amdgpu_detach, NULL);
77
78 /* XXX Kludge to get these from amdgpu_drv.c. */
79 extern struct drm_driver *const amdgpu_drm_driver;
80 extern const struct pci_device_id *const amdgpu_device_ids;
81 extern const size_t amdgpu_n_device_ids;
82
83 static bool
84 amdgpu_pci_lookup(const struct pci_attach_args *pa, unsigned long *flags)
85 {
86 size_t i;
87
88 for (i = 0; i < amdgpu_n_device_ids; i++) {
89 if ((PCI_VENDOR(pa->pa_id) == amdgpu_device_ids[i].vendor) &&
90 (PCI_PRODUCT(pa->pa_id) == amdgpu_device_ids[i].device))
91 break;
92 }
93
94 /* Did we find it? */
95 if (i == amdgpu_n_device_ids)
96 return false;
97
98 if (flags)
99 *flags = amdgpu_device_ids[i].driver_data;
100 return true;
101 }
102
103 static int
104 amdgpu_match(device_t parent, cfdata_t match, void *aux)
105 {
106 extern int amdgpu_guarantee_initialized(void);
107 const struct pci_attach_args *const pa = aux;
108 int error;
109
110 error = amdgpu_guarantee_initialized();
111 if (error) {
112 aprint_error("amdgpu: failed to initialize: %d\n", error);
113 return 0;
114 }
115
116 if (!amdgpu_pci_lookup(pa, NULL))
117 return 0;
118
119 return 6; /* XXX Beat genfb_pci... */
120 }
121
122 static void
123 amdgpu_attach(device_t parent, device_t self, void *aux)
124 {
125 struct amdgpu_softc *const sc = device_private(self);
126 const struct pci_attach_args *const pa = aux;
127
128 pci_aprint_devinfo(pa, NULL);
129
130 if (!pmf_device_register(self, &amdgpu_do_suspend, &amdgpu_do_resume))
131 aprint_error_dev(self, "unable to establish power handler\n");
132
133 /*
134 * Trivial initialization first; the rest will come after we
135 * have mounted the root file system and can load firmware
136 * images.
137 */
138 sc->sc_dev = NULL;
139 sc->sc_pa = *pa;
140
141 config_mountroot(self, &amdgpu_attach_real);
142 }
143
144 static void
145 amdgpu_attach_real(device_t self)
146 {
147 struct amdgpu_softc *const sc = device_private(self);
148 const struct pci_attach_args *const pa = &sc->sc_pa;
149 bool ok __diagused;
150 unsigned long flags = 0; /* XXXGCC */
151 int error;
152
153 ok = amdgpu_pci_lookup(pa, &flags);
154 KASSERT(ok);
155
156 sc->sc_task_state = AMDGPU_TASK_ATTACH;
157 SIMPLEQ_INIT(&sc->sc_task_u.attach);
158
159 /* XXX errno Linux->NetBSD */
160 error = -drm_pci_attach(self, pa, &sc->sc_pci_dev, amdgpu_drm_driver,
161 flags, &sc->sc_drm_dev);
162 if (error) {
163 aprint_error_dev(self, "unable to attach drm: %d\n", error);
164 goto out;
165 }
166
167 while (!SIMPLEQ_EMPTY(&sc->sc_task_u.attach)) {
168 struct amdgpu_task *const task =
169 SIMPLEQ_FIRST(&sc->sc_task_u.attach);
170
171 SIMPLEQ_REMOVE_HEAD(&sc->sc_task_u.attach, rt_u.queue);
172 (*task->rt_fn)(task);
173 }
174
175 sc->sc_task_state = AMDGPU_TASK_WORKQUEUE;
176 error = workqueue_create(&sc->sc_task_u.workqueue, "amdgpufb",
177 &amdgpu_task_work, NULL, PRI_NONE, IPL_NONE, WQ_MPSAFE);
178 if (error) {
179 aprint_error_dev(self, "unable to create workqueue: %d\n",
180 error);
181 sc->sc_task_u.workqueue = NULL;
182 goto out;
183 }
184
185 out: sc->sc_dev = self;
186 }
187
188 static int
189 amdgpu_detach(device_t self, int flags)
190 {
191 struct amdgpu_softc *const sc = device_private(self);
192 int error;
193
194 if (sc->sc_dev == NULL)
195 /* Not done attaching. */
196 return EBUSY;
197
198 /* XXX Check for in-use before tearing it all down... */
199 error = config_detach_children(self, flags);
200 if (error)
201 return error;
202
203 if (sc->sc_task_state == AMDGPU_TASK_ATTACH)
204 goto out;
205 if (sc->sc_task_u.workqueue != NULL) {
206 workqueue_destroy(sc->sc_task_u.workqueue);
207 sc->sc_task_u.workqueue = NULL;
208 }
209
210 if (sc->sc_drm_dev == NULL)
211 goto out;
212 /* XXX errno Linux->NetBSD */
213 error = -drm_pci_detach(sc->sc_drm_dev, flags);
214 if (error)
215 /* XXX Kinda too late to fail now... */
216 return error;
217 sc->sc_drm_dev = NULL;
218
219 out: pmf_device_deregister(self);
220
221 return 0;
222 }
223
224 static bool
225 amdgpu_do_suspend(device_t self, const pmf_qual_t *qual)
226 {
227 struct amdgpu_softc *const sc = device_private(self);
228 struct drm_device *const dev = sc->sc_drm_dev;
229 int ret;
230 bool is_console = true; /* XXX */
231
232 if (dev == NULL)
233 return true;
234
235 ret = amdgpu_suspend_kms(dev, true, is_console);
236 if (ret)
237 return false;
238
239 return true;
240 }
241
242 static bool
243 amdgpu_do_resume(device_t self, const pmf_qual_t *qual)
244 {
245 struct amdgpu_softc *const sc = device_private(self);
246 struct drm_device *const dev = sc->sc_drm_dev;
247 int ret;
248 bool is_console = true; /* XXX */
249
250 if (dev == NULL)
251 return true;
252
253 ret = amdgpu_resume_kms(dev, true, is_console);
254 if (ret)
255 return false;
256
257 return true;
258 }
259
260 static void
261 amdgpu_task_work(struct work *work, void *cookie __unused)
262 {
263 struct amdgpu_task *const task = container_of(work, struct amdgpu_task,
264 rt_u.work);
265
266 (*task->rt_fn)(task);
267 }
268
269 int
270 amdgpu_task_schedule(device_t self, struct amdgpu_task *task)
271 {
272 struct amdgpu_softc *const sc = device_private(self);
273
274 switch (sc->sc_task_state) {
275 case AMDGPU_TASK_ATTACH:
276 SIMPLEQ_INSERT_TAIL(&sc->sc_task_u.attach, task, rt_u.queue);
277 return 0;
278 case AMDGPU_TASK_WORKQUEUE:
279 if (sc->sc_task_u.workqueue == NULL) {
280 aprint_error_dev(self, "unable to schedule task\n");
281 return EIO;
282 }
283 workqueue_enqueue(sc->sc_task_u.workqueue, &task->rt_u.work,
284 NULL);
285 return 0;
286 default:
287 panic("amdgpu in invalid task state: %d\n",
288 (int)sc->sc_task_state);
289 }
290 }
291