amdgpu_pci.c revision 1.9
1 /* $NetBSD: amdgpu_pci.c,v 1.9 2021/12/19 12:21:29 riastradh Exp $ */ 2 3 /*- 4 * Copyright (c) 2018 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Taylor R. Campbell. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 #include <sys/cdefs.h> 33 __KERNEL_RCSID(0, "$NetBSD: amdgpu_pci.c,v 1.9 2021/12/19 12:21:29 riastradh Exp $"); 34 35 #include <sys/types.h> 36 #include <sys/queue.h> 37 #include <sys/systm.h> 38 #include <sys/workqueue.h> 39 40 #include <dev/pci/pcivar.h> 41 42 #include <linux/pci.h> 43 44 #include <drm/drm_device.h> 45 #include <drm/drm_drv.h> 46 #include <drm/drm_fb_helper.h> 47 #include <drm/drm_pci.h> 48 49 #include <amdgpu.h> 50 #include "amdgpu_drv.h" 51 #include "amdgpu_task.h" 52 53 struct drm_device; 54 55 SIMPLEQ_HEAD(amdgpu_task_head, amdgpu_task); 56 57 struct amdgpu_softc { 58 device_t sc_dev; 59 struct pci_attach_args sc_pa; 60 enum { 61 AMDGPU_TASK_ATTACH, 62 AMDGPU_TASK_WORKQUEUE, 63 } sc_task_state; 64 union { 65 struct workqueue *workqueue; 66 struct amdgpu_task_head attach; 67 } sc_task_u; 68 struct drm_device *sc_drm_dev; 69 struct pci_dev sc_pci_dev; 70 bool sc_pci_attached; 71 bool sc_dev_registered; 72 }; 73 74 static bool amdgpu_pci_lookup(const struct pci_attach_args *, 75 unsigned long *); 76 77 static int amdgpu_match(device_t, cfdata_t, void *); 78 static void amdgpu_attach(device_t, device_t, void *); 79 static void amdgpu_attach_real(device_t); 80 static int amdgpu_detach(device_t, int); 81 static bool amdgpu_do_suspend(device_t, const pmf_qual_t *); 82 static bool amdgpu_do_resume(device_t, const pmf_qual_t *); 83 84 static void amdgpu_task_work(struct work *, void *); 85 86 CFATTACH_DECL_NEW(amdgpu, sizeof(struct amdgpu_softc), 87 amdgpu_match, amdgpu_attach, amdgpu_detach, NULL); 88 89 /* XXX Kludge to get these from amdgpu_drv.c. */ 90 extern struct drm_driver *const amdgpu_drm_driver; 91 extern const struct pci_device_id *const amdgpu_device_ids; 92 extern const size_t amdgpu_n_device_ids; 93 94 static bool 95 amdgpu_pci_lookup(const struct pci_attach_args *pa, unsigned long *flags) 96 { 97 size_t i; 98 99 for (i = 0; i < amdgpu_n_device_ids; i++) { 100 if ((PCI_VENDOR(pa->pa_id) == amdgpu_device_ids[i].vendor) && 101 (PCI_PRODUCT(pa->pa_id) == amdgpu_device_ids[i].device)) 102 break; 103 } 104 105 /* Did we find it? */ 106 if (i == amdgpu_n_device_ids) 107 return false; 108 109 if (flags) 110 *flags = amdgpu_device_ids[i].driver_data; 111 return true; 112 } 113 114 static int 115 amdgpu_match(device_t parent, cfdata_t match, void *aux) 116 { 117 extern int amdgpu_guarantee_initialized(void); 118 const struct pci_attach_args *const pa = aux; 119 int error; 120 121 error = amdgpu_guarantee_initialized(); 122 if (error) { 123 aprint_error("amdgpu: failed to initialize: %d\n", error); 124 return 0; 125 } 126 127 if (!amdgpu_pci_lookup(pa, NULL)) 128 return 0; 129 130 return 7; /* beat genfb_pci and radeon */ 131 } 132 133 static void 134 amdgpu_attach(device_t parent, device_t self, void *aux) 135 { 136 struct amdgpu_softc *const sc = device_private(self); 137 const struct pci_attach_args *const pa = aux; 138 139 pci_aprint_devinfo(pa, NULL); 140 141 if (!pmf_device_register(self, &amdgpu_do_suspend, &amdgpu_do_resume)) 142 aprint_error_dev(self, "unable to establish power handler\n"); 143 144 /* 145 * Trivial initialization first; the rest will come after we 146 * have mounted the root file system and can load firmware 147 * images. 148 */ 149 sc->sc_dev = NULL; 150 sc->sc_pa = *pa; 151 152 config_mountroot(self, &amdgpu_attach_real); 153 } 154 155 static void 156 amdgpu_attach_real(device_t self) 157 { 158 struct amdgpu_softc *const sc = device_private(self); 159 const struct pci_attach_args *const pa = &sc->sc_pa; 160 bool ok __diagused; 161 unsigned long flags = 0; /* XXXGCC */ 162 int error; 163 164 ok = amdgpu_pci_lookup(pa, &flags); 165 KASSERT(ok); 166 167 sc->sc_task_state = AMDGPU_TASK_ATTACH; 168 SIMPLEQ_INIT(&sc->sc_task_u.attach); 169 170 /* Initialize the Linux PCI device descriptor. */ 171 linux_pci_dev_init(&sc->sc_pci_dev, self, device_parent(self), pa, 0); 172 173 sc->sc_drm_dev = drm_dev_alloc(amdgpu_drm_driver, self); 174 if (IS_ERR(sc->sc_drm_dev)) { 175 aprint_error_dev(self, "unable to create drm device: %ld\n", 176 PTR_ERR(sc->sc_drm_dev)); 177 sc->sc_drm_dev = NULL; 178 goto out; 179 } 180 181 /* XXX errno Linux->NetBSD */ 182 error = -drm_pci_attach(sc->sc_drm_dev, &sc->sc_pci_dev); 183 if (error) { 184 aprint_error_dev(self, "unable to attach drm: %d\n", error); 185 goto out; 186 } 187 sc->sc_pci_attached = true; 188 189 /* XXX errno Linux->NetBSD */ 190 error = -drm_dev_register(sc->sc_drm_dev, flags); 191 if (error) { 192 aprint_error_dev(self, "unable to register drm: %d\n", error); 193 return; 194 } 195 sc->sc_dev_registered = true; 196 197 while (!SIMPLEQ_EMPTY(&sc->sc_task_u.attach)) { 198 struct amdgpu_task *const task = 199 SIMPLEQ_FIRST(&sc->sc_task_u.attach); 200 201 SIMPLEQ_REMOVE_HEAD(&sc->sc_task_u.attach, rt_u.queue); 202 (*task->rt_fn)(task); 203 } 204 205 sc->sc_task_state = AMDGPU_TASK_WORKQUEUE; 206 error = workqueue_create(&sc->sc_task_u.workqueue, "amdgpufb", 207 &amdgpu_task_work, NULL, PRI_NONE, IPL_NONE, WQ_MPSAFE); 208 if (error) { 209 aprint_error_dev(self, "unable to create workqueue: %d\n", 210 error); 211 sc->sc_task_u.workqueue = NULL; 212 goto out; 213 } 214 215 out: sc->sc_dev = self; 216 } 217 218 static int 219 amdgpu_detach(device_t self, int flags) 220 { 221 struct amdgpu_softc *const sc = device_private(self); 222 int error; 223 224 if (sc->sc_dev == NULL) 225 /* Not done attaching. */ 226 return EBUSY; 227 228 /* XXX Check for in-use before tearing it all down... */ 229 error = config_detach_children(self, flags); 230 if (error) 231 return error; 232 233 if (sc->sc_task_state == AMDGPU_TASK_ATTACH) 234 goto out0; 235 if (sc->sc_task_u.workqueue != NULL) { 236 workqueue_destroy(sc->sc_task_u.workqueue); 237 sc->sc_task_u.workqueue = NULL; 238 } 239 240 if (sc->sc_drm_dev == NULL) 241 goto out1; 242 if (!sc->sc_pci_attached) 243 goto out2; 244 if (!sc->sc_dev_registered) 245 goto out3; 246 247 drm_dev_unregister(sc->sc_drm_dev); 248 out3: drm_pci_detach(sc->sc_drm_dev); 249 out2: drm_dev_put(sc->sc_drm_dev); 250 sc->sc_drm_dev = NULL; 251 out1: linux_pci_dev_destroy(&sc->sc_pci_dev); 252 out0: pmf_device_deregister(self); 253 return 0; 254 } 255 256 static bool 257 amdgpu_do_suspend(device_t self, const pmf_qual_t *qual) 258 { 259 struct amdgpu_softc *const sc = device_private(self); 260 struct drm_device *const dev = sc->sc_drm_dev; 261 int ret; 262 263 if (dev == NULL) 264 return true; 265 266 ret = amdgpu_device_suspend(dev, /*fbcon*/true); 267 if (ret) 268 return false; 269 270 return true; 271 } 272 273 static bool 274 amdgpu_do_resume(device_t self, const pmf_qual_t *qual) 275 { 276 struct amdgpu_softc *const sc = device_private(self); 277 struct drm_device *const dev = sc->sc_drm_dev; 278 int ret; 279 280 if (dev == NULL) 281 return true; 282 283 ret = amdgpu_device_resume(dev, /*fbcon*/true); 284 if (ret) 285 return false; 286 287 return true; 288 } 289 290 static void 291 amdgpu_task_work(struct work *work, void *cookie __unused) 292 { 293 struct amdgpu_task *const task = container_of(work, struct amdgpu_task, 294 rt_u.work); 295 296 (*task->rt_fn)(task); 297 } 298 299 int 300 amdgpu_task_schedule(device_t self, struct amdgpu_task *task) 301 { 302 struct amdgpu_softc *const sc = device_private(self); 303 304 switch (sc->sc_task_state) { 305 case AMDGPU_TASK_ATTACH: 306 SIMPLEQ_INSERT_TAIL(&sc->sc_task_u.attach, task, rt_u.queue); 307 return 0; 308 case AMDGPU_TASK_WORKQUEUE: 309 if (sc->sc_task_u.workqueue == NULL) { 310 aprint_error_dev(self, "unable to schedule task\n"); 311 return EIO; 312 } 313 workqueue_enqueue(sc->sc_task_u.workqueue, &task->rt_u.work, 314 NULL); 315 return 0; 316 default: 317 panic("amdgpu in invalid task state: %d\n", 318 (int)sc->sc_task_state); 319 } 320 } 321
Indexes created Tue Sep 23 23:09:58 GMT 2025