11.1Sriastrad#
21.3Sriastrad# Copyright 2017 Advanced Micro Devices, Inc.
31.3Sriastrad#
41.3Sriastrad# Permission is hereby granted, free of charge, to any person obtaining a
51.3Sriastrad# copy of this software and associated documentation files (the "Software"),
61.3Sriastrad# to deal in the Software without restriction, including without limitation
71.3Sriastrad# the rights to use, copy, modify, merge, publish, distribute, sublicense,
81.3Sriastrad# and/or sell copies of the Software, and to permit persons to whom the
91.3Sriastrad# Software is furnished to do so, subject to the following conditions:
101.3Sriastrad#
111.3Sriastrad# The above copyright notice and this permission notice shall be included in
121.3Sriastrad# all copies or substantial portions of the Software.
131.3Sriastrad#
141.3Sriastrad# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
151.3Sriastrad# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
161.3Sriastrad# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
171.3Sriastrad# THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
181.3Sriastrad# OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
191.3Sriastrad# ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
201.3Sriastrad# OTHER DEALINGS IN THE SOFTWARE.
211.3Sriastrad#
221.3Sriastrad#
231.1Sriastrad# Makefile for the drm device driver.  This driver provides support for the
241.1Sriastrad# Direct Rendering Infrastructure (DRI) in XFree86 4.1.0 and higher.
251.1Sriastrad
261.3SriastradFULL_AMD_PATH=$(srctree)/$(src)/..
271.3SriastradDISPLAY_FOLDER_NAME=display
281.3SriastradFULL_AMD_DISPLAY_PATH = $(FULL_AMD_PATH)/$(DISPLAY_FOLDER_NAME)
291.3Sriastrad
301.3Sriastradccflags-y := -I$(FULL_AMD_PATH)/include/asic_reg \
311.3Sriastrad	-I$(FULL_AMD_PATH)/include \
321.3Sriastrad	-I$(FULL_AMD_PATH)/amdgpu \
331.3Sriastrad	-I$(FULL_AMD_PATH)/powerplay/inc \
341.3Sriastrad	-I$(FULL_AMD_PATH)/acp/include \
351.3Sriastrad	-I$(FULL_AMD_DISPLAY_PATH) \
361.3Sriastrad	-I$(FULL_AMD_DISPLAY_PATH)/include \
371.3Sriastrad	-I$(FULL_AMD_DISPLAY_PATH)/dc \
381.3Sriastrad	-I$(FULL_AMD_DISPLAY_PATH)/amdgpu_dm \
391.3Sriastrad	-I$(FULL_AMD_PATH)/amdkfd
401.1Sriastrad
411.1Sriastradamdgpu-y := amdgpu_drv.o
421.1Sriastrad
431.1Sriastrad# add KMS driver
441.1Sriastradamdgpu-y += amdgpu_device.o amdgpu_kms.o \
451.1Sriastrad	amdgpu_atombios.o atombios_crtc.o amdgpu_connectors.o \
461.1Sriastrad	atom.o amdgpu_fence.o amdgpu_ttm.o amdgpu_object.o amdgpu_gart.o \
471.1Sriastrad	amdgpu_encoders.o amdgpu_display.o amdgpu_i2c.o \
481.1Sriastrad	amdgpu_fb.o amdgpu_gem.o amdgpu_ring.o \
491.1Sriastrad	amdgpu_cs.o amdgpu_bios.o amdgpu_benchmark.o amdgpu_test.o \
501.1Sriastrad	amdgpu_pm.o atombios_dp.o amdgpu_afmt.o amdgpu_trace_points.o \
511.3Sriastrad	atombios_encoders.o amdgpu_sa.o atombios_i2c.o \
521.3Sriastrad	amdgpu_dma_buf.o amdgpu_vm.o amdgpu_ib.o amdgpu_pll.o \
531.3Sriastrad	amdgpu_ucode.o amdgpu_bo_list.o amdgpu_ctx.o amdgpu_sync.o \
541.3Sriastrad	amdgpu_gtt_mgr.o amdgpu_vram_mgr.o amdgpu_virt.o amdgpu_atomfirmware.o \
551.3Sriastrad	amdgpu_vf_error.o amdgpu_sched.o amdgpu_debugfs.o amdgpu_ids.o \
561.3Sriastrad	amdgpu_gmc.o amdgpu_mmhub.o amdgpu_xgmi.o amdgpu_csa.o amdgpu_ras.o amdgpu_vm_cpu.o \
571.3Sriastrad	amdgpu_vm_sdma.o amdgpu_discovery.o amdgpu_ras_eeprom.o amdgpu_nbio.o \
581.3Sriastrad	amdgpu_umc.o smu_v11_0_i2c.o
591.3Sriastrad
601.3Sriastradamdgpu-$(CONFIG_PERF_EVENTS) += amdgpu_pmu.o
611.1Sriastrad
621.1Sriastrad# add asic specific block
631.1Sriastradamdgpu-$(CONFIG_DRM_AMDGPU_CIK)+= cik.o cik_ih.o kv_smc.o kv_dpm.o \
641.3Sriastrad	dce_v8_0.o gfx_v7_0.o cik_sdma.o uvd_v4_2.o vce_v2_0.o
651.3Sriastrad
661.3Sriastradamdgpu-$(CONFIG_DRM_AMDGPU_SI)+= si.o gmc_v6_0.o gfx_v6_0.o si_ih.o si_dma.o dce_v6_0.o si_dpm.o si_smc.o
671.3Sriastrad
681.3Sriastradamdgpu-y += \
691.3Sriastrad	vi.o mxgpu_vi.o nbio_v6_1.o soc15.o emu_soc.o mxgpu_ai.o nbio_v7_0.o vega10_reg_init.o \
701.3Sriastrad	vega20_reg_init.o nbio_v7_4.o nbio_v2_3.o nv.o navi10_reg_init.o navi14_reg_init.o \
711.3Sriastrad	arct_reg_init.o navi12_reg_init.o mxgpu_nv.o
721.1Sriastrad
731.3Sriastrad# add DF block
741.1Sriastradamdgpu-y += \
751.3Sriastrad	df_v1_7.o \
761.3Sriastrad	df_v3_6.o
771.1Sriastrad
781.1Sriastrad# add GMC block
791.1Sriastradamdgpu-y += \
801.1Sriastrad	gmc_v7_0.o \
811.3Sriastrad	gmc_v8_0.o \
821.3Sriastrad	gfxhub_v1_0.o mmhub_v1_0.o gmc_v9_0.o gfxhub_v1_1.o mmhub_v9_4.o \
831.3Sriastrad	gfxhub_v2_0.o mmhub_v2_0.o gmc_v10_0.o
841.3Sriastrad
851.3Sriastrad# add UMC block
861.3Sriastradamdgpu-y += \
871.3Sriastrad	umc_v6_1.o umc_v6_0.o
881.1Sriastrad
891.1Sriastrad# add IH block
901.1Sriastradamdgpu-y += \
911.1Sriastrad	amdgpu_irq.o \
921.1Sriastrad	amdgpu_ih.o \
931.1Sriastrad	iceland_ih.o \
941.1Sriastrad	tonga_ih.o \
951.3Sriastrad	cz_ih.o \
961.3Sriastrad	vega10_ih.o \
971.3Sriastrad	navi10_ih.o
981.3Sriastrad
991.3Sriastrad# add PSP block
1001.3Sriastradamdgpu-y += \
1011.3Sriastrad	amdgpu_psp.o \
1021.3Sriastrad	psp_v3_1.o \
1031.3Sriastrad	psp_v10_0.o \
1041.3Sriastrad	psp_v11_0.o \
1051.3Sriastrad	psp_v12_0.o
1061.1Sriastrad
1071.1Sriastrad# add SMC block
1081.1Sriastradamdgpu-y += \
1091.3Sriastrad	amdgpu_dpm.o
1101.1Sriastrad
1111.1Sriastrad# add DCE block
1121.1Sriastradamdgpu-y += \
1131.1Sriastrad	dce_v10_0.o \
1141.3Sriastrad	dce_v11_0.o \
1151.3Sriastrad	dce_virtual.o
1161.1Sriastrad
1171.1Sriastrad# add GFX block
1181.1Sriastradamdgpu-y += \
1191.1Sriastrad	amdgpu_gfx.o \
1201.3Sriastrad	amdgpu_rlc.o \
1211.3Sriastrad	gfx_v8_0.o \
1221.3Sriastrad	gfx_v9_0.o \
1231.3Sriastrad	gfx_v9_4.o \
1241.3Sriastrad	gfx_v10_0.o
1251.1Sriastrad
1261.1Sriastrad# add async DMA block
1271.1Sriastradamdgpu-y += \
1281.3Sriastrad	amdgpu_sdma.o \
1291.1Sriastrad	sdma_v2_4.o \
1301.3Sriastrad	sdma_v3_0.o \
1311.3Sriastrad	sdma_v4_0.o \
1321.3Sriastrad	sdma_v5_0.o
1331.3Sriastrad
1341.3Sriastrad# add MES block
1351.3Sriastradamdgpu-y += \
1361.3Sriastrad	mes_v10_1.o
1371.1Sriastrad
1381.1Sriastrad# add UVD block
1391.1Sriastradamdgpu-y += \
1401.1Sriastrad	amdgpu_uvd.o \
1411.1Sriastrad	uvd_v5_0.o \
1421.3Sriastrad	uvd_v6_0.o \
1431.3Sriastrad	uvd_v7_0.o
1441.1Sriastrad
1451.1Sriastrad# add VCE block
1461.1Sriastradamdgpu-y += \
1471.1Sriastrad	amdgpu_vce.o \
1481.3Sriastrad	vce_v3_0.o \
1491.3Sriastrad	vce_v4_0.o
1501.3Sriastrad
1511.3Sriastrad# add VCN and JPEG block
1521.3Sriastradamdgpu-y += \
1531.3Sriastrad	amdgpu_vcn.o \
1541.3Sriastrad	vcn_v1_0.o \
1551.3Sriastrad	vcn_v2_0.o \
1561.3Sriastrad	vcn_v2_5.o \
1571.3Sriastrad	amdgpu_jpeg.o \
1581.3Sriastrad	jpeg_v1_0.o \
1591.3Sriastrad	jpeg_v2_0.o \
1601.3Sriastrad	jpeg_v2_5.o
1611.3Sriastrad
1621.3Sriastrad# add ATHUB block
1631.3Sriastradamdgpu-y += \
1641.3Sriastrad	athub_v1_0.o \
1651.3Sriastrad	athub_v2_0.o
1661.1Sriastrad
1671.1Sriastrad# add amdkfd interfaces
1681.3Sriastradamdgpu-y += amdgpu_amdkfd.o
1691.3Sriastrad
1701.3Sriastradifneq ($(CONFIG_HSA_AMD),)
1711.3SriastradAMDKFD_PATH := ../amdkfd
1721.3Sriastradinclude $(FULL_AMD_PATH)/amdkfd/Makefile
1731.3Sriastradamdgpu-y += $(AMDKFD_FILES)
1741.3Sriastradamdgpu-y += \
1751.3Sriastrad	 amdgpu_amdkfd_fence.o \
1761.3Sriastrad	 amdgpu_amdkfd_gpuvm.o \
1771.3Sriastrad	 amdgpu_amdkfd_gfx_v8.o \
1781.3Sriastrad	 amdgpu_amdkfd_gfx_v9.o \
1791.3Sriastrad	 amdgpu_amdkfd_arcturus.o \
1801.3Sriastrad	 amdgpu_amdkfd_gfx_v10.o
1811.3Sriastrad
1821.3Sriastradifneq ($(CONFIG_DRM_AMDGPU_CIK),)
1831.3Sriastradamdgpu-y += amdgpu_amdkfd_gfx_v7.o
1841.3Sriastradendif
1851.3Sriastrad
1861.3Sriastradendif
1871.1Sriastrad
1881.1Sriastrad# add cgs
1891.1Sriastradamdgpu-y += amdgpu_cgs.o
1901.1Sriastrad
1911.1Sriastrad# GPU scheduler
1921.3Sriastradamdgpu-y += amdgpu_job.o
1931.3Sriastrad
1941.3Sriastrad# ACP componet
1951.3Sriastradifneq ($(CONFIG_DRM_AMD_ACP),)
1961.3Sriastradamdgpu-y += amdgpu_acp.o
1971.3Sriastrad
1981.3SriastradAMDACPPATH := ../acp
1991.3Sriastradinclude $(FULL_AMD_PATH)/acp/Makefile
2001.3Sriastrad
2011.3Sriastradamdgpu-y += $(AMD_ACP_FILES)
2021.3Sriastradendif
2031.1Sriastrad
2041.1Sriastradamdgpu-$(CONFIG_COMPAT) += amdgpu_ioc32.o
2051.1Sriastradamdgpu-$(CONFIG_VGA_SWITCHEROO) += amdgpu_atpx_handler.o
2061.1Sriastradamdgpu-$(CONFIG_ACPI) += amdgpu_acpi.o
2071.3Sriastradamdgpu-$(CONFIG_HMM_MIRROR) += amdgpu_mn.o
2081.3Sriastrad
2091.3Sriastradinclude $(FULL_AMD_PATH)/powerplay/Makefile
2101.3Sriastrad
2111.3Sriastradamdgpu-y += $(AMD_POWERPLAY_FILES)
2121.3Sriastrad
2131.3Sriastradifneq ($(CONFIG_DRM_AMD_DC),)
2141.3Sriastrad
2151.3SriastradRELATIVE_AMD_DISPLAY_PATH = ../$(DISPLAY_FOLDER_NAME)
2161.3Sriastradinclude $(FULL_AMD_DISPLAY_PATH)/Makefile
2171.3Sriastrad
2181.3Sriastradamdgpu-y += $(AMD_DISPLAY_FILES)
2191.3Sriastrad
2201.3Sriastradendif
2211.1Sriastrad
2221.1Sriastradobj-$(CONFIG_DRM_AMDGPU)+= amdgpu.o
223