amdgpu_ids.h revision 1.2 1 /* $NetBSD: amdgpu_ids.h,v 1.2 2021/12/18 23:44:58 riastradh Exp $ */
2
3 /*
4 * Copyright 2017 Advanced Micro Devices, Inc.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
20 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
22 * OTHER DEALINGS IN THE SOFTWARE.
23 *
24 */
25 #ifndef __AMDGPU_IDS_H__
26 #define __AMDGPU_IDS_H__
27
28 #include <linux/types.h>
29 #include <linux/mutex.h>
30 #include <linux/list.h>
31 #include <linux/dma-fence.h>
32
33 #include "amdgpu_sync.h"
34
35 /* maximum number of VMIDs */
36 #define AMDGPU_NUM_VMID 16
37
38 struct amdgpu_device;
39 struct amdgpu_vm;
40 struct amdgpu_ring;
41 struct amdgpu_sync;
42 struct amdgpu_job;
43
44 struct amdgpu_vmid {
45 struct list_head list;
46 struct amdgpu_sync active;
47 struct dma_fence *last_flush;
48 uint64_t owner;
49
50 uint64_t pd_gpu_addr;
51 /* last flushed PD/PT update */
52 struct dma_fence *flushed_updates;
53
54 uint32_t current_gpu_reset_count;
55
56 uint32_t gds_base;
57 uint32_t gds_size;
58 uint32_t gws_base;
59 uint32_t gws_size;
60 uint32_t oa_base;
61 uint32_t oa_size;
62
63 unsigned pasid;
64 struct dma_fence *pasid_mapping;
65 };
66
67 struct amdgpu_vmid_mgr {
68 struct mutex lock;
69 unsigned num_ids;
70 struct list_head ids_lru;
71 struct amdgpu_vmid ids[AMDGPU_NUM_VMID];
72 atomic_t reserved_vmid_num;
73 };
74
75 int amdgpu_pasid_alloc(unsigned int bits);
76 void amdgpu_pasid_free(unsigned int pasid);
77 void amdgpu_pasid_free_delayed(struct dma_resv *resv,
78 unsigned int pasid);
79
80 bool amdgpu_vmid_had_gpu_reset(struct amdgpu_device *adev,
81 struct amdgpu_vmid *id);
82 int amdgpu_vmid_alloc_reserved(struct amdgpu_device *adev,
83 struct amdgpu_vm *vm,
84 unsigned vmhub);
85 void amdgpu_vmid_free_reserved(struct amdgpu_device *adev,
86 struct amdgpu_vm *vm,
87 unsigned vmhub);
88 int amdgpu_vmid_grab(struct amdgpu_vm *vm, struct amdgpu_ring *ring,
89 struct amdgpu_sync *sync, struct dma_fence *fence,
90 struct amdgpu_job *job);
91 void amdgpu_vmid_reset(struct amdgpu_device *adev, unsigned vmhub,
92 unsigned vmid);
93 void amdgpu_vmid_reset_all(struct amdgpu_device *adev);
94
95 void amdgpu_vmid_mgr_init(struct amdgpu_device *adev);
96 void amdgpu_vmid_mgr_fini(struct amdgpu_device *adev);
97
98 #endif
99