1 1.4 riastrad /* $NetBSD: amdgpu_trace.h,v 1.4 2021/12/18 23:44:58 riastradh Exp $ */ 2 1.4 riastrad 3 1.4 riastrad /* 4 1.4 riastrad * Copyright 2017 Advanced Micro Devices, Inc. 5 1.4 riastrad * 6 1.4 riastrad * Permission is hereby granted, free of charge, to any person obtaining a 7 1.4 riastrad * copy of this software and associated documentation files (the "Software"), 8 1.4 riastrad * to deal in the Software without restriction, including without limitation 9 1.4 riastrad * the rights to use, copy, modify, merge, publish, distribute, sublicense, 10 1.4 riastrad * and/or sell copies of the Software, and to permit persons to whom the 11 1.4 riastrad * Software is furnished to do so, subject to the following conditions: 12 1.4 riastrad * 13 1.4 riastrad * The above copyright notice and this permission notice shall be included in 14 1.4 riastrad * all copies or substantial portions of the Software. 15 1.4 riastrad * 16 1.4 riastrad * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 1.4 riastrad * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 1.4 riastrad * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 19 1.4 riastrad * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 20 1.4 riastrad * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 21 1.4 riastrad * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 22 1.4 riastrad * OTHER DEALINGS IN THE SOFTWARE. 23 1.4 riastrad * 24 1.4 riastrad */ 25 1.1 riastrad 26 1.1 riastrad #if !defined(_AMDGPU_TRACE_H) || defined(TRACE_HEADER_MULTI_READ) 27 1.1 riastrad #define _AMDGPU_TRACE_H_ 28 1.1 riastrad 29 1.1 riastrad #include <linux/stringify.h> 30 1.1 riastrad #include <linux/types.h> 31 1.1 riastrad #include <linux/tracepoint.h> 32 1.1 riastrad 33 1.1 riastrad #undef TRACE_SYSTEM 34 1.1 riastrad #define TRACE_SYSTEM amdgpu 35 1.1 riastrad #define TRACE_INCLUDE_FILE amdgpu_trace 36 1.1 riastrad 37 1.4 riastrad #define AMDGPU_JOB_GET_TIMELINE_NAME(job) \ 38 1.4 riastrad job->base.s_fence->finished.ops->get_timeline_name(&job->base.s_fence->finished) 39 1.4 riastrad 40 1.4 riastrad TRACE_EVENT(amdgpu_mm_rreg, 41 1.4 riastrad TP_PROTO(unsigned did, uint32_t reg, uint32_t value), 42 1.4 riastrad TP_ARGS(did, reg, value), 43 1.4 riastrad TP_STRUCT__entry( 44 1.4 riastrad __field(unsigned, did) 45 1.4 riastrad __field(uint32_t, reg) 46 1.4 riastrad __field(uint32_t, value) 47 1.4 riastrad ), 48 1.4 riastrad TP_fast_assign( 49 1.4 riastrad __entry->did = did; 50 1.4 riastrad __entry->reg = reg; 51 1.4 riastrad __entry->value = value; 52 1.4 riastrad ), 53 1.4 riastrad TP_printk("0x%04lx, 0x%08lx, 0x%08lx", 54 1.4 riastrad (unsigned long)__entry->did, 55 1.4 riastrad (unsigned long)__entry->reg, 56 1.4 riastrad (unsigned long)__entry->value) 57 1.4 riastrad ); 58 1.4 riastrad 59 1.4 riastrad TRACE_EVENT(amdgpu_mm_wreg, 60 1.4 riastrad TP_PROTO(unsigned did, uint32_t reg, uint32_t value), 61 1.4 riastrad TP_ARGS(did, reg, value), 62 1.4 riastrad TP_STRUCT__entry( 63 1.4 riastrad __field(unsigned, did) 64 1.4 riastrad __field(uint32_t, reg) 65 1.4 riastrad __field(uint32_t, value) 66 1.4 riastrad ), 67 1.4 riastrad TP_fast_assign( 68 1.4 riastrad __entry->did = did; 69 1.4 riastrad __entry->reg = reg; 70 1.4 riastrad __entry->value = value; 71 1.4 riastrad ), 72 1.4 riastrad TP_printk("0x%04lx, 0x%08lx, 0x%08lx", 73 1.4 riastrad (unsigned long)__entry->did, 74 1.4 riastrad (unsigned long)__entry->reg, 75 1.4 riastrad (unsigned long)__entry->value) 76 1.4 riastrad ); 77 1.4 riastrad 78 1.4 riastrad TRACE_EVENT(amdgpu_iv, 79 1.4 riastrad TP_PROTO(unsigned ih, struct amdgpu_iv_entry *iv), 80 1.4 riastrad TP_ARGS(ih, iv), 81 1.4 riastrad TP_STRUCT__entry( 82 1.4 riastrad __field(unsigned, ih) 83 1.4 riastrad __field(unsigned, client_id) 84 1.4 riastrad __field(unsigned, src_id) 85 1.4 riastrad __field(unsigned, ring_id) 86 1.4 riastrad __field(unsigned, vmid) 87 1.4 riastrad __field(unsigned, vmid_src) 88 1.4 riastrad __field(uint64_t, timestamp) 89 1.4 riastrad __field(unsigned, timestamp_src) 90 1.4 riastrad __field(unsigned, pasid) 91 1.4 riastrad __array(unsigned, src_data, 4) 92 1.4 riastrad ), 93 1.4 riastrad TP_fast_assign( 94 1.4 riastrad __entry->ih = ih; 95 1.4 riastrad __entry->client_id = iv->client_id; 96 1.4 riastrad __entry->src_id = iv->src_id; 97 1.4 riastrad __entry->ring_id = iv->ring_id; 98 1.4 riastrad __entry->vmid = iv->vmid; 99 1.4 riastrad __entry->vmid_src = iv->vmid_src; 100 1.4 riastrad __entry->timestamp = iv->timestamp; 101 1.4 riastrad __entry->timestamp_src = iv->timestamp_src; 102 1.4 riastrad __entry->pasid = iv->pasid; 103 1.4 riastrad __entry->src_data[0] = iv->src_data[0]; 104 1.4 riastrad __entry->src_data[1] = iv->src_data[1]; 105 1.4 riastrad __entry->src_data[2] = iv->src_data[2]; 106 1.4 riastrad __entry->src_data[3] = iv->src_data[3]; 107 1.4 riastrad ), 108 1.4 riastrad TP_printk("ih:%u client_id:%u src_id:%u ring:%u vmid:%u " 109 1.4 riastrad "timestamp: %llu pasid:%u src_data: %08x %08x %08x %08x", 110 1.4 riastrad __entry->ih, __entry->client_id, __entry->src_id, 111 1.4 riastrad __entry->ring_id, __entry->vmid, 112 1.4 riastrad __entry->timestamp, __entry->pasid, 113 1.4 riastrad __entry->src_data[0], __entry->src_data[1], 114 1.4 riastrad __entry->src_data[2], __entry->src_data[3]) 115 1.4 riastrad ); 116 1.4 riastrad 117 1.4 riastrad 118 1.1 riastrad TRACE_EVENT(amdgpu_bo_create, 119 1.1 riastrad TP_PROTO(struct amdgpu_bo *bo), 120 1.1 riastrad TP_ARGS(bo), 121 1.1 riastrad TP_STRUCT__entry( 122 1.1 riastrad __field(struct amdgpu_bo *, bo) 123 1.1 riastrad __field(u32, pages) 124 1.4 riastrad __field(u32, type) 125 1.4 riastrad __field(u32, prefer) 126 1.4 riastrad __field(u32, allow) 127 1.4 riastrad __field(u32, visible) 128 1.1 riastrad ), 129 1.1 riastrad 130 1.1 riastrad TP_fast_assign( 131 1.1 riastrad __entry->bo = bo; 132 1.1 riastrad __entry->pages = bo->tbo.num_pages; 133 1.4 riastrad __entry->type = bo->tbo.mem.mem_type; 134 1.4 riastrad __entry->prefer = bo->preferred_domains; 135 1.4 riastrad __entry->allow = bo->allowed_domains; 136 1.4 riastrad __entry->visible = bo->flags; 137 1.1 riastrad ), 138 1.4 riastrad 139 1.4 riastrad TP_printk("bo=%p, pages=%u, type=%d, preferred=%d, allowed=%d, visible=%d", 140 1.4 riastrad __entry->bo, __entry->pages, __entry->type, 141 1.4 riastrad __entry->prefer, __entry->allow, __entry->visible) 142 1.1 riastrad ); 143 1.1 riastrad 144 1.1 riastrad TRACE_EVENT(amdgpu_cs, 145 1.1 riastrad TP_PROTO(struct amdgpu_cs_parser *p, int i), 146 1.1 riastrad TP_ARGS(p, i), 147 1.1 riastrad TP_STRUCT__entry( 148 1.1 riastrad __field(struct amdgpu_bo_list *, bo_list) 149 1.1 riastrad __field(u32, ring) 150 1.1 riastrad __field(u32, dw) 151 1.1 riastrad __field(u32, fences) 152 1.1 riastrad ), 153 1.1 riastrad 154 1.1 riastrad TP_fast_assign( 155 1.1 riastrad __entry->bo_list = p->bo_list; 156 1.4 riastrad __entry->ring = to_amdgpu_ring(p->entity->rq->sched)->idx; 157 1.4 riastrad __entry->dw = p->job->ibs[i].length_dw; 158 1.1 riastrad __entry->fences = amdgpu_fence_count_emitted( 159 1.4 riastrad to_amdgpu_ring(p->entity->rq->sched)); 160 1.1 riastrad ), 161 1.1 riastrad TP_printk("bo_list=%p, ring=%u, dw=%u, fences=%u", 162 1.1 riastrad __entry->bo_list, __entry->ring, __entry->dw, 163 1.1 riastrad __entry->fences) 164 1.1 riastrad ); 165 1.1 riastrad 166 1.1 riastrad TRACE_EVENT(amdgpu_cs_ioctl, 167 1.1 riastrad TP_PROTO(struct amdgpu_job *job), 168 1.1 riastrad TP_ARGS(job), 169 1.1 riastrad TP_STRUCT__entry( 170 1.4 riastrad __field(uint64_t, sched_job_id) 171 1.4 riastrad __string(timeline, AMDGPU_JOB_GET_TIMELINE_NAME(job)) 172 1.4 riastrad __field(unsigned int, context) 173 1.4 riastrad __field(unsigned int, seqno) 174 1.4 riastrad __field(struct dma_fence *, fence) 175 1.4 riastrad __string(ring, to_amdgpu_ring(job->base.sched)->name) 176 1.1 riastrad __field(u32, num_ibs) 177 1.1 riastrad ), 178 1.1 riastrad 179 1.1 riastrad TP_fast_assign( 180 1.4 riastrad __entry->sched_job_id = job->base.id; 181 1.4 riastrad __assign_str(timeline, AMDGPU_JOB_GET_TIMELINE_NAME(job)) 182 1.4 riastrad __entry->context = job->base.s_fence->finished.context; 183 1.4 riastrad __entry->seqno = job->base.s_fence->finished.seqno; 184 1.4 riastrad __assign_str(ring, to_amdgpu_ring(job->base.sched)->name) 185 1.1 riastrad __entry->num_ibs = job->num_ibs; 186 1.1 riastrad ), 187 1.4 riastrad TP_printk("sched_job=%llu, timeline=%s, context=%u, seqno=%u, ring_name=%s, num_ibs=%u", 188 1.4 riastrad __entry->sched_job_id, __get_str(timeline), __entry->context, 189 1.4 riastrad __entry->seqno, __get_str(ring), __entry->num_ibs) 190 1.1 riastrad ); 191 1.1 riastrad 192 1.1 riastrad TRACE_EVENT(amdgpu_sched_run_job, 193 1.1 riastrad TP_PROTO(struct amdgpu_job *job), 194 1.1 riastrad TP_ARGS(job), 195 1.1 riastrad TP_STRUCT__entry( 196 1.4 riastrad __field(uint64_t, sched_job_id) 197 1.4 riastrad __string(timeline, AMDGPU_JOB_GET_TIMELINE_NAME(job)) 198 1.4 riastrad __field(unsigned int, context) 199 1.4 riastrad __field(unsigned int, seqno) 200 1.4 riastrad __string(ring, to_amdgpu_ring(job->base.sched)->name) 201 1.1 riastrad __field(u32, num_ibs) 202 1.1 riastrad ), 203 1.1 riastrad 204 1.1 riastrad TP_fast_assign( 205 1.4 riastrad __entry->sched_job_id = job->base.id; 206 1.4 riastrad __assign_str(timeline, AMDGPU_JOB_GET_TIMELINE_NAME(job)) 207 1.4 riastrad __entry->context = job->base.s_fence->finished.context; 208 1.4 riastrad __entry->seqno = job->base.s_fence->finished.seqno; 209 1.4 riastrad __assign_str(ring, to_amdgpu_ring(job->base.sched)->name) 210 1.1 riastrad __entry->num_ibs = job->num_ibs; 211 1.1 riastrad ), 212 1.4 riastrad TP_printk("sched_job=%llu, timeline=%s, context=%u, seqno=%u, ring_name=%s, num_ibs=%u", 213 1.4 riastrad __entry->sched_job_id, __get_str(timeline), __entry->context, 214 1.4 riastrad __entry->seqno, __get_str(ring), __entry->num_ibs) 215 1.1 riastrad ); 216 1.1 riastrad 217 1.1 riastrad 218 1.1 riastrad TRACE_EVENT(amdgpu_vm_grab_id, 219 1.4 riastrad TP_PROTO(struct amdgpu_vm *vm, struct amdgpu_ring *ring, 220 1.4 riastrad struct amdgpu_job *job), 221 1.4 riastrad TP_ARGS(vm, ring, job), 222 1.1 riastrad TP_STRUCT__entry( 223 1.4 riastrad __field(u32, pasid) 224 1.4 riastrad __string(ring, ring->name) 225 1.4 riastrad __field(u32, ring) 226 1.1 riastrad __field(u32, vmid) 227 1.4 riastrad __field(u32, vm_hub) 228 1.4 riastrad __field(u64, pd_addr) 229 1.4 riastrad __field(u32, needs_flush) 230 1.1 riastrad ), 231 1.1 riastrad 232 1.1 riastrad TP_fast_assign( 233 1.4 riastrad __entry->pasid = vm->pasid; 234 1.4 riastrad __assign_str(ring, ring->name) 235 1.4 riastrad __entry->vmid = job->vmid; 236 1.4 riastrad __entry->vm_hub = ring->funcs->vmhub, 237 1.4 riastrad __entry->pd_addr = job->vm_pd_addr; 238 1.4 riastrad __entry->needs_flush = job->vm_needs_flush; 239 1.1 riastrad ), 240 1.4 riastrad TP_printk("pasid=%d, ring=%s, id=%u, hub=%u, pd_addr=%010Lx needs_flush=%u", 241 1.4 riastrad __entry->pasid, __get_str(ring), __entry->vmid, 242 1.4 riastrad __entry->vm_hub, __entry->pd_addr, __entry->needs_flush) 243 1.1 riastrad ); 244 1.1 riastrad 245 1.1 riastrad TRACE_EVENT(amdgpu_vm_bo_map, 246 1.1 riastrad TP_PROTO(struct amdgpu_bo_va *bo_va, 247 1.1 riastrad struct amdgpu_bo_va_mapping *mapping), 248 1.1 riastrad TP_ARGS(bo_va, mapping), 249 1.1 riastrad TP_STRUCT__entry( 250 1.1 riastrad __field(struct amdgpu_bo *, bo) 251 1.1 riastrad __field(long, start) 252 1.1 riastrad __field(long, last) 253 1.1 riastrad __field(u64, offset) 254 1.4 riastrad __field(u64, flags) 255 1.1 riastrad ), 256 1.1 riastrad 257 1.1 riastrad TP_fast_assign( 258 1.4 riastrad __entry->bo = bo_va ? bo_va->base.bo : NULL; 259 1.4 riastrad __entry->start = mapping->start; 260 1.4 riastrad __entry->last = mapping->last; 261 1.1 riastrad __entry->offset = mapping->offset; 262 1.1 riastrad __entry->flags = mapping->flags; 263 1.1 riastrad ), 264 1.4 riastrad TP_printk("bo=%p, start=%lx, last=%lx, offset=%010llx, flags=%llx", 265 1.1 riastrad __entry->bo, __entry->start, __entry->last, 266 1.1 riastrad __entry->offset, __entry->flags) 267 1.1 riastrad ); 268 1.1 riastrad 269 1.1 riastrad TRACE_EVENT(amdgpu_vm_bo_unmap, 270 1.1 riastrad TP_PROTO(struct amdgpu_bo_va *bo_va, 271 1.1 riastrad struct amdgpu_bo_va_mapping *mapping), 272 1.1 riastrad TP_ARGS(bo_va, mapping), 273 1.1 riastrad TP_STRUCT__entry( 274 1.1 riastrad __field(struct amdgpu_bo *, bo) 275 1.1 riastrad __field(long, start) 276 1.1 riastrad __field(long, last) 277 1.1 riastrad __field(u64, offset) 278 1.4 riastrad __field(u64, flags) 279 1.1 riastrad ), 280 1.1 riastrad 281 1.1 riastrad TP_fast_assign( 282 1.4 riastrad __entry->bo = bo_va ? bo_va->base.bo : NULL; 283 1.4 riastrad __entry->start = mapping->start; 284 1.4 riastrad __entry->last = mapping->last; 285 1.1 riastrad __entry->offset = mapping->offset; 286 1.1 riastrad __entry->flags = mapping->flags; 287 1.1 riastrad ), 288 1.4 riastrad TP_printk("bo=%p, start=%lx, last=%lx, offset=%010llx, flags=%llx", 289 1.1 riastrad __entry->bo, __entry->start, __entry->last, 290 1.1 riastrad __entry->offset, __entry->flags) 291 1.1 riastrad ); 292 1.1 riastrad 293 1.1 riastrad DECLARE_EVENT_CLASS(amdgpu_vm_mapping, 294 1.1 riastrad TP_PROTO(struct amdgpu_bo_va_mapping *mapping), 295 1.1 riastrad TP_ARGS(mapping), 296 1.1 riastrad TP_STRUCT__entry( 297 1.1 riastrad __field(u64, soffset) 298 1.1 riastrad __field(u64, eoffset) 299 1.4 riastrad __field(u64, flags) 300 1.1 riastrad ), 301 1.1 riastrad 302 1.1 riastrad TP_fast_assign( 303 1.4 riastrad __entry->soffset = mapping->start; 304 1.4 riastrad __entry->eoffset = mapping->last + 1; 305 1.1 riastrad __entry->flags = mapping->flags; 306 1.1 riastrad ), 307 1.4 riastrad TP_printk("soffs=%010llx, eoffs=%010llx, flags=%llx", 308 1.1 riastrad __entry->soffset, __entry->eoffset, __entry->flags) 309 1.1 riastrad ); 310 1.1 riastrad 311 1.1 riastrad DEFINE_EVENT(amdgpu_vm_mapping, amdgpu_vm_bo_update, 312 1.1 riastrad TP_PROTO(struct amdgpu_bo_va_mapping *mapping), 313 1.1 riastrad TP_ARGS(mapping) 314 1.1 riastrad ); 315 1.1 riastrad 316 1.1 riastrad DEFINE_EVENT(amdgpu_vm_mapping, amdgpu_vm_bo_mapping, 317 1.1 riastrad TP_PROTO(struct amdgpu_bo_va_mapping *mapping), 318 1.1 riastrad TP_ARGS(mapping) 319 1.1 riastrad ); 320 1.1 riastrad 321 1.4 riastrad DEFINE_EVENT(amdgpu_vm_mapping, amdgpu_vm_bo_cs, 322 1.4 riastrad TP_PROTO(struct amdgpu_bo_va_mapping *mapping), 323 1.4 riastrad TP_ARGS(mapping) 324 1.4 riastrad ); 325 1.4 riastrad 326 1.4 riastrad TRACE_EVENT(amdgpu_vm_set_ptes, 327 1.1 riastrad TP_PROTO(uint64_t pe, uint64_t addr, unsigned count, 328 1.4 riastrad uint32_t incr, uint64_t flags, bool direct), 329 1.4 riastrad TP_ARGS(pe, addr, count, incr, flags, direct), 330 1.1 riastrad TP_STRUCT__entry( 331 1.1 riastrad __field(u64, pe) 332 1.1 riastrad __field(u64, addr) 333 1.1 riastrad __field(u32, count) 334 1.1 riastrad __field(u32, incr) 335 1.4 riastrad __field(u64, flags) 336 1.4 riastrad __field(bool, direct) 337 1.1 riastrad ), 338 1.1 riastrad 339 1.1 riastrad TP_fast_assign( 340 1.1 riastrad __entry->pe = pe; 341 1.1 riastrad __entry->addr = addr; 342 1.1 riastrad __entry->count = count; 343 1.1 riastrad __entry->incr = incr; 344 1.1 riastrad __entry->flags = flags; 345 1.4 riastrad __entry->direct = direct; 346 1.1 riastrad ), 347 1.4 riastrad TP_printk("pe=%010Lx, addr=%010Lx, incr=%u, flags=%llx, count=%u, " 348 1.4 riastrad "direct=%d", __entry->pe, __entry->addr, __entry->incr, 349 1.4 riastrad __entry->flags, __entry->count, __entry->direct) 350 1.4 riastrad ); 351 1.4 riastrad 352 1.4 riastrad TRACE_EVENT(amdgpu_vm_copy_ptes, 353 1.4 riastrad TP_PROTO(uint64_t pe, uint64_t src, unsigned count, bool direct), 354 1.4 riastrad TP_ARGS(pe, src, count, direct), 355 1.4 riastrad TP_STRUCT__entry( 356 1.4 riastrad __field(u64, pe) 357 1.4 riastrad __field(u64, src) 358 1.4 riastrad __field(u32, count) 359 1.4 riastrad __field(bool, direct) 360 1.4 riastrad ), 361 1.4 riastrad 362 1.4 riastrad TP_fast_assign( 363 1.4 riastrad __entry->pe = pe; 364 1.4 riastrad __entry->src = src; 365 1.4 riastrad __entry->count = count; 366 1.4 riastrad __entry->direct = direct; 367 1.4 riastrad ), 368 1.4 riastrad TP_printk("pe=%010Lx, src=%010Lx, count=%u, direct=%d", 369 1.4 riastrad __entry->pe, __entry->src, __entry->count, 370 1.4 riastrad __entry->direct) 371 1.1 riastrad ); 372 1.1 riastrad 373 1.1 riastrad TRACE_EVENT(amdgpu_vm_flush, 374 1.4 riastrad TP_PROTO(struct amdgpu_ring *ring, unsigned vmid, 375 1.4 riastrad uint64_t pd_addr), 376 1.4 riastrad TP_ARGS(ring, vmid, pd_addr), 377 1.1 riastrad TP_STRUCT__entry( 378 1.4 riastrad __string(ring, ring->name) 379 1.4 riastrad __field(u32, vmid) 380 1.4 riastrad __field(u32, vm_hub) 381 1.1 riastrad __field(u64, pd_addr) 382 1.1 riastrad ), 383 1.1 riastrad 384 1.1 riastrad TP_fast_assign( 385 1.4 riastrad __assign_str(ring, ring->name) 386 1.4 riastrad __entry->vmid = vmid; 387 1.4 riastrad __entry->vm_hub = ring->funcs->vmhub; 388 1.1 riastrad __entry->pd_addr = pd_addr; 389 1.1 riastrad ), 390 1.4 riastrad TP_printk("ring=%s, id=%u, hub=%u, pd_addr=%010Lx", 391 1.4 riastrad __get_str(ring), __entry->vmid, 392 1.4 riastrad __entry->vm_hub,__entry->pd_addr) 393 1.4 riastrad ); 394 1.4 riastrad 395 1.4 riastrad DECLARE_EVENT_CLASS(amdgpu_pasid, 396 1.4 riastrad TP_PROTO(unsigned pasid), 397 1.4 riastrad TP_ARGS(pasid), 398 1.4 riastrad TP_STRUCT__entry( 399 1.4 riastrad __field(unsigned, pasid) 400 1.4 riastrad ), 401 1.4 riastrad TP_fast_assign( 402 1.4 riastrad __entry->pasid = pasid; 403 1.4 riastrad ), 404 1.4 riastrad TP_printk("pasid=%u", __entry->pasid) 405 1.4 riastrad ); 406 1.4 riastrad 407 1.4 riastrad DEFINE_EVENT(amdgpu_pasid, amdgpu_pasid_allocated, 408 1.4 riastrad TP_PROTO(unsigned pasid), 409 1.4 riastrad TP_ARGS(pasid) 410 1.4 riastrad ); 411 1.4 riastrad 412 1.4 riastrad DEFINE_EVENT(amdgpu_pasid, amdgpu_pasid_freed, 413 1.4 riastrad TP_PROTO(unsigned pasid), 414 1.4 riastrad TP_ARGS(pasid) 415 1.1 riastrad ); 416 1.1 riastrad 417 1.1 riastrad TRACE_EVENT(amdgpu_bo_list_set, 418 1.1 riastrad TP_PROTO(struct amdgpu_bo_list *list, struct amdgpu_bo *bo), 419 1.1 riastrad TP_ARGS(list, bo), 420 1.1 riastrad TP_STRUCT__entry( 421 1.1 riastrad __field(struct amdgpu_bo_list *, list) 422 1.1 riastrad __field(struct amdgpu_bo *, bo) 423 1.4 riastrad __field(u64, bo_size) 424 1.1 riastrad ), 425 1.1 riastrad 426 1.1 riastrad TP_fast_assign( 427 1.1 riastrad __entry->list = list; 428 1.1 riastrad __entry->bo = bo; 429 1.4 riastrad __entry->bo_size = amdgpu_bo_size(bo); 430 1.1 riastrad ), 431 1.4 riastrad TP_printk("list=%p, bo=%p, bo_size=%Ld", 432 1.4 riastrad __entry->list, 433 1.4 riastrad __entry->bo, 434 1.4 riastrad __entry->bo_size) 435 1.1 riastrad ); 436 1.1 riastrad 437 1.4 riastrad TRACE_EVENT(amdgpu_cs_bo_status, 438 1.4 riastrad TP_PROTO(uint64_t total_bo, uint64_t total_size), 439 1.4 riastrad TP_ARGS(total_bo, total_size), 440 1.1 riastrad TP_STRUCT__entry( 441 1.4 riastrad __field(u64, total_bo) 442 1.4 riastrad __field(u64, total_size) 443 1.4 riastrad ), 444 1.1 riastrad 445 1.1 riastrad TP_fast_assign( 446 1.4 riastrad __entry->total_bo = total_bo; 447 1.4 riastrad __entry->total_size = total_size; 448 1.4 riastrad ), 449 1.4 riastrad TP_printk("total_bo_size=%Ld, total_bo_count=%Ld", 450 1.4 riastrad __entry->total_bo, __entry->total_size) 451 1.1 riastrad ); 452 1.1 riastrad 453 1.4 riastrad TRACE_EVENT(amdgpu_bo_move, 454 1.4 riastrad TP_PROTO(struct amdgpu_bo* bo, uint32_t new_placement, uint32_t old_placement), 455 1.4 riastrad TP_ARGS(bo, new_placement, old_placement), 456 1.4 riastrad TP_STRUCT__entry( 457 1.4 riastrad __field(struct amdgpu_bo *, bo) 458 1.4 riastrad __field(u64, bo_size) 459 1.4 riastrad __field(u32, new_placement) 460 1.4 riastrad __field(u32, old_placement) 461 1.4 riastrad ), 462 1.1 riastrad 463 1.4 riastrad TP_fast_assign( 464 1.4 riastrad __entry->bo = bo; 465 1.4 riastrad __entry->bo_size = amdgpu_bo_size(bo); 466 1.4 riastrad __entry->new_placement = new_placement; 467 1.4 riastrad __entry->old_placement = old_placement; 468 1.4 riastrad ), 469 1.4 riastrad TP_printk("bo=%p, from=%d, to=%d, size=%Ld", 470 1.4 riastrad __entry->bo, __entry->old_placement, 471 1.4 riastrad __entry->new_placement, __entry->bo_size) 472 1.1 riastrad ); 473 1.1 riastrad 474 1.4 riastrad TRACE_EVENT(amdgpu_ib_pipe_sync, 475 1.4 riastrad TP_PROTO(struct amdgpu_job *sched_job, struct dma_fence *fence), 476 1.4 riastrad TP_ARGS(sched_job, fence), 477 1.4 riastrad TP_STRUCT__entry( 478 1.4 riastrad __string(ring, sched_job->base.sched->name) 479 1.4 riastrad __field(uint64_t, id) 480 1.4 riastrad __field(struct dma_fence *, fence) 481 1.4 riastrad __field(uint64_t, ctx) 482 1.4 riastrad __field(unsigned, seqno) 483 1.4 riastrad ), 484 1.1 riastrad 485 1.4 riastrad TP_fast_assign( 486 1.4 riastrad __assign_str(ring, sched_job->base.sched->name) 487 1.4 riastrad __entry->id = sched_job->base.id; 488 1.4 riastrad __entry->fence = fence; 489 1.4 riastrad __entry->ctx = fence->context; 490 1.4 riastrad __entry->seqno = fence->seqno; 491 1.4 riastrad ), 492 1.4 riastrad TP_printk("job ring=%s, id=%llu, need pipe sync to fence=%p, context=%llu, seq=%u", 493 1.4 riastrad __get_str(ring), __entry->id, 494 1.4 riastrad __entry->fence, __entry->ctx, 495 1.4 riastrad __entry->seqno) 496 1.1 riastrad ); 497 1.1 riastrad 498 1.4 riastrad #undef AMDGPU_JOB_GET_TIMELINE_NAME 499 1.1 riastrad #endif 500 1.1 riastrad 501 1.1 riastrad /* This part must be outside protection */ 502 1.1 riastrad #undef TRACE_INCLUDE_PATH 503 1.4 riastrad #define TRACE_INCLUDE_PATH ../../drivers/gpu/drm/amd/amdgpu 504 1.1 riastrad #include <trace/define_trace.h> 505