amdgpu_ttm.h revision 1.1.1.1 1 /* $NetBSD: amdgpu_ttm.h,v 1.1.1.1 2021/12/18 20:11:12 riastradh Exp $ */
2
3 /*
4 * Copyright 2016 Advanced Micro Devices, Inc.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
20 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
22 * OTHER DEALINGS IN THE SOFTWARE.
23 *
24 */
25
26 #ifndef __AMDGPU_TTM_H__
27 #define __AMDGPU_TTM_H__
28
29 #include "amdgpu.h"
30 #include <drm/gpu_scheduler.h>
31
32 #define AMDGPU_PL_GDS (TTM_PL_PRIV + 0)
33 #define AMDGPU_PL_GWS (TTM_PL_PRIV + 1)
34 #define AMDGPU_PL_OA (TTM_PL_PRIV + 2)
35
36 #define AMDGPU_PL_FLAG_GDS (TTM_PL_FLAG_PRIV << 0)
37 #define AMDGPU_PL_FLAG_GWS (TTM_PL_FLAG_PRIV << 1)
38 #define AMDGPU_PL_FLAG_OA (TTM_PL_FLAG_PRIV << 2)
39
40 #define AMDGPU_GTT_MAX_TRANSFER_SIZE 512
41 #define AMDGPU_GTT_NUM_TRANSFER_WINDOWS 2
42
43 #define AMDGPU_POISON 0xd0bed0be
44
45 struct amdgpu_mman {
46 struct ttm_bo_device bdev;
47 bool mem_global_referenced;
48 bool initialized;
49 void __iomem *aper_base_kaddr;
50
51 #if defined(CONFIG_DEBUG_FS)
52 struct dentry *debugfs_entries[8];
53 #endif
54
55 /* buffer handling */
56 const struct amdgpu_buffer_funcs *buffer_funcs;
57 struct amdgpu_ring *buffer_funcs_ring;
58 bool buffer_funcs_enabled;
59
60 struct mutex gtt_window_lock;
61 /* Scheduler entity for buffer moves */
62 struct drm_sched_entity entity;
63 };
64
65 struct amdgpu_copy_mem {
66 struct ttm_buffer_object *bo;
67 struct ttm_mem_reg *mem;
68 unsigned long offset;
69 };
70
71 extern const struct ttm_mem_type_manager_func amdgpu_gtt_mgr_func;
72 extern const struct ttm_mem_type_manager_func amdgpu_vram_mgr_func;
73
74 bool amdgpu_gtt_mgr_has_gart_addr(struct ttm_mem_reg *mem);
75 uint64_t amdgpu_gtt_mgr_usage(struct ttm_mem_type_manager *man);
76 int amdgpu_gtt_mgr_recover(struct ttm_mem_type_manager *man);
77
78 u64 amdgpu_vram_mgr_bo_visible_size(struct amdgpu_bo *bo);
79 uint64_t amdgpu_vram_mgr_usage(struct ttm_mem_type_manager *man);
80 uint64_t amdgpu_vram_mgr_vis_usage(struct ttm_mem_type_manager *man);
81
82 int amdgpu_ttm_init(struct amdgpu_device *adev);
83 void amdgpu_ttm_late_init(struct amdgpu_device *adev);
84 void amdgpu_ttm_fini(struct amdgpu_device *adev);
85 void amdgpu_ttm_set_buffer_funcs_status(struct amdgpu_device *adev,
86 bool enable);
87
88 int amdgpu_copy_buffer(struct amdgpu_ring *ring, uint64_t src_offset,
89 uint64_t dst_offset, uint32_t byte_count,
90 struct dma_resv *resv,
91 struct dma_fence **fence, bool direct_submit,
92 bool vm_needs_flush);
93 int amdgpu_ttm_copy_mem_to_mem(struct amdgpu_device *adev,
94 struct amdgpu_copy_mem *src,
95 struct amdgpu_copy_mem *dst,
96 uint64_t size,
97 struct dma_resv *resv,
98 struct dma_fence **f);
99 int amdgpu_fill_buffer(struct amdgpu_bo *bo,
100 uint32_t src_data,
101 struct dma_resv *resv,
102 struct dma_fence **fence);
103
104 int amdgpu_mmap(struct file *filp, struct vm_area_struct *vma);
105 int amdgpu_ttm_alloc_gart(struct ttm_buffer_object *bo);
106 int amdgpu_ttm_recover_gart(struct ttm_buffer_object *tbo);
107
108 #if IS_ENABLED(CONFIG_DRM_AMDGPU_USERPTR)
109 int amdgpu_ttm_tt_get_user_pages(struct amdgpu_bo *bo, struct page **pages);
110 bool amdgpu_ttm_tt_get_user_pages_done(struct ttm_tt *ttm);
111 #else
112 static inline int amdgpu_ttm_tt_get_user_pages(struct amdgpu_bo *bo,
113 struct page **pages)
114 {
115 return -EPERM;
116 }
117 static inline bool amdgpu_ttm_tt_get_user_pages_done(struct ttm_tt *ttm)
118 {
119 return false;
120 }
121 #endif
122
123 void amdgpu_ttm_tt_set_user_pages(struct ttm_tt *ttm, struct page **pages);
124 int amdgpu_ttm_tt_set_userptr(struct ttm_tt *ttm, uint64_t addr,
125 uint32_t flags);
126 bool amdgpu_ttm_tt_has_userptr(struct ttm_tt *ttm);
127 struct mm_struct *amdgpu_ttm_tt_get_usermm(struct ttm_tt *ttm);
128 bool amdgpu_ttm_tt_affect_userptr(struct ttm_tt *ttm, unsigned long start,
129 unsigned long end);
130 bool amdgpu_ttm_tt_userptr_invalidated(struct ttm_tt *ttm,
131 int *last_invalidated);
132 bool amdgpu_ttm_tt_is_userptr(struct ttm_tt *ttm);
133 bool amdgpu_ttm_tt_is_readonly(struct ttm_tt *ttm);
134 uint64_t amdgpu_ttm_tt_pde_flags(struct ttm_tt *ttm, struct ttm_mem_reg *mem);
135 uint64_t amdgpu_ttm_tt_pte_flags(struct amdgpu_device *adev, struct ttm_tt *ttm,
136 struct ttm_mem_reg *mem);
137
138 #endif
139