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      1  1.1  riastrad /*	$NetBSD: amdgpu_vce.h,v 1.3 2021/12/18 23:44:58 riastradh Exp $	*/
      2  1.1  riastrad 
      3  1.1  riastrad /*
      4  1.1  riastrad  * Copyright 2014 Advanced Micro Devices, Inc.
      5  1.1  riastrad  *
      6  1.1  riastrad  * Permission is hereby granted, free of charge, to any person obtaining a
      7  1.1  riastrad  * copy of this software and associated documentation files (the "Software"),
      8  1.1  riastrad  * to deal in the Software without restriction, including without limitation
      9  1.1  riastrad  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
     10  1.1  riastrad  * and/or sell copies of the Software, and to permit persons to whom the
     11  1.1  riastrad  * Software is furnished to do so, subject to the following conditions:
     12  1.1  riastrad  *
     13  1.1  riastrad  * The above copyright notice and this permission notice shall be included in
     14  1.1  riastrad  * all copies or substantial portions of the Software.
     15  1.1  riastrad  *
     16  1.1  riastrad  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
     17  1.1  riastrad  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
     18  1.1  riastrad  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
     19  1.1  riastrad  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
     20  1.1  riastrad  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
     21  1.1  riastrad  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
     22  1.1  riastrad  * OTHER DEALINGS IN THE SOFTWARE.
     23  1.1  riastrad  *
     24  1.1  riastrad  */
     25  1.1  riastrad 
     26  1.1  riastrad #ifndef __AMDGPU_VCE_H__
     27  1.1  riastrad #define __AMDGPU_VCE_H__
     28  1.1  riastrad 
     29  1.3  riastrad #define AMDGPU_MAX_VCE_HANDLES	16
     30  1.3  riastrad #define AMDGPU_VCE_FIRMWARE_OFFSET 256
     31  1.3  riastrad 
     32  1.3  riastrad #define AMDGPU_VCE_HARVEST_VCE0 (1 << 0)
     33  1.3  riastrad #define AMDGPU_VCE_HARVEST_VCE1 (1 << 1)
     34  1.3  riastrad 
     35  1.3  riastrad #define AMDGPU_VCE_FW_53_45	((53 << 24) | (45 << 16))
     36  1.3  riastrad 
     37  1.3  riastrad struct amdgpu_vce {
     38  1.3  riastrad 	struct amdgpu_bo	*vcpu_bo;
     39  1.3  riastrad 	uint64_t		gpu_addr;
     40  1.3  riastrad 	void			*cpu_addr;
     41  1.3  riastrad 	void			*saved_bo;
     42  1.3  riastrad 	unsigned		fw_version;
     43  1.3  riastrad 	unsigned		fb_version;
     44  1.3  riastrad 	atomic_t		handles[AMDGPU_MAX_VCE_HANDLES];
     45  1.3  riastrad 	struct drm_file		*filp[AMDGPU_MAX_VCE_HANDLES];
     46  1.3  riastrad 	uint32_t		img_size[AMDGPU_MAX_VCE_HANDLES];
     47  1.3  riastrad 	struct delayed_work	idle_work;
     48  1.3  riastrad 	struct mutex		idle_mutex;
     49  1.3  riastrad 	const struct firmware	*fw;	/* VCE firmware */
     50  1.3  riastrad 	struct amdgpu_ring	ring[AMDGPU_MAX_VCE_RINGS];
     51  1.3  riastrad 	struct amdgpu_irq_src	irq;
     52  1.3  riastrad 	unsigned		harvest_config;
     53  1.3  riastrad 	struct drm_sched_entity	entity;
     54  1.3  riastrad 	uint32_t                srbm_soft_reset;
     55  1.3  riastrad 	unsigned		num_rings;
     56  1.3  riastrad };
     57  1.3  riastrad 
     58  1.1  riastrad int amdgpu_vce_sw_init(struct amdgpu_device *adev, unsigned long size);
     59  1.1  riastrad int amdgpu_vce_sw_fini(struct amdgpu_device *adev);
     60  1.3  riastrad int amdgpu_vce_entity_init(struct amdgpu_device *adev);
     61  1.1  riastrad int amdgpu_vce_suspend(struct amdgpu_device *adev);
     62  1.1  riastrad int amdgpu_vce_resume(struct amdgpu_device *adev);
     63  1.1  riastrad void amdgpu_vce_free_handles(struct amdgpu_device *adev, struct drm_file *filp);
     64  1.1  riastrad int amdgpu_vce_ring_parse_cs(struct amdgpu_cs_parser *p, uint32_t ib_idx);
     65  1.3  riastrad int amdgpu_vce_ring_parse_cs_vm(struct amdgpu_cs_parser *p, uint32_t ib_idx);
     66  1.3  riastrad void amdgpu_vce_ring_emit_ib(struct amdgpu_ring *ring, struct amdgpu_job *job,
     67  1.3  riastrad 				struct amdgpu_ib *ib, uint32_t flags);
     68  1.1  riastrad void amdgpu_vce_ring_emit_fence(struct amdgpu_ring *ring, u64 addr, u64 seq,
     69  1.1  riastrad 				unsigned flags);
     70  1.1  riastrad int amdgpu_vce_ring_test_ring(struct amdgpu_ring *ring);
     71  1.3  riastrad int amdgpu_vce_ring_test_ib(struct amdgpu_ring *ring, long timeout);
     72  1.3  riastrad void amdgpu_vce_ring_begin_use(struct amdgpu_ring *ring);
     73  1.3  riastrad void amdgpu_vce_ring_end_use(struct amdgpu_ring *ring);
     74  1.3  riastrad unsigned amdgpu_vce_ring_get_emit_ib_size(struct amdgpu_ring *ring);
     75  1.3  riastrad unsigned amdgpu_vce_ring_get_dma_frame_size(struct amdgpu_ring *ring);
     76  1.1  riastrad 
     77  1.1  riastrad #endif
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