1 1.1 riastrad /* $NetBSD: arcturus_ppt.h,v 1.2 2021/12/18 23:45:26 riastradh Exp $ */ 2 1.1 riastrad 3 1.1 riastrad /* 4 1.1 riastrad * Copyright 2019 Advanced Micro Devices, Inc. 5 1.1 riastrad * 6 1.1 riastrad * Permission is hereby granted, free of charge, to any person obtaining a 7 1.1 riastrad * copy of this software and associated documentation files (the "Software"), 8 1.1 riastrad * to deal in the Software without restriction, including without limitation 9 1.1 riastrad * the rights to use, copy, modify, merge, publish, distribute, sublicense, 10 1.1 riastrad * and/or sell copies of the Software, and to permit persons to whom the 11 1.1 riastrad * Software is furnished to do so, subject to the following conditions: 12 1.1 riastrad * 13 1.1 riastrad * The above copyright notice and this permission notice shall be included in 14 1.1 riastrad * all copies or substantial portions of the Software. 15 1.1 riastrad * 16 1.1 riastrad * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 1.1 riastrad * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 1.1 riastrad * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 19 1.1 riastrad * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 20 1.1 riastrad * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 21 1.1 riastrad * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 22 1.1 riastrad * OTHER DEALINGS IN THE SOFTWARE. 23 1.1 riastrad * 24 1.1 riastrad */ 25 1.1 riastrad #ifndef __ARCTURUS_PPT_H__ 26 1.1 riastrad #define __ARCTURUS_PPT_H__ 27 1.1 riastrad 28 1.1 riastrad #define ARCTURUS_UMD_PSTATE_GFXCLK_LEVEL 0x3 29 1.1 riastrad #define ARCTURUS_UMD_PSTATE_SOCCLK_LEVEL 0x3 30 1.1 riastrad #define ARCTURUS_UMD_PSTATE_MCLK_LEVEL 0x2 31 1.1 riastrad 32 1.1 riastrad #define MAX_DPM_NUMBER 16 33 1.1 riastrad #define MAX_PCIE_CONF 2 34 1.1 riastrad 35 1.1 riastrad struct arcturus_dpm_level { 36 1.1 riastrad bool enabled; 37 1.1 riastrad uint32_t value; 38 1.1 riastrad uint32_t param1; 39 1.1 riastrad }; 40 1.1 riastrad 41 1.1 riastrad struct arcturus_dpm_state { 42 1.1 riastrad uint32_t soft_min_level; 43 1.1 riastrad uint32_t soft_max_level; 44 1.1 riastrad uint32_t hard_min_level; 45 1.1 riastrad uint32_t hard_max_level; 46 1.1 riastrad }; 47 1.1 riastrad 48 1.1 riastrad struct arcturus_single_dpm_table { 49 1.1 riastrad uint32_t count; 50 1.1 riastrad struct arcturus_dpm_state dpm_state; 51 1.1 riastrad struct arcturus_dpm_level dpm_levels[MAX_DPM_NUMBER]; 52 1.1 riastrad }; 53 1.1 riastrad 54 1.1 riastrad struct arcturus_pcie_table { 55 1.1 riastrad uint16_t count; 56 1.1 riastrad uint8_t pcie_gen[MAX_PCIE_CONF]; 57 1.1 riastrad uint8_t pcie_lane[MAX_PCIE_CONF]; 58 1.1 riastrad uint32_t lclk[MAX_PCIE_CONF]; 59 1.1 riastrad }; 60 1.1 riastrad 61 1.1 riastrad struct arcturus_dpm_table { 62 1.1 riastrad struct arcturus_single_dpm_table soc_table; 63 1.1 riastrad struct arcturus_single_dpm_table gfx_table; 64 1.1 riastrad struct arcturus_single_dpm_table mem_table; 65 1.1 riastrad struct arcturus_single_dpm_table eclk_table; 66 1.1 riastrad struct arcturus_single_dpm_table vclk_table; 67 1.1 riastrad struct arcturus_single_dpm_table dclk_table; 68 1.1 riastrad struct arcturus_single_dpm_table fclk_table; 69 1.1 riastrad struct arcturus_pcie_table pcie_table; 70 1.1 riastrad }; 71 1.1 riastrad 72 1.1 riastrad extern void arcturus_set_ppt_funcs(struct smu_context *smu); 73 1.1 riastrad 74 1.1 riastrad #endif 75