smu10.h revision 1.2
1 /* $NetBSD: smu10.h,v 1.2 2021/12/18 23:45:26 riastradh Exp $ */ 2 3 /* 4 * Copyright 2017 Advanced Micro Devices, Inc. 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a 7 * copy of this software and associated documentation files (the "Software"), 8 * to deal in the Software without restriction, including without limitation 9 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 10 * and/or sell copies of the Software, and to permit persons to whom the 11 * Software is furnished to do so, subject to the following conditions: 12 * 13 * The above copyright notice and this permission notice shall be included in 14 * all copies or substantial portions of the Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 19 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 20 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 22 * OTHER DEALINGS IN THE SOFTWARE. 23 * 24 */ 25 26 #ifndef SMU10_H 27 #define SMU10_H 28 29 #pragma pack(push, 1) 30 31 #define ENABLE_DEBUG_FEATURES 32 33 /* Feature Control Defines */ 34 #define FEATURE_CCLK_CONTROLLER_BIT 0 35 #define FEATURE_FAN_CONTROLLER_BIT 1 36 #define FEATURE_DATA_CALCULATION_BIT 2 37 #define FEATURE_PPT_BIT 3 38 #define FEATURE_TDC_BIT 4 39 #define FEATURE_THERMAL_BIT 5 40 #define FEATURE_FIT_BIT 6 41 #define FEATURE_EDC_BIT 7 42 #define FEATURE_PLL_POWER_DOWN_BIT 8 43 #define FEATURE_ULV_BIT 9 44 #define FEATURE_VDDOFF_BIT 10 45 #define FEATURE_VCN_DPM_BIT 11 46 #define FEATURE_ACP_DPM_BIT 12 47 #define FEATURE_ISP_DPM_BIT 13 48 #define FEATURE_FCLK_DPM_BIT 14 49 #define FEATURE_SOCCLK_DPM_BIT 15 50 #define FEATURE_MP0CLK_DPM_BIT 16 51 #define FEATURE_LCLK_DPM_BIT 17 52 #define FEATURE_SHUBCLK_DPM_BIT 18 53 #define FEATURE_DCEFCLK_DPM_BIT 19 54 #define FEATURE_GFX_DPM_BIT 20 55 #define FEATURE_DS_GFXCLK_BIT 21 56 #define FEATURE_DS_SOCCLK_BIT 22 57 #define FEATURE_DS_LCLK_BIT 23 58 #define FEATURE_DS_DCEFCLK_BIT 24 59 #define FEATURE_DS_SHUBCLK_BIT 25 60 #define FEATURE_RM_BIT 26 61 #define FEATURE_S0i2_BIT 27 62 #define FEATURE_WHISPER_MODE_BIT 28 63 #define FEATURE_DS_FCLK_BIT 29 64 #define FEATURE_DS_SMNCLK_BIT 30 65 #define FEATURE_DS_MP1CLK_BIT 31 66 #define FEATURE_DS_MP0CLK_BIT 32 67 #define FEATURE_MGCG_BIT 33 68 #define FEATURE_DS_FUSE_SRAM_BIT 34 69 #define FEATURE_GFX_CKS 35 70 #define FEATURE_PSI0_BIT 36 71 #define FEATURE_PROCHOT_BIT 37 72 #define FEATURE_CPUOFF_BIT 38 73 #define FEATURE_STAPM_BIT 39 74 #define FEATURE_CORE_CSTATES_BIT 40 75 #define FEATURE_SPARE_41_BIT 41 76 #define FEATURE_SPARE_42_BIT 42 77 #define FEATURE_SPARE_43_BIT 43 78 #define FEATURE_SPARE_44_BIT 44 79 #define FEATURE_SPARE_45_BIT 45 80 #define FEATURE_SPARE_46_BIT 46 81 #define FEATURE_SPARE_47_BIT 47 82 #define FEATURE_SPARE_48_BIT 48 83 #define FEATURE_SPARE_49_BIT 49 84 #define FEATURE_SPARE_50_BIT 50 85 #define FEATURE_SPARE_51_BIT 51 86 #define FEATURE_SPARE_52_BIT 52 87 #define FEATURE_SPARE_53_BIT 53 88 #define FEATURE_SPARE_54_BIT 54 89 #define FEATURE_SPARE_55_BIT 55 90 #define FEATURE_SPARE_56_BIT 56 91 #define FEATURE_SPARE_57_BIT 57 92 #define FEATURE_SPARE_58_BIT 58 93 #define FEATURE_SPARE_59_BIT 59 94 #define FEATURE_SPARE_60_BIT 60 95 #define FEATURE_SPARE_61_BIT 61 96 #define FEATURE_SPARE_62_BIT 62 97 #define FEATURE_SPARE_63_BIT 63 98 99 #define NUM_FEATURES 64 100 101 #define FEATURE_CCLK_CONTROLLER_MASK (1 << FEATURE_CCLK_CONTROLLER_BIT) 102 #define FEATURE_FAN_CONTROLLER_MASK (1 << FEATURE_FAN_CONTROLLER_BIT) 103 #define FEATURE_DATA_CALCULATION_MASK (1 << FEATURE_DATA_CALCULATION_BIT) 104 #define FEATURE_PPT_MASK (1 << FEATURE_PPT_BIT) 105 #define FEATURE_TDC_MASK (1 << FEATURE_TDC_BIT) 106 #define FEATURE_THERMAL_MASK (1 << FEATURE_THERMAL_BIT) 107 #define FEATURE_FIT_MASK (1 << FEATURE_FIT_BIT) 108 #define FEATURE_EDC_MASK (1 << FEATURE_EDC_BIT) 109 #define FEATURE_PLL_POWER_DOWN_MASK (1 << FEATURE_PLL_POWER_DOWN_BIT) 110 #define FEATURE_ULV_MASK (1 << FEATURE_ULV_BIT) 111 #define FEATURE_VDDOFF_MASK (1 << FEATURE_VDDOFF_BIT) 112 #define FEATURE_VCN_DPM_MASK (1 << FEATURE_VCN_DPM_BIT) 113 #define FEATURE_ACP_DPM_MASK (1 << FEATURE_ACP_DPM_BIT) 114 #define FEATURE_ISP_DPM_MASK (1 << FEATURE_ISP_DPM_BIT) 115 #define FEATURE_FCLK_DPM_MASK (1 << FEATURE_FCLK_DPM_BIT) 116 #define FEATURE_SOCCLK_DPM_MASK (1 << FEATURE_SOCCLK_DPM_BIT) 117 #define FEATURE_MP0CLK_DPM_MASK (1 << FEATURE_MP0CLK_DPM_BIT) 118 #define FEATURE_LCLK_DPM_MASK (1 << FEATURE_LCLK_DPM_BIT) 119 #define FEATURE_SHUBCLK_DPM_MASK (1 << FEATURE_SHUBCLK_DPM_BIT) 120 #define FEATURE_DCEFCLK_DPM_MASK (1 << FEATURE_DCEFCLK_DPM_BIT) 121 #define FEATURE_GFX_DPM_MASK (1 << FEATURE_GFX_DPM_BIT) 122 #define FEATURE_DS_GFXCLK_MASK (1 << FEATURE_DS_GFXCLK_BIT) 123 #define FEATURE_DS_SOCCLK_MASK (1 << FEATURE_DS_SOCCLK_BIT) 124 #define FEATURE_DS_LCLK_MASK (1 << FEATURE_DS_LCLK_BIT) 125 #define FEATURE_DS_DCEFCLK_MASK (1 << FEATURE_DS_DCEFCLK_BIT) 126 #define FEATURE_DS_SHUBCLK_MASK (1 << FEATURE_DS_SHUBCLK_BIT) 127 #define FEATURE_RM_MASK (1 << FEATURE_RM_BIT) 128 #define FEATURE_DS_FCLK_MASK (1 << FEATURE_DS_FCLK_BIT) 129 #define FEATURE_DS_SMNCLK_MASK (1 << FEATURE_DS_SMNCLK_BIT) 130 #define FEATURE_DS_MP1CLK_MASK (1 << FEATURE_DS_MP1CLK_BIT) 131 #define FEATURE_DS_MP0CLK_MASK (1 << FEATURE_DS_MP0CLK_BIT) 132 #define FEATURE_MGCG_MASK (1 << FEATURE_MGCG_BIT) 133 #define FEATURE_DS_FUSE_SRAM_MASK (1 << FEATURE_DS_FUSE_SRAM_BIT) 134 #define FEATURE_PSI0_MASK (1 << FEATURE_PSI0_BIT) 135 #define FEATURE_STAPM_MASK (1 << FEATURE_STAPM_BIT) 136 #define FEATURE_PROCHOT_MASK (1 << FEATURE_PROCHOT_BIT) 137 #define FEATURE_CPUOFF_MASK (1 << FEATURE_CPUOFF_BIT) 138 #define FEATURE_CORE_CSTATES_MASK (1 << FEATURE_CORE_CSTATES_BIT) 139 140 /* Workload bits */ 141 #define WORKLOAD_DEFAULT_BIT 0 142 #define WORKLOAD_PPLIB_FULL_SCREEN_3D_BIT 1 143 #define WORKLOAD_PPLIB_POWER_SAVING_BIT 2 144 #define WORKLOAD_PPLIB_VIDEO_BIT 3 145 #define WORKLOAD_PPLIB_VR_BIT 4 146 #define WORKLOAD_PPLIB_COMPUTE_BIT 5 147 #define WORKLOAD_PPLIB_CUSTOM_BIT 6 148 #define WORKLOAD_PPLIB_COUNT 7 149 150 typedef struct { 151 /* MP1_EXT_SCRATCH0 */ 152 uint32_t CurrLevel_ACP : 4; 153 uint32_t CurrLevel_ISP : 4; 154 uint32_t CurrLevel_VCN : 4; 155 uint32_t CurrLevel_LCLK : 4; 156 uint32_t CurrLevel_MP0CLK : 4; 157 uint32_t CurrLevel_FCLK : 4; 158 uint32_t CurrLevel_SOCCLK : 4; 159 uint32_t CurrLevel_DCEFCLK : 4; 160 /* MP1_EXT_SCRATCH1 */ 161 uint32_t TargLevel_ACP : 4; 162 uint32_t TargLevel_ISP : 4; 163 uint32_t TargLevel_VCN : 4; 164 uint32_t TargLevel_LCLK : 4; 165 uint32_t TargLevel_MP0CLK : 4; 166 uint32_t TargLevel_FCLK : 4; 167 uint32_t TargLevel_SOCCLK : 4; 168 uint32_t TargLevel_DCEFCLK : 4; 169 /* MP1_EXT_SCRATCH2 */ 170 uint32_t CurrLevel_SHUBCLK : 4; 171 uint32_t TargLevel_SHUBCLK : 4; 172 uint32_t InUlv : 1; 173 uint32_t InS0i2 : 1; 174 uint32_t InWhisperMode : 1; 175 uint32_t Reserved : 21; 176 /* MP1_EXT_SCRATCH3-4 */ 177 uint32_t Reserved2[2]; 178 /* MP1_EXT_SCRATCH5 */ 179 uint32_t FeatureStatus[NUM_FEATURES / 32]; 180 } FwStatus_t; 181 182 #define TABLE_BIOS_IF 0 /* Called by BIOS */ 183 #define TABLE_WATERMARKS 1 /* Called by Driver */ 184 #define TABLE_CUSTOM_DPM 2 /* Called by Driver */ 185 #define TABLE_PMSTATUSLOG 3 /* Called by Tools for Agm logging */ 186 #define TABLE_DPMCLOCKS 4 /* Called by Driver */ 187 #define TABLE_MOMENTARY_PM 5 /* Called by Tools */ 188 #define TABLE_COUNT 6 189 190 #pragma pack(pop) 191 192 #endif 193
Indexes created Mon Oct 20 00:09:40 GMT 2025