1 1.1 riastrad /* $NetBSD: smumgr.h,v 1.2 2021/12/18 23:45:26 riastradh Exp $ */ 2 1.1 riastrad 3 1.1 riastrad /* 4 1.1 riastrad * Copyright 2015 Advanced Micro Devices, Inc. 5 1.1 riastrad * 6 1.1 riastrad * Permission is hereby granted, free of charge, to any person obtaining a 7 1.1 riastrad * copy of this software and associated documentation files (the "Software"), 8 1.1 riastrad * to deal in the Software without restriction, including without limitation 9 1.1 riastrad * the rights to use, copy, modify, merge, publish, distribute, sublicense, 10 1.1 riastrad * and/or sell copies of the Software, and to permit persons to whom the 11 1.1 riastrad * Software is furnished to do so, subject to the following conditions: 12 1.1 riastrad * 13 1.1 riastrad * The above copyright notice and this permission notice shall be included in 14 1.1 riastrad * all copies or substantial portions of the Software. 15 1.1 riastrad * 16 1.1 riastrad * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 1.1 riastrad * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 1.1 riastrad * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 19 1.1 riastrad * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 20 1.1 riastrad * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 21 1.1 riastrad * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 22 1.1 riastrad * OTHER DEALINGS IN THE SOFTWARE. 23 1.1 riastrad * 24 1.1 riastrad */ 25 1.1 riastrad #ifndef _SMUMGR_H_ 26 1.1 riastrad #define _SMUMGR_H_ 27 1.1 riastrad #include <linux/types.h> 28 1.1 riastrad #include "amd_powerplay.h" 29 1.1 riastrad #include "hwmgr.h" 30 1.1 riastrad 31 1.1 riastrad enum SMU_TABLE { 32 1.1 riastrad SMU_UVD_TABLE = 0, 33 1.1 riastrad SMU_VCE_TABLE, 34 1.1 riastrad SMU_BIF_TABLE, 35 1.1 riastrad }; 36 1.1 riastrad 37 1.1 riastrad enum SMU_TYPE { 38 1.1 riastrad SMU_SoftRegisters = 0, 39 1.1 riastrad SMU_Discrete_DpmTable, 40 1.1 riastrad }; 41 1.1 riastrad 42 1.1 riastrad enum SMU_MEMBER { 43 1.1 riastrad HandshakeDisables = 0, 44 1.1 riastrad VoltageChangeTimeout, 45 1.1 riastrad AverageGraphicsActivity, 46 1.1 riastrad AverageMemoryActivity, 47 1.1 riastrad PreVBlankGap, 48 1.1 riastrad VBlankTimeout, 49 1.1 riastrad UcodeLoadStatus, 50 1.1 riastrad UvdBootLevel, 51 1.1 riastrad VceBootLevel, 52 1.1 riastrad LowSclkInterruptThreshold, 53 1.1 riastrad DRAM_LOG_ADDR_H, 54 1.1 riastrad DRAM_LOG_ADDR_L, 55 1.1 riastrad DRAM_LOG_PHY_ADDR_H, 56 1.1 riastrad DRAM_LOG_PHY_ADDR_L, 57 1.1 riastrad DRAM_LOG_BUFF_SIZE, 58 1.1 riastrad }; 59 1.1 riastrad 60 1.1 riastrad 61 1.1 riastrad enum SMU_MAC_DEFINITION { 62 1.1 riastrad SMU_MAX_LEVELS_GRAPHICS = 0, 63 1.1 riastrad SMU_MAX_LEVELS_MEMORY, 64 1.1 riastrad SMU_MAX_LEVELS_LINK, 65 1.1 riastrad SMU_MAX_ENTRIES_SMIO, 66 1.1 riastrad SMU_MAX_LEVELS_VDDC, 67 1.1 riastrad SMU_MAX_LEVELS_VDDGFX, 68 1.1 riastrad SMU_MAX_LEVELS_VDDCI, 69 1.1 riastrad SMU_MAX_LEVELS_MVDD, 70 1.1 riastrad SMU_UVD_MCLK_HANDSHAKE_DISABLE, 71 1.1 riastrad }; 72 1.1 riastrad 73 1.1 riastrad enum SMU9_TABLE_ID { 74 1.1 riastrad PPTABLE = 0, 75 1.1 riastrad WMTABLE, 76 1.1 riastrad AVFSTABLE, 77 1.1 riastrad TOOLSTABLE, 78 1.1 riastrad AVFSFUSETABLE 79 1.1 riastrad }; 80 1.1 riastrad 81 1.1 riastrad enum SMU10_TABLE_ID { 82 1.1 riastrad SMU10_WMTABLE = 0, 83 1.1 riastrad SMU10_CLOCKTABLE, 84 1.1 riastrad }; 85 1.1 riastrad 86 1.1 riastrad extern uint32_t smum_get_argument(struct pp_hwmgr *hwmgr); 87 1.1 riastrad 88 1.1 riastrad extern int smum_download_powerplay_table(struct pp_hwmgr *hwmgr, void **table); 89 1.1 riastrad 90 1.1 riastrad extern int smum_upload_powerplay_table(struct pp_hwmgr *hwmgr); 91 1.1 riastrad 92 1.1 riastrad extern int smum_send_msg_to_smc(struct pp_hwmgr *hwmgr, uint16_t msg); 93 1.1 riastrad 94 1.1 riastrad extern int smum_send_msg_to_smc_with_parameter(struct pp_hwmgr *hwmgr, 95 1.1 riastrad uint16_t msg, uint32_t parameter); 96 1.1 riastrad 97 1.1 riastrad extern int smum_update_sclk_threshold(struct pp_hwmgr *hwmgr); 98 1.1 riastrad 99 1.1 riastrad extern int smum_update_smc_table(struct pp_hwmgr *hwmgr, uint32_t type); 100 1.1 riastrad extern int smum_process_firmware_header(struct pp_hwmgr *hwmgr); 101 1.1 riastrad extern int smum_thermal_avfs_enable(struct pp_hwmgr *hwmgr); 102 1.1 riastrad extern int smum_thermal_setup_fan_table(struct pp_hwmgr *hwmgr); 103 1.1 riastrad extern int smum_init_smc_table(struct pp_hwmgr *hwmgr); 104 1.1 riastrad extern int smum_populate_all_graphic_levels(struct pp_hwmgr *hwmgr); 105 1.1 riastrad extern int smum_populate_all_memory_levels(struct pp_hwmgr *hwmgr); 106 1.1 riastrad extern int smum_initialize_mc_reg_table(struct pp_hwmgr *hwmgr); 107 1.1 riastrad extern uint32_t smum_get_offsetof(struct pp_hwmgr *hwmgr, 108 1.1 riastrad uint32_t type, uint32_t member); 109 1.1 riastrad extern uint32_t smum_get_mac_definition(struct pp_hwmgr *hwmgr, uint32_t value); 110 1.1 riastrad 111 1.1 riastrad extern bool smum_is_dpm_running(struct pp_hwmgr *hwmgr); 112 1.1 riastrad 113 1.1 riastrad extern bool smum_is_hw_avfs_present(struct pp_hwmgr *hwmgr); 114 1.1 riastrad 115 1.1 riastrad extern int smum_update_dpm_settings(struct pp_hwmgr *hwmgr, void *profile_setting); 116 1.1 riastrad 117 1.1 riastrad extern int smum_smc_table_manager(struct pp_hwmgr *hwmgr, uint8_t *table, uint16_t table_id, bool rw); 118 1.1 riastrad 119 1.1 riastrad #endif 120