ast_drv.h revision 1.1.1.2.30.1
1 /* $NetBSD: ast_drv.h,v 1.1.1.2.30.1 2019/06/10 22:08:04 christos Exp $ */ 2 3 /* 4 * Copyright 2012 Red Hat Inc. 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a 7 * copy of this software and associated documentation files (the 8 * "Software"), to deal in the Software without restriction, including 9 * without limitation the rights to use, copy, modify, merge, publish, 10 * distribute, sub license, and/or sell copies of the Software, and to 11 * permit persons to whom the Software is furnished to do so, subject to 12 * the following conditions: 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, 18 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR 19 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE 20 * USE OR OTHER DEALINGS IN THE SOFTWARE. 21 * 22 * The above copyright notice and this permission notice (including the 23 * next paragraph) shall be included in all copies or substantial portions 24 * of the Software. 25 * 26 */ 27 /* 28 * Authors: Dave Airlie <airlied (at) redhat.com> 29 */ 30 #ifndef __AST_DRV_H__ 31 #define __AST_DRV_H__ 32 33 #include <drm/drm_fb_helper.h> 34 35 #include <drm/ttm/ttm_bo_api.h> 36 #include <drm/ttm/ttm_bo_driver.h> 37 #include <drm/ttm/ttm_placement.h> 38 #include <drm/ttm/ttm_memory.h> 39 #include <drm/ttm/ttm_module.h> 40 41 #include <drm/drm_gem.h> 42 43 #include <linux/i2c.h> 44 #include <linux/i2c-algo-bit.h> 45 46 #define DRIVER_AUTHOR "Dave Airlie" 47 48 #define DRIVER_NAME "ast" 49 #define DRIVER_DESC "AST" 50 #define DRIVER_DATE "20120228" 51 52 #define DRIVER_MAJOR 0 53 #define DRIVER_MINOR 1 54 #define DRIVER_PATCHLEVEL 0 55 56 #define PCI_CHIP_AST2000 0x2000 57 #define PCI_CHIP_AST2100 0x2010 58 #define PCI_CHIP_AST1180 0x1180 59 60 61 enum ast_chip { 62 AST2000, 63 AST2100, 64 AST1100, 65 AST2200, 66 AST2150, 67 AST2300, 68 AST2400, 69 AST1180, 70 }; 71 72 enum ast_tx_chip { 73 AST_TX_NONE, 74 AST_TX_SIL164, 75 AST_TX_ITE66121, 76 AST_TX_DP501, 77 }; 78 79 #define AST_DRAM_512Mx16 0 80 #define AST_DRAM_1Gx16 1 81 #define AST_DRAM_512Mx32 2 82 #define AST_DRAM_1Gx32 3 83 #define AST_DRAM_2Gx16 6 84 #define AST_DRAM_4Gx16 7 85 86 struct ast_fbdev; 87 88 struct ast_private { 89 struct drm_device *dev; 90 91 void __iomem *regs; 92 void __iomem *ioregs; 93 94 enum ast_chip chip; 95 bool vga2_clone; 96 uint32_t dram_bus_width; 97 uint32_t dram_type; 98 uint32_t mclk; 99 uint32_t vram_size; 100 101 struct ast_fbdev *fbdev; 102 103 int fb_mtrr; 104 105 struct { 106 struct drm_global_reference mem_global_ref; 107 struct ttm_bo_global_ref bo_global_ref; 108 struct ttm_bo_device bdev; 109 } ttm; 110 111 struct drm_gem_object *cursor_cache; 112 uint64_t cursor_cache_gpu_addr; 113 /* Acces to this cache is protected by the crtc->mutex of the only crtc 114 * we have. */ 115 struct ttm_bo_kmap_obj cache_kmap; 116 int next_cursor; 117 bool support_wide_screen; 118 enum { 119 ast_use_p2a, 120 ast_use_dt, 121 ast_use_defaults 122 } config_mode; 123 124 enum ast_tx_chip tx_chip_type; 125 u8 dp501_maxclk; 126 u8 *dp501_fw_addr; 127 const struct firmware *dp501_fw; /* dp501 fw */ 128 }; 129 130 int ast_driver_load(struct drm_device *dev, unsigned long flags); 131 int ast_driver_unload(struct drm_device *dev); 132 133 struct ast_gem_object; 134 135 #define AST_IO_AR_PORT_WRITE (0x40) 136 #define AST_IO_MISC_PORT_WRITE (0x42) 137 #define AST_IO_VGA_ENABLE_PORT (0x43) 138 #define AST_IO_SEQ_PORT (0x44) 139 #define AST_IO_DAC_INDEX_READ (0x47) 140 #define AST_IO_DAC_INDEX_WRITE (0x48) 141 #define AST_IO_DAC_DATA (0x49) 142 #define AST_IO_GR_PORT (0x4E) 143 #define AST_IO_CRTC_PORT (0x54) 144 #define AST_IO_INPUT_STATUS1_READ (0x5A) 145 #define AST_IO_MISC_PORT_READ (0x4C) 146 147 #define AST_IO_MM_OFFSET (0x380) 148 149 #define __ast_read(x) \ 150 static inline u##x ast_read##x(struct ast_private *ast, u32 reg) { \ 151 u##x val = 0;\ 152 val = ioread##x(ast->regs + reg); \ 153 return val;\ 154 } 155 156 __ast_read(8); 157 __ast_read(16); 158 __ast_read(32) 159 160 #define __ast_io_read(x) \ 161 static inline u##x ast_io_read##x(struct ast_private *ast, u32 reg) { \ 162 u##x val = 0;\ 163 val = ioread##x(ast->ioregs + reg); \ 164 return val;\ 165 } 166 167 __ast_io_read(8); 168 __ast_io_read(16); 169 __ast_io_read(32); 170 171 #define __ast_write(x) \ 172 static inline void ast_write##x(struct ast_private *ast, u32 reg, u##x val) {\ 173 iowrite##x(val, ast->regs + reg);\ 174 } 175 176 __ast_write(8); 177 __ast_write(16); 178 __ast_write(32); 179 180 #define __ast_io_write(x) \ 181 static inline void ast_io_write##x(struct ast_private *ast, u32 reg, u##x val) {\ 182 iowrite##x(val, ast->ioregs + reg);\ 183 } 184 185 __ast_io_write(8); 186 __ast_io_write(16); 187 #undef __ast_io_write 188 189 static inline void ast_set_index_reg(struct ast_private *ast, 190 uint32_t base, uint8_t index, 191 uint8_t val) 192 { 193 ast_io_write16(ast, base, ((u16)val << 8) | index); 194 } 195 196 void ast_set_index_reg_mask(struct ast_private *ast, 197 uint32_t base, uint8_t index, 198 uint8_t mask, uint8_t val); 199 uint8_t ast_get_index_reg(struct ast_private *ast, 200 uint32_t base, uint8_t index); 201 uint8_t ast_get_index_reg_mask(struct ast_private *ast, 202 uint32_t base, uint8_t index, uint8_t mask); 203 204 static inline void ast_open_key(struct ast_private *ast) 205 { 206 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x80, 0xA8); 207 } 208 209 #define AST_VIDMEM_SIZE_8M 0x00800000 210 #define AST_VIDMEM_SIZE_16M 0x01000000 211 #define AST_VIDMEM_SIZE_32M 0x02000000 212 #define AST_VIDMEM_SIZE_64M 0x04000000 213 #define AST_VIDMEM_SIZE_128M 0x08000000 214 215 #define AST_VIDMEM_DEFAULT_SIZE AST_VIDMEM_SIZE_8M 216 217 #define AST_MAX_HWC_WIDTH 64 218 #define AST_MAX_HWC_HEIGHT 64 219 220 #define AST_HWC_SIZE (AST_MAX_HWC_WIDTH*AST_MAX_HWC_HEIGHT*2) 221 #define AST_HWC_SIGNATURE_SIZE 32 222 223 #define AST_DEFAULT_HWC_NUM 2 224 /* define for signature structure */ 225 #define AST_HWC_SIGNATURE_CHECKSUM 0x00 226 #define AST_HWC_SIGNATURE_SizeX 0x04 227 #define AST_HWC_SIGNATURE_SizeY 0x08 228 #define AST_HWC_SIGNATURE_X 0x0C 229 #define AST_HWC_SIGNATURE_Y 0x10 230 #define AST_HWC_SIGNATURE_HOTSPOTX 0x14 231 #define AST_HWC_SIGNATURE_HOTSPOTY 0x18 232 233 234 struct ast_i2c_chan { 235 struct i2c_adapter adapter; 236 struct drm_device *dev; 237 struct i2c_algo_bit_data bit; 238 }; 239 240 struct ast_connector { 241 struct drm_connector base; 242 struct ast_i2c_chan *i2c; 243 }; 244 245 struct ast_crtc { 246 struct drm_crtc base; 247 u8 lut_r[256], lut_g[256], lut_b[256]; 248 struct drm_gem_object *cursor_bo; 249 uint64_t cursor_addr; 250 int cursor_width, cursor_height; 251 u8 offset_x, offset_y; 252 }; 253 254 struct ast_encoder { 255 struct drm_encoder base; 256 }; 257 258 struct ast_framebuffer { 259 struct drm_framebuffer base; 260 struct drm_gem_object *obj; 261 }; 262 263 struct ast_fbdev { 264 struct drm_fb_helper helper; 265 struct ast_framebuffer afb; 266 struct list_head fbdev_list; 267 void *sysram; 268 int size; 269 struct ttm_bo_kmap_obj mapping; 270 int x1, y1, x2, y2; /* dirty rect */ 271 spinlock_t dirty_lock; 272 }; 273 274 #define to_ast_crtc(x) container_of(x, struct ast_crtc, base) 275 #define to_ast_connector(x) container_of(x, struct ast_connector, base) 276 #define to_ast_encoder(x) container_of(x, struct ast_encoder, base) 277 #define to_ast_framebuffer(x) container_of(x, struct ast_framebuffer, base) 278 279 struct ast_vbios_stdtable { 280 u8 misc; 281 u8 seq[4]; 282 u8 crtc[25]; 283 u8 ar[20]; 284 u8 gr[9]; 285 }; 286 287 struct ast_vbios_enhtable { 288 u32 ht; 289 u32 hde; 290 u32 hfp; 291 u32 hsync; 292 u32 vt; 293 u32 vde; 294 u32 vfp; 295 u32 vsync; 296 u32 dclk_index; 297 u32 flags; 298 u32 refresh_rate; 299 u32 refresh_rate_index; 300 u32 mode_id; 301 }; 302 303 struct ast_vbios_dclk_info { 304 u8 param1; 305 u8 param2; 306 u8 param3; 307 }; 308 309 struct ast_vbios_mode_info { 310 struct ast_vbios_stdtable *std_table; 311 struct ast_vbios_enhtable *enh_table; 312 }; 313 314 extern int ast_mode_init(struct drm_device *dev); 315 extern void ast_mode_fini(struct drm_device *dev); 316 317 int ast_framebuffer_init(struct drm_device *dev, 318 struct ast_framebuffer *ast_fb, 319 struct drm_mode_fb_cmd2 *mode_cmd, 320 struct drm_gem_object *obj); 321 322 int ast_fbdev_init(struct drm_device *dev); 323 void ast_fbdev_fini(struct drm_device *dev); 324 void ast_fbdev_set_suspend(struct drm_device *dev, int state); 325 void ast_fbdev_set_base(struct ast_private *ast, unsigned long gpu_addr); 326 327 struct ast_bo { 328 struct ttm_buffer_object bo; 329 struct ttm_placement placement; 330 struct ttm_bo_kmap_obj kmap; 331 struct drm_gem_object gem; 332 struct ttm_place placements[3]; 333 int pin_count; 334 }; 335 #define gem_to_ast_bo(gobj) container_of((gobj), struct ast_bo, gem) 336 337 static inline struct ast_bo * 338 ast_bo(struct ttm_buffer_object *bo) 339 { 340 return container_of(bo, struct ast_bo, bo); 341 } 342 343 344 #define to_ast_obj(x) container_of(x, struct ast_gem_object, base) 345 346 #define AST_MM_ALIGN_SHIFT 4 347 #define AST_MM_ALIGN_MASK ((1 << AST_MM_ALIGN_SHIFT) - 1) 348 349 extern int ast_dumb_create(struct drm_file *file, 350 struct drm_device *dev, 351 struct drm_mode_create_dumb *args); 352 353 extern void ast_gem_free_object(struct drm_gem_object *obj); 354 extern int ast_dumb_mmap_offset(struct drm_file *file, 355 struct drm_device *dev, 356 uint32_t handle, 357 uint64_t *offset); 358 359 #define DRM_FILE_PAGE_OFFSET (0x100000000ULL >> PAGE_SHIFT) 360 361 int ast_mm_init(struct ast_private *ast); 362 void ast_mm_fini(struct ast_private *ast); 363 364 int ast_bo_create(struct drm_device *dev, int size, int align, 365 uint32_t flags, struct ast_bo **pastbo); 366 367 int ast_gem_create(struct drm_device *dev, 368 u32 size, bool iskernel, 369 struct drm_gem_object **obj); 370 371 int ast_bo_pin(struct ast_bo *bo, u32 pl_flag, u64 *gpu_addr); 372 int ast_bo_unpin(struct ast_bo *bo); 373 374 static inline int ast_bo_reserve(struct ast_bo *bo, bool no_wait) 375 { 376 int ret; 377 378 ret = ttm_bo_reserve(&bo->bo, true, no_wait, false, NULL); 379 if (ret) { 380 if (ret != -ERESTARTSYS && ret != -EBUSY) 381 DRM_ERROR("reserve failed %p\n", bo); 382 return ret; 383 } 384 return 0; 385 } 386 387 static inline void ast_bo_unreserve(struct ast_bo *bo) 388 { 389 ttm_bo_unreserve(&bo->bo); 390 } 391 392 void ast_ttm_placement(struct ast_bo *bo, int domain); 393 int ast_bo_push_sysram(struct ast_bo *bo); 394 int ast_mmap(struct file *filp, struct vm_area_struct *vma); 395 396 /* ast post */ 397 void ast_enable_vga(struct drm_device *dev); 398 void ast_enable_mmio(struct drm_device *dev); 399 bool ast_is_vga_enabled(struct drm_device *dev); 400 void ast_post_gpu(struct drm_device *dev); 401 u32 ast_mindwm(struct ast_private *ast, u32 r); 402 void ast_moutdwm(struct ast_private *ast, u32 r, u32 v); 403 /* ast dp501 */ 404 int ast_load_dp501_microcode(struct drm_device *dev); 405 void ast_set_dp501_video_output(struct drm_device *dev, u8 mode); 406 bool ast_launch_m68k(struct drm_device *dev); 407 bool ast_backup_fw(struct drm_device *dev, u8 *addr, u32 size); 408 bool ast_dp501_read_edid(struct drm_device *dev, u8 *ediddata); 409 u8 ast_get_dp501_max_clk(struct drm_device *dev); 410 void ast_init_3rdtx(struct drm_device *dev); 411 #endif 412
Indexes created Wed Oct 15 16:09:53 GMT 2025