i810_dma.c revision 1.1.1.1.8.2
1 /* i810_dma.c -- DMA support for the i810 -*- linux-c -*- 2 * Created: Mon Dec 13 01:50:01 1999 by jhartmann (at) precisioninsight.com 3 * 4 * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas. 5 * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California. 6 * All Rights Reserved. 7 * 8 * Permission is hereby granted, free of charge, to any person obtaining a 9 * copy of this software and associated documentation files (the "Software"), 10 * to deal in the Software without restriction, including without limitation 11 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 12 * and/or sell copies of the Software, and to permit persons to whom the 13 * Software is furnished to do so, subject to the following conditions: 14 * 15 * The above copyright notice and this permission notice (including the next 16 * paragraph) shall be included in all copies or substantial portions of the 17 * Software. 18 * 19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 20 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 21 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 22 * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR 23 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 24 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER 25 * DEALINGS IN THE SOFTWARE. 26 * 27 * Authors: Rickard E. (Rik) Faith <faith (at) valinux.com> 28 * Jeff Hartmann <jhartmann (at) valinux.com> 29 * Keith Whitwell <keith (at) tungstengraphics.com> 30 * 31 */ 32 33 #include <drm/drmP.h> 34 #include <drm/i810_drm.h> 35 #include "i810_drv.h" 36 #include <linux/interrupt.h> /* For task queue support */ 37 #include <linux/delay.h> 38 #include <linux/slab.h> 39 #include <linux/pagemap.h> 40 41 #define I810_BUF_FREE 2 42 #define I810_BUF_CLIENT 1 43 #define I810_BUF_HARDWARE 0 44 45 #define I810_BUF_UNMAPPED 0 46 #define I810_BUF_MAPPED 1 47 48 static struct drm_buf *i810_freelist_get(struct drm_device * dev) 49 { 50 struct drm_device_dma *dma = dev->dma; 51 int i; 52 int used; 53 54 /* Linear search might not be the best solution */ 55 56 for (i = 0; i < dma->buf_count; i++) { 57 struct drm_buf *buf = dma->buflist[i]; 58 drm_i810_buf_priv_t *buf_priv = buf->dev_private; 59 /* In use is already a pointer */ 60 used = cmpxchg(buf_priv->in_use, I810_BUF_FREE, 61 I810_BUF_CLIENT); 62 if (used == I810_BUF_FREE) 63 return buf; 64 } 65 return NULL; 66 } 67 68 /* This should only be called if the buffer is not sent to the hardware 69 * yet, the hardware updates in use for us once its on the ring buffer. 70 */ 71 72 static int i810_freelist_put(struct drm_device *dev, struct drm_buf *buf) 73 { 74 drm_i810_buf_priv_t *buf_priv = buf->dev_private; 75 int used; 76 77 /* In use is already a pointer */ 78 used = cmpxchg(buf_priv->in_use, I810_BUF_CLIENT, I810_BUF_FREE); 79 if (used != I810_BUF_CLIENT) { 80 DRM_ERROR("Freeing buffer thats not in use : %d\n", buf->idx); 81 return -EINVAL; 82 } 83 84 return 0; 85 } 86 87 static int i810_mmap_buffers(struct file *filp, struct vm_area_struct *vma) 88 { 89 struct drm_file *priv = filp->private_data; 90 struct drm_device *dev; 91 drm_i810_private_t *dev_priv; 92 struct drm_buf *buf; 93 drm_i810_buf_priv_t *buf_priv; 94 95 dev = priv->minor->dev; 96 dev_priv = dev->dev_private; 97 buf = dev_priv->mmap_buffer; 98 buf_priv = buf->dev_private; 99 100 vma->vm_flags |= (VM_IO | VM_DONTCOPY); 101 102 buf_priv->currently_mapped = I810_BUF_MAPPED; 103 104 if (io_remap_pfn_range(vma, vma->vm_start, 105 vma->vm_pgoff, 106 vma->vm_end - vma->vm_start, vma->vm_page_prot)) 107 return -EAGAIN; 108 return 0; 109 } 110 111 static const struct file_operations i810_buffer_fops = { 112 .open = drm_open, 113 .release = drm_release, 114 .unlocked_ioctl = drm_ioctl, 115 .mmap = i810_mmap_buffers, 116 .fasync = drm_fasync, 117 #ifdef CONFIG_COMPAT 118 .compat_ioctl = drm_compat_ioctl, 119 #endif 120 .llseek = noop_llseek, 121 }; 122 123 static int i810_map_buffer(struct drm_buf *buf, struct drm_file *file_priv) 124 { 125 struct drm_device *dev = file_priv->minor->dev; 126 drm_i810_buf_priv_t *buf_priv = buf->dev_private; 127 drm_i810_private_t *dev_priv = dev->dev_private; 128 const struct file_operations *old_fops; 129 int retcode = 0; 130 131 if (buf_priv->currently_mapped == I810_BUF_MAPPED) 132 return -EINVAL; 133 134 /* This is all entirely broken */ 135 old_fops = file_priv->filp->f_op; 136 file_priv->filp->f_op = &i810_buffer_fops; 137 dev_priv->mmap_buffer = buf; 138 buf_priv->virtual = (void *)vm_mmap(file_priv->filp, 0, buf->total, 139 PROT_READ | PROT_WRITE, 140 MAP_SHARED, buf->bus_address); 141 dev_priv->mmap_buffer = NULL; 142 file_priv->filp->f_op = old_fops; 143 if (IS_ERR(buf_priv->virtual)) { 144 /* Real error */ 145 DRM_ERROR("mmap error\n"); 146 retcode = PTR_ERR(buf_priv->virtual); 147 buf_priv->virtual = NULL; 148 } 149 150 return retcode; 151 } 152 153 static int i810_unmap_buffer(struct drm_buf *buf) 154 { 155 drm_i810_buf_priv_t *buf_priv = buf->dev_private; 156 int retcode = 0; 157 158 if (buf_priv->currently_mapped != I810_BUF_MAPPED) 159 return -EINVAL; 160 161 retcode = vm_munmap((unsigned long)buf_priv->virtual, 162 (size_t) buf->total); 163 164 buf_priv->currently_mapped = I810_BUF_UNMAPPED; 165 buf_priv->virtual = NULL; 166 167 return retcode; 168 } 169 170 static int i810_dma_get_buffer(struct drm_device *dev, drm_i810_dma_t *d, 171 struct drm_file *file_priv) 172 { 173 struct drm_buf *buf; 174 drm_i810_buf_priv_t *buf_priv; 175 int retcode = 0; 176 177 buf = i810_freelist_get(dev); 178 if (!buf) { 179 retcode = -ENOMEM; 180 DRM_DEBUG("retcode=%d\n", retcode); 181 return retcode; 182 } 183 184 retcode = i810_map_buffer(buf, file_priv); 185 if (retcode) { 186 i810_freelist_put(dev, buf); 187 DRM_ERROR("mapbuf failed, retcode %d\n", retcode); 188 return retcode; 189 } 190 buf->file_priv = file_priv; 191 buf_priv = buf->dev_private; 192 d->granted = 1; 193 d->request_idx = buf->idx; 194 d->request_size = buf->total; 195 d->virtual = buf_priv->virtual; 196 197 return retcode; 198 } 199 200 static int i810_dma_cleanup(struct drm_device *dev) 201 { 202 struct drm_device_dma *dma = dev->dma; 203 204 /* Make sure interrupts are disabled here because the uninstall ioctl 205 * may not have been called from userspace and after dev_private 206 * is freed, it's too late. 207 */ 208 if (drm_core_check_feature(dev, DRIVER_HAVE_IRQ) && dev->irq_enabled) 209 drm_irq_uninstall(dev); 210 211 if (dev->dev_private) { 212 int i; 213 drm_i810_private_t *dev_priv = 214 (drm_i810_private_t *) dev->dev_private; 215 216 if (dev_priv->ring.virtual_start) 217 drm_core_ioremapfree(&dev_priv->ring.map, dev); 218 if (dev_priv->hw_status_page) { 219 pci_free_consistent(dev->pdev, PAGE_SIZE, 220 dev_priv->hw_status_page, 221 dev_priv->dma_status_page); 222 } 223 kfree(dev->dev_private); 224 dev->dev_private = NULL; 225 226 for (i = 0; i < dma->buf_count; i++) { 227 struct drm_buf *buf = dma->buflist[i]; 228 drm_i810_buf_priv_t *buf_priv = buf->dev_private; 229 230 if (buf_priv->kernel_virtual && buf->total) 231 drm_core_ioremapfree(&buf_priv->map, dev); 232 } 233 } 234 return 0; 235 } 236 237 static int i810_wait_ring(struct drm_device *dev, int n) 238 { 239 drm_i810_private_t *dev_priv = dev->dev_private; 240 drm_i810_ring_buffer_t *ring = &(dev_priv->ring); 241 int iters = 0; 242 unsigned long end; 243 unsigned int last_head = I810_READ(LP_RING + RING_HEAD) & HEAD_ADDR; 244 245 end = jiffies + (HZ * 3); 246 while (ring->space < n) { 247 ring->head = I810_READ(LP_RING + RING_HEAD) & HEAD_ADDR; 248 ring->space = ring->head - (ring->tail + 8); 249 if (ring->space < 0) 250 ring->space += ring->Size; 251 252 if (ring->head != last_head) { 253 end = jiffies + (HZ * 3); 254 last_head = ring->head; 255 } 256 257 iters++; 258 if (time_before(end, jiffies)) { 259 DRM_ERROR("space: %d wanted %d\n", ring->space, n); 260 DRM_ERROR("lockup\n"); 261 goto out_wait_ring; 262 } 263 udelay(1); 264 } 265 266 out_wait_ring: 267 return iters; 268 } 269 270 static void i810_kernel_lost_context(struct drm_device *dev) 271 { 272 drm_i810_private_t *dev_priv = dev->dev_private; 273 drm_i810_ring_buffer_t *ring = &(dev_priv->ring); 274 275 ring->head = I810_READ(LP_RING + RING_HEAD) & HEAD_ADDR; 276 ring->tail = I810_READ(LP_RING + RING_TAIL); 277 ring->space = ring->head - (ring->tail + 8); 278 if (ring->space < 0) 279 ring->space += ring->Size; 280 } 281 282 static int i810_freelist_init(struct drm_device *dev, drm_i810_private_t *dev_priv) 283 { 284 struct drm_device_dma *dma = dev->dma; 285 int my_idx = 24; 286 u32 *hw_status = (u32 *) (dev_priv->hw_status_page + my_idx); 287 int i; 288 289 if (dma->buf_count > 1019) { 290 /* Not enough space in the status page for the freelist */ 291 return -EINVAL; 292 } 293 294 for (i = 0; i < dma->buf_count; i++) { 295 struct drm_buf *buf = dma->buflist[i]; 296 drm_i810_buf_priv_t *buf_priv = buf->dev_private; 297 298 buf_priv->in_use = hw_status++; 299 buf_priv->my_use_idx = my_idx; 300 my_idx += 4; 301 302 *buf_priv->in_use = I810_BUF_FREE; 303 304 buf_priv->map.offset = buf->bus_address; 305 buf_priv->map.size = buf->total; 306 buf_priv->map.type = _DRM_AGP; 307 buf_priv->map.flags = 0; 308 buf_priv->map.mtrr = 0; 309 310 drm_core_ioremap(&buf_priv->map, dev); 311 buf_priv->kernel_virtual = buf_priv->map.handle; 312 313 } 314 return 0; 315 } 316 317 static int i810_dma_initialize(struct drm_device *dev, 318 drm_i810_private_t *dev_priv, 319 drm_i810_init_t *init) 320 { 321 struct drm_map_list *r_list; 322 memset(dev_priv, 0, sizeof(drm_i810_private_t)); 323 324 list_for_each_entry(r_list, &dev->maplist, head) { 325 if (r_list->map && 326 r_list->map->type == _DRM_SHM && 327 r_list->map->flags & _DRM_CONTAINS_LOCK) { 328 dev_priv->sarea_map = r_list->map; 329 break; 330 } 331 } 332 if (!dev_priv->sarea_map) { 333 dev->dev_private = (void *)dev_priv; 334 i810_dma_cleanup(dev); 335 DRM_ERROR("can not find sarea!\n"); 336 return -EINVAL; 337 } 338 dev_priv->mmio_map = drm_core_findmap(dev, init->mmio_offset); 339 if (!dev_priv->mmio_map) { 340 dev->dev_private = (void *)dev_priv; 341 i810_dma_cleanup(dev); 342 DRM_ERROR("can not find mmio map!\n"); 343 return -EINVAL; 344 } 345 dev->agp_buffer_token = init->buffers_offset; 346 dev->agp_buffer_map = drm_core_findmap(dev, init->buffers_offset); 347 if (!dev->agp_buffer_map) { 348 dev->dev_private = (void *)dev_priv; 349 i810_dma_cleanup(dev); 350 DRM_ERROR("can not find dma buffer map!\n"); 351 return -EINVAL; 352 } 353 354 dev_priv->sarea_priv = (drm_i810_sarea_t *) 355 ((u8 *) dev_priv->sarea_map->handle + init->sarea_priv_offset); 356 357 dev_priv->ring.Start = init->ring_start; 358 dev_priv->ring.End = init->ring_end; 359 dev_priv->ring.Size = init->ring_size; 360 361 dev_priv->ring.map.offset = dev->agp->base + init->ring_start; 362 dev_priv->ring.map.size = init->ring_size; 363 dev_priv->ring.map.type = _DRM_AGP; 364 dev_priv->ring.map.flags = 0; 365 dev_priv->ring.map.mtrr = 0; 366 367 drm_core_ioremap(&dev_priv->ring.map, dev); 368 369 if (dev_priv->ring.map.handle == NULL) { 370 dev->dev_private = (void *)dev_priv; 371 i810_dma_cleanup(dev); 372 DRM_ERROR("can not ioremap virtual address for" 373 " ring buffer\n"); 374 return -ENOMEM; 375 } 376 377 dev_priv->ring.virtual_start = dev_priv->ring.map.handle; 378 379 dev_priv->ring.tail_mask = dev_priv->ring.Size - 1; 380 381 dev_priv->w = init->w; 382 dev_priv->h = init->h; 383 dev_priv->pitch = init->pitch; 384 dev_priv->back_offset = init->back_offset; 385 dev_priv->depth_offset = init->depth_offset; 386 dev_priv->front_offset = init->front_offset; 387 388 dev_priv->overlay_offset = init->overlay_offset; 389 dev_priv->overlay_physical = init->overlay_physical; 390 391 dev_priv->front_di1 = init->front_offset | init->pitch_bits; 392 dev_priv->back_di1 = init->back_offset | init->pitch_bits; 393 dev_priv->zi1 = init->depth_offset | init->pitch_bits; 394 395 /* Program Hardware Status Page */ 396 dev_priv->hw_status_page = 397 pci_alloc_consistent(dev->pdev, PAGE_SIZE, 398 &dev_priv->dma_status_page); 399 if (!dev_priv->hw_status_page) { 400 dev->dev_private = (void *)dev_priv; 401 i810_dma_cleanup(dev); 402 DRM_ERROR("Can not allocate hardware status page\n"); 403 return -ENOMEM; 404 } 405 memset(dev_priv->hw_status_page, 0, PAGE_SIZE); 406 DRM_DEBUG("hw status page @ %p\n", dev_priv->hw_status_page); 407 408 I810_WRITE(0x02080, dev_priv->dma_status_page); 409 DRM_DEBUG("Enabled hardware status page\n"); 410 411 /* Now we need to init our freelist */ 412 if (i810_freelist_init(dev, dev_priv) != 0) { 413 dev->dev_private = (void *)dev_priv; 414 i810_dma_cleanup(dev); 415 DRM_ERROR("Not enough space in the status page for" 416 " the freelist\n"); 417 return -ENOMEM; 418 } 419 dev->dev_private = (void *)dev_priv; 420 421 return 0; 422 } 423 424 static int i810_dma_init(struct drm_device *dev, void *data, 425 struct drm_file *file_priv) 426 { 427 drm_i810_private_t *dev_priv; 428 drm_i810_init_t *init = data; 429 int retcode = 0; 430 431 switch (init->func) { 432 case I810_INIT_DMA_1_4: 433 DRM_INFO("Using v1.4 init.\n"); 434 dev_priv = kmalloc(sizeof(drm_i810_private_t), GFP_KERNEL); 435 if (dev_priv == NULL) 436 return -ENOMEM; 437 retcode = i810_dma_initialize(dev, dev_priv, init); 438 break; 439 440 case I810_CLEANUP_DMA: 441 DRM_INFO("DMA Cleanup\n"); 442 retcode = i810_dma_cleanup(dev); 443 break; 444 default: 445 return -EINVAL; 446 } 447 448 return retcode; 449 } 450 451 /* Most efficient way to verify state for the i810 is as it is 452 * emitted. Non-conformant state is silently dropped. 453 * 454 * Use 'volatile' & local var tmp to force the emitted values to be 455 * identical to the verified ones. 456 */ 457 static void i810EmitContextVerified(struct drm_device *dev, 458 volatile unsigned int *code) 459 { 460 drm_i810_private_t *dev_priv = dev->dev_private; 461 int i, j = 0; 462 unsigned int tmp; 463 RING_LOCALS; 464 465 BEGIN_LP_RING(I810_CTX_SETUP_SIZE); 466 467 OUT_RING(GFX_OP_COLOR_FACTOR); 468 OUT_RING(code[I810_CTXREG_CF1]); 469 470 OUT_RING(GFX_OP_STIPPLE); 471 OUT_RING(code[I810_CTXREG_ST1]); 472 473 for (i = 4; i < I810_CTX_SETUP_SIZE; i++) { 474 tmp = code[i]; 475 476 if ((tmp & (7 << 29)) == (3 << 29) && 477 (tmp & (0x1f << 24)) < (0x1d << 24)) { 478 OUT_RING(tmp); 479 j++; 480 } else 481 printk("constext state dropped!!!\n"); 482 } 483 484 if (j & 1) 485 OUT_RING(0); 486 487 ADVANCE_LP_RING(); 488 } 489 490 static void i810EmitTexVerified(struct drm_device *dev, volatile unsigned int *code) 491 { 492 drm_i810_private_t *dev_priv = dev->dev_private; 493 int i, j = 0; 494 unsigned int tmp; 495 RING_LOCALS; 496 497 BEGIN_LP_RING(I810_TEX_SETUP_SIZE); 498 499 OUT_RING(GFX_OP_MAP_INFO); 500 OUT_RING(code[I810_TEXREG_MI1]); 501 OUT_RING(code[I810_TEXREG_MI2]); 502 OUT_RING(code[I810_TEXREG_MI3]); 503 504 for (i = 4; i < I810_TEX_SETUP_SIZE; i++) { 505 tmp = code[i]; 506 507 if ((tmp & (7 << 29)) == (3 << 29) && 508 (tmp & (0x1f << 24)) < (0x1d << 24)) { 509 OUT_RING(tmp); 510 j++; 511 } else 512 printk("texture state dropped!!!\n"); 513 } 514 515 if (j & 1) 516 OUT_RING(0); 517 518 ADVANCE_LP_RING(); 519 } 520 521 /* Need to do some additional checking when setting the dest buffer. 522 */ 523 static void i810EmitDestVerified(struct drm_device *dev, 524 volatile unsigned int *code) 525 { 526 drm_i810_private_t *dev_priv = dev->dev_private; 527 unsigned int tmp; 528 RING_LOCALS; 529 530 BEGIN_LP_RING(I810_DEST_SETUP_SIZE + 2); 531 532 tmp = code[I810_DESTREG_DI1]; 533 if (tmp == dev_priv->front_di1 || tmp == dev_priv->back_di1) { 534 OUT_RING(CMD_OP_DESTBUFFER_INFO); 535 OUT_RING(tmp); 536 } else 537 DRM_DEBUG("bad di1 %x (allow %x or %x)\n", 538 tmp, dev_priv->front_di1, dev_priv->back_di1); 539 540 /* invarient: 541 */ 542 OUT_RING(CMD_OP_Z_BUFFER_INFO); 543 OUT_RING(dev_priv->zi1); 544 545 OUT_RING(GFX_OP_DESTBUFFER_VARS); 546 OUT_RING(code[I810_DESTREG_DV1]); 547 548 OUT_RING(GFX_OP_DRAWRECT_INFO); 549 OUT_RING(code[I810_DESTREG_DR1]); 550 OUT_RING(code[I810_DESTREG_DR2]); 551 OUT_RING(code[I810_DESTREG_DR3]); 552 OUT_RING(code[I810_DESTREG_DR4]); 553 OUT_RING(0); 554 555 ADVANCE_LP_RING(); 556 } 557 558 static void i810EmitState(struct drm_device *dev) 559 { 560 drm_i810_private_t *dev_priv = dev->dev_private; 561 drm_i810_sarea_t *sarea_priv = dev_priv->sarea_priv; 562 unsigned int dirty = sarea_priv->dirty; 563 564 DRM_DEBUG("%x\n", dirty); 565 566 if (dirty & I810_UPLOAD_BUFFERS) { 567 i810EmitDestVerified(dev, sarea_priv->BufferState); 568 sarea_priv->dirty &= ~I810_UPLOAD_BUFFERS; 569 } 570 571 if (dirty & I810_UPLOAD_CTX) { 572 i810EmitContextVerified(dev, sarea_priv->ContextState); 573 sarea_priv->dirty &= ~I810_UPLOAD_CTX; 574 } 575 576 if (dirty & I810_UPLOAD_TEX0) { 577 i810EmitTexVerified(dev, sarea_priv->TexState[0]); 578 sarea_priv->dirty &= ~I810_UPLOAD_TEX0; 579 } 580 581 if (dirty & I810_UPLOAD_TEX1) { 582 i810EmitTexVerified(dev, sarea_priv->TexState[1]); 583 sarea_priv->dirty &= ~I810_UPLOAD_TEX1; 584 } 585 } 586 587 /* need to verify 588 */ 589 static void i810_dma_dispatch_clear(struct drm_device *dev, int flags, 590 unsigned int clear_color, 591 unsigned int clear_zval) 592 { 593 drm_i810_private_t *dev_priv = dev->dev_private; 594 drm_i810_sarea_t *sarea_priv = dev_priv->sarea_priv; 595 int nbox = sarea_priv->nbox; 596 struct drm_clip_rect *pbox = sarea_priv->boxes; 597 int pitch = dev_priv->pitch; 598 int cpp = 2; 599 int i; 600 RING_LOCALS; 601 602 if (dev_priv->current_page == 1) { 603 unsigned int tmp = flags; 604 605 flags &= ~(I810_FRONT | I810_BACK); 606 if (tmp & I810_FRONT) 607 flags |= I810_BACK; 608 if (tmp & I810_BACK) 609 flags |= I810_FRONT; 610 } 611 612 i810_kernel_lost_context(dev); 613 614 if (nbox > I810_NR_SAREA_CLIPRECTS) 615 nbox = I810_NR_SAREA_CLIPRECTS; 616 617 for (i = 0; i < nbox; i++, pbox++) { 618 unsigned int x = pbox->x1; 619 unsigned int y = pbox->y1; 620 unsigned int width = (pbox->x2 - x) * cpp; 621 unsigned int height = pbox->y2 - y; 622 unsigned int start = y * pitch + x * cpp; 623 624 if (pbox->x1 > pbox->x2 || 625 pbox->y1 > pbox->y2 || 626 pbox->x2 > dev_priv->w || pbox->y2 > dev_priv->h) 627 continue; 628 629 if (flags & I810_FRONT) { 630 BEGIN_LP_RING(6); 631 OUT_RING(BR00_BITBLT_CLIENT | BR00_OP_COLOR_BLT | 0x3); 632 OUT_RING(BR13_SOLID_PATTERN | (0xF0 << 16) | pitch); 633 OUT_RING((height << 16) | width); 634 OUT_RING(start); 635 OUT_RING(clear_color); 636 OUT_RING(0); 637 ADVANCE_LP_RING(); 638 } 639 640 if (flags & I810_BACK) { 641 BEGIN_LP_RING(6); 642 OUT_RING(BR00_BITBLT_CLIENT | BR00_OP_COLOR_BLT | 0x3); 643 OUT_RING(BR13_SOLID_PATTERN | (0xF0 << 16) | pitch); 644 OUT_RING((height << 16) | width); 645 OUT_RING(dev_priv->back_offset + start); 646 OUT_RING(clear_color); 647 OUT_RING(0); 648 ADVANCE_LP_RING(); 649 } 650 651 if (flags & I810_DEPTH) { 652 BEGIN_LP_RING(6); 653 OUT_RING(BR00_BITBLT_CLIENT | BR00_OP_COLOR_BLT | 0x3); 654 OUT_RING(BR13_SOLID_PATTERN | (0xF0 << 16) | pitch); 655 OUT_RING((height << 16) | width); 656 OUT_RING(dev_priv->depth_offset + start); 657 OUT_RING(clear_zval); 658 OUT_RING(0); 659 ADVANCE_LP_RING(); 660 } 661 } 662 } 663 664 static void i810_dma_dispatch_swap(struct drm_device *dev) 665 { 666 drm_i810_private_t *dev_priv = dev->dev_private; 667 drm_i810_sarea_t *sarea_priv = dev_priv->sarea_priv; 668 int nbox = sarea_priv->nbox; 669 struct drm_clip_rect *pbox = sarea_priv->boxes; 670 int pitch = dev_priv->pitch; 671 int cpp = 2; 672 int i; 673 RING_LOCALS; 674 675 DRM_DEBUG("swapbuffers\n"); 676 677 i810_kernel_lost_context(dev); 678 679 if (nbox > I810_NR_SAREA_CLIPRECTS) 680 nbox = I810_NR_SAREA_CLIPRECTS; 681 682 for (i = 0; i < nbox; i++, pbox++) { 683 unsigned int w = pbox->x2 - pbox->x1; 684 unsigned int h = pbox->y2 - pbox->y1; 685 unsigned int dst = pbox->x1 * cpp + pbox->y1 * pitch; 686 unsigned int start = dst; 687 688 if (pbox->x1 > pbox->x2 || 689 pbox->y1 > pbox->y2 || 690 pbox->x2 > dev_priv->w || pbox->y2 > dev_priv->h) 691 continue; 692 693 BEGIN_LP_RING(6); 694 OUT_RING(BR00_BITBLT_CLIENT | BR00_OP_SRC_COPY_BLT | 0x4); 695 OUT_RING(pitch | (0xCC << 16)); 696 OUT_RING((h << 16) | (w * cpp)); 697 if (dev_priv->current_page == 0) 698 OUT_RING(dev_priv->front_offset + start); 699 else 700 OUT_RING(dev_priv->back_offset + start); 701 OUT_RING(pitch); 702 if (dev_priv->current_page == 0) 703 OUT_RING(dev_priv->back_offset + start); 704 else 705 OUT_RING(dev_priv->front_offset + start); 706 ADVANCE_LP_RING(); 707 } 708 } 709 710 static void i810_dma_dispatch_vertex(struct drm_device *dev, 711 struct drm_buf *buf, int discard, int used) 712 { 713 drm_i810_private_t *dev_priv = dev->dev_private; 714 drm_i810_buf_priv_t *buf_priv = buf->dev_private; 715 drm_i810_sarea_t *sarea_priv = dev_priv->sarea_priv; 716 struct drm_clip_rect *box = sarea_priv->boxes; 717 int nbox = sarea_priv->nbox; 718 unsigned long address = (unsigned long)buf->bus_address; 719 unsigned long start = address - dev->agp->base; 720 int i = 0; 721 RING_LOCALS; 722 723 i810_kernel_lost_context(dev); 724 725 if (nbox > I810_NR_SAREA_CLIPRECTS) 726 nbox = I810_NR_SAREA_CLIPRECTS; 727 728 if (used > 4 * 1024) 729 used = 0; 730 731 if (sarea_priv->dirty) 732 i810EmitState(dev); 733 734 if (buf_priv->currently_mapped == I810_BUF_MAPPED) { 735 unsigned int prim = (sarea_priv->vertex_prim & PR_MASK); 736 737 *(u32 *) buf_priv->kernel_virtual = 738 ((GFX_OP_PRIMITIVE | prim | ((used / 4) - 2))); 739 740 if (used & 4) { 741 *(u32 *) ((char *) buf_priv->kernel_virtual + used) = 0; 742 used += 4; 743 } 744 745 i810_unmap_buffer(buf); 746 } 747 748 if (used) { 749 do { 750 if (i < nbox) { 751 BEGIN_LP_RING(4); 752 OUT_RING(GFX_OP_SCISSOR | SC_UPDATE_SCISSOR | 753 SC_ENABLE); 754 OUT_RING(GFX_OP_SCISSOR_INFO); 755 OUT_RING(box[i].x1 | (box[i].y1 << 16)); 756 OUT_RING((box[i].x2 - 757 1) | ((box[i].y2 - 1) << 16)); 758 ADVANCE_LP_RING(); 759 } 760 761 BEGIN_LP_RING(4); 762 OUT_RING(CMD_OP_BATCH_BUFFER); 763 OUT_RING(start | BB1_PROTECTED); 764 OUT_RING(start + used - 4); 765 OUT_RING(0); 766 ADVANCE_LP_RING(); 767 768 } while (++i < nbox); 769 } 770 771 if (discard) { 772 dev_priv->counter++; 773 774 (void)cmpxchg(buf_priv->in_use, I810_BUF_CLIENT, 775 I810_BUF_HARDWARE); 776 777 BEGIN_LP_RING(8); 778 OUT_RING(CMD_STORE_DWORD_IDX); 779 OUT_RING(20); 780 OUT_RING(dev_priv->counter); 781 OUT_RING(CMD_STORE_DWORD_IDX); 782 OUT_RING(buf_priv->my_use_idx); 783 OUT_RING(I810_BUF_FREE); 784 OUT_RING(CMD_REPORT_HEAD); 785 OUT_RING(0); 786 ADVANCE_LP_RING(); 787 } 788 } 789 790 static void i810_dma_dispatch_flip(struct drm_device *dev) 791 { 792 drm_i810_private_t *dev_priv = dev->dev_private; 793 int pitch = dev_priv->pitch; 794 RING_LOCALS; 795 796 DRM_DEBUG("page=%d pfCurrentPage=%d\n", 797 dev_priv->current_page, 798 dev_priv->sarea_priv->pf_current_page); 799 800 i810_kernel_lost_context(dev); 801 802 BEGIN_LP_RING(2); 803 OUT_RING(INST_PARSER_CLIENT | INST_OP_FLUSH | INST_FLUSH_MAP_CACHE); 804 OUT_RING(0); 805 ADVANCE_LP_RING(); 806 807 BEGIN_LP_RING(I810_DEST_SETUP_SIZE + 2); 808 /* On i815 at least ASYNC is buggy */ 809 /* pitch<<5 is from 11.2.8 p158, 810 its the pitch / 8 then left shifted 8, 811 so (pitch >> 3) << 8 */ 812 OUT_RING(CMD_OP_FRONTBUFFER_INFO | (pitch << 5) /*| ASYNC_FLIP */ ); 813 if (dev_priv->current_page == 0) { 814 OUT_RING(dev_priv->back_offset); 815 dev_priv->current_page = 1; 816 } else { 817 OUT_RING(dev_priv->front_offset); 818 dev_priv->current_page = 0; 819 } 820 OUT_RING(0); 821 ADVANCE_LP_RING(); 822 823 BEGIN_LP_RING(2); 824 OUT_RING(CMD_OP_WAIT_FOR_EVENT | WAIT_FOR_PLANE_A_FLIP); 825 OUT_RING(0); 826 ADVANCE_LP_RING(); 827 828 /* Increment the frame counter. The client-side 3D driver must 829 * throttle the framerate by waiting for this value before 830 * performing the swapbuffer ioctl. 831 */ 832 dev_priv->sarea_priv->pf_current_page = dev_priv->current_page; 833 834 } 835 836 static void i810_dma_quiescent(struct drm_device *dev) 837 { 838 drm_i810_private_t *dev_priv = dev->dev_private; 839 RING_LOCALS; 840 841 i810_kernel_lost_context(dev); 842 843 BEGIN_LP_RING(4); 844 OUT_RING(INST_PARSER_CLIENT | INST_OP_FLUSH | INST_FLUSH_MAP_CACHE); 845 OUT_RING(CMD_REPORT_HEAD); 846 OUT_RING(0); 847 OUT_RING(0); 848 ADVANCE_LP_RING(); 849 850 i810_wait_ring(dev, dev_priv->ring.Size - 8); 851 } 852 853 static int i810_flush_queue(struct drm_device *dev) 854 { 855 drm_i810_private_t *dev_priv = dev->dev_private; 856 struct drm_device_dma *dma = dev->dma; 857 int i, ret = 0; 858 RING_LOCALS; 859 860 i810_kernel_lost_context(dev); 861 862 BEGIN_LP_RING(2); 863 OUT_RING(CMD_REPORT_HEAD); 864 OUT_RING(0); 865 ADVANCE_LP_RING(); 866 867 i810_wait_ring(dev, dev_priv->ring.Size - 8); 868 869 for (i = 0; i < dma->buf_count; i++) { 870 struct drm_buf *buf = dma->buflist[i]; 871 drm_i810_buf_priv_t *buf_priv = buf->dev_private; 872 873 int used = cmpxchg(buf_priv->in_use, I810_BUF_HARDWARE, 874 I810_BUF_FREE); 875 876 if (used == I810_BUF_HARDWARE) 877 DRM_DEBUG("reclaimed from HARDWARE\n"); 878 if (used == I810_BUF_CLIENT) 879 DRM_DEBUG("still on client\n"); 880 } 881 882 return ret; 883 } 884 885 /* Must be called with the lock held */ 886 void i810_driver_reclaim_buffers(struct drm_device *dev, 887 struct drm_file *file_priv) 888 { 889 struct drm_device_dma *dma = dev->dma; 890 int i; 891 892 if (!dma) 893 return; 894 if (!dev->dev_private) 895 return; 896 if (!dma->buflist) 897 return; 898 899 i810_flush_queue(dev); 900 901 for (i = 0; i < dma->buf_count; i++) { 902 struct drm_buf *buf = dma->buflist[i]; 903 drm_i810_buf_priv_t *buf_priv = buf->dev_private; 904 905 if (buf->file_priv == file_priv && buf_priv) { 906 int used = cmpxchg(buf_priv->in_use, I810_BUF_CLIENT, 907 I810_BUF_FREE); 908 909 if (used == I810_BUF_CLIENT) 910 DRM_DEBUG("reclaimed from client\n"); 911 if (buf_priv->currently_mapped == I810_BUF_MAPPED) 912 buf_priv->currently_mapped = I810_BUF_UNMAPPED; 913 } 914 } 915 } 916 917 static int i810_flush_ioctl(struct drm_device *dev, void *data, 918 struct drm_file *file_priv) 919 { 920 LOCK_TEST_WITH_RETURN(dev, file_priv); 921 922 i810_flush_queue(dev); 923 return 0; 924 } 925 926 static int i810_dma_vertex(struct drm_device *dev, void *data, 927 struct drm_file *file_priv) 928 { 929 struct drm_device_dma *dma = dev->dma; 930 drm_i810_private_t *dev_priv = (drm_i810_private_t *) dev->dev_private; 931 u32 *hw_status = dev_priv->hw_status_page; 932 drm_i810_sarea_t *sarea_priv = (drm_i810_sarea_t *) 933 dev_priv->sarea_priv; 934 drm_i810_vertex_t *vertex = data; 935 936 LOCK_TEST_WITH_RETURN(dev, file_priv); 937 938 DRM_DEBUG("idx %d used %d discard %d\n", 939 vertex->idx, vertex->used, vertex->discard); 940 941 if (vertex->idx < 0 || vertex->idx > dma->buf_count) 942 return -EINVAL; 943 944 i810_dma_dispatch_vertex(dev, 945 dma->buflist[vertex->idx], 946 vertex->discard, vertex->used); 947 948 atomic_add(vertex->used, &dev->counts[_DRM_STAT_SECONDARY]); 949 atomic_inc(&dev->counts[_DRM_STAT_DMA]); 950 sarea_priv->last_enqueue = dev_priv->counter - 1; 951 sarea_priv->last_dispatch = (int)hw_status[5]; 952 953 return 0; 954 } 955 956 static int i810_clear_bufs(struct drm_device *dev, void *data, 957 struct drm_file *file_priv) 958 { 959 drm_i810_clear_t *clear = data; 960 961 LOCK_TEST_WITH_RETURN(dev, file_priv); 962 963 /* GH: Someone's doing nasty things... */ 964 if (!dev->dev_private) 965 return -EINVAL; 966 967 i810_dma_dispatch_clear(dev, clear->flags, 968 clear->clear_color, clear->clear_depth); 969 return 0; 970 } 971 972 static int i810_swap_bufs(struct drm_device *dev, void *data, 973 struct drm_file *file_priv) 974 { 975 DRM_DEBUG("\n"); 976 977 LOCK_TEST_WITH_RETURN(dev, file_priv); 978 979 i810_dma_dispatch_swap(dev); 980 return 0; 981 } 982 983 static int i810_getage(struct drm_device *dev, void *data, 984 struct drm_file *file_priv) 985 { 986 drm_i810_private_t *dev_priv = (drm_i810_private_t *) dev->dev_private; 987 u32 *hw_status = dev_priv->hw_status_page; 988 drm_i810_sarea_t *sarea_priv = (drm_i810_sarea_t *) 989 dev_priv->sarea_priv; 990 991 sarea_priv->last_dispatch = (int)hw_status[5]; 992 return 0; 993 } 994 995 static int i810_getbuf(struct drm_device *dev, void *data, 996 struct drm_file *file_priv) 997 { 998 int retcode = 0; 999 drm_i810_dma_t *d = data; 1000 drm_i810_private_t *dev_priv = (drm_i810_private_t *) dev->dev_private; 1001 u32 *hw_status = dev_priv->hw_status_page; 1002 drm_i810_sarea_t *sarea_priv = (drm_i810_sarea_t *) 1003 dev_priv->sarea_priv; 1004 1005 LOCK_TEST_WITH_RETURN(dev, file_priv); 1006 1007 d->granted = 0; 1008 1009 retcode = i810_dma_get_buffer(dev, d, file_priv); 1010 1011 DRM_DEBUG("i810_dma: %d returning %d, granted = %d\n", 1012 task_pid_nr(current), retcode, d->granted); 1013 1014 sarea_priv->last_dispatch = (int)hw_status[5]; 1015 1016 return retcode; 1017 } 1018 1019 static int i810_copybuf(struct drm_device *dev, void *data, 1020 struct drm_file *file_priv) 1021 { 1022 /* Never copy - 2.4.x doesn't need it */ 1023 return 0; 1024 } 1025 1026 static int i810_docopy(struct drm_device *dev, void *data, 1027 struct drm_file *file_priv) 1028 { 1029 /* Never copy - 2.4.x doesn't need it */ 1030 return 0; 1031 } 1032 1033 static void i810_dma_dispatch_mc(struct drm_device *dev, struct drm_buf *buf, int used, 1034 unsigned int last_render) 1035 { 1036 drm_i810_private_t *dev_priv = dev->dev_private; 1037 drm_i810_buf_priv_t *buf_priv = buf->dev_private; 1038 drm_i810_sarea_t *sarea_priv = dev_priv->sarea_priv; 1039 unsigned long address = (unsigned long)buf->bus_address; 1040 unsigned long start = address - dev->agp->base; 1041 int u; 1042 RING_LOCALS; 1043 1044 i810_kernel_lost_context(dev); 1045 1046 u = cmpxchg(buf_priv->in_use, I810_BUF_CLIENT, I810_BUF_HARDWARE); 1047 if (u != I810_BUF_CLIENT) 1048 DRM_DEBUG("MC found buffer that isn't mine!\n"); 1049 1050 if (used > 4 * 1024) 1051 used = 0; 1052 1053 sarea_priv->dirty = 0x7f; 1054 1055 DRM_DEBUG("addr 0x%lx, used 0x%x\n", address, used); 1056 1057 dev_priv->counter++; 1058 DRM_DEBUG("dispatch counter : %ld\n", dev_priv->counter); 1059 DRM_DEBUG("start : %lx\n", start); 1060 DRM_DEBUG("used : %d\n", used); 1061 DRM_DEBUG("start + used - 4 : %ld\n", start + used - 4); 1062 1063 if (buf_priv->currently_mapped == I810_BUF_MAPPED) { 1064 if (used & 4) { 1065 *(u32 *) ((char *) buf_priv->virtual + used) = 0; 1066 used += 4; 1067 } 1068 1069 i810_unmap_buffer(buf); 1070 } 1071 BEGIN_LP_RING(4); 1072 OUT_RING(CMD_OP_BATCH_BUFFER); 1073 OUT_RING(start | BB1_PROTECTED); 1074 OUT_RING(start + used - 4); 1075 OUT_RING(0); 1076 ADVANCE_LP_RING(); 1077 1078 BEGIN_LP_RING(8); 1079 OUT_RING(CMD_STORE_DWORD_IDX); 1080 OUT_RING(buf_priv->my_use_idx); 1081 OUT_RING(I810_BUF_FREE); 1082 OUT_RING(0); 1083 1084 OUT_RING(CMD_STORE_DWORD_IDX); 1085 OUT_RING(16); 1086 OUT_RING(last_render); 1087 OUT_RING(0); 1088 ADVANCE_LP_RING(); 1089 } 1090 1091 static int i810_dma_mc(struct drm_device *dev, void *data, 1092 struct drm_file *file_priv) 1093 { 1094 struct drm_device_dma *dma = dev->dma; 1095 drm_i810_private_t *dev_priv = (drm_i810_private_t *) dev->dev_private; 1096 u32 *hw_status = dev_priv->hw_status_page; 1097 drm_i810_sarea_t *sarea_priv = (drm_i810_sarea_t *) 1098 dev_priv->sarea_priv; 1099 drm_i810_mc_t *mc = data; 1100 1101 LOCK_TEST_WITH_RETURN(dev, file_priv); 1102 1103 if (mc->idx >= dma->buf_count || mc->idx < 0) 1104 return -EINVAL; 1105 1106 i810_dma_dispatch_mc(dev, dma->buflist[mc->idx], mc->used, 1107 mc->last_render); 1108 1109 atomic_add(mc->used, &dev->counts[_DRM_STAT_SECONDARY]); 1110 atomic_inc(&dev->counts[_DRM_STAT_DMA]); 1111 sarea_priv->last_enqueue = dev_priv->counter - 1; 1112 sarea_priv->last_dispatch = (int)hw_status[5]; 1113 1114 return 0; 1115 } 1116 1117 static int i810_rstatus(struct drm_device *dev, void *data, 1118 struct drm_file *file_priv) 1119 { 1120 drm_i810_private_t *dev_priv = (drm_i810_private_t *) dev->dev_private; 1121 1122 return (int)(((u32 *) (dev_priv->hw_status_page))[4]); 1123 } 1124 1125 static int i810_ov0_info(struct drm_device *dev, void *data, 1126 struct drm_file *file_priv) 1127 { 1128 drm_i810_private_t *dev_priv = (drm_i810_private_t *) dev->dev_private; 1129 drm_i810_overlay_t *ov = data; 1130 1131 ov->offset = dev_priv->overlay_offset; 1132 ov->physical = dev_priv->overlay_physical; 1133 1134 return 0; 1135 } 1136 1137 static int i810_fstatus(struct drm_device *dev, void *data, 1138 struct drm_file *file_priv) 1139 { 1140 drm_i810_private_t *dev_priv = (drm_i810_private_t *) dev->dev_private; 1141 1142 LOCK_TEST_WITH_RETURN(dev, file_priv); 1143 return I810_READ(0x30008); 1144 } 1145 1146 static int i810_ov0_flip(struct drm_device *dev, void *data, 1147 struct drm_file *file_priv) 1148 { 1149 drm_i810_private_t *dev_priv = (drm_i810_private_t *) dev->dev_private; 1150 1151 LOCK_TEST_WITH_RETURN(dev, file_priv); 1152 1153 /* Tell the overlay to update */ 1154 I810_WRITE(0x30000, dev_priv->overlay_physical | 0x80000000); 1155 1156 return 0; 1157 } 1158 1159 /* Not sure why this isn't set all the time: 1160 */ 1161 static void i810_do_init_pageflip(struct drm_device *dev) 1162 { 1163 drm_i810_private_t *dev_priv = dev->dev_private; 1164 1165 DRM_DEBUG("\n"); 1166 dev_priv->page_flipping = 1; 1167 dev_priv->current_page = 0; 1168 dev_priv->sarea_priv->pf_current_page = dev_priv->current_page; 1169 } 1170 1171 static int i810_do_cleanup_pageflip(struct drm_device *dev) 1172 { 1173 drm_i810_private_t *dev_priv = dev->dev_private; 1174 1175 DRM_DEBUG("\n"); 1176 if (dev_priv->current_page != 0) 1177 i810_dma_dispatch_flip(dev); 1178 1179 dev_priv->page_flipping = 0; 1180 return 0; 1181 } 1182 1183 static int i810_flip_bufs(struct drm_device *dev, void *data, 1184 struct drm_file *file_priv) 1185 { 1186 drm_i810_private_t *dev_priv = dev->dev_private; 1187 1188 DRM_DEBUG("\n"); 1189 1190 LOCK_TEST_WITH_RETURN(dev, file_priv); 1191 1192 if (!dev_priv->page_flipping) 1193 i810_do_init_pageflip(dev); 1194 1195 i810_dma_dispatch_flip(dev); 1196 return 0; 1197 } 1198 1199 int i810_driver_load(struct drm_device *dev, unsigned long flags) 1200 { 1201 /* i810 has 4 more counters */ 1202 dev->counters += 4; 1203 dev->types[6] = _DRM_STAT_IRQ; 1204 dev->types[7] = _DRM_STAT_PRIMARY; 1205 dev->types[8] = _DRM_STAT_SECONDARY; 1206 dev->types[9] = _DRM_STAT_DMA; 1207 1208 pci_set_master(dev->pdev); 1209 1210 return 0; 1211 } 1212 1213 void i810_driver_lastclose(struct drm_device *dev) 1214 { 1215 i810_dma_cleanup(dev); 1216 } 1217 1218 void i810_driver_preclose(struct drm_device *dev, struct drm_file *file_priv) 1219 { 1220 if (dev->dev_private) { 1221 drm_i810_private_t *dev_priv = dev->dev_private; 1222 if (dev_priv->page_flipping) 1223 i810_do_cleanup_pageflip(dev); 1224 } 1225 1226 if (file_priv->master && file_priv->master->lock.hw_lock) { 1227 drm_idlelock_take(&file_priv->master->lock); 1228 i810_driver_reclaim_buffers(dev, file_priv); 1229 drm_idlelock_release(&file_priv->master->lock); 1230 } else { 1231 /* master disappeared, clean up stuff anyway and hope nothing 1232 * goes wrong */ 1233 i810_driver_reclaim_buffers(dev, file_priv); 1234 } 1235 1236 } 1237 1238 int i810_driver_dma_quiescent(struct drm_device *dev) 1239 { 1240 i810_dma_quiescent(dev); 1241 return 0; 1242 } 1243 1244 struct drm_ioctl_desc i810_ioctls[] = { 1245 DRM_IOCTL_DEF_DRV(I810_INIT, i810_dma_init, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY|DRM_UNLOCKED), 1246 DRM_IOCTL_DEF_DRV(I810_VERTEX, i810_dma_vertex, DRM_AUTH|DRM_UNLOCKED), 1247 DRM_IOCTL_DEF_DRV(I810_CLEAR, i810_clear_bufs, DRM_AUTH|DRM_UNLOCKED), 1248 DRM_IOCTL_DEF_DRV(I810_FLUSH, i810_flush_ioctl, DRM_AUTH|DRM_UNLOCKED), 1249 DRM_IOCTL_DEF_DRV(I810_GETAGE, i810_getage, DRM_AUTH|DRM_UNLOCKED), 1250 DRM_IOCTL_DEF_DRV(I810_GETBUF, i810_getbuf, DRM_AUTH|DRM_UNLOCKED), 1251 DRM_IOCTL_DEF_DRV(I810_SWAP, i810_swap_bufs, DRM_AUTH|DRM_UNLOCKED), 1252 DRM_IOCTL_DEF_DRV(I810_COPY, i810_copybuf, DRM_AUTH|DRM_UNLOCKED), 1253 DRM_IOCTL_DEF_DRV(I810_DOCOPY, i810_docopy, DRM_AUTH|DRM_UNLOCKED), 1254 DRM_IOCTL_DEF_DRV(I810_OV0INFO, i810_ov0_info, DRM_AUTH|DRM_UNLOCKED), 1255 DRM_IOCTL_DEF_DRV(I810_FSTATUS, i810_fstatus, DRM_AUTH|DRM_UNLOCKED), 1256 DRM_IOCTL_DEF_DRV(I810_OV0FLIP, i810_ov0_flip, DRM_AUTH|DRM_UNLOCKED), 1257 DRM_IOCTL_DEF_DRV(I810_MC, i810_dma_mc, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY|DRM_UNLOCKED), 1258 DRM_IOCTL_DEF_DRV(I810_RSTATUS, i810_rstatus, DRM_AUTH|DRM_UNLOCKED), 1259 DRM_IOCTL_DEF_DRV(I810_FLIP, i810_flip_bufs, DRM_AUTH|DRM_UNLOCKED), 1260 }; 1261 1262 int i810_max_ioctl = DRM_ARRAY_SIZE(i810_ioctls); 1263 1264 /** 1265 * Determine if the device really is AGP or not. 1266 * 1267 * All Intel graphics chipsets are treated as AGP, even if they are really 1268 * PCI-e. 1269 * 1270 * \param dev The device to be tested. 1271 * 1272 * \returns 1273 * A value of 1 is always retured to indictate every i810 is AGP. 1274 */ 1275 int i810_driver_device_is_agp(struct drm_device *dev) 1276 { 1277 return 1; 1278 } 1279
Indexes created Tue Oct 28 12:10:06 GMT 2025