i810_drv.h revision 1.1.1.4
1 /* $NetBSD: i810_drv.h,v 1.1.1.4 2021/12/18 20:15:23 riastradh Exp $ */ 2 3 /* i810_drv.h -- Private header for the Matrox g200/g400 driver -*- linux-c -*- 4 * Created: Mon Dec 13 01:50:01 1999 by jhartmann (at) precisioninsight.com 5 * 6 * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas. 7 * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California. 8 * All rights reserved. 9 * 10 * Permission is hereby granted, free of charge, to any person obtaining a 11 * copy of this software and associated documentation files (the "Software"), 12 * to deal in the Software without restriction, including without limitation 13 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 14 * and/or sell copies of the Software, and to permit persons to whom the 15 * Software is furnished to do so, subject to the following conditions: 16 * 17 * The above copyright notice and this permission notice (including the next 18 * paragraph) shall be included in all copies or substantial portions of the 19 * Software. 20 * 21 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 22 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 23 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 24 * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR 25 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 26 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER 27 * DEALINGS IN THE SOFTWARE. 28 * 29 * Authors: Rickard E. (Rik) Faith <faith (at) valinux.com> 30 * Jeff Hartmann <jhartmann (at) valinux.com> 31 * 32 */ 33 34 #ifndef _I810_DRV_H_ 35 #define _I810_DRV_H_ 36 37 #include <drm/drm_ioctl.h> 38 #include <drm/drm_legacy.h> 39 #include <drm/i810_drm.h> 40 41 /* General customization: 42 */ 43 44 #define DRIVER_AUTHOR "VA Linux Systems Inc." 45 46 #define DRIVER_NAME "i810" 47 #define DRIVER_DESC "Intel i810" 48 #define DRIVER_DATE "20030605" 49 50 /* Interface history 51 * 52 * 1.1 - XFree86 4.1 53 * 1.2 - XvMC interfaces 54 * - XFree86 4.2 55 * 1.2.1 - Disable copying code (leave stub ioctls for backwards compatibility) 56 * - Remove requirement for interrupt (leave stubs again) 57 * 1.3 - Add page flipping. 58 * 1.4 - fix DRM interface 59 */ 60 #define DRIVER_MAJOR 1 61 #define DRIVER_MINOR 4 62 #define DRIVER_PATCHLEVEL 0 63 64 typedef struct drm_i810_buf_priv { 65 u32 *in_use; 66 int my_use_idx; 67 int currently_mapped; 68 void *virtual; 69 void *kernel_virtual; 70 drm_local_map_t map; 71 } drm_i810_buf_priv_t; 72 73 typedef struct _drm_i810_ring_buffer { 74 int tail_mask; 75 unsigned long Start; 76 unsigned long End; 77 unsigned long Size; 78 u8 *virtual_start; 79 int head; 80 int tail; 81 int space; 82 drm_local_map_t map; 83 } drm_i810_ring_buffer_t; 84 85 typedef struct drm_i810_private { 86 struct drm_local_map *sarea_map; 87 struct drm_local_map *mmio_map; 88 89 drm_i810_sarea_t *sarea_priv; 90 drm_i810_ring_buffer_t ring; 91 92 void *hw_status_page; 93 unsigned long counter; 94 95 dma_addr_t dma_status_page; 96 97 struct drm_buf *mmap_buffer; 98 99 u32 front_di1, back_di1, zi1; 100 101 int back_offset; 102 int depth_offset; 103 int overlay_offset; 104 int overlay_physical; 105 int w, h; 106 int pitch; 107 int back_pitch; 108 int depth_pitch; 109 110 int do_boxes; 111 int dma_used; 112 113 int current_page; 114 int page_flipping; 115 116 wait_queue_head_t irq_queue; 117 atomic_t irq_received; 118 atomic_t irq_emitted; 119 120 int front_offset; 121 } drm_i810_private_t; 122 123 /* i810_dma.c */ 124 extern int i810_driver_dma_quiescent(struct drm_device *dev); 125 void i810_driver_reclaim_buffers(struct drm_device *dev, 126 struct drm_file *file_priv); 127 extern int i810_driver_load(struct drm_device *, unsigned long flags); 128 extern void i810_driver_lastclose(struct drm_device *dev); 129 extern void i810_driver_preclose(struct drm_device *dev, 130 struct drm_file *file_priv); 131 132 extern long i810_ioctl(struct file *file, unsigned int cmd, unsigned long arg); 133 extern const struct drm_ioctl_desc i810_ioctls[]; 134 extern int i810_max_ioctl; 135 136 #define I810_BASE(reg) ((unsigned long) \ 137 dev_priv->mmio_map->handle) 138 #define I810_ADDR(reg) (I810_BASE(reg) + reg) 139 #define I810_DEREF(reg) (*(__volatile__ int *)I810_ADDR(reg)) 140 #define I810_READ(reg) I810_DEREF(reg) 141 #define I810_WRITE(reg, val) do { I810_DEREF(reg) = val; } while (0) 142 #define I810_DEREF16(reg) (*(__volatile__ u16 *)I810_ADDR(reg)) 143 #define I810_READ16(reg) I810_DEREF16(reg) 144 #define I810_WRITE16(reg, val) do { I810_DEREF16(reg) = val; } while (0) 145 146 #define I810_VERBOSE 0 147 #define RING_LOCALS unsigned int outring, ringmask; \ 148 volatile char *virt; 149 150 #define BEGIN_LP_RING(n) do { \ 151 if (I810_VERBOSE) \ 152 DRM_DEBUG("BEGIN_LP_RING(%d)\n", n); \ 153 if (dev_priv->ring.space < n*4) \ 154 i810_wait_ring(dev, n*4); \ 155 dev_priv->ring.space -= n*4; \ 156 outring = dev_priv->ring.tail; \ 157 ringmask = dev_priv->ring.tail_mask; \ 158 virt = dev_priv->ring.virtual_start; \ 159 } while (0) 160 161 #define ADVANCE_LP_RING() do { \ 162 if (I810_VERBOSE) \ 163 DRM_DEBUG("ADVANCE_LP_RING\n"); \ 164 dev_priv->ring.tail = outring; \ 165 I810_WRITE(LP_RING + RING_TAIL, outring); \ 166 } while (0) 167 168 #define OUT_RING(n) do { \ 169 if (I810_VERBOSE) \ 170 DRM_DEBUG(" OUT_RING %x\n", (int)(n)); \ 171 *(volatile unsigned int *)(virt + outring) = n; \ 172 outring += 4; \ 173 outring &= ringmask; \ 174 } while (0) 175 176 #define GFX_OP_USER_INTERRUPT ((0<<29)|(2<<23)) 177 #define GFX_OP_BREAKPOINT_INTERRUPT ((0<<29)|(1<<23)) 178 #define CMD_REPORT_HEAD (7<<23) 179 #define CMD_STORE_DWORD_IDX ((0x21<<23) | 0x1) 180 #define CMD_OP_BATCH_BUFFER ((0x0<<29)|(0x30<<23)|0x1) 181 182 #define INST_PARSER_CLIENT 0x00000000 183 #define INST_OP_FLUSH 0x02000000 184 #define INST_FLUSH_MAP_CACHE 0x00000001 185 186 #define BB1_START_ADDR_MASK (~0x7) 187 #define BB1_PROTECTED (1<<0) 188 #define BB1_UNPROTECTED (0<<0) 189 #define BB2_END_ADDR_MASK (~0x7) 190 191 #define I810REG_HWSTAM 0x02098 192 #define I810REG_INT_IDENTITY_R 0x020a4 193 #define I810REG_INT_MASK_R 0x020a8 194 #define I810REG_INT_ENABLE_R 0x020a0 195 196 #define LP_RING 0x2030 197 #define HP_RING 0x2040 198 #define RING_TAIL 0x00 199 #define TAIL_ADDR 0x000FFFF8 200 #define RING_HEAD 0x04 201 #define HEAD_WRAP_COUNT 0xFFE00000 202 #define HEAD_WRAP_ONE 0x00200000 203 #define HEAD_ADDR 0x001FFFFC 204 #define RING_START 0x08 205 #define START_ADDR 0x00FFFFF8 206 #define RING_LEN 0x0C 207 #define RING_NR_PAGES 0x000FF000 208 #define RING_REPORT_MASK 0x00000006 209 #define RING_REPORT_64K 0x00000002 210 #define RING_REPORT_128K 0x00000004 211 #define RING_NO_REPORT 0x00000000 212 #define RING_VALID_MASK 0x00000001 213 #define RING_VALID 0x00000001 214 #define RING_INVALID 0x00000000 215 216 #define GFX_OP_SCISSOR ((0x3<<29)|(0x1c<<24)|(0x10<<19)) 217 #define SC_UPDATE_SCISSOR (0x1<<1) 218 #define SC_ENABLE_MASK (0x1<<0) 219 #define SC_ENABLE (0x1<<0) 220 221 #define GFX_OP_SCISSOR_INFO ((0x3<<29)|(0x1d<<24)|(0x81<<16)|(0x1)) 222 #define SCI_YMIN_MASK (0xffff<<16) 223 #define SCI_XMIN_MASK (0xffff<<0) 224 #define SCI_YMAX_MASK (0xffff<<16) 225 #define SCI_XMAX_MASK (0xffff<<0) 226 227 #define GFX_OP_COLOR_FACTOR ((0x3<<29)|(0x1d<<24)|(0x1<<16)|0x0) 228 #define GFX_OP_STIPPLE ((0x3<<29)|(0x1d<<24)|(0x83<<16)) 229 #define GFX_OP_MAP_INFO ((0x3<<29)|(0x1d<<24)|0x2) 230 #define GFX_OP_DESTBUFFER_VARS ((0x3<<29)|(0x1d<<24)|(0x85<<16)|0x0) 231 #define GFX_OP_DRAWRECT_INFO ((0x3<<29)|(0x1d<<24)|(0x80<<16)|(0x3)) 232 #define GFX_OP_PRIMITIVE ((0x3<<29)|(0x1f<<24)) 233 234 #define CMD_OP_Z_BUFFER_INFO ((0x0<<29)|(0x16<<23)) 235 #define CMD_OP_DESTBUFFER_INFO ((0x0<<29)|(0x15<<23)) 236 #define CMD_OP_FRONTBUFFER_INFO ((0x0<<29)|(0x14<<23)) 237 #define CMD_OP_WAIT_FOR_EVENT ((0x0<<29)|(0x03<<23)) 238 239 #define BR00_BITBLT_CLIENT 0x40000000 240 #define BR00_OP_COLOR_BLT 0x10000000 241 #define BR00_OP_SRC_COPY_BLT 0x10C00000 242 #define BR13_SOLID_PATTERN 0x80000000 243 244 #define WAIT_FOR_PLANE_A_SCANLINES (1<<1) 245 #define WAIT_FOR_PLANE_A_FLIP (1<<2) 246 #define WAIT_FOR_VBLANK (1<<3) 247 248 #endif 249
Indexes created Mon Oct 20 05:10:11 GMT 2025