1 1.1 riastrad config DRM_I915_USERFAULT_AUTOSUSPEND 2 1.1 riastrad int "Runtime autosuspend delay for userspace GGTT mmaps (ms)" 3 1.1 riastrad default 250 # milliseconds 4 1.1 riastrad help 5 1.1 riastrad On runtime suspend, as we suspend the device, we have to revoke 6 1.1 riastrad userspace GGTT mmaps and force userspace to take a pagefault on 7 1.1 riastrad their next access. The revocation and subsequent recreation of 8 1.1 riastrad the GGTT mmap can be very slow and so we impose a small hysteris 9 1.1 riastrad that complements the runtime-pm autosuspend and provides a lower 10 1.1 riastrad floor on the autosuspend delay. 11 1.1 riastrad 12 1.1 riastrad May be 0 to disable the extra delay and solely use the device level 13 1.1 riastrad runtime pm autosuspend delay tunable. 14 1.1 riastrad 15 1.1 riastrad config DRM_I915_HEARTBEAT_INTERVAL 16 1.1 riastrad int "Interval between heartbeat pulses (ms)" 17 1.1 riastrad default 2500 # milliseconds 18 1.1 riastrad help 19 1.1 riastrad The driver sends a periodic heartbeat down all active engines to 20 1.1 riastrad check the health of the GPU and undertake regular house-keeping of 21 1.1 riastrad internal driver state. 22 1.1 riastrad 23 1.1 riastrad May be 0 to disable heartbeats and therefore disable automatic GPU 24 1.1 riastrad hang detection. 25 1.1 riastrad 26 1.1 riastrad config DRM_I915_PREEMPT_TIMEOUT 27 1.1 riastrad int "Preempt timeout (ms, jiffy granularity)" 28 1.1 riastrad default 640 # milliseconds 29 1.1 riastrad help 30 1.1 riastrad How long to wait (in milliseconds) for a preemption event to occur 31 1.1 riastrad when submitting a new context via execlists. If the current context 32 1.1 riastrad does not hit an arbitration point and yield to HW before the timer 33 1.1 riastrad expires, the HW will be reset to allow the more important context 34 1.1 riastrad to execute. 35 1.1 riastrad 36 1.1 riastrad May be 0 to disable the timeout. 37 1.1 riastrad 38 1.1 riastrad config DRM_I915_SPIN_REQUEST 39 1.1 riastrad int "Busywait for request completion (us)" 40 1.1 riastrad default 5 # microseconds 41 1.1 riastrad help 42 1.1 riastrad Before sleeping waiting for a request (GPU operation) to complete, 43 1.1 riastrad we may spend some time polling for its completion. As the IRQ may 44 1.1 riastrad take a non-negligible time to setup, we do a short spin first to 45 1.1 riastrad check if the request will complete in the time it would have taken 46 1.1 riastrad us to enable the interrupt. 47 1.1 riastrad 48 1.1 riastrad May be 0 to disable the initial spin. In practice, we estimate 49 1.1 riastrad the cost of enabling the interrupt (if currently disabled) to be 50 1.1 riastrad a few microseconds. 51 1.1 riastrad 52 1.1 riastrad config DRM_I915_STOP_TIMEOUT 53 1.1 riastrad int "How long to wait for an engine to quiesce gracefully before reset (ms)" 54 1.1 riastrad default 100 # milliseconds 55 1.1 riastrad help 56 1.1 riastrad By stopping submission and sleeping for a short time before resetting 57 1.1 riastrad the GPU, we allow the innocent contexts also on the system to quiesce. 58 1.1 riastrad It is then less likely for a hanging context to cause collateral 59 1.1 riastrad damage as the system is reset in order to recover. The corollary is 60 1.1 riastrad that the reset itself may take longer and so be more disruptive to 61 1.1 riastrad interactive or low latency workloads. 62 1.1 riastrad 63 1.1 riastrad config DRM_I915_TIMESLICE_DURATION 64 1.1 riastrad int "Scheduling quantum for userspace batches (ms, jiffy granularity)" 65 1.1 riastrad default 1 # milliseconds 66 1.1 riastrad help 67 1.1 riastrad When two user batches of equal priority are executing, we will 68 1.1 riastrad alternate execution of each batch to ensure forward progress of 69 1.1 riastrad all users. This is necessary in some cases where there may be 70 1.1 riastrad an implicit dependency between those batches that requires 71 1.1 riastrad concurrent execution in order for them to proceed, e.g. they 72 1.1 riastrad interact with each other via userspace semaphores. Each context 73 1.1 riastrad is scheduled for execution for the timeslice duration, before 74 1.1 riastrad switching to the next context. 75 1.1 riastrad 76 1.1 riastrad May be 0 to disable timeslicing. 77