intel_bios.c revision 1.1.1.1 1 /* $NetBSD: intel_bios.c,v 1.1.1.1 2021/12/18 20:15:27 riastradh Exp $ */
2
3 /*
4 * Copyright 2006 Intel Corporation
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice (including the next
14 * paragraph) shall be included in all copies or substantial portions of the
15 * Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
22 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
23 * SOFTWARE.
24 *
25 * Authors:
26 * Eric Anholt <eric (at) anholt.net>
27 *
28 */
29
30 #include <sys/cdefs.h>
31 __KERNEL_RCSID(0, "$NetBSD: intel_bios.c,v 1.1.1.1 2021/12/18 20:15:27 riastradh Exp $");
32
33 #include <drm/drm_dp_helper.h>
34 #include <drm/i915_drm.h>
35
36 #include "display/intel_display.h"
37 #include "display/intel_display_types.h"
38 #include "display/intel_gmbus.h"
39
40 #include "i915_drv.h"
41
42 #define _INTEL_BIOS_PRIVATE
43 #include "intel_vbt_defs.h"
44
45 /**
46 * DOC: Video BIOS Table (VBT)
47 *
48 * The Video BIOS Table, or VBT, provides platform and board specific
49 * configuration information to the driver that is not discoverable or available
50 * through other means. The configuration is mostly related to display
51 * hardware. The VBT is available via the ACPI OpRegion or, on older systems, in
52 * the PCI ROM.
53 *
54 * The VBT consists of a VBT Header (defined as &struct vbt_header), a BDB
55 * Header (&struct bdb_header), and a number of BIOS Data Blocks (BDB) that
56 * contain the actual configuration information. The VBT Header, and thus the
57 * VBT, begins with "$VBT" signature. The VBT Header contains the offset of the
58 * BDB Header. The data blocks are concatenated after the BDB Header. The data
59 * blocks have a 1-byte Block ID, 2-byte Block Size, and Block Size bytes of
60 * data. (Block 53, the MIPI Sequence Block is an exception.)
61 *
62 * The driver parses the VBT during load. The relevant information is stored in
63 * driver private data for ease of use, and the actual VBT is not read after
64 * that.
65 */
66
67 /* Wrapper for VBT child device config */
68 struct display_device_data {
69 struct child_device_config child;
70 struct dsc_compression_parameters_entry *dsc;
71 struct list_head node;
72 };
73
74 #define SLAVE_ADDR1 0x70
75 #define SLAVE_ADDR2 0x72
76
77 /* Get BDB block size given a pointer to Block ID. */
78 static u32 _get_blocksize(const u8 *block_base)
79 {
80 /* The MIPI Sequence Block v3+ has a separate size field. */
81 if (*block_base == BDB_MIPI_SEQUENCE && *(block_base + 3) >= 3)
82 return *((const u32 *)(block_base + 4));
83 else
84 return *((const u16 *)(block_base + 1));
85 }
86
87 /* Get BDB block size give a pointer to data after Block ID and Block Size. */
88 static u32 get_blocksize(const void *block_data)
89 {
90 return _get_blocksize(block_data - 3);
91 }
92
93 static const void *
94 find_section(const void *_bdb, enum bdb_block_id section_id)
95 {
96 const struct bdb_header *bdb = _bdb;
97 const u8 *base = _bdb;
98 int index = 0;
99 u32 total, current_size;
100 enum bdb_block_id current_id;
101
102 /* skip to first section */
103 index += bdb->header_size;
104 total = bdb->bdb_size;
105
106 /* walk the sections looking for section_id */
107 while (index + 3 < total) {
108 current_id = *(base + index);
109 current_size = _get_blocksize(base + index);
110 index += 3;
111
112 if (index + current_size > total)
113 return NULL;
114
115 if (current_id == section_id)
116 return base + index;
117
118 index += current_size;
119 }
120
121 return NULL;
122 }
123
124 static void
125 fill_detail_timing_data(struct drm_display_mode *panel_fixed_mode,
126 const struct lvds_dvo_timing *dvo_timing)
127 {
128 panel_fixed_mode->hdisplay = (dvo_timing->hactive_hi << 8) |
129 dvo_timing->hactive_lo;
130 panel_fixed_mode->hsync_start = panel_fixed_mode->hdisplay +
131 ((dvo_timing->hsync_off_hi << 8) | dvo_timing->hsync_off_lo);
132 panel_fixed_mode->hsync_end = panel_fixed_mode->hsync_start +
133 ((dvo_timing->hsync_pulse_width_hi << 8) |
134 dvo_timing->hsync_pulse_width_lo);
135 panel_fixed_mode->htotal = panel_fixed_mode->hdisplay +
136 ((dvo_timing->hblank_hi << 8) | dvo_timing->hblank_lo);
137
138 panel_fixed_mode->vdisplay = (dvo_timing->vactive_hi << 8) |
139 dvo_timing->vactive_lo;
140 panel_fixed_mode->vsync_start = panel_fixed_mode->vdisplay +
141 ((dvo_timing->vsync_off_hi << 4) | dvo_timing->vsync_off_lo);
142 panel_fixed_mode->vsync_end = panel_fixed_mode->vsync_start +
143 ((dvo_timing->vsync_pulse_width_hi << 4) |
144 dvo_timing->vsync_pulse_width_lo);
145 panel_fixed_mode->vtotal = panel_fixed_mode->vdisplay +
146 ((dvo_timing->vblank_hi << 8) | dvo_timing->vblank_lo);
147 panel_fixed_mode->clock = dvo_timing->clock * 10;
148 panel_fixed_mode->type = DRM_MODE_TYPE_PREFERRED;
149
150 if (dvo_timing->hsync_positive)
151 panel_fixed_mode->flags |= DRM_MODE_FLAG_PHSYNC;
152 else
153 panel_fixed_mode->flags |= DRM_MODE_FLAG_NHSYNC;
154
155 if (dvo_timing->vsync_positive)
156 panel_fixed_mode->flags |= DRM_MODE_FLAG_PVSYNC;
157 else
158 panel_fixed_mode->flags |= DRM_MODE_FLAG_NVSYNC;
159
160 panel_fixed_mode->width_mm = (dvo_timing->himage_hi << 8) |
161 dvo_timing->himage_lo;
162 panel_fixed_mode->height_mm = (dvo_timing->vimage_hi << 8) |
163 dvo_timing->vimage_lo;
164
165 /* Some VBTs have bogus h/vtotal values */
166 if (panel_fixed_mode->hsync_end > panel_fixed_mode->htotal)
167 panel_fixed_mode->htotal = panel_fixed_mode->hsync_end + 1;
168 if (panel_fixed_mode->vsync_end > panel_fixed_mode->vtotal)
169 panel_fixed_mode->vtotal = panel_fixed_mode->vsync_end + 1;
170
171 drm_mode_set_name(panel_fixed_mode);
172 }
173
174 static const struct lvds_dvo_timing *
175 get_lvds_dvo_timing(const struct bdb_lvds_lfp_data *lvds_lfp_data,
176 const struct bdb_lvds_lfp_data_ptrs *lvds_lfp_data_ptrs,
177 int index)
178 {
179 /*
180 * the size of fp_timing varies on the different platform.
181 * So calculate the DVO timing relative offset in LVDS data
182 * entry to get the DVO timing entry
183 */
184
185 int lfp_data_size =
186 lvds_lfp_data_ptrs->ptr[1].dvo_timing_offset -
187 lvds_lfp_data_ptrs->ptr[0].dvo_timing_offset;
188 int dvo_timing_offset =
189 lvds_lfp_data_ptrs->ptr[0].dvo_timing_offset -
190 lvds_lfp_data_ptrs->ptr[0].fp_timing_offset;
191 char *entry = (char *)lvds_lfp_data->data + lfp_data_size * index;
192
193 return (struct lvds_dvo_timing *)(entry + dvo_timing_offset);
194 }
195
196 /* get lvds_fp_timing entry
197 * this function may return NULL if the corresponding entry is invalid
198 */
199 static const struct lvds_fp_timing *
200 get_lvds_fp_timing(const struct bdb_header *bdb,
201 const struct bdb_lvds_lfp_data *data,
202 const struct bdb_lvds_lfp_data_ptrs *ptrs,
203 int index)
204 {
205 size_t data_ofs = (const u8 *)data - (const u8 *)bdb;
206 u16 data_size = ((const u16 *)data)[-1]; /* stored in header */
207 size_t ofs;
208
209 if (index >= ARRAY_SIZE(ptrs->ptr))
210 return NULL;
211 ofs = ptrs->ptr[index].fp_timing_offset;
212 if (ofs < data_ofs ||
213 ofs + sizeof(struct lvds_fp_timing) > data_ofs + data_size)
214 return NULL;
215 return (const struct lvds_fp_timing *)((const u8 *)bdb + ofs);
216 }
217
218 /* Parse general panel options */
219 static void
220 parse_panel_options(struct drm_i915_private *dev_priv,
221 const struct bdb_header *bdb)
222 {
223 const struct bdb_lvds_options *lvds_options;
224 int panel_type;
225 int drrs_mode;
226 int ret;
227
228 lvds_options = find_section(bdb, BDB_LVDS_OPTIONS);
229 if (!lvds_options)
230 return;
231
232 dev_priv->vbt.lvds_dither = lvds_options->pixel_dither;
233
234 ret = intel_opregion_get_panel_type(dev_priv);
235 if (ret >= 0) {
236 WARN_ON(ret > 0xf);
237 panel_type = ret;
238 DRM_DEBUG_KMS("Panel type: %d (OpRegion)\n", panel_type);
239 } else {
240 if (lvds_options->panel_type > 0xf) {
241 DRM_DEBUG_KMS("Invalid VBT panel type 0x%x\n",
242 lvds_options->panel_type);
243 return;
244 }
245 panel_type = lvds_options->panel_type;
246 DRM_DEBUG_KMS("Panel type: %d (VBT)\n", panel_type);
247 }
248
249 dev_priv->vbt.panel_type = panel_type;
250
251 drrs_mode = (lvds_options->dps_panel_type_bits
252 >> (panel_type * 2)) & MODE_MASK;
253 /*
254 * VBT has static DRRS = 0 and seamless DRRS = 2.
255 * The below piece of code is required to adjust vbt.drrs_type
256 * to match the enum drrs_support_type.
257 */
258 switch (drrs_mode) {
259 case 0:
260 dev_priv->vbt.drrs_type = STATIC_DRRS_SUPPORT;
261 DRM_DEBUG_KMS("DRRS supported mode is static\n");
262 break;
263 case 2:
264 dev_priv->vbt.drrs_type = SEAMLESS_DRRS_SUPPORT;
265 DRM_DEBUG_KMS("DRRS supported mode is seamless\n");
266 break;
267 default:
268 dev_priv->vbt.drrs_type = DRRS_NOT_SUPPORTED;
269 DRM_DEBUG_KMS("DRRS not supported (VBT input)\n");
270 break;
271 }
272 }
273
274 /* Try to find integrated panel timing data */
275 static void
276 parse_lfp_panel_dtd(struct drm_i915_private *dev_priv,
277 const struct bdb_header *bdb)
278 {
279 const struct bdb_lvds_lfp_data *lvds_lfp_data;
280 const struct bdb_lvds_lfp_data_ptrs *lvds_lfp_data_ptrs;
281 const struct lvds_dvo_timing *panel_dvo_timing;
282 const struct lvds_fp_timing *fp_timing;
283 struct drm_display_mode *panel_fixed_mode;
284 int panel_type = dev_priv->vbt.panel_type;
285
286 lvds_lfp_data = find_section(bdb, BDB_LVDS_LFP_DATA);
287 if (!lvds_lfp_data)
288 return;
289
290 lvds_lfp_data_ptrs = find_section(bdb, BDB_LVDS_LFP_DATA_PTRS);
291 if (!lvds_lfp_data_ptrs)
292 return;
293
294 panel_dvo_timing = get_lvds_dvo_timing(lvds_lfp_data,
295 lvds_lfp_data_ptrs,
296 panel_type);
297
298 panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL);
299 if (!panel_fixed_mode)
300 return;
301
302 fill_detail_timing_data(panel_fixed_mode, panel_dvo_timing);
303
304 dev_priv->vbt.lfp_lvds_vbt_mode = panel_fixed_mode;
305
306 DRM_DEBUG_KMS("Found panel mode in BIOS VBT legacy lfp table:\n");
307 drm_mode_debug_printmodeline(panel_fixed_mode);
308
309 fp_timing = get_lvds_fp_timing(bdb, lvds_lfp_data,
310 lvds_lfp_data_ptrs,
311 panel_type);
312 if (fp_timing) {
313 /* check the resolution, just to be sure */
314 if (fp_timing->x_res == panel_fixed_mode->hdisplay &&
315 fp_timing->y_res == panel_fixed_mode->vdisplay) {
316 dev_priv->vbt.bios_lvds_val = fp_timing->lvds_reg_val;
317 DRM_DEBUG_KMS("VBT initial LVDS value %x\n",
318 dev_priv->vbt.bios_lvds_val);
319 }
320 }
321 }
322
323 static void
324 parse_generic_dtd(struct drm_i915_private *dev_priv,
325 const struct bdb_header *bdb)
326 {
327 const struct bdb_generic_dtd *generic_dtd;
328 const struct generic_dtd_entry *dtd;
329 struct drm_display_mode *panel_fixed_mode;
330 int num_dtd;
331
332 generic_dtd = find_section(bdb, BDB_GENERIC_DTD);
333 if (!generic_dtd)
334 return;
335
336 if (generic_dtd->gdtd_size < sizeof(struct generic_dtd_entry)) {
337 DRM_ERROR("GDTD size %u is too small.\n",
338 generic_dtd->gdtd_size);
339 return;
340 } else if (generic_dtd->gdtd_size !=
341 sizeof(struct generic_dtd_entry)) {
342 DRM_ERROR("Unexpected GDTD size %u\n", generic_dtd->gdtd_size);
343 /* DTD has unknown fields, but keep going */
344 }
345
346 num_dtd = (get_blocksize(generic_dtd) -
347 sizeof(struct bdb_generic_dtd)) / generic_dtd->gdtd_size;
348 if (dev_priv->vbt.panel_type >= num_dtd) {
349 DRM_ERROR("Panel type %d not found in table of %d DTD's\n",
350 dev_priv->vbt.panel_type, num_dtd);
351 return;
352 }
353
354 dtd = &generic_dtd->dtd[dev_priv->vbt.panel_type];
355
356 panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL);
357 if (!panel_fixed_mode)
358 return;
359
360 panel_fixed_mode->hdisplay = dtd->hactive;
361 panel_fixed_mode->hsync_start =
362 panel_fixed_mode->hdisplay + dtd->hfront_porch;
363 panel_fixed_mode->hsync_end =
364 panel_fixed_mode->hsync_start + dtd->hsync;
365 panel_fixed_mode->htotal =
366 panel_fixed_mode->hdisplay + dtd->hblank;
367
368 panel_fixed_mode->vdisplay = dtd->vactive;
369 panel_fixed_mode->vsync_start =
370 panel_fixed_mode->vdisplay + dtd->vfront_porch;
371 panel_fixed_mode->vsync_end =
372 panel_fixed_mode->vsync_start + dtd->vsync;
373 panel_fixed_mode->vtotal =
374 panel_fixed_mode->vdisplay + dtd->vblank;
375
376 panel_fixed_mode->clock = dtd->pixel_clock;
377 panel_fixed_mode->width_mm = dtd->width_mm;
378 panel_fixed_mode->height_mm = dtd->height_mm;
379
380 panel_fixed_mode->type = DRM_MODE_TYPE_PREFERRED;
381 drm_mode_set_name(panel_fixed_mode);
382
383 if (dtd->hsync_positive_polarity)
384 panel_fixed_mode->flags |= DRM_MODE_FLAG_PHSYNC;
385 else
386 panel_fixed_mode->flags |= DRM_MODE_FLAG_NHSYNC;
387
388 if (dtd->vsync_positive_polarity)
389 panel_fixed_mode->flags |= DRM_MODE_FLAG_PVSYNC;
390 else
391 panel_fixed_mode->flags |= DRM_MODE_FLAG_NVSYNC;
392
393 DRM_DEBUG_KMS("Found panel mode in BIOS VBT generic dtd table:\n");
394 drm_mode_debug_printmodeline(panel_fixed_mode);
395
396 dev_priv->vbt.lfp_lvds_vbt_mode = panel_fixed_mode;
397 }
398
399 static void
400 parse_panel_dtd(struct drm_i915_private *dev_priv,
401 const struct bdb_header *bdb)
402 {
403 /*
404 * Older VBTs provided provided DTD information for internal displays
405 * through the "LFP panel DTD" block (42). As of VBT revision 229,
406 * that block is now deprecated and DTD information should be provided
407 * via a newer "generic DTD" block (58). Just to be safe, we'll
408 * try the new generic DTD block first on VBT >= 229, but still fall
409 * back to trying the old LFP block if that fails.
410 */
411 if (bdb->version >= 229)
412 parse_generic_dtd(dev_priv, bdb);
413 if (!dev_priv->vbt.lfp_lvds_vbt_mode)
414 parse_lfp_panel_dtd(dev_priv, bdb);
415 }
416
417 static void
418 parse_lfp_backlight(struct drm_i915_private *dev_priv,
419 const struct bdb_header *bdb)
420 {
421 const struct bdb_lfp_backlight_data *backlight_data;
422 const struct lfp_backlight_data_entry *entry;
423 int panel_type = dev_priv->vbt.panel_type;
424
425 backlight_data = find_section(bdb, BDB_LVDS_BACKLIGHT);
426 if (!backlight_data)
427 return;
428
429 if (backlight_data->entry_size != sizeof(backlight_data->data[0])) {
430 DRM_DEBUG_KMS("Unsupported backlight data entry size %u\n",
431 backlight_data->entry_size);
432 return;
433 }
434
435 entry = &backlight_data->data[panel_type];
436
437 dev_priv->vbt.backlight.present = entry->type == BDB_BACKLIGHT_TYPE_PWM;
438 if (!dev_priv->vbt.backlight.present) {
439 DRM_DEBUG_KMS("PWM backlight not present in VBT (type %u)\n",
440 entry->type);
441 return;
442 }
443
444 dev_priv->vbt.backlight.type = INTEL_BACKLIGHT_DISPLAY_DDI;
445 if (bdb->version >= 191 &&
446 get_blocksize(backlight_data) >= sizeof(*backlight_data)) {
447 const struct lfp_backlight_control_method *method;
448
449 method = &backlight_data->backlight_control[panel_type];
450 dev_priv->vbt.backlight.type = method->type;
451 dev_priv->vbt.backlight.controller = method->controller;
452 }
453
454 dev_priv->vbt.backlight.pwm_freq_hz = entry->pwm_freq_hz;
455 dev_priv->vbt.backlight.active_low_pwm = entry->active_low_pwm;
456 dev_priv->vbt.backlight.min_brightness = entry->min_brightness;
457 DRM_DEBUG_KMS("VBT backlight PWM modulation frequency %u Hz, "
458 "active %s, min brightness %u, level %u, controller %u\n",
459 dev_priv->vbt.backlight.pwm_freq_hz,
460 dev_priv->vbt.backlight.active_low_pwm ? "low" : "high",
461 dev_priv->vbt.backlight.min_brightness,
462 backlight_data->level[panel_type],
463 dev_priv->vbt.backlight.controller);
464 }
465
466 /* Try to find sdvo panel data */
467 static void
468 parse_sdvo_panel_data(struct drm_i915_private *dev_priv,
469 const struct bdb_header *bdb)
470 {
471 const struct bdb_sdvo_panel_dtds *dtds;
472 struct drm_display_mode *panel_fixed_mode;
473 int index;
474
475 index = i915_modparams.vbt_sdvo_panel_type;
476 if (index == -2) {
477 DRM_DEBUG_KMS("Ignore SDVO panel mode from BIOS VBT tables.\n");
478 return;
479 }
480
481 if (index == -1) {
482 const struct bdb_sdvo_lvds_options *sdvo_lvds_options;
483
484 sdvo_lvds_options = find_section(bdb, BDB_SDVO_LVDS_OPTIONS);
485 if (!sdvo_lvds_options)
486 return;
487
488 index = sdvo_lvds_options->panel_type;
489 }
490
491 dtds = find_section(bdb, BDB_SDVO_PANEL_DTDS);
492 if (!dtds)
493 return;
494
495 panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL);
496 if (!panel_fixed_mode)
497 return;
498
499 fill_detail_timing_data(panel_fixed_mode, &dtds->dtds[index]);
500
501 dev_priv->vbt.sdvo_lvds_vbt_mode = panel_fixed_mode;
502
503 DRM_DEBUG_KMS("Found SDVO panel mode in BIOS VBT tables:\n");
504 drm_mode_debug_printmodeline(panel_fixed_mode);
505 }
506
507 static int intel_bios_ssc_frequency(struct drm_i915_private *dev_priv,
508 bool alternate)
509 {
510 switch (INTEL_GEN(dev_priv)) {
511 case 2:
512 return alternate ? 66667 : 48000;
513 case 3:
514 case 4:
515 return alternate ? 100000 : 96000;
516 default:
517 return alternate ? 100000 : 120000;
518 }
519 }
520
521 static void
522 parse_general_features(struct drm_i915_private *dev_priv,
523 const struct bdb_header *bdb)
524 {
525 const struct bdb_general_features *general;
526
527 general = find_section(bdb, BDB_GENERAL_FEATURES);
528 if (!general)
529 return;
530
531 dev_priv->vbt.int_tv_support = general->int_tv_support;
532 /* int_crt_support can't be trusted on earlier platforms */
533 if (bdb->version >= 155 &&
534 (HAS_DDI(dev_priv) || IS_VALLEYVIEW(dev_priv)))
535 dev_priv->vbt.int_crt_support = general->int_crt_support;
536 dev_priv->vbt.lvds_use_ssc = general->enable_ssc;
537 dev_priv->vbt.lvds_ssc_freq =
538 intel_bios_ssc_frequency(dev_priv, general->ssc_freq);
539 dev_priv->vbt.display_clock_mode = general->display_clock_mode;
540 dev_priv->vbt.fdi_rx_polarity_inverted = general->fdi_rx_polarity_inverted;
541 if (bdb->version >= 181) {
542 dev_priv->vbt.orientation = general->rotate_180 ?
543 DRM_MODE_PANEL_ORIENTATION_BOTTOM_UP :
544 DRM_MODE_PANEL_ORIENTATION_NORMAL;
545 } else {
546 dev_priv->vbt.orientation = DRM_MODE_PANEL_ORIENTATION_UNKNOWN;
547 }
548 DRM_DEBUG_KMS("BDB_GENERAL_FEATURES int_tv_support %d int_crt_support %d lvds_use_ssc %d lvds_ssc_freq %d display_clock_mode %d fdi_rx_polarity_inverted %d\n",
549 dev_priv->vbt.int_tv_support,
550 dev_priv->vbt.int_crt_support,
551 dev_priv->vbt.lvds_use_ssc,
552 dev_priv->vbt.lvds_ssc_freq,
553 dev_priv->vbt.display_clock_mode,
554 dev_priv->vbt.fdi_rx_polarity_inverted);
555 }
556
557 static const struct child_device_config *
558 child_device_ptr(const struct bdb_general_definitions *defs, int i)
559 {
560 return (const void *) &defs->devices[i * defs->child_dev_size];
561 }
562
563 static void
564 parse_sdvo_device_mapping(struct drm_i915_private *dev_priv, u8 bdb_version)
565 {
566 struct sdvo_device_mapping *mapping;
567 const struct display_device_data *devdata;
568 const struct child_device_config *child;
569 int count = 0;
570
571 /*
572 * Only parse SDVO mappings on gens that could have SDVO. This isn't
573 * accurate and doesn't have to be, as long as it's not too strict.
574 */
575 if (!IS_GEN_RANGE(dev_priv, 3, 7)) {
576 DRM_DEBUG_KMS("Skipping SDVO device mapping\n");
577 return;
578 }
579
580 list_for_each_entry(devdata, &dev_priv->vbt.display_devices, node) {
581 child = &devdata->child;
582
583 if (child->slave_addr != SLAVE_ADDR1 &&
584 child->slave_addr != SLAVE_ADDR2) {
585 /*
586 * If the slave address is neither 0x70 nor 0x72,
587 * it is not a SDVO device. Skip it.
588 */
589 continue;
590 }
591 if (child->dvo_port != DEVICE_PORT_DVOB &&
592 child->dvo_port != DEVICE_PORT_DVOC) {
593 /* skip the incorrect SDVO port */
594 DRM_DEBUG_KMS("Incorrect SDVO port. Skip it\n");
595 continue;
596 }
597 DRM_DEBUG_KMS("the SDVO device with slave addr %2x is found on"
598 " %s port\n",
599 child->slave_addr,
600 (child->dvo_port == DEVICE_PORT_DVOB) ?
601 "SDVOB" : "SDVOC");
602 mapping = &dev_priv->vbt.sdvo_mappings[child->dvo_port - 1];
603 if (!mapping->initialized) {
604 mapping->dvo_port = child->dvo_port;
605 mapping->slave_addr = child->slave_addr;
606 mapping->dvo_wiring = child->dvo_wiring;
607 mapping->ddc_pin = child->ddc_pin;
608 mapping->i2c_pin = child->i2c_pin;
609 mapping->initialized = 1;
610 DRM_DEBUG_KMS("SDVO device: dvo=%x, addr=%x, wiring=%d, ddc_pin=%d, i2c_pin=%d\n",
611 mapping->dvo_port,
612 mapping->slave_addr,
613 mapping->dvo_wiring,
614 mapping->ddc_pin,
615 mapping->i2c_pin);
616 } else {
617 DRM_DEBUG_KMS("Maybe one SDVO port is shared by "
618 "two SDVO device.\n");
619 }
620 if (child->slave2_addr) {
621 /* Maybe this is a SDVO device with multiple inputs */
622 /* And the mapping info is not added */
623 DRM_DEBUG_KMS("there exists the slave2_addr. Maybe this"
624 " is a SDVO device with multiple inputs.\n");
625 }
626 count++;
627 }
628
629 if (!count) {
630 /* No SDVO device info is found */
631 DRM_DEBUG_KMS("No SDVO device info is found in VBT\n");
632 }
633 }
634
635 static void
636 parse_driver_features(struct drm_i915_private *dev_priv,
637 const struct bdb_header *bdb)
638 {
639 const struct bdb_driver_features *driver;
640
641 driver = find_section(bdb, BDB_DRIVER_FEATURES);
642 if (!driver)
643 return;
644
645 if (INTEL_GEN(dev_priv) >= 5) {
646 /*
647 * Note that we consider BDB_DRIVER_FEATURE_INT_SDVO_LVDS
648 * to mean "eDP". The VBT spec doesn't agree with that
649 * interpretation, but real world VBTs seem to.
650 */
651 if (driver->lvds_config != BDB_DRIVER_FEATURE_INT_LVDS)
652 dev_priv->vbt.int_lvds_support = 0;
653 } else {
654 /*
655 * FIXME it's not clear which BDB version has the LVDS config
656 * bits defined. Revision history in the VBT spec says:
657 * "0.92 | Add two definitions for VBT value of LVDS Active
658 * Config (00b and 11b values defined) | 06/13/2005"
659 * but does not the specify the BDB version.
660 *
661 * So far version 134 (on i945gm) is the oldest VBT observed
662 * in the wild with the bits correctly populated. Version
663 * 108 (on i85x) does not have the bits correctly populated.
664 */
665 if (bdb->version >= 134 &&
666 driver->lvds_config != BDB_DRIVER_FEATURE_INT_LVDS &&
667 driver->lvds_config != BDB_DRIVER_FEATURE_INT_SDVO_LVDS)
668 dev_priv->vbt.int_lvds_support = 0;
669 }
670
671 if (bdb->version < 228) {
672 DRM_DEBUG_KMS("DRRS State Enabled:%d\n", driver->drrs_enabled);
673 /*
674 * If DRRS is not supported, drrs_type has to be set to 0.
675 * This is because, VBT is configured in such a way that
676 * static DRRS is 0 and DRRS not supported is represented by
677 * driver->drrs_enabled=false
678 */
679 if (!driver->drrs_enabled)
680 dev_priv->vbt.drrs_type = DRRS_NOT_SUPPORTED;
681
682 dev_priv->vbt.psr.enable = driver->psr_enabled;
683 }
684 }
685
686 static void
687 parse_power_conservation_features(struct drm_i915_private *dev_priv,
688 const struct bdb_header *bdb)
689 {
690 const struct bdb_lfp_power *power;
691 u8 panel_type = dev_priv->vbt.panel_type;
692
693 if (bdb->version < 228)
694 return;
695
696 power = find_section(bdb, BDB_LVDS_POWER);
697 if (!power)
698 return;
699
700 dev_priv->vbt.psr.enable = power->psr & BIT(panel_type);
701
702 /*
703 * If DRRS is not supported, drrs_type has to be set to 0.
704 * This is because, VBT is configured in such a way that
705 * static DRRS is 0 and DRRS not supported is represented by
706 * power->drrs & BIT(panel_type)=false
707 */
708 if (!(power->drrs & BIT(panel_type)))
709 dev_priv->vbt.drrs_type = DRRS_NOT_SUPPORTED;
710 }
711
712 static void
713 parse_edp(struct drm_i915_private *dev_priv, const struct bdb_header *bdb)
714 {
715 const struct bdb_edp *edp;
716 const struct edp_power_seq *edp_pps;
717 const struct edp_fast_link_params *edp_link_params;
718 int panel_type = dev_priv->vbt.panel_type;
719
720 edp = find_section(bdb, BDB_EDP);
721 if (!edp)
722 return;
723
724 switch ((edp->color_depth >> (panel_type * 2)) & 3) {
725 case EDP_18BPP:
726 dev_priv->vbt.edp.bpp = 18;
727 break;
728 case EDP_24BPP:
729 dev_priv->vbt.edp.bpp = 24;
730 break;
731 case EDP_30BPP:
732 dev_priv->vbt.edp.bpp = 30;
733 break;
734 }
735
736 /* Get the eDP sequencing and link info */
737 edp_pps = &edp->power_seqs[panel_type];
738 edp_link_params = &edp->fast_link_params[panel_type];
739
740 dev_priv->vbt.edp.pps = *edp_pps;
741
742 switch (edp_link_params->rate) {
743 case EDP_RATE_1_62:
744 dev_priv->vbt.edp.rate = DP_LINK_BW_1_62;
745 break;
746 case EDP_RATE_2_7:
747 dev_priv->vbt.edp.rate = DP_LINK_BW_2_7;
748 break;
749 default:
750 DRM_DEBUG_KMS("VBT has unknown eDP link rate value %u\n",
751 edp_link_params->rate);
752 break;
753 }
754
755 switch (edp_link_params->lanes) {
756 case EDP_LANE_1:
757 dev_priv->vbt.edp.lanes = 1;
758 break;
759 case EDP_LANE_2:
760 dev_priv->vbt.edp.lanes = 2;
761 break;
762 case EDP_LANE_4:
763 dev_priv->vbt.edp.lanes = 4;
764 break;
765 default:
766 DRM_DEBUG_KMS("VBT has unknown eDP lane count value %u\n",
767 edp_link_params->lanes);
768 break;
769 }
770
771 switch (edp_link_params->preemphasis) {
772 case EDP_PREEMPHASIS_NONE:
773 dev_priv->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_0;
774 break;
775 case EDP_PREEMPHASIS_3_5dB:
776 dev_priv->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_1;
777 break;
778 case EDP_PREEMPHASIS_6dB:
779 dev_priv->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_2;
780 break;
781 case EDP_PREEMPHASIS_9_5dB:
782 dev_priv->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_3;
783 break;
784 default:
785 DRM_DEBUG_KMS("VBT has unknown eDP pre-emphasis value %u\n",
786 edp_link_params->preemphasis);
787 break;
788 }
789
790 switch (edp_link_params->vswing) {
791 case EDP_VSWING_0_4V:
792 dev_priv->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_0;
793 break;
794 case EDP_VSWING_0_6V:
795 dev_priv->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_1;
796 break;
797 case EDP_VSWING_0_8V:
798 dev_priv->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_2;
799 break;
800 case EDP_VSWING_1_2V:
801 dev_priv->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_3;
802 break;
803 default:
804 DRM_DEBUG_KMS("VBT has unknown eDP voltage swing value %u\n",
805 edp_link_params->vswing);
806 break;
807 }
808
809 if (bdb->version >= 173) {
810 u8 vswing;
811
812 /* Don't read from VBT if module parameter has valid value*/
813 if (i915_modparams.edp_vswing) {
814 dev_priv->vbt.edp.low_vswing =
815 i915_modparams.edp_vswing == 1;
816 } else {
817 vswing = (edp->edp_vswing_preemph >> (panel_type * 4)) & 0xF;
818 dev_priv->vbt.edp.low_vswing = vswing == 0;
819 }
820 }
821 }
822
823 static void
824 parse_psr(struct drm_i915_private *dev_priv, const struct bdb_header *bdb)
825 {
826 const struct bdb_psr *psr;
827 const struct psr_table *psr_table;
828 int panel_type = dev_priv->vbt.panel_type;
829
830 psr = find_section(bdb, BDB_PSR);
831 if (!psr) {
832 DRM_DEBUG_KMS("No PSR BDB found.\n");
833 return;
834 }
835
836 psr_table = &psr->psr_table[panel_type];
837
838 dev_priv->vbt.psr.full_link = psr_table->full_link;
839 dev_priv->vbt.psr.require_aux_wakeup = psr_table->require_aux_to_wakeup;
840
841 /* Allowed VBT values goes from 0 to 15 */
842 dev_priv->vbt.psr.idle_frames = psr_table->idle_frames < 0 ? 0 :
843 psr_table->idle_frames > 15 ? 15 : psr_table->idle_frames;
844
845 switch (psr_table->lines_to_wait) {
846 case 0:
847 dev_priv->vbt.psr.lines_to_wait = PSR_0_LINES_TO_WAIT;
848 break;
849 case 1:
850 dev_priv->vbt.psr.lines_to_wait = PSR_1_LINE_TO_WAIT;
851 break;
852 case 2:
853 dev_priv->vbt.psr.lines_to_wait = PSR_4_LINES_TO_WAIT;
854 break;
855 case 3:
856 dev_priv->vbt.psr.lines_to_wait = PSR_8_LINES_TO_WAIT;
857 break;
858 default:
859 DRM_DEBUG_KMS("VBT has unknown PSR lines to wait %u\n",
860 psr_table->lines_to_wait);
861 break;
862 }
863
864 /*
865 * New psr options 0=500us, 1=100us, 2=2500us, 3=0us
866 * Old decimal value is wake up time in multiples of 100 us.
867 */
868 if (bdb->version >= 205 &&
869 (IS_GEN9_BC(dev_priv) || IS_GEMINILAKE(dev_priv) ||
870 INTEL_GEN(dev_priv) >= 10)) {
871 switch (psr_table->tp1_wakeup_time) {
872 case 0:
873 dev_priv->vbt.psr.tp1_wakeup_time_us = 500;
874 break;
875 case 1:
876 dev_priv->vbt.psr.tp1_wakeup_time_us = 100;
877 break;
878 case 3:
879 dev_priv->vbt.psr.tp1_wakeup_time_us = 0;
880 break;
881 default:
882 DRM_DEBUG_KMS("VBT tp1 wakeup time value %d is outside range[0-3], defaulting to max value 2500us\n",
883 psr_table->tp1_wakeup_time);
884 /* fallthrough */
885 case 2:
886 dev_priv->vbt.psr.tp1_wakeup_time_us = 2500;
887 break;
888 }
889
890 switch (psr_table->tp2_tp3_wakeup_time) {
891 case 0:
892 dev_priv->vbt.psr.tp2_tp3_wakeup_time_us = 500;
893 break;
894 case 1:
895 dev_priv->vbt.psr.tp2_tp3_wakeup_time_us = 100;
896 break;
897 case 3:
898 dev_priv->vbt.psr.tp2_tp3_wakeup_time_us = 0;
899 break;
900 default:
901 DRM_DEBUG_KMS("VBT tp2_tp3 wakeup time value %d is outside range[0-3], defaulting to max value 2500us\n",
902 psr_table->tp2_tp3_wakeup_time);
903 /* fallthrough */
904 case 2:
905 dev_priv->vbt.psr.tp2_tp3_wakeup_time_us = 2500;
906 break;
907 }
908 } else {
909 dev_priv->vbt.psr.tp1_wakeup_time_us = psr_table->tp1_wakeup_time * 100;
910 dev_priv->vbt.psr.tp2_tp3_wakeup_time_us = psr_table->tp2_tp3_wakeup_time * 100;
911 }
912
913 if (bdb->version >= 226) {
914 u32 wakeup_time = psr->psr2_tp2_tp3_wakeup_time;
915
916 wakeup_time = (wakeup_time >> (2 * panel_type)) & 0x3;
917 switch (wakeup_time) {
918 case 0:
919 wakeup_time = 500;
920 break;
921 case 1:
922 wakeup_time = 100;
923 break;
924 case 3:
925 wakeup_time = 50;
926 break;
927 default:
928 case 2:
929 wakeup_time = 2500;
930 break;
931 }
932 dev_priv->vbt.psr.psr2_tp2_tp3_wakeup_time_us = wakeup_time;
933 } else {
934 /* Reusing PSR1 wakeup time for PSR2 in older VBTs */
935 dev_priv->vbt.psr.psr2_tp2_tp3_wakeup_time_us = dev_priv->vbt.psr.tp2_tp3_wakeup_time_us;
936 }
937 }
938
939 static void parse_dsi_backlight_ports(struct drm_i915_private *dev_priv,
940 u16 version, enum port port)
941 {
942 if (!dev_priv->vbt.dsi.config->dual_link || version < 197) {
943 dev_priv->vbt.dsi.bl_ports = BIT(port);
944 if (dev_priv->vbt.dsi.config->cabc_supported)
945 dev_priv->vbt.dsi.cabc_ports = BIT(port);
946
947 return;
948 }
949
950 switch (dev_priv->vbt.dsi.config->dl_dcs_backlight_ports) {
951 case DL_DCS_PORT_A:
952 dev_priv->vbt.dsi.bl_ports = BIT(PORT_A);
953 break;
954 case DL_DCS_PORT_C:
955 dev_priv->vbt.dsi.bl_ports = BIT(PORT_C);
956 break;
957 default:
958 case DL_DCS_PORT_A_AND_C:
959 dev_priv->vbt.dsi.bl_ports = BIT(PORT_A) | BIT(PORT_C);
960 break;
961 }
962
963 if (!dev_priv->vbt.dsi.config->cabc_supported)
964 return;
965
966 switch (dev_priv->vbt.dsi.config->dl_dcs_cabc_ports) {
967 case DL_DCS_PORT_A:
968 dev_priv->vbt.dsi.cabc_ports = BIT(PORT_A);
969 break;
970 case DL_DCS_PORT_C:
971 dev_priv->vbt.dsi.cabc_ports = BIT(PORT_C);
972 break;
973 default:
974 case DL_DCS_PORT_A_AND_C:
975 dev_priv->vbt.dsi.cabc_ports =
976 BIT(PORT_A) | BIT(PORT_C);
977 break;
978 }
979 }
980
981 static void
982 parse_mipi_config(struct drm_i915_private *dev_priv,
983 const struct bdb_header *bdb)
984 {
985 const struct bdb_mipi_config *start;
986 const struct mipi_config *config;
987 const struct mipi_pps_data *pps;
988 int panel_type = dev_priv->vbt.panel_type;
989 enum port port;
990
991 /* parse MIPI blocks only if LFP type is MIPI */
992 if (!intel_bios_is_dsi_present(dev_priv, &port))
993 return;
994
995 /* Initialize this to undefined indicating no generic MIPI support */
996 dev_priv->vbt.dsi.panel_id = MIPI_DSI_UNDEFINED_PANEL_ID;
997
998 /* Block #40 is already parsed and panel_fixed_mode is
999 * stored in dev_priv->lfp_lvds_vbt_mode
1000 * resuse this when needed
1001 */
1002
1003 /* Parse #52 for panel index used from panel_type already
1004 * parsed
1005 */
1006 start = find_section(bdb, BDB_MIPI_CONFIG);
1007 if (!start) {
1008 DRM_DEBUG_KMS("No MIPI config BDB found");
1009 return;
1010 }
1011
1012 DRM_DEBUG_DRIVER("Found MIPI Config block, panel index = %d\n",
1013 panel_type);
1014
1015 /*
1016 * get hold of the correct configuration block and pps data as per
1017 * the panel_type as index
1018 */
1019 config = &start->config[panel_type];
1020 pps = &start->pps[panel_type];
1021
1022 /* store as of now full data. Trim when we realise all is not needed */
1023 dev_priv->vbt.dsi.config = kmemdup(config, sizeof(struct mipi_config), GFP_KERNEL);
1024 if (!dev_priv->vbt.dsi.config)
1025 return;
1026
1027 dev_priv->vbt.dsi.pps = kmemdup(pps, sizeof(struct mipi_pps_data), GFP_KERNEL);
1028 if (!dev_priv->vbt.dsi.pps) {
1029 kfree(dev_priv->vbt.dsi.config);
1030 return;
1031 }
1032
1033 parse_dsi_backlight_ports(dev_priv, bdb->version, port);
1034
1035 /* FIXME is the 90 vs. 270 correct? */
1036 switch (config->rotation) {
1037 case ENABLE_ROTATION_0:
1038 /*
1039 * Most (all?) VBTs claim 0 degrees despite having
1040 * an upside down panel, thus we do not trust this.
1041 */
1042 dev_priv->vbt.dsi.orientation =
1043 DRM_MODE_PANEL_ORIENTATION_UNKNOWN;
1044 break;
1045 case ENABLE_ROTATION_90:
1046 dev_priv->vbt.dsi.orientation =
1047 DRM_MODE_PANEL_ORIENTATION_RIGHT_UP;
1048 break;
1049 case ENABLE_ROTATION_180:
1050 dev_priv->vbt.dsi.orientation =
1051 DRM_MODE_PANEL_ORIENTATION_BOTTOM_UP;
1052 break;
1053 case ENABLE_ROTATION_270:
1054 dev_priv->vbt.dsi.orientation =
1055 DRM_MODE_PANEL_ORIENTATION_LEFT_UP;
1056 break;
1057 }
1058
1059 /* We have mandatory mipi config blocks. Initialize as generic panel */
1060 dev_priv->vbt.dsi.panel_id = MIPI_DSI_GENERIC_PANEL_ID;
1061 }
1062
1063 /* Find the sequence block and size for the given panel. */
1064 static const u8 *
1065 find_panel_sequence_block(const struct bdb_mipi_sequence *sequence,
1066 u16 panel_id, u32 *seq_size)
1067 {
1068 u32 total = get_blocksize(sequence);
1069 const u8 *data = &sequence->data[0];
1070 u8 current_id;
1071 u32 current_size;
1072 int header_size = sequence->version >= 3 ? 5 : 3;
1073 int index = 0;
1074 int i;
1075
1076 /* skip new block size */
1077 if (sequence->version >= 3)
1078 data += 4;
1079
1080 for (i = 0; i < MAX_MIPI_CONFIGURATIONS && index < total; i++) {
1081 if (index + header_size > total) {
1082 DRM_ERROR("Invalid sequence block (header)\n");
1083 return NULL;
1084 }
1085
1086 current_id = *(data + index);
1087 if (sequence->version >= 3)
1088 current_size = *((const u32 *)(data + index + 1));
1089 else
1090 current_size = *((const u16 *)(data + index + 1));
1091
1092 index += header_size;
1093
1094 if (index + current_size > total) {
1095 DRM_ERROR("Invalid sequence block\n");
1096 return NULL;
1097 }
1098
1099 if (current_id == panel_id) {
1100 *seq_size = current_size;
1101 return data + index;
1102 }
1103
1104 index += current_size;
1105 }
1106
1107 DRM_ERROR("Sequence block detected but no valid configuration\n");
1108
1109 return NULL;
1110 }
1111
1112 static int goto_next_sequence(const u8 *data, int index, int total)
1113 {
1114 u16 len;
1115
1116 /* Skip Sequence Byte. */
1117 for (index = index + 1; index < total; index += len) {
1118 u8 operation_byte = *(data + index);
1119 index++;
1120
1121 switch (operation_byte) {
1122 case MIPI_SEQ_ELEM_END:
1123 return index;
1124 case MIPI_SEQ_ELEM_SEND_PKT:
1125 if (index + 4 > total)
1126 return 0;
1127
1128 len = *((const u16 *)(data + index + 2)) + 4;
1129 break;
1130 case MIPI_SEQ_ELEM_DELAY:
1131 len = 4;
1132 break;
1133 case MIPI_SEQ_ELEM_GPIO:
1134 len = 2;
1135 break;
1136 case MIPI_SEQ_ELEM_I2C:
1137 if (index + 7 > total)
1138 return 0;
1139 len = *(data + index + 6) + 7;
1140 break;
1141 default:
1142 DRM_ERROR("Unknown operation byte\n");
1143 return 0;
1144 }
1145 }
1146
1147 return 0;
1148 }
1149
1150 static int goto_next_sequence_v3(const u8 *data, int index, int total)
1151 {
1152 int seq_end;
1153 u16 len;
1154 u32 size_of_sequence;
1155
1156 /*
1157 * Could skip sequence based on Size of Sequence alone, but also do some
1158 * checking on the structure.
1159 */
1160 if (total < 5) {
1161 DRM_ERROR("Too small sequence size\n");
1162 return 0;
1163 }
1164
1165 /* Skip Sequence Byte. */
1166 index++;
1167
1168 /*
1169 * Size of Sequence. Excludes the Sequence Byte and the size itself,
1170 * includes MIPI_SEQ_ELEM_END byte, excludes the final MIPI_SEQ_END
1171 * byte.
1172 */
1173 size_of_sequence = *((const u32 *)(data + index));
1174 index += 4;
1175
1176 seq_end = index + size_of_sequence;
1177 if (seq_end > total) {
1178 DRM_ERROR("Invalid sequence size\n");
1179 return 0;
1180 }
1181
1182 for (; index < total; index += len) {
1183 u8 operation_byte = *(data + index);
1184 index++;
1185
1186 if (operation_byte == MIPI_SEQ_ELEM_END) {
1187 if (index != seq_end) {
1188 DRM_ERROR("Invalid element structure\n");
1189 return 0;
1190 }
1191 return index;
1192 }
1193
1194 len = *(data + index);
1195 index++;
1196
1197 /*
1198 * FIXME: Would be nice to check elements like for v1/v2 in
1199 * goto_next_sequence() above.
1200 */
1201 switch (operation_byte) {
1202 case MIPI_SEQ_ELEM_SEND_PKT:
1203 case MIPI_SEQ_ELEM_DELAY:
1204 case MIPI_SEQ_ELEM_GPIO:
1205 case MIPI_SEQ_ELEM_I2C:
1206 case MIPI_SEQ_ELEM_SPI:
1207 case MIPI_SEQ_ELEM_PMIC:
1208 break;
1209 default:
1210 DRM_ERROR("Unknown operation byte %u\n",
1211 operation_byte);
1212 break;
1213 }
1214 }
1215
1216 return 0;
1217 }
1218
1219 /*
1220 * Get len of pre-fixed deassert fragment from a v1 init OTP sequence,
1221 * skip all delay + gpio operands and stop at the first DSI packet op.
1222 */
1223 static int get_init_otp_deassert_fragment_len(struct drm_i915_private *dev_priv)
1224 {
1225 const u8 *data = dev_priv->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP];
1226 int index, len;
1227
1228 if (WARN_ON(!data || dev_priv->vbt.dsi.seq_version != 1))
1229 return 0;
1230
1231 /* index = 1 to skip sequence byte */
1232 for (index = 1; data[index] != MIPI_SEQ_ELEM_END; index += len) {
1233 switch (data[index]) {
1234 case MIPI_SEQ_ELEM_SEND_PKT:
1235 return index == 1 ? 0 : index;
1236 case MIPI_SEQ_ELEM_DELAY:
1237 len = 5; /* 1 byte for operand + uint32 */
1238 break;
1239 case MIPI_SEQ_ELEM_GPIO:
1240 len = 3; /* 1 byte for op, 1 for gpio_nr, 1 for value */
1241 break;
1242 default:
1243 return 0;
1244 }
1245 }
1246
1247 return 0;
1248 }
1249
1250 /*
1251 * Some v1 VBT MIPI sequences do the deassert in the init OTP sequence.
1252 * The deassert must be done before calling intel_dsi_device_ready, so for
1253 * these devices we split the init OTP sequence into a deassert sequence and
1254 * the actual init OTP part.
1255 */
1256 static void fixup_mipi_sequences(struct drm_i915_private *dev_priv)
1257 {
1258 u8 *init_otp;
1259 int len;
1260
1261 /* Limit this to VLV for now. */
1262 if (!IS_VALLEYVIEW(dev_priv))
1263 return;
1264
1265 /* Limit this to v1 vid-mode sequences */
1266 if (dev_priv->vbt.dsi.config->is_cmd_mode ||
1267 dev_priv->vbt.dsi.seq_version != 1)
1268 return;
1269
1270 /* Only do this if there are otp and assert seqs and no deassert seq */
1271 if (!dev_priv->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP] ||
1272 !dev_priv->vbt.dsi.sequence[MIPI_SEQ_ASSERT_RESET] ||
1273 dev_priv->vbt.dsi.sequence[MIPI_SEQ_DEASSERT_RESET])
1274 return;
1275
1276 /* The deassert-sequence ends at the first DSI packet */
1277 len = get_init_otp_deassert_fragment_len(dev_priv);
1278 if (!len)
1279 return;
1280
1281 DRM_DEBUG_KMS("Using init OTP fragment to deassert reset\n");
1282
1283 /* Copy the fragment, update seq byte and terminate it */
1284 init_otp = (u8 *)dev_priv->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP];
1285 dev_priv->vbt.dsi.deassert_seq = kmemdup(init_otp, len + 1, GFP_KERNEL);
1286 if (!dev_priv->vbt.dsi.deassert_seq)
1287 return;
1288 dev_priv->vbt.dsi.deassert_seq[0] = MIPI_SEQ_DEASSERT_RESET;
1289 dev_priv->vbt.dsi.deassert_seq[len] = MIPI_SEQ_ELEM_END;
1290 /* Use the copy for deassert */
1291 dev_priv->vbt.dsi.sequence[MIPI_SEQ_DEASSERT_RESET] =
1292 dev_priv->vbt.dsi.deassert_seq;
1293 /* Replace the last byte of the fragment with init OTP seq byte */
1294 init_otp[len - 1] = MIPI_SEQ_INIT_OTP;
1295 /* And make MIPI_MIPI_SEQ_INIT_OTP point to it */
1296 dev_priv->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP] = init_otp + len - 1;
1297 }
1298
1299 static void
1300 parse_mipi_sequence(struct drm_i915_private *dev_priv,
1301 const struct bdb_header *bdb)
1302 {
1303 int panel_type = dev_priv->vbt.panel_type;
1304 const struct bdb_mipi_sequence *sequence;
1305 const u8 *seq_data;
1306 u32 seq_size;
1307 u8 *data;
1308 int index = 0;
1309
1310 /* Only our generic panel driver uses the sequence block. */
1311 if (dev_priv->vbt.dsi.panel_id != MIPI_DSI_GENERIC_PANEL_ID)
1312 return;
1313
1314 sequence = find_section(bdb, BDB_MIPI_SEQUENCE);
1315 if (!sequence) {
1316 DRM_DEBUG_KMS("No MIPI Sequence found, parsing complete\n");
1317 return;
1318 }
1319
1320 /* Fail gracefully for forward incompatible sequence block. */
1321 if (sequence->version >= 4) {
1322 DRM_ERROR("Unable to parse MIPI Sequence Block v%u\n",
1323 sequence->version);
1324 return;
1325 }
1326
1327 DRM_DEBUG_DRIVER("Found MIPI sequence block v%u\n", sequence->version);
1328
1329 seq_data = find_panel_sequence_block(sequence, panel_type, &seq_size);
1330 if (!seq_data)
1331 return;
1332
1333 data = kmemdup(seq_data, seq_size, GFP_KERNEL);
1334 if (!data)
1335 return;
1336
1337 /* Parse the sequences, store pointers to each sequence. */
1338 for (;;) {
1339 u8 seq_id = *(data + index);
1340 if (seq_id == MIPI_SEQ_END)
1341 break;
1342
1343 if (seq_id >= MIPI_SEQ_MAX) {
1344 DRM_ERROR("Unknown sequence %u\n", seq_id);
1345 goto err;
1346 }
1347
1348 /* Log about presence of sequences we won't run. */
1349 if (seq_id == MIPI_SEQ_TEAR_ON || seq_id == MIPI_SEQ_TEAR_OFF)
1350 DRM_DEBUG_KMS("Unsupported sequence %u\n", seq_id);
1351
1352 dev_priv->vbt.dsi.sequence[seq_id] = data + index;
1353
1354 if (sequence->version >= 3)
1355 index = goto_next_sequence_v3(data, index, seq_size);
1356 else
1357 index = goto_next_sequence(data, index, seq_size);
1358 if (!index) {
1359 DRM_ERROR("Invalid sequence %u\n", seq_id);
1360 goto err;
1361 }
1362 }
1363
1364 dev_priv->vbt.dsi.data = data;
1365 dev_priv->vbt.dsi.size = seq_size;
1366 dev_priv->vbt.dsi.seq_version = sequence->version;
1367
1368 fixup_mipi_sequences(dev_priv);
1369
1370 DRM_DEBUG_DRIVER("MIPI related VBT parsing complete\n");
1371 return;
1372
1373 err:
1374 kfree(data);
1375 memset(dev_priv->vbt.dsi.sequence, 0, sizeof(dev_priv->vbt.dsi.sequence));
1376 }
1377
1378 static void
1379 parse_compression_parameters(struct drm_i915_private *i915,
1380 const struct bdb_header *bdb)
1381 {
1382 const struct bdb_compression_parameters *params;
1383 struct display_device_data *devdata;
1384 const struct child_device_config *child;
1385 u16 block_size;
1386 int index;
1387
1388 if (bdb->version < 198)
1389 return;
1390
1391 params = find_section(bdb, BDB_COMPRESSION_PARAMETERS);
1392 if (params) {
1393 /* Sanity checks */
1394 if (params->entry_size != sizeof(params->data[0])) {
1395 DRM_DEBUG_KMS("VBT: unsupported compression param entry size\n");
1396 return;
1397 }
1398
1399 block_size = get_blocksize(params);
1400 if (block_size < sizeof(*params)) {
1401 DRM_DEBUG_KMS("VBT: expected 16 compression param entries\n");
1402 return;
1403 }
1404 }
1405
1406 list_for_each_entry(devdata, &i915->vbt.display_devices, node) {
1407 child = &devdata->child;
1408
1409 if (!child->compression_enable)
1410 continue;
1411
1412 if (!params) {
1413 DRM_DEBUG_KMS("VBT: compression params not available\n");
1414 continue;
1415 }
1416
1417 if (child->compression_method_cps) {
1418 DRM_DEBUG_KMS("VBT: CPS compression not supported\n");
1419 continue;
1420 }
1421
1422 index = child->compression_structure_index;
1423
1424 devdata->dsc = kmemdup(¶ms->data[index],
1425 sizeof(*devdata->dsc), GFP_KERNEL);
1426 }
1427 }
1428
1429 static u8 translate_iboost(u8 val)
1430 {
1431 static const u8 mapping[] = { 1, 3, 7 }; /* See VBT spec */
1432
1433 if (val >= ARRAY_SIZE(mapping)) {
1434 DRM_DEBUG_KMS("Unsupported I_boost value found in VBT (%d), display may not work properly\n", val);
1435 return 0;
1436 }
1437 return mapping[val];
1438 }
1439
1440 static enum port get_port_by_ddc_pin(struct drm_i915_private *i915, u8 ddc_pin)
1441 {
1442 const struct ddi_vbt_port_info *info;
1443 enum port port;
1444
1445 for_each_port(port) {
1446 info = &i915->vbt.ddi_port_info[port];
1447
1448 if (info->child && ddc_pin == info->alternate_ddc_pin)
1449 return port;
1450 }
1451
1452 return PORT_NONE;
1453 }
1454
1455 static void sanitize_ddc_pin(struct drm_i915_private *dev_priv,
1456 enum port port)
1457 {
1458 struct ddi_vbt_port_info *info = &dev_priv->vbt.ddi_port_info[port];
1459 enum port p;
1460
1461 if (!info->alternate_ddc_pin)
1462 return;
1463
1464 p = get_port_by_ddc_pin(dev_priv, info->alternate_ddc_pin);
1465 if (p != PORT_NONE) {
1466 DRM_DEBUG_KMS("port %c trying to use the same DDC pin (0x%x) as port %c, "
1467 "disabling port %c DVI/HDMI support\n",
1468 port_name(port), info->alternate_ddc_pin,
1469 port_name(p), port_name(p));
1470
1471 /*
1472 * If we have multiple ports supposedly sharing the
1473 * pin, then dvi/hdmi couldn't exist on the shared
1474 * port. Otherwise they share the same ddc bin and
1475 * system couldn't communicate with them separately.
1476 *
1477 * Give inverse child device order the priority,
1478 * last one wins. Yes, there are real machines
1479 * (eg. Asrock B250M-HDV) where VBT has both
1480 * port A and port E with the same AUX ch and
1481 * we must pick port E :(
1482 */
1483 info = &dev_priv->vbt.ddi_port_info[p];
1484
1485 info->supports_dvi = false;
1486 info->supports_hdmi = false;
1487 info->alternate_ddc_pin = 0;
1488 }
1489 }
1490
1491 static enum port get_port_by_aux_ch(struct drm_i915_private *i915, u8 aux_ch)
1492 {
1493 const struct ddi_vbt_port_info *info;
1494 enum port port;
1495
1496 for_each_port(port) {
1497 info = &i915->vbt.ddi_port_info[port];
1498
1499 if (info->child && aux_ch == info->alternate_aux_channel)
1500 return port;
1501 }
1502
1503 return PORT_NONE;
1504 }
1505
1506 static void sanitize_aux_ch(struct drm_i915_private *dev_priv,
1507 enum port port)
1508 {
1509 struct ddi_vbt_port_info *info = &dev_priv->vbt.ddi_port_info[port];
1510 enum port p;
1511
1512 if (!info->alternate_aux_channel)
1513 return;
1514
1515 p = get_port_by_aux_ch(dev_priv, info->alternate_aux_channel);
1516 if (p != PORT_NONE) {
1517 DRM_DEBUG_KMS("port %c trying to use the same AUX CH (0x%x) as port %c, "
1518 "disabling port %c DP support\n",
1519 port_name(port), info->alternate_aux_channel,
1520 port_name(p), port_name(p));
1521
1522 /*
1523 * If we have multiple ports supposedlt sharing the
1524 * aux channel, then DP couldn't exist on the shared
1525 * port. Otherwise they share the same aux channel
1526 * and system couldn't communicate with them separately.
1527 *
1528 * Give inverse child device order the priority,
1529 * last one wins. Yes, there are real machines
1530 * (eg. Asrock B250M-HDV) where VBT has both
1531 * port A and port E with the same AUX ch and
1532 * we must pick port E :(
1533 */
1534 info = &dev_priv->vbt.ddi_port_info[p];
1535
1536 info->supports_dp = false;
1537 info->alternate_aux_channel = 0;
1538 }
1539 }
1540
1541 static const u8 cnp_ddc_pin_map[] = {
1542 [0] = 0, /* N/A */
1543 [DDC_BUS_DDI_B] = GMBUS_PIN_1_BXT,
1544 [DDC_BUS_DDI_C] = GMBUS_PIN_2_BXT,
1545 [DDC_BUS_DDI_D] = GMBUS_PIN_4_CNP, /* sic */
1546 [DDC_BUS_DDI_F] = GMBUS_PIN_3_BXT, /* sic */
1547 };
1548
1549 static const u8 icp_ddc_pin_map[] = {
1550 [ICL_DDC_BUS_DDI_A] = GMBUS_PIN_1_BXT,
1551 [ICL_DDC_BUS_DDI_B] = GMBUS_PIN_2_BXT,
1552 [TGL_DDC_BUS_DDI_C] = GMBUS_PIN_3_BXT,
1553 [ICL_DDC_BUS_PORT_1] = GMBUS_PIN_9_TC1_ICP,
1554 [ICL_DDC_BUS_PORT_2] = GMBUS_PIN_10_TC2_ICP,
1555 [ICL_DDC_BUS_PORT_3] = GMBUS_PIN_11_TC3_ICP,
1556 [ICL_DDC_BUS_PORT_4] = GMBUS_PIN_12_TC4_ICP,
1557 [TGL_DDC_BUS_PORT_5] = GMBUS_PIN_13_TC5_TGP,
1558 [TGL_DDC_BUS_PORT_6] = GMBUS_PIN_14_TC6_TGP,
1559 };
1560
1561 static u8 map_ddc_pin(struct drm_i915_private *dev_priv, u8 vbt_pin)
1562 {
1563 const u8 *ddc_pin_map;
1564 int n_entries;
1565
1566 if (INTEL_PCH_TYPE(dev_priv) >= PCH_ICP) {
1567 ddc_pin_map = icp_ddc_pin_map;
1568 n_entries = ARRAY_SIZE(icp_ddc_pin_map);
1569 } else if (HAS_PCH_CNP(dev_priv)) {
1570 ddc_pin_map = cnp_ddc_pin_map;
1571 n_entries = ARRAY_SIZE(cnp_ddc_pin_map);
1572 } else {
1573 /* Assuming direct map */
1574 return vbt_pin;
1575 }
1576
1577 if (vbt_pin < n_entries && ddc_pin_map[vbt_pin] != 0)
1578 return ddc_pin_map[vbt_pin];
1579
1580 DRM_DEBUG_KMS("Ignoring alternate pin: VBT claims DDC pin %d, which is not valid for this platform\n",
1581 vbt_pin);
1582 return 0;
1583 }
1584
1585 static enum port dvo_port_to_port(u8 dvo_port)
1586 {
1587 /*
1588 * Each DDI port can have more than one value on the "DVO Port" field,
1589 * so look for all the possible values for each port.
1590 */
1591 static const int dvo_ports[][3] = {
1592 [PORT_A] = { DVO_PORT_HDMIA, DVO_PORT_DPA, -1},
1593 [PORT_B] = { DVO_PORT_HDMIB, DVO_PORT_DPB, -1},
1594 [PORT_C] = { DVO_PORT_HDMIC, DVO_PORT_DPC, -1},
1595 [PORT_D] = { DVO_PORT_HDMID, DVO_PORT_DPD, -1},
1596 [PORT_E] = { DVO_PORT_CRT, DVO_PORT_HDMIE, DVO_PORT_DPE},
1597 [PORT_F] = { DVO_PORT_HDMIF, DVO_PORT_DPF, -1},
1598 [PORT_G] = { DVO_PORT_HDMIG, DVO_PORT_DPG, -1},
1599 };
1600 enum port port;
1601 int i;
1602
1603 for (port = PORT_A; port < ARRAY_SIZE(dvo_ports); port++) {
1604 for (i = 0; i < ARRAY_SIZE(dvo_ports[port]); i++) {
1605 if (dvo_ports[port][i] == -1)
1606 break;
1607
1608 if (dvo_port == dvo_ports[port][i])
1609 return port;
1610 }
1611 }
1612
1613 return PORT_NONE;
1614 }
1615
1616 static void parse_ddi_port(struct drm_i915_private *dev_priv,
1617 struct display_device_data *devdata,
1618 u8 bdb_version)
1619 {
1620 const struct child_device_config *child = &devdata->child;
1621 struct ddi_vbt_port_info *info;
1622 bool is_dvi, is_hdmi, is_dp, is_edp, is_crt;
1623 enum port port;
1624
1625 port = dvo_port_to_port(child->dvo_port);
1626 if (port == PORT_NONE)
1627 return;
1628
1629 info = &dev_priv->vbt.ddi_port_info[port];
1630
1631 if (info->child) {
1632 DRM_DEBUG_KMS("More than one child device for port %c in VBT, using the first.\n",
1633 port_name(port));
1634 return;
1635 }
1636
1637 is_dvi = child->device_type & DEVICE_TYPE_TMDS_DVI_SIGNALING;
1638 is_dp = child->device_type & DEVICE_TYPE_DISPLAYPORT_OUTPUT;
1639 is_crt = child->device_type & DEVICE_TYPE_ANALOG_OUTPUT;
1640 is_hdmi = is_dvi && (child->device_type & DEVICE_TYPE_NOT_HDMI_OUTPUT) == 0;
1641 is_edp = is_dp && (child->device_type & DEVICE_TYPE_INTERNAL_CONNECTOR);
1642
1643 if (port == PORT_A && is_dvi && INTEL_GEN(dev_priv) < 12) {
1644 DRM_DEBUG_KMS("VBT claims port A supports DVI%s, ignoring\n",
1645 is_hdmi ? "/HDMI" : "");
1646 is_dvi = false;
1647 is_hdmi = false;
1648 }
1649
1650 info->supports_dvi = is_dvi;
1651 info->supports_hdmi = is_hdmi;
1652 info->supports_dp = is_dp;
1653 info->supports_edp = is_edp;
1654
1655 if (bdb_version >= 195)
1656 info->supports_typec_usb = child->dp_usb_type_c;
1657
1658 if (bdb_version >= 209)
1659 info->supports_tbt = child->tbt;
1660
1661 DRM_DEBUG_KMS("Port %c VBT info: CRT:%d DVI:%d HDMI:%d DP:%d eDP:%d LSPCON:%d USB-Type-C:%d TBT:%d DSC:%d\n",
1662 port_name(port), is_crt, is_dvi, is_hdmi, is_dp, is_edp,
1663 HAS_LSPCON(dev_priv) && child->lspcon,
1664 info->supports_typec_usb, info->supports_tbt,
1665 devdata->dsc != NULL);
1666
1667 if (is_dvi) {
1668 u8 ddc_pin;
1669
1670 ddc_pin = map_ddc_pin(dev_priv, child->ddc_pin);
1671 if (intel_gmbus_is_valid_pin(dev_priv, ddc_pin)) {
1672 info->alternate_ddc_pin = ddc_pin;
1673 sanitize_ddc_pin(dev_priv, port);
1674 } else {
1675 DRM_DEBUG_KMS("Port %c has invalid DDC pin %d, "
1676 "sticking to defaults\n",
1677 port_name(port), ddc_pin);
1678 }
1679 }
1680
1681 if (is_dp) {
1682 info->alternate_aux_channel = child->aux_channel;
1683
1684 sanitize_aux_ch(dev_priv, port);
1685 }
1686
1687 if (bdb_version >= 158) {
1688 /* The VBT HDMI level shift values match the table we have. */
1689 u8 hdmi_level_shift = child->hdmi_level_shifter_value;
1690 DRM_DEBUG_KMS("VBT HDMI level shift for port %c: %d\n",
1691 port_name(port),
1692 hdmi_level_shift);
1693 info->hdmi_level_shift = hdmi_level_shift;
1694 info->hdmi_level_shift_set = true;
1695 }
1696
1697 if (bdb_version >= 204) {
1698 int max_tmds_clock;
1699
1700 switch (child->hdmi_max_data_rate) {
1701 default:
1702 MISSING_CASE(child->hdmi_max_data_rate);
1703 /* fall through */
1704 case HDMI_MAX_DATA_RATE_PLATFORM:
1705 max_tmds_clock = 0;
1706 break;
1707 case HDMI_MAX_DATA_RATE_297:
1708 max_tmds_clock = 297000;
1709 break;
1710 case HDMI_MAX_DATA_RATE_165:
1711 max_tmds_clock = 165000;
1712 break;
1713 }
1714
1715 if (max_tmds_clock)
1716 DRM_DEBUG_KMS("VBT HDMI max TMDS clock for port %c: %d kHz\n",
1717 port_name(port), max_tmds_clock);
1718 info->max_tmds_clock = max_tmds_clock;
1719 }
1720
1721 /* Parse the I_boost config for SKL and above */
1722 if (bdb_version >= 196 && child->iboost) {
1723 info->dp_boost_level = translate_iboost(child->dp_iboost_level);
1724 DRM_DEBUG_KMS("VBT (e)DP boost level for port %c: %d\n",
1725 port_name(port), info->dp_boost_level);
1726 info->hdmi_boost_level = translate_iboost(child->hdmi_iboost_level);
1727 DRM_DEBUG_KMS("VBT HDMI boost level for port %c: %d\n",
1728 port_name(port), info->hdmi_boost_level);
1729 }
1730
1731 /* DP max link rate for CNL+ */
1732 if (bdb_version >= 216) {
1733 switch (child->dp_max_link_rate) {
1734 default:
1735 case VBT_DP_MAX_LINK_RATE_HBR3:
1736 info->dp_max_link_rate = 810000;
1737 break;
1738 case VBT_DP_MAX_LINK_RATE_HBR2:
1739 info->dp_max_link_rate = 540000;
1740 break;
1741 case VBT_DP_MAX_LINK_RATE_HBR:
1742 info->dp_max_link_rate = 270000;
1743 break;
1744 case VBT_DP_MAX_LINK_RATE_LBR:
1745 info->dp_max_link_rate = 162000;
1746 break;
1747 }
1748 DRM_DEBUG_KMS("VBT DP max link rate for port %c: %d\n",
1749 port_name(port), info->dp_max_link_rate);
1750 }
1751
1752 info->child = child;
1753 }
1754
1755 static void parse_ddi_ports(struct drm_i915_private *dev_priv, u8 bdb_version)
1756 {
1757 struct display_device_data *devdata;
1758
1759 if (!HAS_DDI(dev_priv) && !IS_CHERRYVIEW(dev_priv))
1760 return;
1761
1762 if (bdb_version < 155)
1763 return;
1764
1765 list_for_each_entry(devdata, &dev_priv->vbt.display_devices, node)
1766 parse_ddi_port(dev_priv, devdata, bdb_version);
1767 }
1768
1769 static void
1770 parse_general_definitions(struct drm_i915_private *dev_priv,
1771 const struct bdb_header *bdb)
1772 {
1773 const struct bdb_general_definitions *defs;
1774 struct display_device_data *devdata;
1775 const struct child_device_config *child;
1776 int i, child_device_num;
1777 u8 expected_size;
1778 u16 block_size;
1779 int bus_pin;
1780
1781 defs = find_section(bdb, BDB_GENERAL_DEFINITIONS);
1782 if (!defs) {
1783 DRM_DEBUG_KMS("No general definition block is found, no devices defined.\n");
1784 return;
1785 }
1786
1787 block_size = get_blocksize(defs);
1788 if (block_size < sizeof(*defs)) {
1789 DRM_DEBUG_KMS("General definitions block too small (%u)\n",
1790 block_size);
1791 return;
1792 }
1793
1794 bus_pin = defs->crt_ddc_gmbus_pin;
1795 DRM_DEBUG_KMS("crt_ddc_bus_pin: %d\n", bus_pin);
1796 if (intel_gmbus_is_valid_pin(dev_priv, bus_pin))
1797 dev_priv->vbt.crt_ddc_pin = bus_pin;
1798
1799 if (bdb->version < 106) {
1800 expected_size = 22;
1801 } else if (bdb->version < 111) {
1802 expected_size = 27;
1803 } else if (bdb->version < 195) {
1804 expected_size = LEGACY_CHILD_DEVICE_CONFIG_SIZE;
1805 } else if (bdb->version == 195) {
1806 expected_size = 37;
1807 } else if (bdb->version <= 215) {
1808 expected_size = 38;
1809 } else if (bdb->version <= 229) {
1810 expected_size = 39;
1811 } else {
1812 expected_size = sizeof(*child);
1813 BUILD_BUG_ON(sizeof(*child) < 39);
1814 DRM_DEBUG_DRIVER("Expected child device config size for VBT version %u not known; assuming %u\n",
1815 bdb->version, expected_size);
1816 }
1817
1818 /* Flag an error for unexpected size, but continue anyway. */
1819 if (defs->child_dev_size != expected_size)
1820 DRM_ERROR("Unexpected child device config size %u (expected %u for VBT version %u)\n",
1821 defs->child_dev_size, expected_size, bdb->version);
1822
1823 /* The legacy sized child device config is the minimum we need. */
1824 if (defs->child_dev_size < LEGACY_CHILD_DEVICE_CONFIG_SIZE) {
1825 DRM_DEBUG_KMS("Child device config size %u is too small.\n",
1826 defs->child_dev_size);
1827 return;
1828 }
1829
1830 /* get the number of child device */
1831 child_device_num = (block_size - sizeof(*defs)) / defs->child_dev_size;
1832
1833 for (i = 0; i < child_device_num; i++) {
1834 child = child_device_ptr(defs, i);
1835 if (!child->device_type)
1836 continue;
1837
1838 DRM_DEBUG_KMS("Found VBT child device with type 0x%x\n",
1839 child->device_type);
1840
1841 devdata = kzalloc(sizeof(*devdata), GFP_KERNEL);
1842 if (!devdata)
1843 break;
1844
1845 /*
1846 * Copy as much as we know (sizeof) and is available
1847 * (child_dev_size) of the child device config. Accessing the
1848 * data must depend on VBT version.
1849 */
1850 memcpy(&devdata->child, child,
1851 min_t(size_t, defs->child_dev_size, sizeof(*child)));
1852
1853 list_add_tail(&devdata->node, &dev_priv->vbt.display_devices);
1854 }
1855
1856 if (list_empty(&dev_priv->vbt.display_devices))
1857 DRM_DEBUG_KMS("no child dev is parsed from VBT\n");
1858 }
1859
1860 /* Common defaults which may be overridden by VBT. */
1861 static void
1862 init_vbt_defaults(struct drm_i915_private *dev_priv)
1863 {
1864 dev_priv->vbt.crt_ddc_pin = GMBUS_PIN_VGADDC;
1865
1866 /* Default to having backlight */
1867 dev_priv->vbt.backlight.present = true;
1868
1869 /* LFP panel data */
1870 dev_priv->vbt.lvds_dither = 1;
1871
1872 /* SDVO panel data */
1873 dev_priv->vbt.sdvo_lvds_vbt_mode = NULL;
1874
1875 /* general features */
1876 dev_priv->vbt.int_tv_support = 1;
1877 dev_priv->vbt.int_crt_support = 1;
1878
1879 /* driver features */
1880 dev_priv->vbt.int_lvds_support = 1;
1881
1882 /* Default to using SSC */
1883 dev_priv->vbt.lvds_use_ssc = 1;
1884 /*
1885 * Core/SandyBridge/IvyBridge use alternative (120MHz) reference
1886 * clock for LVDS.
1887 */
1888 dev_priv->vbt.lvds_ssc_freq = intel_bios_ssc_frequency(dev_priv,
1889 !HAS_PCH_SPLIT(dev_priv));
1890 DRM_DEBUG_KMS("Set default to SSC at %d kHz\n", dev_priv->vbt.lvds_ssc_freq);
1891 }
1892
1893 /* Defaults to initialize only if there is no VBT. */
1894 static void
1895 init_vbt_missing_defaults(struct drm_i915_private *dev_priv)
1896 {
1897 enum port port;
1898
1899 for_each_port(port) {
1900 struct ddi_vbt_port_info *info =
1901 &dev_priv->vbt.ddi_port_info[port];
1902 enum phy phy = intel_port_to_phy(dev_priv, port);
1903
1904 /*
1905 * VBT has the TypeC mode (native,TBT/USB) and we don't want
1906 * to detect it.
1907 */
1908 if (intel_phy_is_tc(dev_priv, phy))
1909 continue;
1910
1911 info->supports_dvi = (port != PORT_A && port != PORT_E);
1912 info->supports_hdmi = info->supports_dvi;
1913 info->supports_dp = (port != PORT_E);
1914 info->supports_edp = (port == PORT_A);
1915 }
1916 }
1917
1918 static const struct bdb_header *get_bdb_header(const struct vbt_header *vbt)
1919 {
1920 const void *_vbt = vbt;
1921
1922 return _vbt + vbt->bdb_offset;
1923 }
1924
1925 /**
1926 * intel_bios_is_valid_vbt - does the given buffer contain a valid VBT
1927 * @buf: pointer to a buffer to validate
1928 * @size: size of the buffer
1929 *
1930 * Returns true on valid VBT.
1931 */
1932 bool intel_bios_is_valid_vbt(const void *buf, size_t size)
1933 {
1934 const struct vbt_header *vbt = buf;
1935 const struct bdb_header *bdb;
1936
1937 if (!vbt)
1938 return false;
1939
1940 if (sizeof(struct vbt_header) > size) {
1941 DRM_DEBUG_DRIVER("VBT header incomplete\n");
1942 return false;
1943 }
1944
1945 if (memcmp(vbt->signature, "$VBT", 4)) {
1946 DRM_DEBUG_DRIVER("VBT invalid signature\n");
1947 return false;
1948 }
1949
1950 if (vbt->vbt_size > size) {
1951 DRM_DEBUG_DRIVER("VBT incomplete (vbt_size overflows)\n");
1952 return false;
1953 }
1954
1955 size = vbt->vbt_size;
1956
1957 if (range_overflows_t(size_t,
1958 vbt->bdb_offset,
1959 sizeof(struct bdb_header),
1960 size)) {
1961 DRM_DEBUG_DRIVER("BDB header incomplete\n");
1962 return false;
1963 }
1964
1965 bdb = get_bdb_header(vbt);
1966 if (range_overflows_t(size_t, vbt->bdb_offset, bdb->bdb_size, size)) {
1967 DRM_DEBUG_DRIVER("BDB incomplete\n");
1968 return false;
1969 }
1970
1971 return vbt;
1972 }
1973
1974 static struct vbt_header *oprom_get_vbt(struct drm_i915_private *dev_priv)
1975 {
1976 struct pci_dev *pdev = dev_priv->drm.pdev;
1977 void __iomem *p = NULL, *oprom;
1978 struct vbt_header *vbt;
1979 u16 vbt_size;
1980 size_t i, size;
1981
1982 oprom = pci_map_rom(pdev, &size);
1983 if (!oprom)
1984 return NULL;
1985
1986 /* Scour memory looking for the VBT signature. */
1987 for (i = 0; i + 4 < size; i += 4) {
1988 if (ioread32(oprom + i) != *((const u32 *)"$VBT"))
1989 continue;
1990
1991 p = oprom + i;
1992 size -= i;
1993 break;
1994 }
1995
1996 if (!p)
1997 goto err_unmap_oprom;
1998
1999 if (sizeof(struct vbt_header) > size) {
2000 DRM_DEBUG_DRIVER("VBT header incomplete\n");
2001 goto err_unmap_oprom;
2002 }
2003
2004 vbt_size = ioread16(p + offsetof(struct vbt_header, vbt_size));
2005 if (vbt_size > size) {
2006 DRM_DEBUG_DRIVER("VBT incomplete (vbt_size overflows)\n");
2007 goto err_unmap_oprom;
2008 }
2009
2010 /* The rest will be validated by intel_bios_is_valid_vbt() */
2011 vbt = kmalloc(vbt_size, GFP_KERNEL);
2012 if (!vbt)
2013 goto err_unmap_oprom;
2014
2015 memcpy_fromio(vbt, p, vbt_size);
2016
2017 if (!intel_bios_is_valid_vbt(vbt, vbt_size))
2018 goto err_free_vbt;
2019
2020 pci_unmap_rom(pdev, oprom);
2021
2022 return vbt;
2023
2024 err_free_vbt:
2025 kfree(vbt);
2026 err_unmap_oprom:
2027 pci_unmap_rom(pdev, oprom);
2028
2029 return NULL;
2030 }
2031
2032 /**
2033 * intel_bios_init - find VBT and initialize settings from the BIOS
2034 * @dev_priv: i915 device instance
2035 *
2036 * Parse and initialize settings from the Video BIOS Tables (VBT). If the VBT
2037 * was not found in ACPI OpRegion, try to find it in PCI ROM first. Also
2038 * initialize some defaults if the VBT is not present at all.
2039 */
2040 void intel_bios_init(struct drm_i915_private *dev_priv)
2041 {
2042 const struct vbt_header *vbt = dev_priv->opregion.vbt;
2043 struct vbt_header *oprom_vbt = NULL;
2044 const struct bdb_header *bdb;
2045
2046 INIT_LIST_HEAD(&dev_priv->vbt.display_devices);
2047
2048 if (!HAS_DISPLAY(dev_priv) || !INTEL_DISPLAY_ENABLED(dev_priv)) {
2049 DRM_DEBUG_KMS("Skipping VBT init due to disabled display.\n");
2050 return;
2051 }
2052
2053 init_vbt_defaults(dev_priv);
2054
2055 /* If the OpRegion does not have VBT, look in PCI ROM. */
2056 if (!vbt) {
2057 oprom_vbt = oprom_get_vbt(dev_priv);
2058 if (!oprom_vbt)
2059 goto out;
2060
2061 vbt = oprom_vbt;
2062
2063 DRM_DEBUG_KMS("Found valid VBT in PCI ROM\n");
2064 }
2065
2066 bdb = get_bdb_header(vbt);
2067
2068 DRM_DEBUG_KMS("VBT signature \"%.*s\", BDB version %d\n",
2069 (int)sizeof(vbt->signature), vbt->signature, bdb->version);
2070
2071 /* Grab useful general definitions */
2072 parse_general_features(dev_priv, bdb);
2073 parse_general_definitions(dev_priv, bdb);
2074 parse_panel_options(dev_priv, bdb);
2075 parse_panel_dtd(dev_priv, bdb);
2076 parse_lfp_backlight(dev_priv, bdb);
2077 parse_sdvo_panel_data(dev_priv, bdb);
2078 parse_driver_features(dev_priv, bdb);
2079 parse_power_conservation_features(dev_priv, bdb);
2080 parse_edp(dev_priv, bdb);
2081 parse_psr(dev_priv, bdb);
2082 parse_mipi_config(dev_priv, bdb);
2083 parse_mipi_sequence(dev_priv, bdb);
2084
2085 /* Depends on child device list */
2086 parse_compression_parameters(dev_priv, bdb);
2087
2088 /* Further processing on pre-parsed data */
2089 parse_sdvo_device_mapping(dev_priv, bdb->version);
2090 parse_ddi_ports(dev_priv, bdb->version);
2091
2092 out:
2093 if (!vbt) {
2094 DRM_INFO("Failed to find VBIOS tables (VBT)\n");
2095 init_vbt_missing_defaults(dev_priv);
2096 }
2097
2098 kfree(oprom_vbt);
2099 }
2100
2101 /**
2102 * intel_bios_driver_remove - Free any resources allocated by intel_bios_init()
2103 * @dev_priv: i915 device instance
2104 */
2105 void intel_bios_driver_remove(struct drm_i915_private *dev_priv)
2106 {
2107 struct display_device_data *devdata, *n;
2108
2109 list_for_each_entry_safe(devdata, n, &dev_priv->vbt.display_devices, node) {
2110 list_del(&devdata->node);
2111 kfree(devdata->dsc);
2112 kfree(devdata);
2113 }
2114
2115 kfree(dev_priv->vbt.sdvo_lvds_vbt_mode);
2116 dev_priv->vbt.sdvo_lvds_vbt_mode = NULL;
2117 kfree(dev_priv->vbt.lfp_lvds_vbt_mode);
2118 dev_priv->vbt.lfp_lvds_vbt_mode = NULL;
2119 kfree(dev_priv->vbt.dsi.data);
2120 dev_priv->vbt.dsi.data = NULL;
2121 kfree(dev_priv->vbt.dsi.pps);
2122 dev_priv->vbt.dsi.pps = NULL;
2123 kfree(dev_priv->vbt.dsi.config);
2124 dev_priv->vbt.dsi.config = NULL;
2125 kfree(dev_priv->vbt.dsi.deassert_seq);
2126 dev_priv->vbt.dsi.deassert_seq = NULL;
2127 }
2128
2129 /**
2130 * intel_bios_is_tv_present - is integrated TV present in VBT
2131 * @dev_priv: i915 device instance
2132 *
2133 * Return true if TV is present. If no child devices were parsed from VBT,
2134 * assume TV is present.
2135 */
2136 bool intel_bios_is_tv_present(struct drm_i915_private *dev_priv)
2137 {
2138 const struct display_device_data *devdata;
2139 const struct child_device_config *child;
2140
2141 if (!dev_priv->vbt.int_tv_support)
2142 return false;
2143
2144 if (list_empty(&dev_priv->vbt.display_devices))
2145 return true;
2146
2147 list_for_each_entry(devdata, &dev_priv->vbt.display_devices, node) {
2148 child = &devdata->child;
2149
2150 /*
2151 * If the device type is not TV, continue.
2152 */
2153 switch (child->device_type) {
2154 case DEVICE_TYPE_INT_TV:
2155 case DEVICE_TYPE_TV:
2156 case DEVICE_TYPE_TV_SVIDEO_COMPOSITE:
2157 break;
2158 default:
2159 continue;
2160 }
2161 /* Only when the addin_offset is non-zero, it is regarded
2162 * as present.
2163 */
2164 if (child->addin_offset)
2165 return true;
2166 }
2167
2168 return false;
2169 }
2170
2171 /**
2172 * intel_bios_is_lvds_present - is LVDS present in VBT
2173 * @dev_priv: i915 device instance
2174 * @i2c_pin: i2c pin for LVDS if present
2175 *
2176 * Return true if LVDS is present. If no child devices were parsed from VBT,
2177 * assume LVDS is present.
2178 */
2179 bool intel_bios_is_lvds_present(struct drm_i915_private *dev_priv, u8 *i2c_pin)
2180 {
2181 const struct display_device_data *devdata;
2182 const struct child_device_config *child;
2183
2184 if (list_empty(&dev_priv->vbt.display_devices))
2185 return true;
2186
2187 list_for_each_entry(devdata, &dev_priv->vbt.display_devices, node) {
2188 child = &devdata->child;
2189
2190 /* If the device type is not LFP, continue.
2191 * We have to check both the new identifiers as well as the
2192 * old for compatibility with some BIOSes.
2193 */
2194 if (child->device_type != DEVICE_TYPE_INT_LFP &&
2195 child->device_type != DEVICE_TYPE_LFP)
2196 continue;
2197
2198 if (intel_gmbus_is_valid_pin(dev_priv, child->i2c_pin))
2199 *i2c_pin = child->i2c_pin;
2200
2201 /* However, we cannot trust the BIOS writers to populate
2202 * the VBT correctly. Since LVDS requires additional
2203 * information from AIM blocks, a non-zero addin offset is
2204 * a good indicator that the LVDS is actually present.
2205 */
2206 if (child->addin_offset)
2207 return true;
2208
2209 /* But even then some BIOS writers perform some black magic
2210 * and instantiate the device without reference to any
2211 * additional data. Trust that if the VBT was written into
2212 * the OpRegion then they have validated the LVDS's existence.
2213 */
2214 if (dev_priv->opregion.vbt)
2215 return true;
2216 }
2217
2218 return false;
2219 }
2220
2221 /**
2222 * intel_bios_is_port_present - is the specified digital port present
2223 * @dev_priv: i915 device instance
2224 * @port: port to check
2225 *
2226 * Return true if the device in %port is present.
2227 */
2228 bool intel_bios_is_port_present(struct drm_i915_private *dev_priv, enum port port)
2229 {
2230 const struct display_device_data *devdata;
2231 const struct child_device_config *child;
2232 static const struct {
2233 u16 dp, hdmi;
2234 } port_mapping[] = {
2235 [PORT_B] = { DVO_PORT_DPB, DVO_PORT_HDMIB, },
2236 [PORT_C] = { DVO_PORT_DPC, DVO_PORT_HDMIC, },
2237 [PORT_D] = { DVO_PORT_DPD, DVO_PORT_HDMID, },
2238 [PORT_E] = { DVO_PORT_DPE, DVO_PORT_HDMIE, },
2239 [PORT_F] = { DVO_PORT_DPF, DVO_PORT_HDMIF, },
2240 };
2241
2242 if (HAS_DDI(dev_priv)) {
2243 const struct ddi_vbt_port_info *port_info =
2244 &dev_priv->vbt.ddi_port_info[port];
2245
2246 return port_info->supports_dp ||
2247 port_info->supports_dvi ||
2248 port_info->supports_hdmi;
2249 }
2250
2251 /* FIXME maybe deal with port A as well? */
2252 if (WARN_ON(port == PORT_A) || port >= ARRAY_SIZE(port_mapping))
2253 return false;
2254
2255 list_for_each_entry(devdata, &dev_priv->vbt.display_devices, node) {
2256 child = &devdata->child;
2257
2258 if ((child->dvo_port == port_mapping[port].dp ||
2259 child->dvo_port == port_mapping[port].hdmi) &&
2260 (child->device_type & (DEVICE_TYPE_TMDS_DVI_SIGNALING |
2261 DEVICE_TYPE_DISPLAYPORT_OUTPUT)))
2262 return true;
2263 }
2264
2265 return false;
2266 }
2267
2268 /**
2269 * intel_bios_is_port_edp - is the device in given port eDP
2270 * @dev_priv: i915 device instance
2271 * @port: port to check
2272 *
2273 * Return true if the device in %port is eDP.
2274 */
2275 bool intel_bios_is_port_edp(struct drm_i915_private *dev_priv, enum port port)
2276 {
2277 const struct display_device_data *devdata;
2278 const struct child_device_config *child;
2279 static const short port_mapping[] = {
2280 [PORT_B] = DVO_PORT_DPB,
2281 [PORT_C] = DVO_PORT_DPC,
2282 [PORT_D] = DVO_PORT_DPD,
2283 [PORT_E] = DVO_PORT_DPE,
2284 [PORT_F] = DVO_PORT_DPF,
2285 };
2286
2287 if (HAS_DDI(dev_priv))
2288 return dev_priv->vbt.ddi_port_info[port].supports_edp;
2289
2290 list_for_each_entry(devdata, &dev_priv->vbt.display_devices, node) {
2291 child = &devdata->child;
2292
2293 if (child->dvo_port == port_mapping[port] &&
2294 (child->device_type & DEVICE_TYPE_eDP_BITS) ==
2295 (DEVICE_TYPE_eDP & DEVICE_TYPE_eDP_BITS))
2296 return true;
2297 }
2298
2299 return false;
2300 }
2301
2302 static bool child_dev_is_dp_dual_mode(const struct child_device_config *child,
2303 enum port port)
2304 {
2305 static const struct {
2306 u16 dp, hdmi;
2307 } port_mapping[] = {
2308 /*
2309 * Buggy VBTs may declare DP ports as having
2310 * HDMI type dvo_port :( So let's check both.
2311 */
2312 [PORT_B] = { DVO_PORT_DPB, DVO_PORT_HDMIB, },
2313 [PORT_C] = { DVO_PORT_DPC, DVO_PORT_HDMIC, },
2314 [PORT_D] = { DVO_PORT_DPD, DVO_PORT_HDMID, },
2315 [PORT_E] = { DVO_PORT_DPE, DVO_PORT_HDMIE, },
2316 [PORT_F] = { DVO_PORT_DPF, DVO_PORT_HDMIF, },
2317 };
2318
2319 if (port == PORT_A || port >= ARRAY_SIZE(port_mapping))
2320 return false;
2321
2322 if ((child->device_type & DEVICE_TYPE_DP_DUAL_MODE_BITS) !=
2323 (DEVICE_TYPE_DP_DUAL_MODE & DEVICE_TYPE_DP_DUAL_MODE_BITS))
2324 return false;
2325
2326 if (child->dvo_port == port_mapping[port].dp)
2327 return true;
2328
2329 /* Only accept a HDMI dvo_port as DP++ if it has an AUX channel */
2330 if (child->dvo_port == port_mapping[port].hdmi &&
2331 child->aux_channel != 0)
2332 return true;
2333
2334 return false;
2335 }
2336
2337 bool intel_bios_is_port_dp_dual_mode(struct drm_i915_private *dev_priv,
2338 enum port port)
2339 {
2340 const struct display_device_data *devdata;
2341
2342 list_for_each_entry(devdata, &dev_priv->vbt.display_devices, node) {
2343 if (child_dev_is_dp_dual_mode(&devdata->child, port))
2344 return true;
2345 }
2346
2347 return false;
2348 }
2349
2350 /**
2351 * intel_bios_is_dsi_present - is DSI present in VBT
2352 * @dev_priv: i915 device instance
2353 * @port: port for DSI if present
2354 *
2355 * Return true if DSI is present, and return the port in %port.
2356 */
2357 bool intel_bios_is_dsi_present(struct drm_i915_private *dev_priv,
2358 enum port *port)
2359 {
2360 const struct display_device_data *devdata;
2361 const struct child_device_config *child;
2362 u8 dvo_port;
2363
2364 list_for_each_entry(devdata, &dev_priv->vbt.display_devices, node) {
2365 child = &devdata->child;
2366
2367 if (!(child->device_type & DEVICE_TYPE_MIPI_OUTPUT))
2368 continue;
2369
2370 dvo_port = child->dvo_port;
2371
2372 if (dvo_port == DVO_PORT_MIPIA ||
2373 (dvo_port == DVO_PORT_MIPIB && INTEL_GEN(dev_priv) >= 11) ||
2374 (dvo_port == DVO_PORT_MIPIC && INTEL_GEN(dev_priv) < 11)) {
2375 if (port)
2376 *port = dvo_port - DVO_PORT_MIPIA;
2377 return true;
2378 } else if (dvo_port == DVO_PORT_MIPIB ||
2379 dvo_port == DVO_PORT_MIPIC ||
2380 dvo_port == DVO_PORT_MIPID) {
2381 DRM_DEBUG_KMS("VBT has unsupported DSI port %c\n",
2382 port_name(dvo_port - DVO_PORT_MIPIA));
2383 }
2384 }
2385
2386 return false;
2387 }
2388
2389 static void fill_dsc(struct intel_crtc_state *crtc_state,
2390 struct dsc_compression_parameters_entry *dsc,
2391 int dsc_max_bpc)
2392 {
2393 struct drm_dsc_config *vdsc_cfg = &crtc_state->dsc.config;
2394 int bpc = 8;
2395
2396 vdsc_cfg->dsc_version_major = dsc->version_major;
2397 vdsc_cfg->dsc_version_minor = dsc->version_minor;
2398
2399 if (dsc->support_12bpc && dsc_max_bpc >= 12)
2400 bpc = 12;
2401 else if (dsc->support_10bpc && dsc_max_bpc >= 10)
2402 bpc = 10;
2403 else if (dsc->support_8bpc && dsc_max_bpc >= 8)
2404 bpc = 8;
2405 else
2406 DRM_DEBUG_KMS("VBT: Unsupported BPC %d for DCS\n",
2407 dsc_max_bpc);
2408
2409 crtc_state->pipe_bpp = bpc * 3;
2410
2411 crtc_state->dsc.compressed_bpp = min(crtc_state->pipe_bpp,
2412 VBT_DSC_MAX_BPP(dsc->max_bpp));
2413
2414 /*
2415 * FIXME: This is ugly, and slice count should take DSC engine
2416 * throughput etc. into account.
2417 *
2418 * Also, per spec DSI supports 1, 2, 3 or 4 horizontal slices.
2419 */
2420 if (dsc->slices_per_line & BIT(2)) {
2421 crtc_state->dsc.slice_count = 4;
2422 } else if (dsc->slices_per_line & BIT(1)) {
2423 crtc_state->dsc.slice_count = 2;
2424 } else {
2425 /* FIXME */
2426 if (!(dsc->slices_per_line & BIT(0)))
2427 DRM_DEBUG_KMS("VBT: Unsupported DSC slice count for DSI\n");
2428
2429 crtc_state->dsc.slice_count = 1;
2430 }
2431
2432 if (crtc_state->hw.adjusted_mode.crtc_hdisplay %
2433 crtc_state->dsc.slice_count != 0)
2434 DRM_DEBUG_KMS("VBT: DSC hdisplay %d not divisible by slice count %d\n",
2435 crtc_state->hw.adjusted_mode.crtc_hdisplay,
2436 crtc_state->dsc.slice_count);
2437
2438 /*
2439 * FIXME: Use VBT rc_buffer_block_size and rc_buffer_size for the
2440 * implementation specific physical rate buffer size. Currently we use
2441 * the required rate buffer model size calculated in
2442 * drm_dsc_compute_rc_parameters() according to VESA DSC Annex E.
2443 *
2444 * The VBT rc_buffer_block_size and rc_buffer_size definitions
2445 * correspond to DP 1.4 DPCD offsets 0x62 and 0x63. The DP DSC
2446 * implementation should also use the DPCD (or perhaps VBT for eDP)
2447 * provided value for the buffer size.
2448 */
2449
2450 /* FIXME: DSI spec says bpc + 1 for this one */
2451 vdsc_cfg->line_buf_depth = VBT_DSC_LINE_BUFFER_DEPTH(dsc->line_buffer_depth);
2452
2453 vdsc_cfg->block_pred_enable = dsc->block_prediction_enable;
2454
2455 vdsc_cfg->slice_height = dsc->slice_height;
2456 }
2457
2458 /* FIXME: initially DSI specific */
2459 bool intel_bios_get_dsc_params(struct intel_encoder *encoder,
2460 struct intel_crtc_state *crtc_state,
2461 int dsc_max_bpc)
2462 {
2463 struct drm_i915_private *i915 = to_i915(encoder->base.dev);
2464 const struct display_device_data *devdata;
2465 const struct child_device_config *child;
2466
2467 list_for_each_entry(devdata, &i915->vbt.display_devices, node) {
2468 child = &devdata->child;
2469
2470 if (!(child->device_type & DEVICE_TYPE_MIPI_OUTPUT))
2471 continue;
2472
2473 if (child->dvo_port - DVO_PORT_MIPIA == encoder->port) {
2474 if (!devdata->dsc)
2475 return false;
2476
2477 if (crtc_state)
2478 fill_dsc(crtc_state, devdata->dsc, dsc_max_bpc);
2479
2480 return true;
2481 }
2482 }
2483
2484 return false;
2485 }
2486
2487 /**
2488 * intel_bios_is_port_hpd_inverted - is HPD inverted for %port
2489 * @i915: i915 device instance
2490 * @port: port to check
2491 *
2492 * Return true if HPD should be inverted for %port.
2493 */
2494 bool
2495 intel_bios_is_port_hpd_inverted(const struct drm_i915_private *i915,
2496 enum port port)
2497 {
2498 const struct child_device_config *child =
2499 i915->vbt.ddi_port_info[port].child;
2500
2501 if (WARN_ON_ONCE(!IS_GEN9_LP(i915)))
2502 return false;
2503
2504 return child && child->hpd_invert;
2505 }
2506
2507 /**
2508 * intel_bios_is_lspcon_present - if LSPCON is attached on %port
2509 * @i915: i915 device instance
2510 * @port: port to check
2511 *
2512 * Return true if LSPCON is present on this port
2513 */
2514 bool
2515 intel_bios_is_lspcon_present(const struct drm_i915_private *i915,
2516 enum port port)
2517 {
2518 const struct child_device_config *child =
2519 i915->vbt.ddi_port_info[port].child;
2520
2521 return HAS_LSPCON(i915) && child && child->lspcon;
2522 }
2523
2524 enum aux_ch intel_bios_port_aux_ch(struct drm_i915_private *dev_priv,
2525 enum port port)
2526 {
2527 const struct ddi_vbt_port_info *info =
2528 &dev_priv->vbt.ddi_port_info[port];
2529 enum aux_ch aux_ch;
2530
2531 if (!info->alternate_aux_channel) {
2532 aux_ch = (enum aux_ch)port;
2533
2534 DRM_DEBUG_KMS("using AUX %c for port %c (platform default)\n",
2535 aux_ch_name(aux_ch), port_name(port));
2536 return aux_ch;
2537 }
2538
2539 switch (info->alternate_aux_channel) {
2540 case DP_AUX_A:
2541 aux_ch = AUX_CH_A;
2542 break;
2543 case DP_AUX_B:
2544 aux_ch = AUX_CH_B;
2545 break;
2546 case DP_AUX_C:
2547 aux_ch = AUX_CH_C;
2548 break;
2549 case DP_AUX_D:
2550 aux_ch = AUX_CH_D;
2551 break;
2552 case DP_AUX_E:
2553 aux_ch = AUX_CH_E;
2554 break;
2555 case DP_AUX_F:
2556 aux_ch = AUX_CH_F;
2557 break;
2558 case DP_AUX_G:
2559 aux_ch = AUX_CH_G;
2560 break;
2561 default:
2562 MISSING_CASE(info->alternate_aux_channel);
2563 aux_ch = AUX_CH_A;
2564 break;
2565 }
2566
2567 DRM_DEBUG_KMS("using AUX %c for port %c (VBT)\n",
2568 aux_ch_name(aux_ch), port_name(port));
2569
2570 return aux_ch;
2571 }
2572