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intel_dp.h revision 1.1 
      1 /*	$NetBSD: intel_dp.h,v 1.1 2021/12/18 20:15:29 riastradh Exp $	*/
      2 
      3 /* SPDX-License-Identifier: MIT */
      4 /*
      5  * Copyright  2019 Intel Corporation
      6  */
      7 
      8 #ifndef __INTEL_DP_H__
      9 #define __INTEL_DP_H__
     10 
     11 #include <linux/types.h>
     12 
     13 #include <drm/i915_drm.h>
     14 
     15 #include "i915_reg.h"
     16 
     17 enum pipe;
     18 enum port;
     19 struct drm_connector_state;
     20 struct drm_encoder;
     21 struct drm_i915_private;
     22 struct drm_modeset_acquire_ctx;
     23 struct intel_connector;
     24 struct intel_crtc_state;
     25 struct intel_digital_port;
     26 struct intel_dp;
     27 struct intel_encoder;
     28 
     29 struct link_config_limits {
     30 	int min_clock, max_clock;
     31 	int min_lane_count, max_lane_count;
     32 	int min_bpp, max_bpp;
     33 };
     34 
     35 void intel_dp_adjust_compliance_config(struct intel_dp *intel_dp,
     36 				       struct intel_crtc_state *pipe_config,
     37 				       struct link_config_limits *limits);
     38 bool intel_dp_limited_color_range(const struct intel_crtc_state *crtc_state,
     39 				  const struct drm_connector_state *conn_state);
     40 int intel_dp_min_bpp(const struct intel_crtc_state *crtc_state);
     41 bool intel_dp_port_enabled(struct drm_i915_private *dev_priv,
     42 			   i915_reg_t dp_reg, enum port port,
     43 			   enum pipe *pipe);
     44 bool intel_dp_init(struct drm_i915_private *dev_priv, i915_reg_t output_reg,
     45 		   enum port port);
     46 bool intel_dp_init_connector(struct intel_digital_port *intel_dig_port,
     47 			     struct intel_connector *intel_connector);
     48 void intel_dp_set_link_params(struct intel_dp *intel_dp,
     49 			      int link_rate, u8 lane_count,
     50 			      bool link_mst);
     51 int intel_dp_get_link_train_fallback_values(struct intel_dp *intel_dp,
     52 					    int link_rate, u8 lane_count);
     53 int intel_dp_retrain_link(struct intel_encoder *encoder,
     54 			  struct drm_modeset_acquire_ctx *ctx);
     55 void intel_dp_sink_dpms(struct intel_dp *intel_dp, int mode);
     56 void intel_dp_sink_set_decompression_state(struct intel_dp *intel_dp,
     57 					   const struct intel_crtc_state *crtc_state,
     58 					   bool enable);
     59 void intel_dp_encoder_reset(struct drm_encoder *encoder);
     60 void intel_dp_encoder_suspend(struct intel_encoder *intel_encoder);
     61 void intel_dp_encoder_flush_work(struct drm_encoder *encoder);
     62 int intel_dp_compute_config(struct intel_encoder *encoder,
     63 			    struct intel_crtc_state *pipe_config,
     64 			    struct drm_connector_state *conn_state);
     65 bool intel_dp_is_edp(struct intel_dp *intel_dp);
     66 bool intel_dp_is_port_edp(struct drm_i915_private *dev_priv, enum port port);
     67 enum irqreturn intel_dp_hpd_pulse(struct intel_digital_port *intel_dig_port,
     68 				  bool long_hpd);
     69 void intel_edp_backlight_on(const struct intel_crtc_state *crtc_state,
     70 			    const struct drm_connector_state *conn_state);
     71 void intel_edp_backlight_off(const struct drm_connector_state *conn_state);
     72 void intel_edp_panel_vdd_on(struct intel_dp *intel_dp);
     73 void intel_edp_panel_on(struct intel_dp *intel_dp);
     74 void intel_edp_panel_off(struct intel_dp *intel_dp);
     75 void intel_dp_mst_suspend(struct drm_i915_private *dev_priv);
     76 void intel_dp_mst_resume(struct drm_i915_private *dev_priv);
     77 int intel_dp_max_link_rate(struct intel_dp *intel_dp);
     78 int intel_dp_max_lane_count(struct intel_dp *intel_dp);
     79 int intel_dp_rate_select(struct intel_dp *intel_dp, int rate);
     80 void intel_power_sequencer_reset(struct drm_i915_private *dev_priv);
     81 u32 intel_dp_pack_aux(const u8 *src, int src_bytes);
     82 
     83 void intel_edp_drrs_enable(struct intel_dp *intel_dp,
     84 			   const struct intel_crtc_state *crtc_state);
     85 void intel_edp_drrs_disable(struct intel_dp *intel_dp,
     86 			    const struct intel_crtc_state *crtc_state);
     87 void intel_edp_drrs_invalidate(struct drm_i915_private *dev_priv,
     88 			       unsigned int frontbuffer_bits);
     89 void intel_edp_drrs_flush(struct drm_i915_private *dev_priv,
     90 			  unsigned int frontbuffer_bits);
     91 
     92 void
     93 intel_dp_program_link_training_pattern(struct intel_dp *intel_dp,
     94 				       u8 dp_train_pat);
     95 void
     96 intel_dp_set_signal_levels(struct intel_dp *intel_dp);
     97 void intel_dp_set_idle_link_train(struct intel_dp *intel_dp);
     98 u8
     99 intel_dp_voltage_max(struct intel_dp *intel_dp);
    100 u8
    101 intel_dp_pre_emphasis_max(struct intel_dp *intel_dp, u8 voltage_swing);
    102 void intel_dp_compute_rate(struct intel_dp *intel_dp, int port_clock,
    103 			   u8 *link_bw, u8 *rate_select);
    104 bool intel_dp_source_supports_hbr2(struct intel_dp *intel_dp);
    105 bool intel_dp_source_supports_hbr3(struct intel_dp *intel_dp);
    106 bool
    107 intel_dp_get_link_status(struct intel_dp *intel_dp, u8 *link_status);
    108 
    109 bool intel_dp_read_dpcd(struct intel_dp *intel_dp);
    110 bool intel_dp_get_colorimetry_status(struct intel_dp *intel_dp);
    111 int intel_dp_link_required(int pixel_clock, int bpp);
    112 int intel_dp_max_data_rate(int max_link_clock, int max_lanes);
    113 bool intel_dp_needs_vsc_sdp(const struct intel_crtc_state *crtc_state,
    114 			    const struct drm_connector_state *conn_state);
    115 void intel_dp_vsc_enable(struct intel_dp *intel_dp,
    116 			 const struct intel_crtc_state *crtc_state,
    117 			 const struct drm_connector_state *conn_state);
    118 void intel_dp_hdr_metadata_enable(struct intel_dp *intel_dp,
    119 				  const struct intel_crtc_state *crtc_state,
    120 				  const struct drm_connector_state *conn_state);
    121 bool intel_digital_port_connected(struct intel_encoder *encoder);
    122 
    123 static inline unsigned int intel_dp_unused_lane_mask(int lane_count)
    124 {
    125 	return ~((1 << lane_count) - 1) & 0xf;
    126 }
    127 
    128 u32 intel_dp_mode_to_fec_clock(u32 mode_clock);
    129 
    130 #endif /* __INTEL_DP_H__ */
    131