1 1.1 riastrad /* $NetBSD: intel_dsi.h,v 1.2 2021/12/18 23:45:30 riastradh Exp $ */ 2 1.1 riastrad 3 1.1 riastrad /* 4 1.1 riastrad * Copyright 2013 Intel Corporation 5 1.1 riastrad * 6 1.1 riastrad * Permission is hereby granted, free of charge, to any person obtaining a 7 1.1 riastrad * copy of this software and associated documentation files (the "Software"), 8 1.1 riastrad * to deal in the Software without restriction, including without limitation 9 1.1 riastrad * the rights to use, copy, modify, merge, publish, distribute, sublicense, 10 1.1 riastrad * and/or sell copies of the Software, and to permit persons to whom the 11 1.1 riastrad * Software is furnished to do so, subject to the following conditions: 12 1.1 riastrad * 13 1.1 riastrad * The above copyright notice and this permission notice (including the next 14 1.1 riastrad * paragraph) shall be included in all copies or substantial portions of the 15 1.1 riastrad * Software. 16 1.1 riastrad * 17 1.1 riastrad * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 18 1.1 riastrad * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 19 1.1 riastrad * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 20 1.1 riastrad * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 21 1.1 riastrad * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 22 1.1 riastrad * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER 23 1.1 riastrad * DEALINGS IN THE SOFTWARE. 24 1.1 riastrad */ 25 1.1 riastrad 26 1.1 riastrad #ifndef _INTEL_DSI_H 27 1.1 riastrad #define _INTEL_DSI_H 28 1.1 riastrad 29 1.1 riastrad #include <drm/drm_crtc.h> 30 1.1 riastrad #include <drm/drm_mipi_dsi.h> 31 1.1 riastrad 32 1.1 riastrad #include "intel_display_types.h" 33 1.1 riastrad 34 1.1 riastrad #define INTEL_DSI_VIDEO_MODE 0 35 1.1 riastrad #define INTEL_DSI_COMMAND_MODE 1 36 1.1 riastrad 37 1.1 riastrad /* Dual Link support */ 38 1.1 riastrad #define DSI_DUAL_LINK_NONE 0 39 1.1 riastrad #define DSI_DUAL_LINK_FRONT_BACK 1 40 1.1 riastrad #define DSI_DUAL_LINK_PIXEL_ALT 2 41 1.1 riastrad 42 1.1 riastrad struct intel_dsi_host; 43 1.1 riastrad 44 1.1 riastrad struct intel_dsi { 45 1.1 riastrad struct intel_encoder base; 46 1.1 riastrad 47 1.1 riastrad struct intel_dsi_host *dsi_hosts[I915_MAX_PORTS]; 48 1.1 riastrad intel_wakeref_t io_wakeref[I915_MAX_PORTS]; 49 1.1 riastrad 50 1.1 riastrad /* GPIO Desc for panel and backlight control */ 51 1.1 riastrad struct gpio_desc *gpio_panel; 52 1.1 riastrad struct gpio_desc *gpio_backlight; 53 1.1 riastrad 54 1.1 riastrad struct intel_connector *attached_connector; 55 1.1 riastrad 56 1.1 riastrad /* bit mask of ports (vlv dsi) or phys (icl dsi) being driven */ 57 1.1 riastrad union { 58 1.1 riastrad u16 ports; /* VLV DSI */ 59 1.1 riastrad u16 phys; /* ICL DSI */ 60 1.1 riastrad }; 61 1.1 riastrad 62 1.1 riastrad /* if true, use HS mode, otherwise LP */ 63 1.1 riastrad bool hs; 64 1.1 riastrad 65 1.1 riastrad /* virtual channel */ 66 1.1 riastrad int channel; 67 1.1 riastrad 68 1.1 riastrad /* Video mode or command mode */ 69 1.1 riastrad u16 operation_mode; 70 1.1 riastrad 71 1.1 riastrad /* number of DSI lanes */ 72 1.1 riastrad unsigned int lane_count; 73 1.1 riastrad 74 1.1 riastrad /* i2c bus associated with the slave device */ 75 1.1 riastrad int i2c_bus_num; 76 1.1 riastrad 77 1.1 riastrad /* 78 1.1 riastrad * video mode pixel format 79 1.1 riastrad * 80 1.1 riastrad * XXX: consolidate on .format in struct mipi_dsi_device. 81 1.1 riastrad */ 82 1.1 riastrad enum mipi_dsi_pixel_format pixel_format; 83 1.1 riastrad 84 1.1 riastrad /* video mode format for MIPI_VIDEO_MODE_FORMAT register */ 85 1.1 riastrad u32 video_mode_format; 86 1.1 riastrad 87 1.1 riastrad /* eot for MIPI_EOT_DISABLE register */ 88 1.1 riastrad u8 eotp_pkt; 89 1.1 riastrad u8 clock_stop; 90 1.1 riastrad 91 1.1 riastrad u8 escape_clk_div; 92 1.1 riastrad u8 dual_link; 93 1.1 riastrad 94 1.1 riastrad u16 dcs_backlight_ports; 95 1.1 riastrad u16 dcs_cabc_ports; 96 1.1 riastrad 97 1.1 riastrad /* RGB or BGR */ 98 1.1 riastrad bool bgr_enabled; 99 1.1 riastrad 100 1.1 riastrad u8 pixel_overlap; 101 1.1 riastrad u32 port_bits; 102 1.1 riastrad u32 bw_timer; 103 1.1 riastrad u32 dphy_reg; 104 1.1 riastrad 105 1.1 riastrad /* data lanes dphy timing */ 106 1.1 riastrad u32 dphy_data_lane_reg; 107 1.1 riastrad u32 video_frmt_cfg_bits; 108 1.1 riastrad u16 lp_byte_clk; 109 1.1 riastrad 110 1.1 riastrad /* timeouts in byte clocks */ 111 1.1 riastrad u16 hs_tx_timeout; 112 1.1 riastrad u16 lp_rx_timeout; 113 1.1 riastrad u16 turn_arnd_val; 114 1.1 riastrad u16 rst_timer_val; 115 1.1 riastrad u16 hs_to_lp_count; 116 1.1 riastrad u16 clk_lp_to_hs_count; 117 1.1 riastrad u16 clk_hs_to_lp_count; 118 1.1 riastrad 119 1.1 riastrad u16 init_count; 120 1.1 riastrad u32 pclk; 121 1.1 riastrad u16 burst_mode_ratio; 122 1.1 riastrad 123 1.1 riastrad /* all delays in ms */ 124 1.1 riastrad u16 backlight_off_delay; 125 1.1 riastrad u16 backlight_on_delay; 126 1.1 riastrad u16 panel_on_delay; 127 1.1 riastrad u16 panel_off_delay; 128 1.1 riastrad u16 panel_pwr_cycle_delay; 129 1.1 riastrad }; 130 1.1 riastrad 131 1.1 riastrad struct intel_dsi_host { 132 1.1 riastrad struct mipi_dsi_host base; 133 1.1 riastrad struct intel_dsi *intel_dsi; 134 1.1 riastrad enum port port; 135 1.1 riastrad 136 1.1 riastrad /* our little hack */ 137 1.1 riastrad struct mipi_dsi_device *device; 138 1.1 riastrad }; 139 1.1 riastrad 140 1.1 riastrad static inline struct intel_dsi_host *to_intel_dsi_host(struct mipi_dsi_host *h) 141 1.1 riastrad { 142 1.1 riastrad return container_of(h, struct intel_dsi_host, base); 143 1.1 riastrad } 144 1.1 riastrad 145 1.1 riastrad #define for_each_dsi_port(__port, __ports_mask) \ 146 1.1 riastrad for_each_port_masked(__port, __ports_mask) 147 1.1 riastrad #define for_each_dsi_phy(__phy, __phys_mask) \ 148 1.1 riastrad for_each_phy_masked(__phy, __phys_mask) 149 1.1 riastrad 150 1.1 riastrad static inline struct intel_dsi *enc_to_intel_dsi(struct intel_encoder *encoder) 151 1.1 riastrad { 152 1.1 riastrad return container_of(&encoder->base, struct intel_dsi, base.base); 153 1.1 riastrad } 154 1.1 riastrad 155 1.1 riastrad static inline bool is_vid_mode(struct intel_dsi *intel_dsi) 156 1.1 riastrad { 157 1.1 riastrad return intel_dsi->operation_mode == INTEL_DSI_VIDEO_MODE; 158 1.1 riastrad } 159 1.1 riastrad 160 1.1 riastrad static inline bool is_cmd_mode(struct intel_dsi *intel_dsi) 161 1.1 riastrad { 162 1.1 riastrad return intel_dsi->operation_mode == INTEL_DSI_COMMAND_MODE; 163 1.1 riastrad } 164 1.1 riastrad 165 1.1 riastrad static inline u16 intel_dsi_encoder_ports(struct intel_encoder *encoder) 166 1.1 riastrad { 167 1.1 riastrad return enc_to_intel_dsi(encoder)->ports; 168 1.1 riastrad } 169 1.1 riastrad 170 1.1 riastrad /* icl_dsi.c */ 171 1.1 riastrad void icl_dsi_init(struct drm_i915_private *dev_priv); 172 1.1 riastrad 173 1.1 riastrad /* intel_dsi.c */ 174 1.1 riastrad int intel_dsi_bitrate(const struct intel_dsi *intel_dsi); 175 1.1 riastrad int intel_dsi_tlpx_ns(const struct intel_dsi *intel_dsi); 176 1.1 riastrad enum drm_panel_orientation 177 1.1 riastrad intel_dsi_get_panel_orientation(struct intel_connector *connector); 178 1.1 riastrad 179 1.1 riastrad /* vlv_dsi.c */ 180 1.1 riastrad void vlv_dsi_wait_for_fifo_empty(struct intel_dsi *intel_dsi, enum port port); 181 1.1 riastrad enum mipi_dsi_pixel_format pixel_format_from_register_bits(u32 fmt); 182 1.1 riastrad int intel_dsi_get_modes(struct drm_connector *connector); 183 1.1 riastrad enum drm_mode_status intel_dsi_mode_valid(struct drm_connector *connector, 184 1.1 riastrad struct drm_display_mode *mode); 185 1.1 riastrad struct intel_dsi_host *intel_dsi_host_init(struct intel_dsi *intel_dsi, 186 1.1 riastrad const struct mipi_dsi_host_ops *funcs, 187 1.1 riastrad enum port port); 188 1.1 riastrad void vlv_dsi_init(struct drm_i915_private *dev_priv); 189 1.1 riastrad 190 1.1 riastrad /* vlv_dsi_pll.c */ 191 1.1 riastrad int vlv_dsi_pll_compute(struct intel_encoder *encoder, 192 1.1 riastrad struct intel_crtc_state *config); 193 1.1 riastrad void vlv_dsi_pll_enable(struct intel_encoder *encoder, 194 1.1 riastrad const struct intel_crtc_state *config); 195 1.1 riastrad void vlv_dsi_pll_disable(struct intel_encoder *encoder); 196 1.1 riastrad u32 vlv_dsi_get_pclk(struct intel_encoder *encoder, 197 1.1 riastrad struct intel_crtc_state *config); 198 1.1 riastrad void vlv_dsi_reset_clocks(struct intel_encoder *encoder, enum port port); 199 1.1 riastrad 200 1.1 riastrad bool bxt_dsi_pll_is_enabled(struct drm_i915_private *dev_priv); 201 1.1 riastrad int bxt_dsi_pll_compute(struct intel_encoder *encoder, 202 1.1 riastrad struct intel_crtc_state *config); 203 1.1 riastrad void bxt_dsi_pll_enable(struct intel_encoder *encoder, 204 1.1 riastrad const struct intel_crtc_state *config); 205 1.1 riastrad void bxt_dsi_pll_disable(struct intel_encoder *encoder); 206 1.1 riastrad u32 bxt_dsi_get_pclk(struct intel_encoder *encoder, 207 1.1 riastrad struct intel_crtc_state *config); 208 1.1 riastrad void bxt_dsi_reset_clocks(struct intel_encoder *encoder, enum port port); 209 1.1 riastrad 210 1.1 riastrad /* intel_dsi_vbt.c */ 211 1.1 riastrad bool intel_dsi_vbt_init(struct intel_dsi *intel_dsi, u16 panel_id); 212 1.1 riastrad void intel_dsi_vbt_gpio_init(struct intel_dsi *intel_dsi, bool panel_is_on); 213 1.1 riastrad void intel_dsi_vbt_gpio_cleanup(struct intel_dsi *intel_dsi); 214 1.1 riastrad void intel_dsi_vbt_exec_sequence(struct intel_dsi *intel_dsi, 215 1.1 riastrad enum mipi_seq seq_id); 216 1.1 riastrad void intel_dsi_msleep(struct intel_dsi *intel_dsi, int msec); 217 1.1 riastrad void intel_dsi_log_params(struct intel_dsi *intel_dsi); 218 1.1 riastrad 219 1.1 riastrad #endif /* _INTEL_DSI_H */ 220