intel_panel.c revision 1.1 1 /* $NetBSD: intel_panel.c,v 1.1 2021/12/18 20:15:30 riastradh Exp $ */
2
3 /*
4 * Copyright 2006-2010 Intel Corporation
5 * Copyright (c) 2006 Dave Airlie <airlied (at) linux.ie>
6 *
7 * Permission is hereby granted, free of charge, to any person obtaining a
8 * copy of this software and associated documentation files (the "Software"),
9 * to deal in the Software without restriction, including without limitation
10 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
11 * and/or sell copies of the Software, and to permit persons to whom the
12 * Software is furnished to do so, subject to the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the next
15 * paragraph) shall be included in all copies or substantial portions of the
16 * Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
21 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
22 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
23 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
24 * DEALINGS IN THE SOFTWARE.
25 *
26 * Authors:
27 * Eric Anholt <eric (at) anholt.net>
28 * Dave Airlie <airlied (at) linux.ie>
29 * Jesse Barnes <jesse.barnes (at) intel.com>
30 * Chris Wilson <chris (at) chris-wilson.co.uk>
31 */
32
33 #include <sys/cdefs.h>
34 __KERNEL_RCSID(0, "$NetBSD: intel_panel.c,v 1.1 2021/12/18 20:15:30 riastradh Exp $");
35
36 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
37
38 #include <linux/kernel.h>
39 #include <linux/moduleparam.h>
40 #include <linux/pwm.h>
41
42 #include "intel_connector.h"
43 #include "intel_display_types.h"
44 #include "intel_dp_aux_backlight.h"
45 #include "intel_dsi_dcs_backlight.h"
46 #include "intel_panel.h"
47
48 #define CRC_PMIC_PWM_PERIOD_NS 21333
49
50 void
51 intel_fixed_panel_mode(const struct drm_display_mode *fixed_mode,
52 struct drm_display_mode *adjusted_mode)
53 {
54 drm_mode_copy(adjusted_mode, fixed_mode);
55
56 drm_mode_set_crtcinfo(adjusted_mode, 0);
57 }
58
59 static bool is_downclock_mode(const struct drm_display_mode *downclock_mode,
60 const struct drm_display_mode *fixed_mode)
61 {
62 return drm_mode_match(downclock_mode, fixed_mode,
63 DRM_MODE_MATCH_TIMINGS |
64 DRM_MODE_MATCH_FLAGS |
65 DRM_MODE_MATCH_3D_FLAGS) &&
66 downclock_mode->clock < fixed_mode->clock;
67 }
68
69 struct drm_display_mode *
70 intel_panel_edid_downclock_mode(struct intel_connector *connector,
71 const struct drm_display_mode *fixed_mode)
72 {
73 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
74 const struct drm_display_mode *scan, *best_mode = NULL;
75 struct drm_display_mode *downclock_mode;
76 int best_clock = fixed_mode->clock;
77
78 list_for_each_entry(scan, &connector->base.probed_modes, head) {
79 /*
80 * If one mode has the same resolution with the fixed_panel
81 * mode while they have the different refresh rate, it means
82 * that the reduced downclock is found. In such
83 * case we can set the different FPx0/1 to dynamically select
84 * between low and high frequency.
85 */
86 if (is_downclock_mode(scan, fixed_mode) &&
87 scan->clock < best_clock) {
88 /*
89 * The downclock is already found. But we
90 * expect to find the lower downclock.
91 */
92 best_clock = scan->clock;
93 best_mode = scan;
94 }
95 }
96
97 if (!best_mode)
98 return NULL;
99
100 downclock_mode = drm_mode_duplicate(&dev_priv->drm, best_mode);
101 if (!downclock_mode)
102 return NULL;
103
104 DRM_DEBUG_KMS("[CONNECTOR:%d:%s] using downclock mode from EDID: ",
105 connector->base.base.id, connector->base.name);
106 drm_mode_debug_printmodeline(downclock_mode);
107
108 return downclock_mode;
109 }
110
111 struct drm_display_mode *
112 intel_panel_edid_fixed_mode(struct intel_connector *connector)
113 {
114 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
115 const struct drm_display_mode *scan;
116 struct drm_display_mode *fixed_mode;
117
118 if (list_empty(&connector->base.probed_modes))
119 return NULL;
120
121 /* prefer fixed mode from EDID if available */
122 list_for_each_entry(scan, &connector->base.probed_modes, head) {
123 if ((scan->type & DRM_MODE_TYPE_PREFERRED) == 0)
124 continue;
125
126 fixed_mode = drm_mode_duplicate(&dev_priv->drm, scan);
127 if (!fixed_mode)
128 return NULL;
129
130 DRM_DEBUG_KMS("[CONNECTOR:%d:%s] using preferred mode from EDID: ",
131 connector->base.base.id, connector->base.name);
132 drm_mode_debug_printmodeline(fixed_mode);
133
134 return fixed_mode;
135 }
136
137 scan = list_first_entry(&connector->base.probed_modes,
138 typeof(*scan), head);
139
140 fixed_mode = drm_mode_duplicate(&dev_priv->drm, scan);
141 if (!fixed_mode)
142 return NULL;
143
144 fixed_mode->type |= DRM_MODE_TYPE_PREFERRED;
145
146 DRM_DEBUG_KMS("[CONNECTOR:%d:%s] using first mode from EDID: ",
147 connector->base.base.id, connector->base.name);
148 drm_mode_debug_printmodeline(fixed_mode);
149
150 return fixed_mode;
151 }
152
153 struct drm_display_mode *
154 intel_panel_vbt_fixed_mode(struct intel_connector *connector)
155 {
156 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
157 struct drm_display_info *info = &connector->base.display_info;
158 struct drm_display_mode *fixed_mode;
159
160 if (!dev_priv->vbt.lfp_lvds_vbt_mode)
161 return NULL;
162
163 fixed_mode = drm_mode_duplicate(&dev_priv->drm,
164 dev_priv->vbt.lfp_lvds_vbt_mode);
165 if (!fixed_mode)
166 return NULL;
167
168 fixed_mode->type |= DRM_MODE_TYPE_PREFERRED;
169
170 DRM_DEBUG_KMS("[CONNECTOR:%d:%s] using mode from VBT: ",
171 connector->base.base.id, connector->base.name);
172 drm_mode_debug_printmodeline(fixed_mode);
173
174 info->width_mm = fixed_mode->width_mm;
175 info->height_mm = fixed_mode->height_mm;
176
177 return fixed_mode;
178 }
179
180 /* adjusted_mode has been preset to be the panel's fixed mode */
181 void
182 intel_pch_panel_fitting(struct intel_crtc *intel_crtc,
183 struct intel_crtc_state *pipe_config,
184 int fitting_mode)
185 {
186 const struct drm_display_mode *adjusted_mode = &pipe_config->hw.adjusted_mode;
187 int x = 0, y = 0, width = 0, height = 0;
188
189 /* Native modes don't need fitting */
190 if (adjusted_mode->crtc_hdisplay == pipe_config->pipe_src_w &&
191 adjusted_mode->crtc_vdisplay == pipe_config->pipe_src_h &&
192 pipe_config->output_format != INTEL_OUTPUT_FORMAT_YCBCR420)
193 goto done;
194
195 switch (fitting_mode) {
196 case DRM_MODE_SCALE_CENTER:
197 width = pipe_config->pipe_src_w;
198 height = pipe_config->pipe_src_h;
199 x = (adjusted_mode->crtc_hdisplay - width + 1)/2;
200 y = (adjusted_mode->crtc_vdisplay - height + 1)/2;
201 break;
202
203 case DRM_MODE_SCALE_ASPECT:
204 /* Scale but preserve the aspect ratio */
205 {
206 u32 scaled_width = adjusted_mode->crtc_hdisplay
207 * pipe_config->pipe_src_h;
208 u32 scaled_height = pipe_config->pipe_src_w
209 * adjusted_mode->crtc_vdisplay;
210 if (scaled_width > scaled_height) { /* pillar */
211 width = scaled_height / pipe_config->pipe_src_h;
212 if (width & 1)
213 width++;
214 x = (adjusted_mode->crtc_hdisplay - width + 1) / 2;
215 y = 0;
216 height = adjusted_mode->crtc_vdisplay;
217 } else if (scaled_width < scaled_height) { /* letter */
218 height = scaled_width / pipe_config->pipe_src_w;
219 if (height & 1)
220 height++;
221 y = (adjusted_mode->crtc_vdisplay - height + 1) / 2;
222 x = 0;
223 width = adjusted_mode->crtc_hdisplay;
224 } else {
225 x = y = 0;
226 width = adjusted_mode->crtc_hdisplay;
227 height = adjusted_mode->crtc_vdisplay;
228 }
229 }
230 break;
231
232 case DRM_MODE_SCALE_FULLSCREEN:
233 x = y = 0;
234 width = adjusted_mode->crtc_hdisplay;
235 height = adjusted_mode->crtc_vdisplay;
236 break;
237
238 default:
239 WARN(1, "bad panel fit mode: %d\n", fitting_mode);
240 return;
241 }
242
243 done:
244 pipe_config->pch_pfit.pos = (x << 16) | y;
245 pipe_config->pch_pfit.size = (width << 16) | height;
246 pipe_config->pch_pfit.enabled = pipe_config->pch_pfit.size != 0;
247 }
248
249 static void
250 centre_horizontally(struct drm_display_mode *adjusted_mode,
251 int width)
252 {
253 u32 border, sync_pos, blank_width, sync_width;
254
255 /* keep the hsync and hblank widths constant */
256 sync_width = adjusted_mode->crtc_hsync_end - adjusted_mode->crtc_hsync_start;
257 blank_width = adjusted_mode->crtc_hblank_end - adjusted_mode->crtc_hblank_start;
258 sync_pos = (blank_width - sync_width + 1) / 2;
259
260 border = (adjusted_mode->crtc_hdisplay - width + 1) / 2;
261 border += border & 1; /* make the border even */
262
263 adjusted_mode->crtc_hdisplay = width;
264 adjusted_mode->crtc_hblank_start = width + border;
265 adjusted_mode->crtc_hblank_end = adjusted_mode->crtc_hblank_start + blank_width;
266
267 adjusted_mode->crtc_hsync_start = adjusted_mode->crtc_hblank_start + sync_pos;
268 adjusted_mode->crtc_hsync_end = adjusted_mode->crtc_hsync_start + sync_width;
269 }
270
271 static void
272 centre_vertically(struct drm_display_mode *adjusted_mode,
273 int height)
274 {
275 u32 border, sync_pos, blank_width, sync_width;
276
277 /* keep the vsync and vblank widths constant */
278 sync_width = adjusted_mode->crtc_vsync_end - adjusted_mode->crtc_vsync_start;
279 blank_width = adjusted_mode->crtc_vblank_end - adjusted_mode->crtc_vblank_start;
280 sync_pos = (blank_width - sync_width + 1) / 2;
281
282 border = (adjusted_mode->crtc_vdisplay - height + 1) / 2;
283
284 adjusted_mode->crtc_vdisplay = height;
285 adjusted_mode->crtc_vblank_start = height + border;
286 adjusted_mode->crtc_vblank_end = adjusted_mode->crtc_vblank_start + blank_width;
287
288 adjusted_mode->crtc_vsync_start = adjusted_mode->crtc_vblank_start + sync_pos;
289 adjusted_mode->crtc_vsync_end = adjusted_mode->crtc_vsync_start + sync_width;
290 }
291
292 static inline u32 panel_fitter_scaling(u32 source, u32 target)
293 {
294 /*
295 * Floating point operation is not supported. So the FACTOR
296 * is defined, which can avoid the floating point computation
297 * when calculating the panel ratio.
298 */
299 #define ACCURACY 12
300 #define FACTOR (1 << ACCURACY)
301 u32 ratio = source * FACTOR / target;
302 return (FACTOR * ratio + FACTOR/2) / FACTOR;
303 }
304
305 static void i965_scale_aspect(struct intel_crtc_state *pipe_config,
306 u32 *pfit_control)
307 {
308 const struct drm_display_mode *adjusted_mode = &pipe_config->hw.adjusted_mode;
309 u32 scaled_width = adjusted_mode->crtc_hdisplay *
310 pipe_config->pipe_src_h;
311 u32 scaled_height = pipe_config->pipe_src_w *
312 adjusted_mode->crtc_vdisplay;
313
314 /* 965+ is easy, it does everything in hw */
315 if (scaled_width > scaled_height)
316 *pfit_control |= PFIT_ENABLE |
317 PFIT_SCALING_PILLAR;
318 else if (scaled_width < scaled_height)
319 *pfit_control |= PFIT_ENABLE |
320 PFIT_SCALING_LETTER;
321 else if (adjusted_mode->crtc_hdisplay != pipe_config->pipe_src_w)
322 *pfit_control |= PFIT_ENABLE | PFIT_SCALING_AUTO;
323 }
324
325 static void i9xx_scale_aspect(struct intel_crtc_state *pipe_config,
326 u32 *pfit_control, u32 *pfit_pgm_ratios,
327 u32 *border)
328 {
329 struct drm_display_mode *adjusted_mode = &pipe_config->hw.adjusted_mode;
330 u32 scaled_width = adjusted_mode->crtc_hdisplay *
331 pipe_config->pipe_src_h;
332 u32 scaled_height = pipe_config->pipe_src_w *
333 adjusted_mode->crtc_vdisplay;
334 u32 bits;
335
336 /*
337 * For earlier chips we have to calculate the scaling
338 * ratio by hand and program it into the
339 * PFIT_PGM_RATIO register
340 */
341 if (scaled_width > scaled_height) { /* pillar */
342 centre_horizontally(adjusted_mode,
343 scaled_height /
344 pipe_config->pipe_src_h);
345
346 *border = LVDS_BORDER_ENABLE;
347 if (pipe_config->pipe_src_h != adjusted_mode->crtc_vdisplay) {
348 bits = panel_fitter_scaling(pipe_config->pipe_src_h,
349 adjusted_mode->crtc_vdisplay);
350
351 *pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT |
352 bits << PFIT_VERT_SCALE_SHIFT);
353 *pfit_control |= (PFIT_ENABLE |
354 VERT_INTERP_BILINEAR |
355 HORIZ_INTERP_BILINEAR);
356 }
357 } else if (scaled_width < scaled_height) { /* letter */
358 centre_vertically(adjusted_mode,
359 scaled_width /
360 pipe_config->pipe_src_w);
361
362 *border = LVDS_BORDER_ENABLE;
363 if (pipe_config->pipe_src_w != adjusted_mode->crtc_hdisplay) {
364 bits = panel_fitter_scaling(pipe_config->pipe_src_w,
365 adjusted_mode->crtc_hdisplay);
366
367 *pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT |
368 bits << PFIT_VERT_SCALE_SHIFT);
369 *pfit_control |= (PFIT_ENABLE |
370 VERT_INTERP_BILINEAR |
371 HORIZ_INTERP_BILINEAR);
372 }
373 } else {
374 /* Aspects match, Let hw scale both directions */
375 *pfit_control |= (PFIT_ENABLE |
376 VERT_AUTO_SCALE | HORIZ_AUTO_SCALE |
377 VERT_INTERP_BILINEAR |
378 HORIZ_INTERP_BILINEAR);
379 }
380 }
381
382 void intel_gmch_panel_fitting(struct intel_crtc *intel_crtc,
383 struct intel_crtc_state *pipe_config,
384 int fitting_mode)
385 {
386 struct drm_i915_private *dev_priv = to_i915(intel_crtc->base.dev);
387 u32 pfit_control = 0, pfit_pgm_ratios = 0, border = 0;
388 struct drm_display_mode *adjusted_mode = &pipe_config->hw.adjusted_mode;
389
390 /* Native modes don't need fitting */
391 if (adjusted_mode->crtc_hdisplay == pipe_config->pipe_src_w &&
392 adjusted_mode->crtc_vdisplay == pipe_config->pipe_src_h)
393 goto out;
394
395 switch (fitting_mode) {
396 case DRM_MODE_SCALE_CENTER:
397 /*
398 * For centered modes, we have to calculate border widths &
399 * heights and modify the values programmed into the CRTC.
400 */
401 centre_horizontally(adjusted_mode, pipe_config->pipe_src_w);
402 centre_vertically(adjusted_mode, pipe_config->pipe_src_h);
403 border = LVDS_BORDER_ENABLE;
404 break;
405 case DRM_MODE_SCALE_ASPECT:
406 /* Scale but preserve the aspect ratio */
407 if (INTEL_GEN(dev_priv) >= 4)
408 i965_scale_aspect(pipe_config, &pfit_control);
409 else
410 i9xx_scale_aspect(pipe_config, &pfit_control,
411 &pfit_pgm_ratios, &border);
412 break;
413 case DRM_MODE_SCALE_FULLSCREEN:
414 /*
415 * Full scaling, even if it changes the aspect ratio.
416 * Fortunately this is all done for us in hw.
417 */
418 if (pipe_config->pipe_src_h != adjusted_mode->crtc_vdisplay ||
419 pipe_config->pipe_src_w != adjusted_mode->crtc_hdisplay) {
420 pfit_control |= PFIT_ENABLE;
421 if (INTEL_GEN(dev_priv) >= 4)
422 pfit_control |= PFIT_SCALING_AUTO;
423 else
424 pfit_control |= (VERT_AUTO_SCALE |
425 VERT_INTERP_BILINEAR |
426 HORIZ_AUTO_SCALE |
427 HORIZ_INTERP_BILINEAR);
428 }
429 break;
430 default:
431 WARN(1, "bad panel fit mode: %d\n", fitting_mode);
432 return;
433 }
434
435 /* 965+ wants fuzzy fitting */
436 /* FIXME: handle multiple panels by failing gracefully */
437 if (INTEL_GEN(dev_priv) >= 4)
438 pfit_control |= ((intel_crtc->pipe << PFIT_PIPE_SHIFT) |
439 PFIT_FILTER_FUZZY);
440
441 out:
442 if ((pfit_control & PFIT_ENABLE) == 0) {
443 pfit_control = 0;
444 pfit_pgm_ratios = 0;
445 }
446
447 /* Make sure pre-965 set dither correctly for 18bpp panels. */
448 if (INTEL_GEN(dev_priv) < 4 && pipe_config->pipe_bpp == 18)
449 pfit_control |= PANEL_8TO6_DITHER_ENABLE;
450
451 pipe_config->gmch_pfit.control = pfit_control;
452 pipe_config->gmch_pfit.pgm_ratios = pfit_pgm_ratios;
453 pipe_config->gmch_pfit.lvds_border_bits = border;
454 }
455
456 /**
457 * scale - scale values from one range to another
458 * @source_val: value in range [@source_min..@source_max]
459 * @source_min: minimum legal value for @source_val
460 * @source_max: maximum legal value for @source_val
461 * @target_min: corresponding target value for @source_min
462 * @target_max: corresponding target value for @source_max
463 *
464 * Return @source_val in range [@source_min..@source_max] scaled to range
465 * [@target_min..@target_max].
466 */
467 static u32 scale(u32 source_val,
468 u32 source_min, u32 source_max,
469 u32 target_min, u32 target_max)
470 {
471 u64 target_val;
472
473 WARN_ON(source_min > source_max);
474 WARN_ON(target_min > target_max);
475
476 /* defensive */
477 source_val = clamp(source_val, source_min, source_max);
478
479 /* avoid overflows */
480 target_val = mul_u32_u32(source_val - source_min,
481 target_max - target_min);
482 target_val = DIV_ROUND_CLOSEST_ULL(target_val, source_max - source_min);
483 target_val += target_min;
484
485 return target_val;
486 }
487
488 /* Scale user_level in range [0..user_max] to [hw_min..hw_max]. */
489 static inline u32 scale_user_to_hw(struct intel_connector *connector,
490 u32 user_level, u32 user_max)
491 {
492 struct intel_panel *panel = &connector->panel;
493
494 return scale(user_level, 0, user_max,
495 panel->backlight.min, panel->backlight.max);
496 }
497
498 /* Scale user_level in range [0..user_max] to [0..hw_max], clamping the result
499 * to [hw_min..hw_max]. */
500 static inline u32 clamp_user_to_hw(struct intel_connector *connector,
501 u32 user_level, u32 user_max)
502 {
503 struct intel_panel *panel = &connector->panel;
504 u32 hw_level;
505
506 hw_level = scale(user_level, 0, user_max, 0, panel->backlight.max);
507 hw_level = clamp(hw_level, panel->backlight.min, panel->backlight.max);
508
509 return hw_level;
510 }
511
512 /* Scale hw_level in range [hw_min..hw_max] to [0..user_max]. */
513 static inline u32 scale_hw_to_user(struct intel_connector *connector,
514 u32 hw_level, u32 user_max)
515 {
516 struct intel_panel *panel = &connector->panel;
517
518 return scale(hw_level, panel->backlight.min, panel->backlight.max,
519 0, user_max);
520 }
521
522 static u32 intel_panel_compute_brightness(struct intel_connector *connector,
523 u32 val)
524 {
525 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
526 struct intel_panel *panel = &connector->panel;
527
528 WARN_ON(panel->backlight.max == 0);
529
530 if (i915_modparams.invert_brightness < 0)
531 return val;
532
533 if (i915_modparams.invert_brightness > 0 ||
534 dev_priv->quirks & QUIRK_INVERT_BRIGHTNESS) {
535 return panel->backlight.max - val + panel->backlight.min;
536 }
537
538 return val;
539 }
540
541 static u32 lpt_get_backlight(struct intel_connector *connector)
542 {
543 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
544
545 return I915_READ(BLC_PWM_PCH_CTL2) & BACKLIGHT_DUTY_CYCLE_MASK;
546 }
547
548 static u32 pch_get_backlight(struct intel_connector *connector)
549 {
550 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
551
552 return I915_READ(BLC_PWM_CPU_CTL) & BACKLIGHT_DUTY_CYCLE_MASK;
553 }
554
555 static u32 i9xx_get_backlight(struct intel_connector *connector)
556 {
557 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
558 struct intel_panel *panel = &connector->panel;
559 u32 val;
560
561 val = I915_READ(BLC_PWM_CTL) & BACKLIGHT_DUTY_CYCLE_MASK;
562 if (INTEL_GEN(dev_priv) < 4)
563 val >>= 1;
564
565 if (panel->backlight.combination_mode) {
566 u8 lbpc;
567
568 pci_read_config_byte(dev_priv->drm.pdev, LBPC, &lbpc);
569 val *= lbpc;
570 }
571
572 return val;
573 }
574
575 static u32 _vlv_get_backlight(struct drm_i915_private *dev_priv, enum pipe pipe)
576 {
577 if (WARN_ON(pipe != PIPE_A && pipe != PIPE_B))
578 return 0;
579
580 return I915_READ(VLV_BLC_PWM_CTL(pipe)) & BACKLIGHT_DUTY_CYCLE_MASK;
581 }
582
583 static u32 vlv_get_backlight(struct intel_connector *connector)
584 {
585 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
586 enum pipe pipe = intel_connector_get_pipe(connector);
587
588 return _vlv_get_backlight(dev_priv, pipe);
589 }
590
591 static u32 bxt_get_backlight(struct intel_connector *connector)
592 {
593 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
594 struct intel_panel *panel = &connector->panel;
595
596 return I915_READ(BXT_BLC_PWM_DUTY(panel->backlight.controller));
597 }
598
599 static u32 pwm_get_backlight(struct intel_connector *connector)
600 {
601 struct intel_panel *panel = &connector->panel;
602 int duty_ns;
603
604 duty_ns = pwm_get_duty_cycle(panel->backlight.pwm);
605 return DIV_ROUND_UP(duty_ns * 100, CRC_PMIC_PWM_PERIOD_NS);
606 }
607
608 static void lpt_set_backlight(const struct drm_connector_state *conn_state, u32 level)
609 {
610 struct intel_connector *connector = to_intel_connector(conn_state->connector);
611 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
612
613 u32 val = I915_READ(BLC_PWM_PCH_CTL2) & ~BACKLIGHT_DUTY_CYCLE_MASK;
614 I915_WRITE(BLC_PWM_PCH_CTL2, val | level);
615 }
616
617 static void pch_set_backlight(const struct drm_connector_state *conn_state, u32 level)
618 {
619 struct intel_connector *connector = to_intel_connector(conn_state->connector);
620 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
621 u32 tmp;
622
623 tmp = I915_READ(BLC_PWM_CPU_CTL) & ~BACKLIGHT_DUTY_CYCLE_MASK;
624 I915_WRITE(BLC_PWM_CPU_CTL, tmp | level);
625 }
626
627 static void i9xx_set_backlight(const struct drm_connector_state *conn_state, u32 level)
628 {
629 struct intel_connector *connector = to_intel_connector(conn_state->connector);
630 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
631 struct intel_panel *panel = &connector->panel;
632 u32 tmp, mask;
633
634 WARN_ON(panel->backlight.max == 0);
635
636 if (panel->backlight.combination_mode) {
637 u8 lbpc;
638
639 lbpc = level * 0xfe / panel->backlight.max + 1;
640 level /= lbpc;
641 pci_write_config_byte(dev_priv->drm.pdev, LBPC, lbpc);
642 }
643
644 if (IS_GEN(dev_priv, 4)) {
645 mask = BACKLIGHT_DUTY_CYCLE_MASK;
646 } else {
647 level <<= 1;
648 mask = BACKLIGHT_DUTY_CYCLE_MASK_PNV;
649 }
650
651 tmp = I915_READ(BLC_PWM_CTL) & ~mask;
652 I915_WRITE(BLC_PWM_CTL, tmp | level);
653 }
654
655 static void vlv_set_backlight(const struct drm_connector_state *conn_state, u32 level)
656 {
657 struct intel_connector *connector = to_intel_connector(conn_state->connector);
658 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
659 enum pipe pipe = to_intel_crtc(conn_state->crtc)->pipe;
660 u32 tmp;
661
662 tmp = I915_READ(VLV_BLC_PWM_CTL(pipe)) & ~BACKLIGHT_DUTY_CYCLE_MASK;
663 I915_WRITE(VLV_BLC_PWM_CTL(pipe), tmp | level);
664 }
665
666 static void bxt_set_backlight(const struct drm_connector_state *conn_state, u32 level)
667 {
668 struct intel_connector *connector = to_intel_connector(conn_state->connector);
669 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
670 struct intel_panel *panel = &connector->panel;
671
672 I915_WRITE(BXT_BLC_PWM_DUTY(panel->backlight.controller), level);
673 }
674
675 static void pwm_set_backlight(const struct drm_connector_state *conn_state, u32 level)
676 {
677 struct intel_panel *panel = &to_intel_connector(conn_state->connector)->panel;
678 int duty_ns = DIV_ROUND_UP(level * CRC_PMIC_PWM_PERIOD_NS, 100);
679
680 pwm_config(panel->backlight.pwm, duty_ns, CRC_PMIC_PWM_PERIOD_NS);
681 }
682
683 static void
684 intel_panel_actually_set_backlight(const struct drm_connector_state *conn_state, u32 level)
685 {
686 struct intel_connector *connector = to_intel_connector(conn_state->connector);
687 struct intel_panel *panel = &connector->panel;
688
689 DRM_DEBUG_DRIVER("set backlight PWM = %d\n", level);
690
691 level = intel_panel_compute_brightness(connector, level);
692 panel->backlight.set(conn_state, level);
693 }
694
695 /* set backlight brightness to level in range [0..max], assuming hw min is
696 * respected.
697 */
698 void intel_panel_set_backlight_acpi(const struct drm_connector_state *conn_state,
699 u32 user_level, u32 user_max)
700 {
701 struct intel_connector *connector = to_intel_connector(conn_state->connector);
702 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
703 struct intel_panel *panel = &connector->panel;
704 u32 hw_level;
705
706 /*
707 * Lack of crtc may occur during driver init because
708 * connection_mutex isn't held across the entire backlight
709 * setup + modeset readout, and the BIOS can issue the
710 * requests at any time.
711 */
712 if (!panel->backlight.present || !conn_state->crtc)
713 return;
714
715 mutex_lock(&dev_priv->backlight_lock);
716
717 WARN_ON(panel->backlight.max == 0);
718
719 hw_level = clamp_user_to_hw(connector, user_level, user_max);
720 panel->backlight.level = hw_level;
721
722 if (panel->backlight.device)
723 panel->backlight.device->props.brightness =
724 scale_hw_to_user(connector,
725 panel->backlight.level,
726 panel->backlight.device->props.max_brightness);
727
728 if (panel->backlight.enabled)
729 intel_panel_actually_set_backlight(conn_state, hw_level);
730
731 mutex_unlock(&dev_priv->backlight_lock);
732 }
733
734 static void lpt_disable_backlight(const struct drm_connector_state *old_conn_state)
735 {
736 struct intel_connector *connector = to_intel_connector(old_conn_state->connector);
737 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
738 u32 tmp;
739
740 intel_panel_actually_set_backlight(old_conn_state, 0);
741
742 /*
743 * Although we don't support or enable CPU PWM with LPT/SPT based
744 * systems, it may have been enabled prior to loading the
745 * driver. Disable to avoid warnings on LCPLL disable.
746 *
747 * This needs rework if we need to add support for CPU PWM on PCH split
748 * platforms.
749 */
750 tmp = I915_READ(BLC_PWM_CPU_CTL2);
751 if (tmp & BLM_PWM_ENABLE) {
752 DRM_DEBUG_KMS("cpu backlight was enabled, disabling\n");
753 I915_WRITE(BLC_PWM_CPU_CTL2, tmp & ~BLM_PWM_ENABLE);
754 }
755
756 tmp = I915_READ(BLC_PWM_PCH_CTL1);
757 I915_WRITE(BLC_PWM_PCH_CTL1, tmp & ~BLM_PCH_PWM_ENABLE);
758 }
759
760 static void pch_disable_backlight(const struct drm_connector_state *old_conn_state)
761 {
762 struct intel_connector *connector = to_intel_connector(old_conn_state->connector);
763 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
764 u32 tmp;
765
766 intel_panel_actually_set_backlight(old_conn_state, 0);
767
768 tmp = I915_READ(BLC_PWM_CPU_CTL2);
769 I915_WRITE(BLC_PWM_CPU_CTL2, tmp & ~BLM_PWM_ENABLE);
770
771 tmp = I915_READ(BLC_PWM_PCH_CTL1);
772 I915_WRITE(BLC_PWM_PCH_CTL1, tmp & ~BLM_PCH_PWM_ENABLE);
773 }
774
775 static void i9xx_disable_backlight(const struct drm_connector_state *old_conn_state)
776 {
777 intel_panel_actually_set_backlight(old_conn_state, 0);
778 }
779
780 static void i965_disable_backlight(const struct drm_connector_state *old_conn_state)
781 {
782 struct drm_i915_private *dev_priv = to_i915(old_conn_state->connector->dev);
783 u32 tmp;
784
785 intel_panel_actually_set_backlight(old_conn_state, 0);
786
787 tmp = I915_READ(BLC_PWM_CTL2);
788 I915_WRITE(BLC_PWM_CTL2, tmp & ~BLM_PWM_ENABLE);
789 }
790
791 static void vlv_disable_backlight(const struct drm_connector_state *old_conn_state)
792 {
793 struct intel_connector *connector = to_intel_connector(old_conn_state->connector);
794 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
795 enum pipe pipe = to_intel_crtc(old_conn_state->crtc)->pipe;
796 u32 tmp;
797
798 intel_panel_actually_set_backlight(old_conn_state, 0);
799
800 tmp = I915_READ(VLV_BLC_PWM_CTL2(pipe));
801 I915_WRITE(VLV_BLC_PWM_CTL2(pipe), tmp & ~BLM_PWM_ENABLE);
802 }
803
804 static void bxt_disable_backlight(const struct drm_connector_state *old_conn_state)
805 {
806 struct intel_connector *connector = to_intel_connector(old_conn_state->connector);
807 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
808 struct intel_panel *panel = &connector->panel;
809 u32 tmp, val;
810
811 intel_panel_actually_set_backlight(old_conn_state, 0);
812
813 tmp = I915_READ(BXT_BLC_PWM_CTL(panel->backlight.controller));
814 I915_WRITE(BXT_BLC_PWM_CTL(panel->backlight.controller),
815 tmp & ~BXT_BLC_PWM_ENABLE);
816
817 if (panel->backlight.controller == 1) {
818 val = I915_READ(UTIL_PIN_CTL);
819 val &= ~UTIL_PIN_ENABLE;
820 I915_WRITE(UTIL_PIN_CTL, val);
821 }
822 }
823
824 static void cnp_disable_backlight(const struct drm_connector_state *old_conn_state)
825 {
826 struct intel_connector *connector = to_intel_connector(old_conn_state->connector);
827 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
828 struct intel_panel *panel = &connector->panel;
829 u32 tmp;
830
831 intel_panel_actually_set_backlight(old_conn_state, 0);
832
833 tmp = I915_READ(BXT_BLC_PWM_CTL(panel->backlight.controller));
834 I915_WRITE(BXT_BLC_PWM_CTL(panel->backlight.controller),
835 tmp & ~BXT_BLC_PWM_ENABLE);
836 }
837
838 static void pwm_disable_backlight(const struct drm_connector_state *old_conn_state)
839 {
840 struct intel_connector *connector = to_intel_connector(old_conn_state->connector);
841 struct intel_panel *panel = &connector->panel;
842
843 /* Disable the backlight */
844 intel_panel_actually_set_backlight(old_conn_state, 0);
845 usleep_range(2000, 3000);
846 pwm_disable(panel->backlight.pwm);
847 }
848
849 void intel_panel_disable_backlight(const struct drm_connector_state *old_conn_state)
850 {
851 struct intel_connector *connector = to_intel_connector(old_conn_state->connector);
852 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
853 struct intel_panel *panel = &connector->panel;
854
855 if (!panel->backlight.present)
856 return;
857
858 /*
859 * Do not disable backlight on the vga_switcheroo path. When switching
860 * away from i915, the other client may depend on i915 to handle the
861 * backlight. This will leave the backlight on unnecessarily when
862 * another client is not activated.
863 */
864 if (dev_priv->drm.switch_power_state == DRM_SWITCH_POWER_CHANGING) {
865 DRM_DEBUG_DRIVER("Skipping backlight disable on vga switch\n");
866 return;
867 }
868
869 mutex_lock(&dev_priv->backlight_lock);
870
871 if (panel->backlight.device)
872 panel->backlight.device->props.power = FB_BLANK_POWERDOWN;
873 panel->backlight.enabled = false;
874 panel->backlight.disable(old_conn_state);
875
876 mutex_unlock(&dev_priv->backlight_lock);
877 }
878
879 static void lpt_enable_backlight(const struct intel_crtc_state *crtc_state,
880 const struct drm_connector_state *conn_state)
881 {
882 struct intel_connector *connector = to_intel_connector(conn_state->connector);
883 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
884 struct intel_panel *panel = &connector->panel;
885 u32 pch_ctl1, pch_ctl2, schicken;
886
887 pch_ctl1 = I915_READ(BLC_PWM_PCH_CTL1);
888 if (pch_ctl1 & BLM_PCH_PWM_ENABLE) {
889 DRM_DEBUG_KMS("pch backlight already enabled\n");
890 pch_ctl1 &= ~BLM_PCH_PWM_ENABLE;
891 I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1);
892 }
893
894 if (HAS_PCH_LPT(dev_priv)) {
895 schicken = I915_READ(SOUTH_CHICKEN2);
896 if (panel->backlight.alternate_pwm_increment)
897 schicken |= LPT_PWM_GRANULARITY;
898 else
899 schicken &= ~LPT_PWM_GRANULARITY;
900 I915_WRITE(SOUTH_CHICKEN2, schicken);
901 } else {
902 schicken = I915_READ(SOUTH_CHICKEN1);
903 if (panel->backlight.alternate_pwm_increment)
904 schicken |= SPT_PWM_GRANULARITY;
905 else
906 schicken &= ~SPT_PWM_GRANULARITY;
907 I915_WRITE(SOUTH_CHICKEN1, schicken);
908 }
909
910 pch_ctl2 = panel->backlight.max << 16;
911 I915_WRITE(BLC_PWM_PCH_CTL2, pch_ctl2);
912
913 pch_ctl1 = 0;
914 if (panel->backlight.active_low_pwm)
915 pch_ctl1 |= BLM_PCH_POLARITY;
916
917 /* After LPT, override is the default. */
918 if (HAS_PCH_LPT(dev_priv))
919 pch_ctl1 |= BLM_PCH_OVERRIDE_ENABLE;
920
921 I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1);
922 POSTING_READ(BLC_PWM_PCH_CTL1);
923 I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1 | BLM_PCH_PWM_ENABLE);
924
925 /* This won't stick until the above enable. */
926 intel_panel_actually_set_backlight(conn_state, panel->backlight.level);
927 }
928
929 static void pch_enable_backlight(const struct intel_crtc_state *crtc_state,
930 const struct drm_connector_state *conn_state)
931 {
932 struct intel_connector *connector = to_intel_connector(conn_state->connector);
933 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
934 struct intel_panel *panel = &connector->panel;
935 enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
936 u32 cpu_ctl2, pch_ctl1, pch_ctl2;
937
938 cpu_ctl2 = I915_READ(BLC_PWM_CPU_CTL2);
939 if (cpu_ctl2 & BLM_PWM_ENABLE) {
940 DRM_DEBUG_KMS("cpu backlight already enabled\n");
941 cpu_ctl2 &= ~BLM_PWM_ENABLE;
942 I915_WRITE(BLC_PWM_CPU_CTL2, cpu_ctl2);
943 }
944
945 pch_ctl1 = I915_READ(BLC_PWM_PCH_CTL1);
946 if (pch_ctl1 & BLM_PCH_PWM_ENABLE) {
947 DRM_DEBUG_KMS("pch backlight already enabled\n");
948 pch_ctl1 &= ~BLM_PCH_PWM_ENABLE;
949 I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1);
950 }
951
952 if (cpu_transcoder == TRANSCODER_EDP)
953 cpu_ctl2 = BLM_TRANSCODER_EDP;
954 else
955 cpu_ctl2 = BLM_PIPE(cpu_transcoder);
956 I915_WRITE(BLC_PWM_CPU_CTL2, cpu_ctl2);
957 POSTING_READ(BLC_PWM_CPU_CTL2);
958 I915_WRITE(BLC_PWM_CPU_CTL2, cpu_ctl2 | BLM_PWM_ENABLE);
959
960 /* This won't stick until the above enable. */
961 intel_panel_actually_set_backlight(conn_state, panel->backlight.level);
962
963 pch_ctl2 = panel->backlight.max << 16;
964 I915_WRITE(BLC_PWM_PCH_CTL2, pch_ctl2);
965
966 pch_ctl1 = 0;
967 if (panel->backlight.active_low_pwm)
968 pch_ctl1 |= BLM_PCH_POLARITY;
969
970 I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1);
971 POSTING_READ(BLC_PWM_PCH_CTL1);
972 I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1 | BLM_PCH_PWM_ENABLE);
973 }
974
975 static void i9xx_enable_backlight(const struct intel_crtc_state *crtc_state,
976 const struct drm_connector_state *conn_state)
977 {
978 struct intel_connector *connector = to_intel_connector(conn_state->connector);
979 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
980 struct intel_panel *panel = &connector->panel;
981 u32 ctl, freq;
982
983 ctl = I915_READ(BLC_PWM_CTL);
984 if (ctl & BACKLIGHT_DUTY_CYCLE_MASK_PNV) {
985 DRM_DEBUG_KMS("backlight already enabled\n");
986 I915_WRITE(BLC_PWM_CTL, 0);
987 }
988
989 freq = panel->backlight.max;
990 if (panel->backlight.combination_mode)
991 freq /= 0xff;
992
993 ctl = freq << 17;
994 if (panel->backlight.combination_mode)
995 ctl |= BLM_LEGACY_MODE;
996 if (IS_PINEVIEW(dev_priv) && panel->backlight.active_low_pwm)
997 ctl |= BLM_POLARITY_PNV;
998
999 I915_WRITE(BLC_PWM_CTL, ctl);
1000 POSTING_READ(BLC_PWM_CTL);
1001
1002 /* XXX: combine this into above write? */
1003 intel_panel_actually_set_backlight(conn_state, panel->backlight.level);
1004
1005 /*
1006 * Needed to enable backlight on some 855gm models. BLC_HIST_CTL is
1007 * 855gm only, but checking for gen2 is safe, as 855gm is the only gen2
1008 * that has backlight.
1009 */
1010 if (IS_GEN(dev_priv, 2))
1011 I915_WRITE(BLC_HIST_CTL, BLM_HISTOGRAM_ENABLE);
1012 }
1013
1014 static void i965_enable_backlight(const struct intel_crtc_state *crtc_state,
1015 const struct drm_connector_state *conn_state)
1016 {
1017 struct intel_connector *connector = to_intel_connector(conn_state->connector);
1018 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1019 struct intel_panel *panel = &connector->panel;
1020 enum pipe pipe = to_intel_crtc(conn_state->crtc)->pipe;
1021 u32 ctl, ctl2, freq;
1022
1023 ctl2 = I915_READ(BLC_PWM_CTL2);
1024 if (ctl2 & BLM_PWM_ENABLE) {
1025 DRM_DEBUG_KMS("backlight already enabled\n");
1026 ctl2 &= ~BLM_PWM_ENABLE;
1027 I915_WRITE(BLC_PWM_CTL2, ctl2);
1028 }
1029
1030 freq = panel->backlight.max;
1031 if (panel->backlight.combination_mode)
1032 freq /= 0xff;
1033
1034 ctl = freq << 16;
1035 I915_WRITE(BLC_PWM_CTL, ctl);
1036
1037 ctl2 = BLM_PIPE(pipe);
1038 if (panel->backlight.combination_mode)
1039 ctl2 |= BLM_COMBINATION_MODE;
1040 if (panel->backlight.active_low_pwm)
1041 ctl2 |= BLM_POLARITY_I965;
1042 I915_WRITE(BLC_PWM_CTL2, ctl2);
1043 POSTING_READ(BLC_PWM_CTL2);
1044 I915_WRITE(BLC_PWM_CTL2, ctl2 | BLM_PWM_ENABLE);
1045
1046 intel_panel_actually_set_backlight(conn_state, panel->backlight.level);
1047 }
1048
1049 static void vlv_enable_backlight(const struct intel_crtc_state *crtc_state,
1050 const struct drm_connector_state *conn_state)
1051 {
1052 struct intel_connector *connector = to_intel_connector(conn_state->connector);
1053 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1054 struct intel_panel *panel = &connector->panel;
1055 enum pipe pipe = to_intel_crtc(crtc_state->uapi.crtc)->pipe;
1056 u32 ctl, ctl2;
1057
1058 ctl2 = I915_READ(VLV_BLC_PWM_CTL2(pipe));
1059 if (ctl2 & BLM_PWM_ENABLE) {
1060 DRM_DEBUG_KMS("backlight already enabled\n");
1061 ctl2 &= ~BLM_PWM_ENABLE;
1062 I915_WRITE(VLV_BLC_PWM_CTL2(pipe), ctl2);
1063 }
1064
1065 ctl = panel->backlight.max << 16;
1066 I915_WRITE(VLV_BLC_PWM_CTL(pipe), ctl);
1067
1068 /* XXX: combine this into above write? */
1069 intel_panel_actually_set_backlight(conn_state, panel->backlight.level);
1070
1071 ctl2 = 0;
1072 if (panel->backlight.active_low_pwm)
1073 ctl2 |= BLM_POLARITY_I965;
1074 I915_WRITE(VLV_BLC_PWM_CTL2(pipe), ctl2);
1075 POSTING_READ(VLV_BLC_PWM_CTL2(pipe));
1076 I915_WRITE(VLV_BLC_PWM_CTL2(pipe), ctl2 | BLM_PWM_ENABLE);
1077 }
1078
1079 static void bxt_enable_backlight(const struct intel_crtc_state *crtc_state,
1080 const struct drm_connector_state *conn_state)
1081 {
1082 struct intel_connector *connector = to_intel_connector(conn_state->connector);
1083 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1084 struct intel_panel *panel = &connector->panel;
1085 enum pipe pipe = to_intel_crtc(crtc_state->uapi.crtc)->pipe;
1086 u32 pwm_ctl, val;
1087
1088 /* Controller 1 uses the utility pin. */
1089 if (panel->backlight.controller == 1) {
1090 val = I915_READ(UTIL_PIN_CTL);
1091 if (val & UTIL_PIN_ENABLE) {
1092 DRM_DEBUG_KMS("util pin already enabled\n");
1093 val &= ~UTIL_PIN_ENABLE;
1094 I915_WRITE(UTIL_PIN_CTL, val);
1095 }
1096
1097 val = 0;
1098 if (panel->backlight.util_pin_active_low)
1099 val |= UTIL_PIN_POLARITY;
1100 I915_WRITE(UTIL_PIN_CTL, val | UTIL_PIN_PIPE(pipe) |
1101 UTIL_PIN_MODE_PWM | UTIL_PIN_ENABLE);
1102 }
1103
1104 pwm_ctl = I915_READ(BXT_BLC_PWM_CTL(panel->backlight.controller));
1105 if (pwm_ctl & BXT_BLC_PWM_ENABLE) {
1106 DRM_DEBUG_KMS("backlight already enabled\n");
1107 pwm_ctl &= ~BXT_BLC_PWM_ENABLE;
1108 I915_WRITE(BXT_BLC_PWM_CTL(panel->backlight.controller),
1109 pwm_ctl);
1110 }
1111
1112 I915_WRITE(BXT_BLC_PWM_FREQ(panel->backlight.controller),
1113 panel->backlight.max);
1114
1115 intel_panel_actually_set_backlight(conn_state, panel->backlight.level);
1116
1117 pwm_ctl = 0;
1118 if (panel->backlight.active_low_pwm)
1119 pwm_ctl |= BXT_BLC_PWM_POLARITY;
1120
1121 I915_WRITE(BXT_BLC_PWM_CTL(panel->backlight.controller), pwm_ctl);
1122 POSTING_READ(BXT_BLC_PWM_CTL(panel->backlight.controller));
1123 I915_WRITE(BXT_BLC_PWM_CTL(panel->backlight.controller),
1124 pwm_ctl | BXT_BLC_PWM_ENABLE);
1125 }
1126
1127 static void cnp_enable_backlight(const struct intel_crtc_state *crtc_state,
1128 const struct drm_connector_state *conn_state)
1129 {
1130 struct intel_connector *connector = to_intel_connector(conn_state->connector);
1131 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1132 struct intel_panel *panel = &connector->panel;
1133 u32 pwm_ctl;
1134
1135 pwm_ctl = I915_READ(BXT_BLC_PWM_CTL(panel->backlight.controller));
1136 if (pwm_ctl & BXT_BLC_PWM_ENABLE) {
1137 DRM_DEBUG_KMS("backlight already enabled\n");
1138 pwm_ctl &= ~BXT_BLC_PWM_ENABLE;
1139 I915_WRITE(BXT_BLC_PWM_CTL(panel->backlight.controller),
1140 pwm_ctl);
1141 }
1142
1143 I915_WRITE(BXT_BLC_PWM_FREQ(panel->backlight.controller),
1144 panel->backlight.max);
1145
1146 intel_panel_actually_set_backlight(conn_state, panel->backlight.level);
1147
1148 pwm_ctl = 0;
1149 if (panel->backlight.active_low_pwm)
1150 pwm_ctl |= BXT_BLC_PWM_POLARITY;
1151
1152 I915_WRITE(BXT_BLC_PWM_CTL(panel->backlight.controller), pwm_ctl);
1153 POSTING_READ(BXT_BLC_PWM_CTL(panel->backlight.controller));
1154 I915_WRITE(BXT_BLC_PWM_CTL(panel->backlight.controller),
1155 pwm_ctl | BXT_BLC_PWM_ENABLE);
1156 }
1157
1158 static void pwm_enable_backlight(const struct intel_crtc_state *crtc_state,
1159 const struct drm_connector_state *conn_state)
1160 {
1161 struct intel_connector *connector = to_intel_connector(conn_state->connector);
1162 struct intel_panel *panel = &connector->panel;
1163
1164 pwm_enable(panel->backlight.pwm);
1165 intel_panel_actually_set_backlight(conn_state, panel->backlight.level);
1166 }
1167
1168 static void __intel_panel_enable_backlight(const struct intel_crtc_state *crtc_state,
1169 const struct drm_connector_state *conn_state)
1170 {
1171 struct intel_connector *connector = to_intel_connector(conn_state->connector);
1172 struct intel_panel *panel = &connector->panel;
1173
1174 WARN_ON(panel->backlight.max == 0);
1175
1176 if (panel->backlight.level <= panel->backlight.min) {
1177 panel->backlight.level = panel->backlight.max;
1178 if (panel->backlight.device)
1179 panel->backlight.device->props.brightness =
1180 scale_hw_to_user(connector,
1181 panel->backlight.level,
1182 panel->backlight.device->props.max_brightness);
1183 }
1184
1185 panel->backlight.enable(crtc_state, conn_state);
1186 panel->backlight.enabled = true;
1187 if (panel->backlight.device)
1188 panel->backlight.device->props.power = FB_BLANK_UNBLANK;
1189 }
1190
1191 void intel_panel_enable_backlight(const struct intel_crtc_state *crtc_state,
1192 const struct drm_connector_state *conn_state)
1193 {
1194 struct intel_connector *connector = to_intel_connector(conn_state->connector);
1195 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1196 struct intel_panel *panel = &connector->panel;
1197 enum pipe pipe = to_intel_crtc(crtc_state->uapi.crtc)->pipe;
1198
1199 if (!panel->backlight.present)
1200 return;
1201
1202 DRM_DEBUG_KMS("pipe %c\n", pipe_name(pipe));
1203
1204 mutex_lock(&dev_priv->backlight_lock);
1205
1206 __intel_panel_enable_backlight(crtc_state, conn_state);
1207
1208 mutex_unlock(&dev_priv->backlight_lock);
1209 }
1210
1211 #if IS_ENABLED(CONFIG_BACKLIGHT_CLASS_DEVICE)
1212 static u32 intel_panel_get_backlight(struct intel_connector *connector)
1213 {
1214 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1215 struct intel_panel *panel = &connector->panel;
1216 u32 val = 0;
1217
1218 mutex_lock(&dev_priv->backlight_lock);
1219
1220 if (panel->backlight.enabled) {
1221 val = panel->backlight.get(connector);
1222 val = intel_panel_compute_brightness(connector, val);
1223 }
1224
1225 mutex_unlock(&dev_priv->backlight_lock);
1226
1227 DRM_DEBUG_DRIVER("get backlight PWM = %d\n", val);
1228 return val;
1229 }
1230
1231 /* set backlight brightness to level in range [0..max], scaling wrt hw min */
1232 static void intel_panel_set_backlight(const struct drm_connector_state *conn_state,
1233 u32 user_level, u32 user_max)
1234 {
1235 struct intel_connector *connector = to_intel_connector(conn_state->connector);
1236 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1237 struct intel_panel *panel = &connector->panel;
1238 u32 hw_level;
1239
1240 if (!panel->backlight.present)
1241 return;
1242
1243 mutex_lock(&dev_priv->backlight_lock);
1244
1245 WARN_ON(panel->backlight.max == 0);
1246
1247 hw_level = scale_user_to_hw(connector, user_level, user_max);
1248 panel->backlight.level = hw_level;
1249
1250 if (panel->backlight.enabled)
1251 intel_panel_actually_set_backlight(conn_state, hw_level);
1252
1253 mutex_unlock(&dev_priv->backlight_lock);
1254 }
1255
1256 static int intel_backlight_device_update_status(struct backlight_device *bd)
1257 {
1258 struct intel_connector *connector = bl_get_data(bd);
1259 struct intel_panel *panel = &connector->panel;
1260 struct drm_device *dev = connector->base.dev;
1261
1262 drm_modeset_lock(&dev->mode_config.connection_mutex, NULL);
1263 DRM_DEBUG_KMS("updating intel_backlight, brightness=%d/%d\n",
1264 bd->props.brightness, bd->props.max_brightness);
1265 intel_panel_set_backlight(connector->base.state, bd->props.brightness,
1266 bd->props.max_brightness);
1267
1268 /*
1269 * Allow flipping bl_power as a sub-state of enabled. Sadly the
1270 * backlight class device does not make it easy to to differentiate
1271 * between callbacks for brightness and bl_power, so our backlight_power
1272 * callback needs to take this into account.
1273 */
1274 if (panel->backlight.enabled) {
1275 if (panel->backlight.power) {
1276 bool enable = bd->props.power == FB_BLANK_UNBLANK &&
1277 bd->props.brightness != 0;
1278 panel->backlight.power(connector, enable);
1279 }
1280 } else {
1281 bd->props.power = FB_BLANK_POWERDOWN;
1282 }
1283
1284 drm_modeset_unlock(&dev->mode_config.connection_mutex);
1285 return 0;
1286 }
1287
1288 static int intel_backlight_device_get_brightness(struct backlight_device *bd)
1289 {
1290 struct intel_connector *connector = bl_get_data(bd);
1291 struct drm_device *dev = connector->base.dev;
1292 struct drm_i915_private *dev_priv = to_i915(dev);
1293 intel_wakeref_t wakeref;
1294 int ret = 0;
1295
1296 with_intel_runtime_pm(&dev_priv->runtime_pm, wakeref) {
1297 u32 hw_level;
1298
1299 drm_modeset_lock(&dev->mode_config.connection_mutex, NULL);
1300
1301 hw_level = intel_panel_get_backlight(connector);
1302 ret = scale_hw_to_user(connector,
1303 hw_level, bd->props.max_brightness);
1304
1305 drm_modeset_unlock(&dev->mode_config.connection_mutex);
1306 }
1307
1308 return ret;
1309 }
1310
1311 static const struct backlight_ops intel_backlight_device_ops = {
1312 .update_status = intel_backlight_device_update_status,
1313 .get_brightness = intel_backlight_device_get_brightness,
1314 };
1315
1316 int intel_backlight_device_register(struct intel_connector *connector)
1317 {
1318 struct intel_panel *panel = &connector->panel;
1319 struct backlight_properties props;
1320
1321 if (WARN_ON(panel->backlight.device))
1322 return -ENODEV;
1323
1324 if (!panel->backlight.present)
1325 return 0;
1326
1327 WARN_ON(panel->backlight.max == 0);
1328
1329 memset(&props, 0, sizeof(props));
1330 props.type = BACKLIGHT_RAW;
1331
1332 /*
1333 * Note: Everything should work even if the backlight device max
1334 * presented to the userspace is arbitrarily chosen.
1335 */
1336 props.max_brightness = panel->backlight.max;
1337 props.brightness = scale_hw_to_user(connector,
1338 panel->backlight.level,
1339 props.max_brightness);
1340
1341 if (panel->backlight.enabled)
1342 props.power = FB_BLANK_UNBLANK;
1343 else
1344 props.power = FB_BLANK_POWERDOWN;
1345
1346 /*
1347 * Note: using the same name independent of the connector prevents
1348 * registration of multiple backlight devices in the driver.
1349 */
1350 panel->backlight.device =
1351 backlight_device_register("intel_backlight",
1352 connector->base.kdev,
1353 connector,
1354 &intel_backlight_device_ops, &props);
1355
1356 if (IS_ERR(panel->backlight.device)) {
1357 DRM_ERROR("Failed to register backlight: %ld\n",
1358 PTR_ERR(panel->backlight.device));
1359 panel->backlight.device = NULL;
1360 return -ENODEV;
1361 }
1362
1363 DRM_DEBUG_KMS("Connector %s backlight sysfs interface registered\n",
1364 connector->base.name);
1365
1366 return 0;
1367 }
1368
1369 void intel_backlight_device_unregister(struct intel_connector *connector)
1370 {
1371 struct intel_panel *panel = &connector->panel;
1372
1373 if (panel->backlight.device) {
1374 backlight_device_unregister(panel->backlight.device);
1375 panel->backlight.device = NULL;
1376 }
1377 }
1378 #endif /* CONFIG_BACKLIGHT_CLASS_DEVICE */
1379
1380 /*
1381 * CNP: PWM clock frequency is 19.2 MHz or 24 MHz.
1382 * PWM increment = 1
1383 */
1384 static u32 cnp_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz)
1385 {
1386 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1387
1388 return DIV_ROUND_CLOSEST(KHz(dev_priv->rawclk_freq), pwm_freq_hz);
1389 }
1390
1391 /*
1392 * BXT: PWM clock frequency = 19.2 MHz.
1393 */
1394 static u32 bxt_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz)
1395 {
1396 return DIV_ROUND_CLOSEST(KHz(19200), pwm_freq_hz);
1397 }
1398
1399 /*
1400 * SPT: This value represents the period of the PWM stream in clock periods
1401 * multiplied by 16 (default increment) or 128 (alternate increment selected in
1402 * SCHICKEN_1 bit 0). PWM clock is 24 MHz.
1403 */
1404 static u32 spt_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz)
1405 {
1406 struct intel_panel *panel = &connector->panel;
1407 u32 mul;
1408
1409 if (panel->backlight.alternate_pwm_increment)
1410 mul = 128;
1411 else
1412 mul = 16;
1413
1414 return DIV_ROUND_CLOSEST(MHz(24), pwm_freq_hz * mul);
1415 }
1416
1417 /*
1418 * LPT: This value represents the period of the PWM stream in clock periods
1419 * multiplied by 128 (default increment) or 16 (alternate increment, selected in
1420 * LPT SOUTH_CHICKEN2 register bit 5).
1421 */
1422 static u32 lpt_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz)
1423 {
1424 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1425 struct intel_panel *panel = &connector->panel;
1426 u32 mul, clock;
1427
1428 if (panel->backlight.alternate_pwm_increment)
1429 mul = 16;
1430 else
1431 mul = 128;
1432
1433 if (HAS_PCH_LPT_H(dev_priv))
1434 clock = MHz(135); /* LPT:H */
1435 else
1436 clock = MHz(24); /* LPT:LP */
1437
1438 return DIV_ROUND_CLOSEST(clock, pwm_freq_hz * mul);
1439 }
1440
1441 /*
1442 * ILK/SNB/IVB: This value represents the period of the PWM stream in PCH
1443 * display raw clocks multiplied by 128.
1444 */
1445 static u32 pch_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz)
1446 {
1447 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1448
1449 return DIV_ROUND_CLOSEST(KHz(dev_priv->rawclk_freq), pwm_freq_hz * 128);
1450 }
1451
1452 /*
1453 * Gen2: This field determines the number of time base events (display core
1454 * clock frequency/32) in total for a complete cycle of modulated backlight
1455 * control.
1456 *
1457 * Gen3: A time base event equals the display core clock ([DevPNV] HRAW clock)
1458 * divided by 32.
1459 */
1460 static u32 i9xx_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz)
1461 {
1462 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1463 int clock;
1464
1465 if (IS_PINEVIEW(dev_priv))
1466 clock = KHz(dev_priv->rawclk_freq);
1467 else
1468 clock = KHz(dev_priv->cdclk.hw.cdclk);
1469
1470 return DIV_ROUND_CLOSEST(clock, pwm_freq_hz * 32);
1471 }
1472
1473 /*
1474 * Gen4: This value represents the period of the PWM stream in display core
1475 * clocks ([DevCTG] HRAW clocks) multiplied by 128.
1476 *
1477 */
1478 static u32 i965_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz)
1479 {
1480 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1481 int clock;
1482
1483 if (IS_G4X(dev_priv))
1484 clock = KHz(dev_priv->rawclk_freq);
1485 else
1486 clock = KHz(dev_priv->cdclk.hw.cdclk);
1487
1488 return DIV_ROUND_CLOSEST(clock, pwm_freq_hz * 128);
1489 }
1490
1491 /*
1492 * VLV: This value represents the period of the PWM stream in display core
1493 * clocks ([DevCTG] 200MHz HRAW clocks) multiplied by 128 or 25MHz S0IX clocks
1494 * multiplied by 16. CHV uses a 19.2MHz S0IX clock.
1495 */
1496 static u32 vlv_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz)
1497 {
1498 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1499 int mul, clock;
1500
1501 if ((I915_READ(CBR1_VLV) & CBR_PWM_CLOCK_MUX_SELECT) == 0) {
1502 if (IS_CHERRYVIEW(dev_priv))
1503 clock = KHz(19200);
1504 else
1505 clock = MHz(25);
1506 mul = 16;
1507 } else {
1508 clock = KHz(dev_priv->rawclk_freq);
1509 mul = 128;
1510 }
1511
1512 return DIV_ROUND_CLOSEST(clock, pwm_freq_hz * mul);
1513 }
1514
1515 static u32 get_backlight_max_vbt(struct intel_connector *connector)
1516 {
1517 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1518 struct intel_panel *panel = &connector->panel;
1519 u16 pwm_freq_hz = dev_priv->vbt.backlight.pwm_freq_hz;
1520 u32 pwm;
1521
1522 if (!panel->backlight.hz_to_pwm) {
1523 DRM_DEBUG_KMS("backlight frequency conversion not supported\n");
1524 return 0;
1525 }
1526
1527 if (pwm_freq_hz) {
1528 DRM_DEBUG_KMS("VBT defined backlight frequency %u Hz\n",
1529 pwm_freq_hz);
1530 } else {
1531 pwm_freq_hz = 200;
1532 DRM_DEBUG_KMS("default backlight frequency %u Hz\n",
1533 pwm_freq_hz);
1534 }
1535
1536 pwm = panel->backlight.hz_to_pwm(connector, pwm_freq_hz);
1537 if (!pwm) {
1538 DRM_DEBUG_KMS("backlight frequency conversion failed\n");
1539 return 0;
1540 }
1541
1542 return pwm;
1543 }
1544
1545 /*
1546 * Note: The setup hooks can't assume pipe is set!
1547 */
1548 static u32 get_backlight_min_vbt(struct intel_connector *connector)
1549 {
1550 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1551 struct intel_panel *panel = &connector->panel;
1552 int min;
1553
1554 WARN_ON(panel->backlight.max == 0);
1555
1556 /*
1557 * XXX: If the vbt value is 255, it makes min equal to max, which leads
1558 * to problems. There are such machines out there. Either our
1559 * interpretation is wrong or the vbt has bogus data. Or both. Safeguard
1560 * against this by letting the minimum be at most (arbitrarily chosen)
1561 * 25% of the max.
1562 */
1563 min = clamp_t(int, dev_priv->vbt.backlight.min_brightness, 0, 64);
1564 if (min != dev_priv->vbt.backlight.min_brightness) {
1565 DRM_DEBUG_KMS("clamping VBT min backlight %d/255 to %d/255\n",
1566 dev_priv->vbt.backlight.min_brightness, min);
1567 }
1568
1569 /* vbt value is a coefficient in range [0..255] */
1570 return scale(min, 0, 255, 0, panel->backlight.max);
1571 }
1572
1573 static int lpt_setup_backlight(struct intel_connector *connector, enum pipe unused)
1574 {
1575 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1576 struct intel_panel *panel = &connector->panel;
1577 u32 cpu_ctl2, pch_ctl1, pch_ctl2, val;
1578 bool alt, cpu_mode;
1579
1580 if (HAS_PCH_LPT(dev_priv))
1581 alt = I915_READ(SOUTH_CHICKEN2) & LPT_PWM_GRANULARITY;
1582 else
1583 alt = I915_READ(SOUTH_CHICKEN1) & SPT_PWM_GRANULARITY;
1584 panel->backlight.alternate_pwm_increment = alt;
1585
1586 pch_ctl1 = I915_READ(BLC_PWM_PCH_CTL1);
1587 panel->backlight.active_low_pwm = pch_ctl1 & BLM_PCH_POLARITY;
1588
1589 pch_ctl2 = I915_READ(BLC_PWM_PCH_CTL2);
1590 panel->backlight.max = pch_ctl2 >> 16;
1591
1592 cpu_ctl2 = I915_READ(BLC_PWM_CPU_CTL2);
1593
1594 if (!panel->backlight.max)
1595 panel->backlight.max = get_backlight_max_vbt(connector);
1596
1597 if (!panel->backlight.max)
1598 return -ENODEV;
1599
1600 panel->backlight.min = get_backlight_min_vbt(connector);
1601
1602 panel->backlight.enabled = pch_ctl1 & BLM_PCH_PWM_ENABLE;
1603
1604 cpu_mode = panel->backlight.enabled && HAS_PCH_LPT(dev_priv) &&
1605 !(pch_ctl1 & BLM_PCH_OVERRIDE_ENABLE) &&
1606 (cpu_ctl2 & BLM_PWM_ENABLE);
1607 if (cpu_mode)
1608 val = pch_get_backlight(connector);
1609 else
1610 val = lpt_get_backlight(connector);
1611 val = intel_panel_compute_brightness(connector, val);
1612 panel->backlight.level = clamp(val, panel->backlight.min,
1613 panel->backlight.max);
1614
1615 if (cpu_mode) {
1616 DRM_DEBUG_KMS("CPU backlight register was enabled, switching to PCH override\n");
1617
1618 /* Write converted CPU PWM value to PCH override register */
1619 lpt_set_backlight(connector->base.state, panel->backlight.level);
1620 I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1 | BLM_PCH_OVERRIDE_ENABLE);
1621
1622 I915_WRITE(BLC_PWM_CPU_CTL2, cpu_ctl2 & ~BLM_PWM_ENABLE);
1623 }
1624
1625 return 0;
1626 }
1627
1628 static int pch_setup_backlight(struct intel_connector *connector, enum pipe unused)
1629 {
1630 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1631 struct intel_panel *panel = &connector->panel;
1632 u32 cpu_ctl2, pch_ctl1, pch_ctl2, val;
1633
1634 pch_ctl1 = I915_READ(BLC_PWM_PCH_CTL1);
1635 panel->backlight.active_low_pwm = pch_ctl1 & BLM_PCH_POLARITY;
1636
1637 pch_ctl2 = I915_READ(BLC_PWM_PCH_CTL2);
1638 panel->backlight.max = pch_ctl2 >> 16;
1639
1640 if (!panel->backlight.max)
1641 panel->backlight.max = get_backlight_max_vbt(connector);
1642
1643 if (!panel->backlight.max)
1644 return -ENODEV;
1645
1646 panel->backlight.min = get_backlight_min_vbt(connector);
1647
1648 val = pch_get_backlight(connector);
1649 val = intel_panel_compute_brightness(connector, val);
1650 panel->backlight.level = clamp(val, panel->backlight.min,
1651 panel->backlight.max);
1652
1653 cpu_ctl2 = I915_READ(BLC_PWM_CPU_CTL2);
1654 panel->backlight.enabled = (cpu_ctl2 & BLM_PWM_ENABLE) &&
1655 (pch_ctl1 & BLM_PCH_PWM_ENABLE);
1656
1657 return 0;
1658 }
1659
1660 static int i9xx_setup_backlight(struct intel_connector *connector, enum pipe unused)
1661 {
1662 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1663 struct intel_panel *panel = &connector->panel;
1664 u32 ctl, val;
1665
1666 ctl = I915_READ(BLC_PWM_CTL);
1667
1668 if (IS_GEN(dev_priv, 2) || IS_I915GM(dev_priv) || IS_I945GM(dev_priv))
1669 panel->backlight.combination_mode = ctl & BLM_LEGACY_MODE;
1670
1671 if (IS_PINEVIEW(dev_priv))
1672 panel->backlight.active_low_pwm = ctl & BLM_POLARITY_PNV;
1673
1674 panel->backlight.max = ctl >> 17;
1675
1676 if (!panel->backlight.max) {
1677 panel->backlight.max = get_backlight_max_vbt(connector);
1678 panel->backlight.max >>= 1;
1679 }
1680
1681 if (!panel->backlight.max)
1682 return -ENODEV;
1683
1684 if (panel->backlight.combination_mode)
1685 panel->backlight.max *= 0xff;
1686
1687 panel->backlight.min = get_backlight_min_vbt(connector);
1688
1689 val = i9xx_get_backlight(connector);
1690 val = intel_panel_compute_brightness(connector, val);
1691 panel->backlight.level = clamp(val, panel->backlight.min,
1692 panel->backlight.max);
1693
1694 panel->backlight.enabled = val != 0;
1695
1696 return 0;
1697 }
1698
1699 static int i965_setup_backlight(struct intel_connector *connector, enum pipe unused)
1700 {
1701 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1702 struct intel_panel *panel = &connector->panel;
1703 u32 ctl, ctl2, val;
1704
1705 ctl2 = I915_READ(BLC_PWM_CTL2);
1706 panel->backlight.combination_mode = ctl2 & BLM_COMBINATION_MODE;
1707 panel->backlight.active_low_pwm = ctl2 & BLM_POLARITY_I965;
1708
1709 ctl = I915_READ(BLC_PWM_CTL);
1710 panel->backlight.max = ctl >> 16;
1711
1712 if (!panel->backlight.max)
1713 panel->backlight.max = get_backlight_max_vbt(connector);
1714
1715 if (!panel->backlight.max)
1716 return -ENODEV;
1717
1718 if (panel->backlight.combination_mode)
1719 panel->backlight.max *= 0xff;
1720
1721 panel->backlight.min = get_backlight_min_vbt(connector);
1722
1723 val = i9xx_get_backlight(connector);
1724 val = intel_panel_compute_brightness(connector, val);
1725 panel->backlight.level = clamp(val, panel->backlight.min,
1726 panel->backlight.max);
1727
1728 panel->backlight.enabled = ctl2 & BLM_PWM_ENABLE;
1729
1730 return 0;
1731 }
1732
1733 static int vlv_setup_backlight(struct intel_connector *connector, enum pipe pipe)
1734 {
1735 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1736 struct intel_panel *panel = &connector->panel;
1737 u32 ctl, ctl2, val;
1738
1739 if (WARN_ON(pipe != PIPE_A && pipe != PIPE_B))
1740 return -ENODEV;
1741
1742 ctl2 = I915_READ(VLV_BLC_PWM_CTL2(pipe));
1743 panel->backlight.active_low_pwm = ctl2 & BLM_POLARITY_I965;
1744
1745 ctl = I915_READ(VLV_BLC_PWM_CTL(pipe));
1746 panel->backlight.max = ctl >> 16;
1747
1748 if (!panel->backlight.max)
1749 panel->backlight.max = get_backlight_max_vbt(connector);
1750
1751 if (!panel->backlight.max)
1752 return -ENODEV;
1753
1754 panel->backlight.min = get_backlight_min_vbt(connector);
1755
1756 val = _vlv_get_backlight(dev_priv, pipe);
1757 val = intel_panel_compute_brightness(connector, val);
1758 panel->backlight.level = clamp(val, panel->backlight.min,
1759 panel->backlight.max);
1760
1761 panel->backlight.enabled = ctl2 & BLM_PWM_ENABLE;
1762
1763 return 0;
1764 }
1765
1766 static int
1767 bxt_setup_backlight(struct intel_connector *connector, enum pipe unused)
1768 {
1769 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1770 struct intel_panel *panel = &connector->panel;
1771 u32 pwm_ctl, val;
1772
1773 panel->backlight.controller = dev_priv->vbt.backlight.controller;
1774
1775 pwm_ctl = I915_READ(BXT_BLC_PWM_CTL(panel->backlight.controller));
1776
1777 /* Controller 1 uses the utility pin. */
1778 if (panel->backlight.controller == 1) {
1779 val = I915_READ(UTIL_PIN_CTL);
1780 panel->backlight.util_pin_active_low =
1781 val & UTIL_PIN_POLARITY;
1782 }
1783
1784 panel->backlight.active_low_pwm = pwm_ctl & BXT_BLC_PWM_POLARITY;
1785 panel->backlight.max =
1786 I915_READ(BXT_BLC_PWM_FREQ(panel->backlight.controller));
1787
1788 if (!panel->backlight.max)
1789 panel->backlight.max = get_backlight_max_vbt(connector);
1790
1791 if (!panel->backlight.max)
1792 return -ENODEV;
1793
1794 panel->backlight.min = get_backlight_min_vbt(connector);
1795
1796 val = bxt_get_backlight(connector);
1797 val = intel_panel_compute_brightness(connector, val);
1798 panel->backlight.level = clamp(val, panel->backlight.min,
1799 panel->backlight.max);
1800
1801 panel->backlight.enabled = pwm_ctl & BXT_BLC_PWM_ENABLE;
1802
1803 return 0;
1804 }
1805
1806 static int
1807 cnp_setup_backlight(struct intel_connector *connector, enum pipe unused)
1808 {
1809 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1810 struct intel_panel *panel = &connector->panel;
1811 u32 pwm_ctl, val;
1812
1813 /*
1814 * CNP has the BXT implementation of backlight, but with only one
1815 * controller. TODO: ICP has multiple controllers but we only use
1816 * controller 0 for now.
1817 */
1818 panel->backlight.controller = 0;
1819
1820 pwm_ctl = I915_READ(BXT_BLC_PWM_CTL(panel->backlight.controller));
1821
1822 panel->backlight.active_low_pwm = pwm_ctl & BXT_BLC_PWM_POLARITY;
1823 panel->backlight.max =
1824 I915_READ(BXT_BLC_PWM_FREQ(panel->backlight.controller));
1825
1826 if (!panel->backlight.max)
1827 panel->backlight.max = get_backlight_max_vbt(connector);
1828
1829 if (!panel->backlight.max)
1830 return -ENODEV;
1831
1832 panel->backlight.min = get_backlight_min_vbt(connector);
1833
1834 val = bxt_get_backlight(connector);
1835 val = intel_panel_compute_brightness(connector, val);
1836 panel->backlight.level = clamp(val, panel->backlight.min,
1837 panel->backlight.max);
1838
1839 panel->backlight.enabled = pwm_ctl & BXT_BLC_PWM_ENABLE;
1840
1841 return 0;
1842 }
1843
1844 static int pwm_setup_backlight(struct intel_connector *connector,
1845 enum pipe pipe)
1846 {
1847 struct drm_device *dev = connector->base.dev;
1848 struct drm_i915_private *dev_priv = to_i915(dev);
1849 struct intel_panel *panel = &connector->panel;
1850 const char *desc;
1851 int retval;
1852
1853 /* Get the right PWM chip for DSI backlight according to VBT */
1854 if (dev_priv->vbt.dsi.config->pwm_blc == PPS_BLC_PMIC) {
1855 panel->backlight.pwm = pwm_get(dev->dev, "pwm_pmic_backlight");
1856 desc = "PMIC";
1857 } else {
1858 panel->backlight.pwm = pwm_get(dev->dev, "pwm_soc_backlight");
1859 desc = "SoC";
1860 }
1861
1862 if (IS_ERR(panel->backlight.pwm)) {
1863 DRM_ERROR("Failed to get the %s PWM chip\n", desc);
1864 panel->backlight.pwm = NULL;
1865 return -ENODEV;
1866 }
1867
1868 /*
1869 * FIXME: pwm_apply_args() should be removed when switching to
1870 * the atomic PWM API.
1871 */
1872 pwm_apply_args(panel->backlight.pwm);
1873
1874 retval = pwm_config(panel->backlight.pwm, CRC_PMIC_PWM_PERIOD_NS,
1875 CRC_PMIC_PWM_PERIOD_NS);
1876 if (retval < 0) {
1877 DRM_ERROR("Failed to configure the pwm chip\n");
1878 pwm_put(panel->backlight.pwm);
1879 panel->backlight.pwm = NULL;
1880 return retval;
1881 }
1882
1883 panel->backlight.min = 0; /* 0% */
1884 panel->backlight.max = 100; /* 100% */
1885 panel->backlight.level = DIV_ROUND_UP(
1886 pwm_get_duty_cycle(panel->backlight.pwm) * 100,
1887 CRC_PMIC_PWM_PERIOD_NS);
1888 panel->backlight.enabled = panel->backlight.level != 0;
1889
1890 DRM_INFO("Using %s PWM for LCD backlight control\n", desc);
1891 return 0;
1892 }
1893
1894 void intel_panel_update_backlight(struct intel_encoder *encoder,
1895 const struct intel_crtc_state *crtc_state,
1896 const struct drm_connector_state *conn_state)
1897 {
1898 struct intel_connector *connector = to_intel_connector(conn_state->connector);
1899 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1900 struct intel_panel *panel = &connector->panel;
1901
1902 if (!panel->backlight.present)
1903 return;
1904
1905 mutex_lock(&dev_priv->backlight_lock);
1906 if (!panel->backlight.enabled)
1907 __intel_panel_enable_backlight(crtc_state, conn_state);
1908
1909 mutex_unlock(&dev_priv->backlight_lock);
1910 }
1911
1912 int intel_panel_setup_backlight(struct drm_connector *connector, enum pipe pipe)
1913 {
1914 struct drm_i915_private *dev_priv = to_i915(connector->dev);
1915 struct intel_connector *intel_connector = to_intel_connector(connector);
1916 struct intel_panel *panel = &intel_connector->panel;
1917 int ret;
1918
1919 if (!dev_priv->vbt.backlight.present) {
1920 if (dev_priv->quirks & QUIRK_BACKLIGHT_PRESENT) {
1921 DRM_DEBUG_KMS("no backlight present per VBT, but present per quirk\n");
1922 } else {
1923 DRM_DEBUG_KMS("no backlight present per VBT\n");
1924 return 0;
1925 }
1926 }
1927
1928 /* ensure intel_panel has been initialized first */
1929 if (WARN_ON(!panel->backlight.setup))
1930 return -ENODEV;
1931
1932 /* set level and max in panel struct */
1933 mutex_lock(&dev_priv->backlight_lock);
1934 ret = panel->backlight.setup(intel_connector, pipe);
1935 mutex_unlock(&dev_priv->backlight_lock);
1936
1937 if (ret) {
1938 DRM_DEBUG_KMS("failed to setup backlight for connector %s\n",
1939 connector->name);
1940 return ret;
1941 }
1942
1943 panel->backlight.present = true;
1944
1945 DRM_DEBUG_KMS("Connector %s backlight initialized, %s, brightness %u/%u\n",
1946 connector->name,
1947 enableddisabled(panel->backlight.enabled),
1948 panel->backlight.level, panel->backlight.max);
1949
1950 return 0;
1951 }
1952
1953 static void intel_panel_destroy_backlight(struct intel_panel *panel)
1954 {
1955 /* dispose of the pwm */
1956 if (panel->backlight.pwm)
1957 pwm_put(panel->backlight.pwm);
1958
1959 panel->backlight.present = false;
1960 }
1961
1962 /* Set up chip specific backlight functions */
1963 static void
1964 intel_panel_init_backlight_funcs(struct intel_panel *panel)
1965 {
1966 struct intel_connector *connector =
1967 container_of(panel, struct intel_connector, panel);
1968 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1969
1970 if (connector->base.connector_type == DRM_MODE_CONNECTOR_eDP &&
1971 intel_dp_aux_init_backlight_funcs(connector) == 0)
1972 return;
1973
1974 if (connector->base.connector_type == DRM_MODE_CONNECTOR_DSI &&
1975 intel_dsi_dcs_init_backlight_funcs(connector) == 0)
1976 return;
1977
1978 if (IS_GEN9_LP(dev_priv)) {
1979 panel->backlight.setup = bxt_setup_backlight;
1980 panel->backlight.enable = bxt_enable_backlight;
1981 panel->backlight.disable = bxt_disable_backlight;
1982 panel->backlight.set = bxt_set_backlight;
1983 panel->backlight.get = bxt_get_backlight;
1984 panel->backlight.hz_to_pwm = bxt_hz_to_pwm;
1985 } else if (INTEL_PCH_TYPE(dev_priv) >= PCH_CNP) {
1986 panel->backlight.setup = cnp_setup_backlight;
1987 panel->backlight.enable = cnp_enable_backlight;
1988 panel->backlight.disable = cnp_disable_backlight;
1989 panel->backlight.set = bxt_set_backlight;
1990 panel->backlight.get = bxt_get_backlight;
1991 panel->backlight.hz_to_pwm = cnp_hz_to_pwm;
1992 } else if (INTEL_PCH_TYPE(dev_priv) >= PCH_LPT) {
1993 panel->backlight.setup = lpt_setup_backlight;
1994 panel->backlight.enable = lpt_enable_backlight;
1995 panel->backlight.disable = lpt_disable_backlight;
1996 panel->backlight.set = lpt_set_backlight;
1997 panel->backlight.get = lpt_get_backlight;
1998 if (HAS_PCH_LPT(dev_priv))
1999 panel->backlight.hz_to_pwm = lpt_hz_to_pwm;
2000 else
2001 panel->backlight.hz_to_pwm = spt_hz_to_pwm;
2002 } else if (HAS_PCH_SPLIT(dev_priv)) {
2003 panel->backlight.setup = pch_setup_backlight;
2004 panel->backlight.enable = pch_enable_backlight;
2005 panel->backlight.disable = pch_disable_backlight;
2006 panel->backlight.set = pch_set_backlight;
2007 panel->backlight.get = pch_get_backlight;
2008 panel->backlight.hz_to_pwm = pch_hz_to_pwm;
2009 } else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) {
2010 if (connector->base.connector_type == DRM_MODE_CONNECTOR_DSI) {
2011 panel->backlight.setup = pwm_setup_backlight;
2012 panel->backlight.enable = pwm_enable_backlight;
2013 panel->backlight.disable = pwm_disable_backlight;
2014 panel->backlight.set = pwm_set_backlight;
2015 panel->backlight.get = pwm_get_backlight;
2016 } else {
2017 panel->backlight.setup = vlv_setup_backlight;
2018 panel->backlight.enable = vlv_enable_backlight;
2019 panel->backlight.disable = vlv_disable_backlight;
2020 panel->backlight.set = vlv_set_backlight;
2021 panel->backlight.get = vlv_get_backlight;
2022 panel->backlight.hz_to_pwm = vlv_hz_to_pwm;
2023 }
2024 } else if (IS_GEN(dev_priv, 4)) {
2025 panel->backlight.setup = i965_setup_backlight;
2026 panel->backlight.enable = i965_enable_backlight;
2027 panel->backlight.disable = i965_disable_backlight;
2028 panel->backlight.set = i9xx_set_backlight;
2029 panel->backlight.get = i9xx_get_backlight;
2030 panel->backlight.hz_to_pwm = i965_hz_to_pwm;
2031 } else {
2032 panel->backlight.setup = i9xx_setup_backlight;
2033 panel->backlight.enable = i9xx_enable_backlight;
2034 panel->backlight.disable = i9xx_disable_backlight;
2035 panel->backlight.set = i9xx_set_backlight;
2036 panel->backlight.get = i9xx_get_backlight;
2037 panel->backlight.hz_to_pwm = i9xx_hz_to_pwm;
2038 }
2039 }
2040
2041 int intel_panel_init(struct intel_panel *panel,
2042 struct drm_display_mode *fixed_mode,
2043 struct drm_display_mode *downclock_mode)
2044 {
2045 intel_panel_init_backlight_funcs(panel);
2046
2047 panel->fixed_mode = fixed_mode;
2048 panel->downclock_mode = downclock_mode;
2049
2050 return 0;
2051 }
2052
2053 void intel_panel_fini(struct intel_panel *panel)
2054 {
2055 struct intel_connector *intel_connector =
2056 container_of(panel, struct intel_connector, panel);
2057
2058 intel_panel_destroy_backlight(panel);
2059
2060 if (panel->fixed_mode)
2061 drm_mode_destroy(intel_connector->base.dev, panel->fixed_mode);
2062
2063 if (panel->downclock_mode)
2064 drm_mode_destroy(intel_connector->base.dev,
2065 panel->downclock_mode);
2066 }
2067