1 1.1 riastrad /* $NetBSD: selftest_llc.c,v 1.2 2021/12/18 23:45:30 riastradh Exp $ */ 2 1.1 riastrad 3 1.1 riastrad /* 4 1.1 riastrad * SPDX-License-Identifier: MIT 5 1.1 riastrad * 6 1.1 riastrad * Copyright 2019 Intel Corporation 7 1.1 riastrad */ 8 1.1 riastrad 9 1.1 riastrad #include <sys/cdefs.h> 10 1.1 riastrad __KERNEL_RCSID(0, "$NetBSD: selftest_llc.c,v 1.2 2021/12/18 23:45:30 riastradh Exp $"); 11 1.1 riastrad 12 1.1 riastrad #include "intel_pm.h" /* intel_gpu_freq() */ 13 1.1 riastrad #include "selftest_llc.h" 14 1.1 riastrad #include "intel_rps.h" 15 1.1 riastrad 16 1.1 riastrad static int gen6_verify_ring_freq(struct intel_llc *llc) 17 1.1 riastrad { 18 1.1 riastrad struct drm_i915_private *i915 = llc_to_gt(llc)->i915; 19 1.1 riastrad struct ia_constants consts; 20 1.1 riastrad intel_wakeref_t wakeref; 21 1.1 riastrad unsigned int gpu_freq; 22 1.1 riastrad int err = 0; 23 1.1 riastrad 24 1.1 riastrad wakeref = intel_runtime_pm_get(llc_to_gt(llc)->uncore->rpm); 25 1.1 riastrad 26 1.1 riastrad if (!get_ia_constants(llc, &consts)) { 27 1.1 riastrad err = -ENODEV; 28 1.1 riastrad goto out_rpm; 29 1.1 riastrad } 30 1.1 riastrad 31 1.1 riastrad for (gpu_freq = consts.min_gpu_freq; 32 1.1 riastrad gpu_freq <= consts.max_gpu_freq; 33 1.1 riastrad gpu_freq++) { 34 1.1 riastrad struct intel_rps *rps = &llc_to_gt(llc)->rps; 35 1.1 riastrad 36 1.1 riastrad unsigned int ia_freq, ring_freq, found; 37 1.1 riastrad u32 val; 38 1.1 riastrad 39 1.1 riastrad calc_ia_freq(llc, gpu_freq, &consts, &ia_freq, &ring_freq); 40 1.1 riastrad 41 1.1 riastrad val = gpu_freq; 42 1.1 riastrad if (sandybridge_pcode_read(i915, 43 1.1 riastrad GEN6_PCODE_READ_MIN_FREQ_TABLE, 44 1.1 riastrad &val, NULL)) { 45 1.1 riastrad pr_err("Failed to read freq table[%d], range [%d, %d]\n", 46 1.1 riastrad gpu_freq, consts.min_gpu_freq, consts.max_gpu_freq); 47 1.1 riastrad err = -ENXIO; 48 1.1 riastrad break; 49 1.1 riastrad } 50 1.1 riastrad 51 1.1 riastrad found = (val >> 0) & 0xff; 52 1.1 riastrad if (found != ia_freq) { 53 1.1 riastrad pr_err("Min freq table(%d/[%d, %d]):%dMHz did not match expected CPU freq, found %d, expected %d\n", 54 1.1 riastrad gpu_freq, consts.min_gpu_freq, consts.max_gpu_freq, 55 1.1 riastrad intel_gpu_freq(rps, gpu_freq * (INTEL_GEN(i915) >= 9 ? GEN9_FREQ_SCALER : 1)), 56 1.1 riastrad found, ia_freq); 57 1.1 riastrad err = -EINVAL; 58 1.1 riastrad break; 59 1.1 riastrad } 60 1.1 riastrad 61 1.1 riastrad found = (val >> 8) & 0xff; 62 1.1 riastrad if (found != ring_freq) { 63 1.1 riastrad pr_err("Min freq table(%d/[%d, %d]):%dMHz did not match expected ring freq, found %d, expected %d\n", 64 1.1 riastrad gpu_freq, consts.min_gpu_freq, consts.max_gpu_freq, 65 1.1 riastrad intel_gpu_freq(rps, gpu_freq * (INTEL_GEN(i915) >= 9 ? GEN9_FREQ_SCALER : 1)), 66 1.1 riastrad found, ring_freq); 67 1.1 riastrad err = -EINVAL; 68 1.1 riastrad break; 69 1.1 riastrad } 70 1.1 riastrad } 71 1.1 riastrad 72 1.1 riastrad out_rpm: 73 1.1 riastrad intel_runtime_pm_put(llc_to_gt(llc)->uncore->rpm, wakeref); 74 1.1 riastrad return err; 75 1.1 riastrad } 76 1.1 riastrad 77 1.1 riastrad int st_llc_verify(struct intel_llc *llc) 78 1.1 riastrad { 79 1.1 riastrad int err = 0; 80 1.1 riastrad 81 1.1 riastrad if (HAS_LLC(llc_to_gt(llc)->i915)) 82 1.1 riastrad err = gen6_verify_ring_freq(llc); 83 1.1 riastrad 84 1.1 riastrad return err; 85 1.1 riastrad } 86