1 1.3 riastrad /* $NetBSD: vgpu.c,v 1.3 2021/12/19 11:06:55 riastradh Exp $ */ 2 1.1 riastrad 3 1.1 riastrad /* 4 1.1 riastrad * Copyright(c) 2011-2016 Intel Corporation. All rights reserved. 5 1.1 riastrad * 6 1.1 riastrad * Permission is hereby granted, free of charge, to any person obtaining a 7 1.1 riastrad * copy of this software and associated documentation files (the "Software"), 8 1.1 riastrad * to deal in the Software without restriction, including without limitation 9 1.1 riastrad * the rights to use, copy, modify, merge, publish, distribute, sublicense, 10 1.1 riastrad * and/or sell copies of the Software, and to permit persons to whom the 11 1.1 riastrad * Software is furnished to do so, subject to the following conditions: 12 1.1 riastrad * 13 1.1 riastrad * The above copyright notice and this permission notice (including the next 14 1.1 riastrad * paragraph) shall be included in all copies or substantial portions of the 15 1.1 riastrad * Software. 16 1.1 riastrad * 17 1.1 riastrad * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 18 1.1 riastrad * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 19 1.1 riastrad * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 20 1.1 riastrad * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 21 1.1 riastrad * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 22 1.1 riastrad * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 23 1.1 riastrad * SOFTWARE. 24 1.1 riastrad * 25 1.1 riastrad * Authors: 26 1.1 riastrad * Eddie Dong <eddie.dong (at) intel.com> 27 1.1 riastrad * Kevin Tian <kevin.tian (at) intel.com> 28 1.1 riastrad * 29 1.1 riastrad * Contributors: 30 1.1 riastrad * Ping Gao <ping.a.gao (at) intel.com> 31 1.1 riastrad * Zhi Wang <zhi.a.wang (at) intel.com> 32 1.1 riastrad * Bing Niu <bing.niu (at) intel.com> 33 1.1 riastrad * 34 1.1 riastrad */ 35 1.1 riastrad 36 1.1 riastrad #include <sys/cdefs.h> 37 1.3 riastrad __KERNEL_RCSID(0, "$NetBSD: vgpu.c,v 1.3 2021/12/19 11:06:55 riastradh Exp $"); 38 1.1 riastrad 39 1.1 riastrad #include "i915_drv.h" 40 1.1 riastrad #include "gvt.h" 41 1.1 riastrad #include "i915_pvinfo.h" 42 1.1 riastrad 43 1.1 riastrad void populate_pvinfo_page(struct intel_vgpu *vgpu) 44 1.1 riastrad { 45 1.1 riastrad /* setup the ballooning information */ 46 1.1 riastrad vgpu_vreg64_t(vgpu, vgtif_reg(magic)) = VGT_MAGIC; 47 1.1 riastrad vgpu_vreg_t(vgpu, vgtif_reg(version_major)) = 1; 48 1.1 riastrad vgpu_vreg_t(vgpu, vgtif_reg(version_minor)) = 0; 49 1.1 riastrad vgpu_vreg_t(vgpu, vgtif_reg(display_ready)) = 0; 50 1.1 riastrad vgpu_vreg_t(vgpu, vgtif_reg(vgt_id)) = vgpu->id; 51 1.1 riastrad 52 1.1 riastrad vgpu_vreg_t(vgpu, vgtif_reg(vgt_caps)) = VGT_CAPS_FULL_PPGTT; 53 1.1 riastrad vgpu_vreg_t(vgpu, vgtif_reg(vgt_caps)) |= VGT_CAPS_HWSP_EMULATION; 54 1.1 riastrad vgpu_vreg_t(vgpu, vgtif_reg(vgt_caps)) |= VGT_CAPS_HUGE_GTT; 55 1.1 riastrad 56 1.1 riastrad vgpu_vreg_t(vgpu, vgtif_reg(avail_rs.mappable_gmadr.base)) = 57 1.1 riastrad vgpu_aperture_gmadr_base(vgpu); 58 1.1 riastrad vgpu_vreg_t(vgpu, vgtif_reg(avail_rs.mappable_gmadr.size)) = 59 1.1 riastrad vgpu_aperture_sz(vgpu); 60 1.1 riastrad vgpu_vreg_t(vgpu, vgtif_reg(avail_rs.nonmappable_gmadr.base)) = 61 1.1 riastrad vgpu_hidden_gmadr_base(vgpu); 62 1.1 riastrad vgpu_vreg_t(vgpu, vgtif_reg(avail_rs.nonmappable_gmadr.size)) = 63 1.1 riastrad vgpu_hidden_sz(vgpu); 64 1.1 riastrad 65 1.1 riastrad vgpu_vreg_t(vgpu, vgtif_reg(avail_rs.fence_num)) = vgpu_fence_sz(vgpu); 66 1.1 riastrad 67 1.1 riastrad vgpu_vreg_t(vgpu, vgtif_reg(cursor_x_hot)) = UINT_MAX; 68 1.1 riastrad vgpu_vreg_t(vgpu, vgtif_reg(cursor_y_hot)) = UINT_MAX; 69 1.1 riastrad 70 1.1 riastrad gvt_dbg_core("Populate PVINFO PAGE for vGPU %d\n", vgpu->id); 71 1.1 riastrad gvt_dbg_core("aperture base [GMADR] 0x%llx size 0x%llx\n", 72 1.1 riastrad vgpu_aperture_gmadr_base(vgpu), vgpu_aperture_sz(vgpu)); 73 1.1 riastrad gvt_dbg_core("hidden base [GMADR] 0x%llx size=0x%llx\n", 74 1.1 riastrad vgpu_hidden_gmadr_base(vgpu), vgpu_hidden_sz(vgpu)); 75 1.1 riastrad gvt_dbg_core("fence size %d\n", vgpu_fence_sz(vgpu)); 76 1.1 riastrad 77 1.1 riastrad WARN_ON(sizeof(struct vgt_if) != VGT_PVINFO_SIZE); 78 1.1 riastrad } 79 1.1 riastrad 80 1.1 riastrad #define VGPU_MAX_WEIGHT 16 81 1.1 riastrad #define VGPU_WEIGHT(vgpu_num) \ 82 1.1 riastrad (VGPU_MAX_WEIGHT / (vgpu_num)) 83 1.1 riastrad 84 1.1 riastrad static struct { 85 1.1 riastrad unsigned int low_mm; 86 1.1 riastrad unsigned int high_mm; 87 1.1 riastrad unsigned int fence; 88 1.1 riastrad 89 1.1 riastrad /* A vGPU with a weight of 8 will get twice as much GPU as a vGPU 90 1.1 riastrad * with a weight of 4 on a contended host, different vGPU type has 91 1.1 riastrad * different weight set. Legal weights range from 1 to 16. 92 1.1 riastrad */ 93 1.1 riastrad unsigned int weight; 94 1.1 riastrad enum intel_vgpu_edid edid; 95 1.1 riastrad char *name; 96 1.1 riastrad } vgpu_types[] = { 97 1.1 riastrad /* Fixed vGPU type table */ 98 1.1 riastrad { MB_TO_BYTES(64), MB_TO_BYTES(384), 4, VGPU_WEIGHT(8), GVT_EDID_1024_768, "8" }, 99 1.1 riastrad { MB_TO_BYTES(128), MB_TO_BYTES(512), 4, VGPU_WEIGHT(4), GVT_EDID_1920_1200, "4" }, 100 1.1 riastrad { MB_TO_BYTES(256), MB_TO_BYTES(1024), 4, VGPU_WEIGHT(2), GVT_EDID_1920_1200, "2" }, 101 1.1 riastrad { MB_TO_BYTES(512), MB_TO_BYTES(2048), 4, VGPU_WEIGHT(1), GVT_EDID_1920_1200, "1" }, 102 1.1 riastrad }; 103 1.1 riastrad 104 1.1 riastrad /** 105 1.1 riastrad * intel_gvt_init_vgpu_types - initialize vGPU type list 106 1.1 riastrad * @gvt : GVT device 107 1.1 riastrad * 108 1.1 riastrad * Initialize vGPU type list based on available resource. 109 1.1 riastrad * 110 1.1 riastrad */ 111 1.1 riastrad int intel_gvt_init_vgpu_types(struct intel_gvt *gvt) 112 1.1 riastrad { 113 1.1 riastrad unsigned int num_types; 114 1.1 riastrad unsigned int i, low_avail, high_avail; 115 1.1 riastrad unsigned int min_low; 116 1.1 riastrad 117 1.1 riastrad /* vGPU type name is defined as GVTg_Vx_y which contains 118 1.1 riastrad * physical GPU generation type (e.g V4 as BDW server, V5 as 119 1.1 riastrad * SKL server). 120 1.1 riastrad * 121 1.1 riastrad * Depend on physical SKU resource, might see vGPU types like 122 1.1 riastrad * GVTg_V4_8, GVTg_V4_4, GVTg_V4_2, etc. We can create 123 1.1 riastrad * different types of vGPU on same physical GPU depending on 124 1.1 riastrad * available resource. Each vGPU type will have "avail_instance" 125 1.1 riastrad * to indicate how many vGPU instance can be created for this 126 1.1 riastrad * type. 127 1.1 riastrad * 128 1.1 riastrad */ 129 1.1 riastrad low_avail = gvt_aperture_sz(gvt) - HOST_LOW_GM_SIZE; 130 1.1 riastrad high_avail = gvt_hidden_sz(gvt) - HOST_HIGH_GM_SIZE; 131 1.1 riastrad num_types = sizeof(vgpu_types) / sizeof(vgpu_types[0]); 132 1.1 riastrad 133 1.1 riastrad gvt->types = kcalloc(num_types, sizeof(struct intel_vgpu_type), 134 1.1 riastrad GFP_KERNEL); 135 1.1 riastrad if (!gvt->types) 136 1.1 riastrad return -ENOMEM; 137 1.1 riastrad 138 1.1 riastrad min_low = MB_TO_BYTES(32); 139 1.1 riastrad for (i = 0; i < num_types; ++i) { 140 1.1 riastrad if (low_avail / vgpu_types[i].low_mm == 0) 141 1.1 riastrad break; 142 1.1 riastrad 143 1.1 riastrad gvt->types[i].low_gm_size = vgpu_types[i].low_mm; 144 1.1 riastrad gvt->types[i].high_gm_size = vgpu_types[i].high_mm; 145 1.1 riastrad gvt->types[i].fence = vgpu_types[i].fence; 146 1.1 riastrad 147 1.1 riastrad if (vgpu_types[i].weight < 1 || 148 1.1 riastrad vgpu_types[i].weight > VGPU_MAX_WEIGHT) 149 1.1 riastrad return -EINVAL; 150 1.1 riastrad 151 1.1 riastrad gvt->types[i].weight = vgpu_types[i].weight; 152 1.1 riastrad gvt->types[i].resolution = vgpu_types[i].edid; 153 1.1 riastrad gvt->types[i].avail_instance = min(low_avail / vgpu_types[i].low_mm, 154 1.1 riastrad high_avail / vgpu_types[i].high_mm); 155 1.1 riastrad 156 1.1 riastrad if (IS_GEN(gvt->dev_priv, 8)) 157 1.1 riastrad sprintf(gvt->types[i].name, "GVTg_V4_%s", 158 1.1 riastrad vgpu_types[i].name); 159 1.1 riastrad else if (IS_GEN(gvt->dev_priv, 9)) 160 1.1 riastrad sprintf(gvt->types[i].name, "GVTg_V5_%s", 161 1.1 riastrad vgpu_types[i].name); 162 1.1 riastrad 163 1.1 riastrad gvt_dbg_core("type[%d]: %s avail %u low %u high %u fence %u weight %u res %s\n", 164 1.1 riastrad i, gvt->types[i].name, 165 1.1 riastrad gvt->types[i].avail_instance, 166 1.1 riastrad gvt->types[i].low_gm_size, 167 1.1 riastrad gvt->types[i].high_gm_size, gvt->types[i].fence, 168 1.1 riastrad gvt->types[i].weight, 169 1.1 riastrad vgpu_edid_str(gvt->types[i].resolution)); 170 1.1 riastrad } 171 1.1 riastrad 172 1.1 riastrad gvt->num_types = i; 173 1.1 riastrad return 0; 174 1.1 riastrad } 175 1.1 riastrad 176 1.1 riastrad void intel_gvt_clean_vgpu_types(struct intel_gvt *gvt) 177 1.1 riastrad { 178 1.1 riastrad kfree(gvt->types); 179 1.1 riastrad } 180 1.1 riastrad 181 1.1 riastrad static void intel_gvt_update_vgpu_types(struct intel_gvt *gvt) 182 1.1 riastrad { 183 1.1 riastrad int i; 184 1.1 riastrad unsigned int low_gm_avail, high_gm_avail, fence_avail; 185 1.1 riastrad unsigned int low_gm_min, high_gm_min, fence_min; 186 1.1 riastrad 187 1.1 riastrad /* Need to depend on maxium hw resource size but keep on 188 1.1 riastrad * static config for now. 189 1.1 riastrad */ 190 1.1 riastrad low_gm_avail = gvt_aperture_sz(gvt) - HOST_LOW_GM_SIZE - 191 1.1 riastrad gvt->gm.vgpu_allocated_low_gm_size; 192 1.1 riastrad high_gm_avail = gvt_hidden_sz(gvt) - HOST_HIGH_GM_SIZE - 193 1.1 riastrad gvt->gm.vgpu_allocated_high_gm_size; 194 1.1 riastrad fence_avail = gvt_fence_sz(gvt) - HOST_FENCE - 195 1.1 riastrad gvt->fence.vgpu_allocated_fence_num; 196 1.1 riastrad 197 1.1 riastrad for (i = 0; i < gvt->num_types; i++) { 198 1.1 riastrad low_gm_min = low_gm_avail / gvt->types[i].low_gm_size; 199 1.1 riastrad high_gm_min = high_gm_avail / gvt->types[i].high_gm_size; 200 1.1 riastrad fence_min = fence_avail / gvt->types[i].fence; 201 1.1 riastrad gvt->types[i].avail_instance = min(min(low_gm_min, high_gm_min), 202 1.1 riastrad fence_min); 203 1.1 riastrad 204 1.1 riastrad gvt_dbg_core("update type[%d]: %s avail %u low %u high %u fence %u\n", 205 1.1 riastrad i, gvt->types[i].name, 206 1.1 riastrad gvt->types[i].avail_instance, gvt->types[i].low_gm_size, 207 1.1 riastrad gvt->types[i].high_gm_size, gvt->types[i].fence); 208 1.1 riastrad } 209 1.1 riastrad } 210 1.1 riastrad 211 1.1 riastrad /** 212 1.1 riastrad * intel_gvt_active_vgpu - activate a virtual GPU 213 1.1 riastrad * @vgpu: virtual GPU 214 1.1 riastrad * 215 1.1 riastrad * This function is called when user wants to activate a virtual GPU. 216 1.1 riastrad * 217 1.1 riastrad */ 218 1.1 riastrad void intel_gvt_activate_vgpu(struct intel_vgpu *vgpu) 219 1.1 riastrad { 220 1.1 riastrad mutex_lock(&vgpu->vgpu_lock); 221 1.1 riastrad vgpu->active = true; 222 1.1 riastrad mutex_unlock(&vgpu->vgpu_lock); 223 1.1 riastrad } 224 1.1 riastrad 225 1.1 riastrad /** 226 1.1 riastrad * intel_gvt_deactive_vgpu - deactivate a virtual GPU 227 1.1 riastrad * @vgpu: virtual GPU 228 1.1 riastrad * 229 1.1 riastrad * This function is called when user wants to deactivate a virtual GPU. 230 1.1 riastrad * The virtual GPU will be stopped. 231 1.1 riastrad * 232 1.1 riastrad */ 233 1.1 riastrad void intel_gvt_deactivate_vgpu(struct intel_vgpu *vgpu) 234 1.1 riastrad { 235 1.1 riastrad mutex_lock(&vgpu->vgpu_lock); 236 1.1 riastrad 237 1.1 riastrad vgpu->active = false; 238 1.1 riastrad 239 1.1 riastrad if (atomic_read(&vgpu->submission.running_workload_num)) { 240 1.1 riastrad mutex_unlock(&vgpu->vgpu_lock); 241 1.1 riastrad intel_gvt_wait_vgpu_idle(vgpu); 242 1.1 riastrad mutex_lock(&vgpu->vgpu_lock); 243 1.1 riastrad } 244 1.1 riastrad 245 1.1 riastrad intel_vgpu_stop_schedule(vgpu); 246 1.1 riastrad 247 1.1 riastrad mutex_unlock(&vgpu->vgpu_lock); 248 1.1 riastrad } 249 1.1 riastrad 250 1.1 riastrad /** 251 1.1 riastrad * intel_gvt_release_vgpu - release a virtual GPU 252 1.1 riastrad * @vgpu: virtual GPU 253 1.1 riastrad * 254 1.1 riastrad * This function is called when user wants to release a virtual GPU. 255 1.1 riastrad * The virtual GPU will be stopped and all runtime information will be 256 1.1 riastrad * destroyed. 257 1.1 riastrad * 258 1.1 riastrad */ 259 1.1 riastrad void intel_gvt_release_vgpu(struct intel_vgpu *vgpu) 260 1.1 riastrad { 261 1.1 riastrad intel_gvt_deactivate_vgpu(vgpu); 262 1.1 riastrad 263 1.1 riastrad mutex_lock(&vgpu->vgpu_lock); 264 1.1 riastrad intel_vgpu_clean_workloads(vgpu, ALL_ENGINES); 265 1.1 riastrad intel_vgpu_dmabuf_cleanup(vgpu); 266 1.1 riastrad mutex_unlock(&vgpu->vgpu_lock); 267 1.1 riastrad } 268 1.1 riastrad 269 1.1 riastrad /** 270 1.1 riastrad * intel_gvt_destroy_vgpu - destroy a virtual GPU 271 1.1 riastrad * @vgpu: virtual GPU 272 1.1 riastrad * 273 1.1 riastrad * This function is called when user wants to destroy a virtual GPU. 274 1.1 riastrad * 275 1.1 riastrad */ 276 1.1 riastrad void intel_gvt_destroy_vgpu(struct intel_vgpu *vgpu) 277 1.1 riastrad { 278 1.1 riastrad struct intel_gvt *gvt = vgpu->gvt; 279 1.1 riastrad 280 1.1 riastrad mutex_lock(&vgpu->vgpu_lock); 281 1.1 riastrad 282 1.1 riastrad WARN(vgpu->active, "vGPU is still active!\n"); 283 1.1 riastrad 284 1.1 riastrad intel_gvt_debugfs_remove_vgpu(vgpu); 285 1.1 riastrad intel_vgpu_clean_sched_policy(vgpu); 286 1.1 riastrad intel_vgpu_clean_submission(vgpu); 287 1.1 riastrad intel_vgpu_clean_display(vgpu); 288 1.1 riastrad intel_vgpu_clean_opregion(vgpu); 289 1.1 riastrad intel_vgpu_reset_ggtt(vgpu, true); 290 1.1 riastrad intel_vgpu_clean_gtt(vgpu); 291 1.1 riastrad intel_gvt_hypervisor_detach_vgpu(vgpu); 292 1.1 riastrad intel_vgpu_free_resource(vgpu); 293 1.1 riastrad intel_vgpu_clean_mmio(vgpu); 294 1.1 riastrad intel_vgpu_dmabuf_cleanup(vgpu); 295 1.1 riastrad mutex_unlock(&vgpu->vgpu_lock); 296 1.1 riastrad 297 1.1 riastrad mutex_lock(&gvt->lock); 298 1.1 riastrad idr_remove(&gvt->vgpu_idr, vgpu->id); 299 1.1 riastrad if (idr_is_empty(&gvt->vgpu_idr)) 300 1.1 riastrad intel_gvt_clean_irq(gvt); 301 1.1 riastrad intel_gvt_update_vgpu_types(gvt); 302 1.1 riastrad mutex_unlock(&gvt->lock); 303 1.1 riastrad 304 1.1 riastrad vfree(vgpu); 305 1.1 riastrad } 306 1.1 riastrad 307 1.1 riastrad #define IDLE_VGPU_IDR 0 308 1.1 riastrad 309 1.1 riastrad /** 310 1.1 riastrad * intel_gvt_create_idle_vgpu - create an idle virtual GPU 311 1.1 riastrad * @gvt: GVT device 312 1.1 riastrad * 313 1.1 riastrad * This function is called when user wants to create an idle virtual GPU. 314 1.1 riastrad * 315 1.1 riastrad * Returns: 316 1.1 riastrad * pointer to intel_vgpu, error pointer if failed. 317 1.1 riastrad */ 318 1.1 riastrad struct intel_vgpu *intel_gvt_create_idle_vgpu(struct intel_gvt *gvt) 319 1.1 riastrad { 320 1.1 riastrad struct intel_vgpu *vgpu; 321 1.1 riastrad enum intel_engine_id i; 322 1.1 riastrad int ret; 323 1.1 riastrad 324 1.1 riastrad vgpu = vzalloc(sizeof(*vgpu)); 325 1.1 riastrad if (!vgpu) 326 1.1 riastrad return ERR_PTR(-ENOMEM); 327 1.1 riastrad 328 1.1 riastrad vgpu->id = IDLE_VGPU_IDR; 329 1.1 riastrad vgpu->gvt = gvt; 330 1.1 riastrad mutex_init(&vgpu->vgpu_lock); 331 1.1 riastrad 332 1.1 riastrad for (i = 0; i < I915_NUM_ENGINES; i++) 333 1.1 riastrad INIT_LIST_HEAD(&vgpu->submission.workload_q_head[i]); 334 1.1 riastrad 335 1.1 riastrad ret = intel_vgpu_init_sched_policy(vgpu); 336 1.1 riastrad if (ret) 337 1.1 riastrad goto out_free_vgpu; 338 1.1 riastrad 339 1.1 riastrad vgpu->active = false; 340 1.1 riastrad 341 1.1 riastrad return vgpu; 342 1.1 riastrad 343 1.1 riastrad out_free_vgpu: 344 1.1 riastrad vfree(vgpu); 345 1.1 riastrad return ERR_PTR(ret); 346 1.1 riastrad } 347 1.1 riastrad 348 1.1 riastrad /** 349 1.1 riastrad * intel_gvt_destroy_vgpu - destroy an idle virtual GPU 350 1.1 riastrad * @vgpu: virtual GPU 351 1.1 riastrad * 352 1.1 riastrad * This function is called when user wants to destroy an idle virtual GPU. 353 1.1 riastrad * 354 1.1 riastrad */ 355 1.1 riastrad void intel_gvt_destroy_idle_vgpu(struct intel_vgpu *vgpu) 356 1.1 riastrad { 357 1.1 riastrad mutex_lock(&vgpu->vgpu_lock); 358 1.1 riastrad intel_vgpu_clean_sched_policy(vgpu); 359 1.1 riastrad mutex_unlock(&vgpu->vgpu_lock); 360 1.1 riastrad 361 1.1 riastrad vfree(vgpu); 362 1.1 riastrad } 363 1.1 riastrad 364 1.1 riastrad static struct intel_vgpu *__intel_gvt_create_vgpu(struct intel_gvt *gvt, 365 1.1 riastrad struct intel_vgpu_creation_params *param) 366 1.1 riastrad { 367 1.1 riastrad struct intel_vgpu *vgpu; 368 1.1 riastrad int ret; 369 1.1 riastrad 370 1.1 riastrad gvt_dbg_core("handle %llu low %llu MB high %llu MB fence %llu\n", 371 1.1 riastrad param->handle, param->low_gm_sz, param->high_gm_sz, 372 1.1 riastrad param->fence_sz); 373 1.1 riastrad 374 1.1 riastrad vgpu = vzalloc(sizeof(*vgpu)); 375 1.1 riastrad if (!vgpu) 376 1.1 riastrad return ERR_PTR(-ENOMEM); 377 1.1 riastrad 378 1.3 riastrad idr_preload(GFP_KERNEL); 379 1.1 riastrad ret = idr_alloc(&gvt->vgpu_idr, vgpu, IDLE_VGPU_IDR + 1, GVT_MAX_VGPU, 380 1.1 riastrad GFP_KERNEL); 381 1.3 riastrad idr_preload_end(); 382 1.1 riastrad if (ret < 0) 383 1.1 riastrad goto out_free_vgpu; 384 1.1 riastrad 385 1.1 riastrad vgpu->id = ret; 386 1.1 riastrad vgpu->handle = param->handle; 387 1.1 riastrad vgpu->gvt = gvt; 388 1.1 riastrad vgpu->sched_ctl.weight = param->weight; 389 1.1 riastrad mutex_init(&vgpu->vgpu_lock); 390 1.1 riastrad mutex_init(&vgpu->dmabuf_lock); 391 1.1 riastrad INIT_LIST_HEAD(&vgpu->dmabuf_obj_list_head); 392 1.1 riastrad INIT_RADIX_TREE(&vgpu->page_track_tree, GFP_KERNEL); 393 1.1 riastrad idr_init(&vgpu->object_idr); 394 1.1 riastrad intel_vgpu_init_cfg_space(vgpu, param->primary); 395 1.1 riastrad 396 1.1 riastrad ret = intel_vgpu_init_mmio(vgpu); 397 1.1 riastrad if (ret) 398 1.1 riastrad goto out_clean_idr; 399 1.1 riastrad 400 1.1 riastrad ret = intel_vgpu_alloc_resource(vgpu, param); 401 1.1 riastrad if (ret) 402 1.1 riastrad goto out_clean_vgpu_mmio; 403 1.1 riastrad 404 1.1 riastrad populate_pvinfo_page(vgpu); 405 1.1 riastrad 406 1.1 riastrad ret = intel_gvt_hypervisor_attach_vgpu(vgpu); 407 1.1 riastrad if (ret) 408 1.1 riastrad goto out_clean_vgpu_resource; 409 1.1 riastrad 410 1.1 riastrad ret = intel_vgpu_init_gtt(vgpu); 411 1.1 riastrad if (ret) 412 1.1 riastrad goto out_detach_hypervisor_vgpu; 413 1.1 riastrad 414 1.1 riastrad ret = intel_vgpu_init_opregion(vgpu); 415 1.1 riastrad if (ret) 416 1.1 riastrad goto out_clean_gtt; 417 1.1 riastrad 418 1.1 riastrad ret = intel_vgpu_init_display(vgpu, param->resolution); 419 1.1 riastrad if (ret) 420 1.1 riastrad goto out_clean_opregion; 421 1.1 riastrad 422 1.1 riastrad ret = intel_vgpu_setup_submission(vgpu); 423 1.1 riastrad if (ret) 424 1.1 riastrad goto out_clean_display; 425 1.1 riastrad 426 1.1 riastrad ret = intel_vgpu_init_sched_policy(vgpu); 427 1.1 riastrad if (ret) 428 1.1 riastrad goto out_clean_submission; 429 1.1 riastrad 430 1.1 riastrad intel_gvt_debugfs_add_vgpu(vgpu); 431 1.1 riastrad 432 1.1 riastrad ret = intel_gvt_hypervisor_set_opregion(vgpu); 433 1.1 riastrad if (ret) 434 1.1 riastrad goto out_clean_sched_policy; 435 1.1 riastrad 436 1.1 riastrad /*TODO: add more platforms support */ 437 1.1 riastrad if (IS_SKYLAKE(gvt->dev_priv) || IS_KABYLAKE(gvt->dev_priv)) 438 1.1 riastrad ret = intel_gvt_hypervisor_set_edid(vgpu, PORT_D); 439 1.1 riastrad if (ret) 440 1.1 riastrad goto out_clean_sched_policy; 441 1.1 riastrad 442 1.1 riastrad return vgpu; 443 1.1 riastrad 444 1.1 riastrad out_clean_sched_policy: 445 1.1 riastrad intel_vgpu_clean_sched_policy(vgpu); 446 1.1 riastrad out_clean_submission: 447 1.1 riastrad intel_vgpu_clean_submission(vgpu); 448 1.1 riastrad out_clean_display: 449 1.1 riastrad intel_vgpu_clean_display(vgpu); 450 1.1 riastrad out_clean_opregion: 451 1.1 riastrad intel_vgpu_clean_opregion(vgpu); 452 1.1 riastrad out_clean_gtt: 453 1.1 riastrad intel_vgpu_clean_gtt(vgpu); 454 1.1 riastrad out_detach_hypervisor_vgpu: 455 1.1 riastrad intel_gvt_hypervisor_detach_vgpu(vgpu); 456 1.1 riastrad out_clean_vgpu_resource: 457 1.1 riastrad intel_vgpu_free_resource(vgpu); 458 1.1 riastrad out_clean_vgpu_mmio: 459 1.1 riastrad intel_vgpu_clean_mmio(vgpu); 460 1.1 riastrad out_clean_idr: 461 1.1 riastrad idr_remove(&gvt->vgpu_idr, vgpu->id); 462 1.1 riastrad out_free_vgpu: 463 1.1 riastrad vfree(vgpu); 464 1.1 riastrad return ERR_PTR(ret); 465 1.1 riastrad } 466 1.1 riastrad 467 1.1 riastrad /** 468 1.1 riastrad * intel_gvt_create_vgpu - create a virtual GPU 469 1.1 riastrad * @gvt: GVT device 470 1.1 riastrad * @type: type of the vGPU to create 471 1.1 riastrad * 472 1.1 riastrad * This function is called when user wants to create a virtual GPU. 473 1.1 riastrad * 474 1.1 riastrad * Returns: 475 1.1 riastrad * pointer to intel_vgpu, error pointer if failed. 476 1.1 riastrad */ 477 1.1 riastrad struct intel_vgpu *intel_gvt_create_vgpu(struct intel_gvt *gvt, 478 1.1 riastrad struct intel_vgpu_type *type) 479 1.1 riastrad { 480 1.1 riastrad struct intel_vgpu_creation_params param; 481 1.1 riastrad struct intel_vgpu *vgpu; 482 1.1 riastrad 483 1.1 riastrad param.handle = 0; 484 1.1 riastrad param.primary = 1; 485 1.1 riastrad param.low_gm_sz = type->low_gm_size; 486 1.1 riastrad param.high_gm_sz = type->high_gm_size; 487 1.1 riastrad param.fence_sz = type->fence; 488 1.1 riastrad param.weight = type->weight; 489 1.1 riastrad param.resolution = type->resolution; 490 1.1 riastrad 491 1.1 riastrad /* XXX current param based on MB */ 492 1.1 riastrad param.low_gm_sz = BYTES_TO_MB(param.low_gm_sz); 493 1.1 riastrad param.high_gm_sz = BYTES_TO_MB(param.high_gm_sz); 494 1.1 riastrad 495 1.1 riastrad mutex_lock(&gvt->lock); 496 1.1 riastrad vgpu = __intel_gvt_create_vgpu(gvt, ¶m); 497 1.1 riastrad if (!IS_ERR(vgpu)) 498 1.1 riastrad /* calculate left instance change for types */ 499 1.1 riastrad intel_gvt_update_vgpu_types(gvt); 500 1.1 riastrad mutex_unlock(&gvt->lock); 501 1.1 riastrad 502 1.1 riastrad return vgpu; 503 1.1 riastrad } 504 1.1 riastrad 505 1.1 riastrad /** 506 1.1 riastrad * intel_gvt_reset_vgpu_locked - reset a virtual GPU by DMLR or GT reset 507 1.1 riastrad * @vgpu: virtual GPU 508 1.1 riastrad * @dmlr: vGPU Device Model Level Reset or GT Reset 509 1.1 riastrad * @engine_mask: engines to reset for GT reset 510 1.1 riastrad * 511 1.1 riastrad * This function is called when user wants to reset a virtual GPU through 512 1.1 riastrad * device model reset or GT reset. The caller should hold the vgpu lock. 513 1.1 riastrad * 514 1.1 riastrad * vGPU Device Model Level Reset (DMLR) simulates the PCI level reset to reset 515 1.1 riastrad * the whole vGPU to default state as when it is created. This vGPU function 516 1.1 riastrad * is required both for functionary and security concerns.The ultimate goal 517 1.1 riastrad * of vGPU FLR is that reuse a vGPU instance by virtual machines. When we 518 1.1 riastrad * assign a vGPU to a virtual machine we must isse such reset first. 519 1.1 riastrad * 520 1.1 riastrad * Full GT Reset and Per-Engine GT Reset are soft reset flow for GPU engines 521 1.1 riastrad * (Render, Blitter, Video, Video Enhancement). It is defined by GPU Spec. 522 1.1 riastrad * Unlike the FLR, GT reset only reset particular resource of a vGPU per 523 1.1 riastrad * the reset request. Guest driver can issue a GT reset by programming the 524 1.1 riastrad * virtual GDRST register to reset specific virtual GPU engine or all 525 1.1 riastrad * engines. 526 1.1 riastrad * 527 1.1 riastrad * The parameter dev_level is to identify if we will do DMLR or GT reset. 528 1.1 riastrad * The parameter engine_mask is to specific the engines that need to be 529 1.1 riastrad * resetted. If value ALL_ENGINES is given for engine_mask, it means 530 1.1 riastrad * the caller requests a full GT reset that we will reset all virtual 531 1.1 riastrad * GPU engines. For FLR, engine_mask is ignored. 532 1.1 riastrad */ 533 1.1 riastrad void intel_gvt_reset_vgpu_locked(struct intel_vgpu *vgpu, bool dmlr, 534 1.1 riastrad intel_engine_mask_t engine_mask) 535 1.1 riastrad { 536 1.1 riastrad struct intel_gvt *gvt = vgpu->gvt; 537 1.1 riastrad struct intel_gvt_workload_scheduler *scheduler = &gvt->scheduler; 538 1.1 riastrad intel_engine_mask_t resetting_eng = dmlr ? ALL_ENGINES : engine_mask; 539 1.1 riastrad 540 1.1 riastrad gvt_dbg_core("------------------------------------------\n"); 541 1.1 riastrad gvt_dbg_core("resseting vgpu%d, dmlr %d, engine_mask %08x\n", 542 1.1 riastrad vgpu->id, dmlr, engine_mask); 543 1.1 riastrad 544 1.1 riastrad vgpu->resetting_eng = resetting_eng; 545 1.1 riastrad 546 1.1 riastrad intel_vgpu_stop_schedule(vgpu); 547 1.1 riastrad /* 548 1.1 riastrad * The current_vgpu will set to NULL after stopping the 549 1.1 riastrad * scheduler when the reset is triggered by current vgpu. 550 1.1 riastrad */ 551 1.1 riastrad if (scheduler->current_vgpu == NULL) { 552 1.1 riastrad mutex_unlock(&vgpu->vgpu_lock); 553 1.1 riastrad intel_gvt_wait_vgpu_idle(vgpu); 554 1.1 riastrad mutex_lock(&vgpu->vgpu_lock); 555 1.1 riastrad } 556 1.1 riastrad 557 1.1 riastrad intel_vgpu_reset_submission(vgpu, resetting_eng); 558 1.1 riastrad /* full GPU reset or device model level reset */ 559 1.1 riastrad if (engine_mask == ALL_ENGINES || dmlr) { 560 1.1 riastrad intel_vgpu_select_submission_ops(vgpu, ALL_ENGINES, 0); 561 1.1 riastrad intel_vgpu_invalidate_ppgtt(vgpu); 562 1.1 riastrad /*fence will not be reset during virtual reset */ 563 1.1 riastrad if (dmlr) { 564 1.1 riastrad intel_vgpu_reset_gtt(vgpu); 565 1.1 riastrad intel_vgpu_reset_resource(vgpu); 566 1.1 riastrad } 567 1.1 riastrad 568 1.1 riastrad intel_vgpu_reset_mmio(vgpu, dmlr); 569 1.1 riastrad populate_pvinfo_page(vgpu); 570 1.1 riastrad intel_vgpu_reset_display(vgpu); 571 1.1 riastrad 572 1.1 riastrad if (dmlr) { 573 1.1 riastrad intel_vgpu_reset_cfg_space(vgpu); 574 1.1 riastrad /* only reset the failsafe mode when dmlr reset */ 575 1.1 riastrad vgpu->failsafe = false; 576 1.1 riastrad vgpu->pv_notified = false; 577 1.1 riastrad } 578 1.1 riastrad } 579 1.1 riastrad 580 1.1 riastrad vgpu->resetting_eng = 0; 581 1.1 riastrad gvt_dbg_core("reset vgpu%d done\n", vgpu->id); 582 1.1 riastrad gvt_dbg_core("------------------------------------------\n"); 583 1.1 riastrad } 584 1.1 riastrad 585 1.1 riastrad /** 586 1.1 riastrad * intel_gvt_reset_vgpu - reset a virtual GPU (Function Level) 587 1.1 riastrad * @vgpu: virtual GPU 588 1.1 riastrad * 589 1.1 riastrad * This function is called when user wants to reset a virtual GPU. 590 1.1 riastrad * 591 1.1 riastrad */ 592 1.1 riastrad void intel_gvt_reset_vgpu(struct intel_vgpu *vgpu) 593 1.1 riastrad { 594 1.1 riastrad mutex_lock(&vgpu->vgpu_lock); 595 1.1 riastrad intel_gvt_reset_vgpu_locked(vgpu, true, 0); 596 1.1 riastrad mutex_unlock(&vgpu->vgpu_lock); 597 1.1 riastrad } 598