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i915_gem_gtt.c revision 1.20
      1 /*	$NetBSD: i915_gem_gtt.c,v 1.20 2021/12/19 01:24:25 riastradh Exp $	*/
      2 
      3 // SPDX-License-Identifier: MIT
      4 /*
      5  * Copyright  2010 Daniel Vetter
      6  * Copyright  2020 Intel Corporation
      7  */
      8 
      9 #include <sys/cdefs.h>
     10 __KERNEL_RCSID(0, "$NetBSD: i915_gem_gtt.c,v 1.20 2021/12/19 01:24:25 riastradh Exp $");
     11 
     12 #include <linux/slab.h> /* fault-inject.h is not standalone! */
     13 
     14 #include <linux/fault-inject.h>
     15 #include <linux/log2.h>
     16 #include <linux/random.h>
     17 #include <linux/seq_file.h>
     18 #include <linux/stop_machine.h>
     19 
     20 #include <asm/set_memory.h>
     21 #include <asm/smp.h>
     22 
     23 #include <drm/i915_drm.h>
     24 
     25 #include "display/intel_frontbuffer.h"
     26 #include "gt/intel_gt.h"
     27 #include "gt/intel_gt_requests.h"
     28 
     29 #include "i915_drv.h"
     30 #include "i915_scatterlist.h"
     31 #include "i915_trace.h"
     32 #include "i915_vgpu.h"
     33 
     34 #ifdef __NetBSD__
     35 #include <drm/bus_dma_hacks.h>
     36 #include <x86/machdep.h>
     37 #include <x86/pte.h>
     38 #define	_PAGE_PRESENT	PTE_P	/* 0x01 PTE is present */
     39 #define	_PAGE_RW	PTE_W	/* 0x02 read/write */
     40 #define	_PAGE_PWT	PTE_PWT	/* 0x08 page write-through */
     41 #define	_PAGE_PCD	PTE_PCD	/* 0x10 page cache disabled */
     42 #define	_PAGE_PAT	PTE_PAT	/* 0x80 page attribute table on PTE */
     43 #endif
     44 
     45 #ifdef __NetBSD__
     46 int i915_gem_gtt_prepare_pages(struct drm_i915_gem_object *obj,
     47 			       bus_dmamap_t pages)
     48 #else
     49 int i915_gem_gtt_prepare_pages(struct drm_i915_gem_object *obj,
     50 			       struct sg_table *pages)
     51 #endif
     52 {
     53 	do {
     54 #ifdef __NetBSD__
     55 		/*
     56 		 * XXX Not sure whether caller should be passing DMA
     57 		 * map or page list.
     58 		 */
     59 		if (bus_dmamap_load_pglist(obj->base.dev->dmat, pages,
     60 			&obj->pageq, pages->dm_mapsize, BUS_DMA_NOWAIT) == 0)
     61 			return 0;
     62 #else
     63 		if (dma_map_sg_attrs(&obj->base.dev->pdev->dev,
     64 				     pages->sgl, pages->nents,
     65 				     PCI_DMA_BIDIRECTIONAL,
     66 				     DMA_ATTR_NO_WARN))
     67 			return 0;
     68 #endif
     69 
     70 		/*
     71 		 * If the DMA remap fails, one cause can be that we have
     72 		 * too many objects pinned in a small remapping table,
     73 		 * such as swiotlb. Incrementally purge all other objects and
     74 		 * try again - if there are no more pages to remove from
     75 		 * the DMA remapper, i915_gem_shrink will return 0.
     76 		 */
     77 		GEM_BUG_ON(obj->mm.pages == pages);
     78 	} while (i915_gem_shrink(to_i915(obj->base.dev),
     79 				 obj->base.size >> PAGE_SHIFT, NULL,
     80 				 I915_SHRINK_BOUND |
     81 				 I915_SHRINK_UNBOUND));
     82 
     83 	return -ENOSPC;
     84 }
     85 
     86 #ifdef __NetBSD__
     87 void i915_gem_gtt_finish_pages(struct drm_i915_gem_object *obj,
     88 			       bus_dmamap_t pages)
     89 #else
     90 void i915_gem_gtt_finish_pages(struct drm_i915_gem_object *obj,
     91 			       struct sg_table *pages)
     92 #endif
     93 {
     94 	struct drm_i915_private *dev_priv = to_i915(obj->base.dev);
     95 #ifdef __NetBSD__
     96 	bus_dma_tag_t dmat = dev_priv->drm.dev->dmat;
     97 #else
     98 	struct device *kdev = &dev_priv->drm.pdev->dev;
     99 #endif
    100 	struct i915_ggtt *ggtt = &dev_priv->ggtt;
    101 
    102 	if (unlikely(ggtt->do_idle_maps)) {
    103 		/* XXX This does not prevent more requests being submitted! */
    104 		if (intel_gt_retire_requests_timeout(ggtt->vm.gt,
    105 						     -MAX_SCHEDULE_TIMEOUT)) {
    106 			DRM_ERROR("Failed to wait for idle; VT'd may hang.\n");
    107 			/* Wait a bit, in hopes it avoids the hang */
    108 			udelay(10);
    109 		}
    110 	}
    111 
    112 #ifdef __NetBSD__
    113 	bus_dmamap_unload(dmat, pages);
    114 #else
    115 	dma_unmap_sg(kdev, pages->sgl, pages->nents, PCI_DMA_BIDIRECTIONAL);
    116 #endif
    117 }
    118 
    119 /**
    120  * i915_gem_gtt_reserve - reserve a node in an address_space (GTT)
    121  * @vm: the &struct i915_address_space
    122  * @node: the &struct drm_mm_node (typically i915_vma.mode)
    123  * @size: how much space to allocate inside the GTT,
    124  *        must be #I915_GTT_PAGE_SIZE aligned
    125  * @offset: where to insert inside the GTT,
    126  *          must be #I915_GTT_MIN_ALIGNMENT aligned, and the node
    127  *          (@offset + @size) must fit within the address space
    128  * @color: color to apply to node, if this node is not from a VMA,
    129  *         color must be #I915_COLOR_UNEVICTABLE
    130  * @flags: control search and eviction behaviour
    131  *
    132  * i915_gem_gtt_reserve() tries to insert the @node at the exact @offset inside
    133  * the address space (using @size and @color). If the @node does not fit, it
    134  * tries to evict any overlapping nodes from the GTT, including any
    135  * neighbouring nodes if the colors do not match (to ensure guard pages between
    136  * differing domains). See i915_gem_evict_for_node() for the gory details
    137  * on the eviction algorithm. #PIN_NONBLOCK may used to prevent waiting on
    138  * evicting active overlapping objects, and any overlapping node that is pinned
    139  * or marked as unevictable will also result in failure.
    140  *
    141  * Returns: 0 on success, -ENOSPC if no suitable hole is found, -EINTR if
    142  * asked to wait for eviction and interrupted.
    143  */
    144 int i915_gem_gtt_reserve(struct i915_address_space *vm,
    145 			 struct drm_mm_node *node,
    146 			 u64 size, u64 offset, unsigned long color,
    147 			 unsigned int flags)
    148 {
    149 	int err;
    150 
    151 	GEM_BUG_ON(!size);
    152 	GEM_BUG_ON(!IS_ALIGNED(size, I915_GTT_PAGE_SIZE));
    153 	GEM_BUG_ON(!IS_ALIGNED(offset, I915_GTT_MIN_ALIGNMENT));
    154 	GEM_BUG_ON(range_overflows(offset, size, vm->total));
    155 	GEM_BUG_ON(vm == &vm->i915->ggtt.alias->vm);
    156 	GEM_BUG_ON(drm_mm_node_allocated(node));
    157 
    158 	node->size = size;
    159 	node->start = offset;
    160 	node->color = color;
    161 
    162 	err = drm_mm_reserve_node(&vm->mm, node);
    163 	if (err != -ENOSPC)
    164 		return err;
    165 
    166 	if (flags & PIN_NOEVICT)
    167 		return -ENOSPC;
    168 
    169 	err = i915_gem_evict_for_node(vm, node, flags);
    170 	if (err == 0)
    171 		err = drm_mm_reserve_node(&vm->mm, node);
    172 
    173 	return err;
    174 }
    175 
    176 static u64 random_offset(u64 start, u64 end, u64 len, u64 align)
    177 {
    178 	u64 range, addr;
    179 
    180 	GEM_BUG_ON(range_overflows(start, len, end));
    181 	GEM_BUG_ON(round_up(start, align) > round_down(end - len, align));
    182 
    183 	range = round_down(end - len, align) - round_up(start, align);
    184 	if (range) {
    185 		if (sizeof(unsigned long) == sizeof(u64)) {
    186 			addr = get_random_long();
    187 		} else {
    188 			addr = get_random_int();
    189 			if (range > U32_MAX) {
    190 				addr <<= 32;
    191 				addr |= get_random_int();
    192 			}
    193 		}
    194 		div64_u64_rem(addr, range, &addr);
    195 		start += addr;
    196 	}
    197 
    198 	return round_up(start, align);
    199 }
    200 
    201 /**
    202  * i915_gem_gtt_insert - insert a node into an address_space (GTT)
    203  * @vm: the &struct i915_address_space
    204  * @node: the &struct drm_mm_node (typically i915_vma.node)
    205  * @size: how much space to allocate inside the GTT,
    206  *        must be #I915_GTT_PAGE_SIZE aligned
    207  * @alignment: required alignment of starting offset, may be 0 but
    208  *             if specified, this must be a power-of-two and at least
    209  *             #I915_GTT_MIN_ALIGNMENT
    210  * @color: color to apply to node
    211  * @start: start of any range restriction inside GTT (0 for all),
    212  *         must be #I915_GTT_PAGE_SIZE aligned
    213  * @end: end of any range restriction inside GTT (U64_MAX for all),
    214  *       must be #I915_GTT_PAGE_SIZE aligned if not U64_MAX
    215  * @flags: control search and eviction behaviour
    216  *
    217  * i915_gem_gtt_insert() first searches for an available hole into which
    218  * is can insert the node. The hole address is aligned to @alignment and
    219  * its @size must then fit entirely within the [@start, @end] bounds. The
    220  * nodes on either side of the hole must match @color, or else a guard page
    221  * will be inserted between the two nodes (or the node evicted). If no
    222  * suitable hole is found, first a victim is randomly selected and tested
    223  * for eviction, otherwise then the LRU list of objects within the GTT
    224  * is scanned to find the first set of replacement nodes to create the hole.
    225  * Those old overlapping nodes are evicted from the GTT (and so must be
    226  * rebound before any future use). Any node that is currently pinned cannot
    227  * be evicted (see i915_vma_pin()). Similar if the node's VMA is currently
    228  * active and #PIN_NONBLOCK is specified, that node is also skipped when
    229  * searching for an eviction candidate. See i915_gem_evict_something() for
    230  * the gory details on the eviction algorithm.
    231  *
    232  * Returns: 0 on success, -ENOSPC if no suitable hole is found, -EINTR if
    233  * asked to wait for eviction and interrupted.
    234  */
    235 int i915_gem_gtt_insert(struct i915_address_space *vm,
    236 			struct drm_mm_node *node,
    237 			u64 size, u64 alignment, unsigned long color,
    238 			u64 start, u64 end, unsigned int flags)
    239 {
    240 	enum drm_mm_insert_mode mode;
    241 	u64 offset;
    242 	int err;
    243 
    244 	lockdep_assert_held(&vm->mutex);
    245 
    246 	GEM_BUG_ON(!size);
    247 	GEM_BUG_ON(!IS_ALIGNED(size, I915_GTT_PAGE_SIZE));
    248 	GEM_BUG_ON(alignment && !is_power_of_2(alignment));
    249 	GEM_BUG_ON(alignment && !IS_ALIGNED(alignment, I915_GTT_MIN_ALIGNMENT));
    250 	GEM_BUG_ON(start >= end);
    251 	GEM_BUG_ON(start > 0  && !IS_ALIGNED(start, I915_GTT_PAGE_SIZE));
    252 	GEM_BUG_ON(end < U64_MAX && !IS_ALIGNED(end, I915_GTT_PAGE_SIZE));
    253 	GEM_BUG_ON(vm == &vm->i915->ggtt.alias->vm);
    254 	GEM_BUG_ON(drm_mm_node_allocated(node));
    255 
    256 	if (unlikely(range_overflows(start, size, end)))
    257 		return -ENOSPC;
    258 
    259 	if (unlikely(round_up(start, alignment) > round_down(end - size, alignment)))
    260 		return -ENOSPC;
    261 
    262 	mode = DRM_MM_INSERT_BEST;
    263 	if (flags & PIN_HIGH)
    264 		mode = DRM_MM_INSERT_HIGHEST;
    265 	if (flags & PIN_MAPPABLE)
    266 		mode = DRM_MM_INSERT_LOW;
    267 
    268 	/* We only allocate in PAGE_SIZE/GTT_PAGE_SIZE (4096) chunks,
    269 	 * so we know that we always have a minimum alignment of 4096.
    270 	 * The drm_mm range manager is optimised to return results
    271 	 * with zero alignment, so where possible use the optimal
    272 	 * path.
    273 	 */
    274 	BUILD_BUG_ON(I915_GTT_MIN_ALIGNMENT > I915_GTT_PAGE_SIZE);
    275 	if (alignment <= I915_GTT_MIN_ALIGNMENT)
    276 		alignment = 0;
    277 
    278 	err = drm_mm_insert_node_in_range(&vm->mm, node,
    279 					  size, alignment, color,
    280 					  start, end, mode);
    281 	if (err != -ENOSPC)
    282 		return err;
    283 
    284 	if (mode & DRM_MM_INSERT_ONCE) {
    285 		err = drm_mm_insert_node_in_range(&vm->mm, node,
    286 						  size, alignment, color,
    287 						  start, end,
    288 						  DRM_MM_INSERT_BEST);
    289 		if (err != -ENOSPC)
    290 			return err;
    291 	}
    292 
    293 	if (flags & PIN_NOEVICT)
    294 		return -ENOSPC;
    295 
    296 	/*
    297 	 * No free space, pick a slot at random.
    298 	 *
    299 	 * There is a pathological case here using a GTT shared between
    300 	 * mmap and GPU (i.e. ggtt/aliasing_ppgtt but not full-ppgtt):
    301 	 *
    302 	 *    |<-- 256 MiB aperture -->||<-- 1792 MiB unmappable -->|
    303 	 *         (64k objects)             (448k objects)
    304 	 *
    305 	 * Now imagine that the eviction LRU is ordered top-down (just because
    306 	 * pathology meets real life), and that we need to evict an object to
    307 	 * make room inside the aperture. The eviction scan then has to walk
    308 	 * the 448k list before it finds one within range. And now imagine that
    309 	 * it has to search for a new hole between every byte inside the memcpy,
    310 	 * for several simultaneous clients.
    311 	 *
    312 	 * On a full-ppgtt system, if we have run out of available space, there
    313 	 * will be lots and lots of objects in the eviction list! Again,
    314 	 * searching that LRU list may be slow if we are also applying any
    315 	 * range restrictions (e.g. restriction to low 4GiB) and so, for
    316 	 * simplicity and similarilty between different GTT, try the single
    317 	 * random replacement first.
    318 	 */
    319 	offset = random_offset(start, end,
    320 			       size, alignment ?: I915_GTT_MIN_ALIGNMENT);
    321 	err = i915_gem_gtt_reserve(vm, node, size, offset, color, flags);
    322 	if (err != -ENOSPC)
    323 		return err;
    324 
    325 	if (flags & PIN_NOSEARCH)
    326 		return -ENOSPC;
    327 
    328 	/* Randomly selected placement is pinned, do a search */
    329 	err = i915_gem_evict_something(vm, size, alignment, color,
    330 				       start, end, flags);
    331 	if (err)
    332 		return err;
    333 
    334 	return drm_mm_insert_node_in_range(&vm->mm, node,
    335 					   size, alignment, color,
    336 					   start, end, DRM_MM_INSERT_EVICT);
    337 }
    338 
    339 #if IS_ENABLED(CONFIG_DRM_I915_SELFTEST)
    340 #include "selftests/i915_gem_gtt.c"
    341 #endif
    342