intel_sideband.h revision 1.2 1 /* $NetBSD: intel_sideband.h,v 1.2 2021/12/18 23:45:29 riastradh Exp $ */
2
3 /* SPDX-License-Identifier: MIT */
4
5 #ifndef _INTEL_SIDEBAND_H_
6 #define _INTEL_SIDEBAND_H_
7
8 #include <linux/bitops.h>
9 #include <linux/types.h>
10
11 struct drm_i915_private;
12 enum pipe;
13
14 enum intel_sbi_destination {
15 SBI_ICLK,
16 SBI_MPHY,
17 };
18
19 enum {
20 VLV_IOSF_SB_BUNIT,
21 VLV_IOSF_SB_CCK,
22 VLV_IOSF_SB_CCU,
23 VLV_IOSF_SB_DPIO,
24 VLV_IOSF_SB_FLISDSI,
25 VLV_IOSF_SB_GPIO,
26 VLV_IOSF_SB_NC,
27 VLV_IOSF_SB_PUNIT,
28 };
29
30 void vlv_iosf_sb_get(struct drm_i915_private *i915, unsigned long ports);
31 u32 vlv_iosf_sb_read(struct drm_i915_private *i915, u8 port, u32 reg);
32 void vlv_iosf_sb_write(struct drm_i915_private *i915,
33 u8 port, u32 reg, u32 val);
34 void vlv_iosf_sb_put(struct drm_i915_private *i915, unsigned long ports);
35
36 static inline void vlv_bunit_get(struct drm_i915_private *i915)
37 {
38 vlv_iosf_sb_get(i915, BIT(VLV_IOSF_SB_BUNIT));
39 }
40
41 u32 vlv_bunit_read(struct drm_i915_private *i915, u32 reg);
42 void vlv_bunit_write(struct drm_i915_private *i915, u32 reg, u32 val);
43
44 static inline void vlv_bunit_put(struct drm_i915_private *i915)
45 {
46 vlv_iosf_sb_put(i915, BIT(VLV_IOSF_SB_BUNIT));
47 }
48
49 static inline void vlv_cck_get(struct drm_i915_private *i915)
50 {
51 vlv_iosf_sb_get(i915, BIT(VLV_IOSF_SB_CCK));
52 }
53
54 u32 vlv_cck_read(struct drm_i915_private *i915, u32 reg);
55 void vlv_cck_write(struct drm_i915_private *i915, u32 reg, u32 val);
56
57 static inline void vlv_cck_put(struct drm_i915_private *i915)
58 {
59 vlv_iosf_sb_put(i915, BIT(VLV_IOSF_SB_CCK));
60 }
61
62 static inline void vlv_ccu_get(struct drm_i915_private *i915)
63 {
64 vlv_iosf_sb_get(i915, BIT(VLV_IOSF_SB_CCU));
65 }
66
67 u32 vlv_ccu_read(struct drm_i915_private *i915, u32 reg);
68 void vlv_ccu_write(struct drm_i915_private *i915, u32 reg, u32 val);
69
70 static inline void vlv_ccu_put(struct drm_i915_private *i915)
71 {
72 vlv_iosf_sb_put(i915, BIT(VLV_IOSF_SB_CCU));
73 }
74
75 static inline void vlv_dpio_get(struct drm_i915_private *i915)
76 {
77 vlv_iosf_sb_get(i915, BIT(VLV_IOSF_SB_DPIO));
78 }
79
80 u32 vlv_dpio_read(struct drm_i915_private *i915, enum pipe pipe, int reg);
81 void vlv_dpio_write(struct drm_i915_private *i915,
82 enum pipe pipe, int reg, u32 val);
83
84 static inline void vlv_dpio_put(struct drm_i915_private *i915)
85 {
86 vlv_iosf_sb_put(i915, BIT(VLV_IOSF_SB_DPIO));
87 }
88
89 static inline void vlv_flisdsi_get(struct drm_i915_private *i915)
90 {
91 vlv_iosf_sb_get(i915, BIT(VLV_IOSF_SB_FLISDSI));
92 }
93
94 u32 vlv_flisdsi_read(struct drm_i915_private *i915, u32 reg);
95 void vlv_flisdsi_write(struct drm_i915_private *i915, u32 reg, u32 val);
96
97 static inline void vlv_flisdsi_put(struct drm_i915_private *i915)
98 {
99 vlv_iosf_sb_put(i915, BIT(VLV_IOSF_SB_FLISDSI));
100 }
101
102 static inline void vlv_nc_get(struct drm_i915_private *i915)
103 {
104 vlv_iosf_sb_get(i915, BIT(VLV_IOSF_SB_NC));
105 }
106
107 u32 vlv_nc_read(struct drm_i915_private *i915, u8 addr);
108
109 static inline void vlv_nc_put(struct drm_i915_private *i915)
110 {
111 vlv_iosf_sb_put(i915, BIT(VLV_IOSF_SB_NC));
112 }
113
114 static inline void vlv_punit_get(struct drm_i915_private *i915)
115 {
116 vlv_iosf_sb_get(i915, BIT(VLV_IOSF_SB_PUNIT));
117 }
118
119 u32 vlv_punit_read(struct drm_i915_private *i915, u32 addr);
120 int vlv_punit_write(struct drm_i915_private *i915, u32 addr, u32 val);
121
122 static inline void vlv_punit_put(struct drm_i915_private *i915)
123 {
124 vlv_iosf_sb_put(i915, BIT(VLV_IOSF_SB_PUNIT));
125 }
126
127 u32 intel_sbi_read(struct drm_i915_private *i915, u16 reg,
128 enum intel_sbi_destination destination);
129 void intel_sbi_write(struct drm_i915_private *i915, u16 reg, u32 value,
130 enum intel_sbi_destination destination);
131
132 int sandybridge_pcode_read(struct drm_i915_private *i915, u32 mbox,
133 u32 *val, u32 *val1);
134 int sandybridge_pcode_write_timeout(struct drm_i915_private *i915, u32 mbox,
135 u32 val, int fast_timeout_us,
136 int slow_timeout_ms);
137 #define sandybridge_pcode_write(i915, mbox, val) \
138 sandybridge_pcode_write_timeout(i915, mbox, val, 500, 0)
139
140 int skl_pcode_request(struct drm_i915_private *i915, u32 mbox, u32 request,
141 u32 reply_mask, u32 reply, int timeout_base_ms);
142
143 #endif /* _INTEL_SIDEBAND_H */
144