nouveau_bios.c revision 1.1.1.2.8.1
1 /* $NetBSD: nouveau_bios.c,v 1.1.1.2.8.1 2016/03/19 11:30:29 skrll Exp $ */ 2 3 /* 4 * Copyright 2005-2006 Erik Waling 5 * Copyright 2006 Stephane Marchesin 6 * Copyright 2007-2009 Stuart Bennett 7 * 8 * Permission is hereby granted, free of charge, to any person obtaining a 9 * copy of this software and associated documentation files (the "Software"), 10 * to deal in the Software without restriction, including without limitation 11 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 12 * and/or sell copies of the Software, and to permit persons to whom the 13 * Software is furnished to do so, subject to the following conditions: 14 * 15 * The above copyright notice and this permission notice shall be included in 16 * all copies or substantial portions of the Software. 17 * 18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 20 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 21 * THE AUTHORS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, 22 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF 23 * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 24 * SOFTWARE. 25 */ 26 27 #include <sys/cdefs.h> 28 __KERNEL_RCSID(0, "$NetBSD: nouveau_bios.c,v 1.1.1.2.8.1 2016/03/19 11:30:29 skrll Exp $"); 29 30 #include <subdev/bios.h> 31 32 #include <drm/drmP.h> 33 34 #include "nouveau_drm.h" 35 #include "nouveau_reg.h" 36 #include "dispnv04/hw.h" 37 #include "nouveau_encoder.h" 38 39 #include <linux/io-mapping.h> 40 #include <linux/firmware.h> 41 42 /* these defines are made up */ 43 #define NV_CIO_CRE_44_HEADA 0x0 44 #define NV_CIO_CRE_44_HEADB 0x3 45 #define FEATURE_MOBILE 0x10 /* also FEATURE_QUADRO for BMP */ 46 47 #define EDID1_LEN 128 48 49 #define BIOSLOG(sip, fmt, arg...) NV_DEBUG(sip->dev, fmt, ##arg) 50 #define LOG_OLD_VALUE(x) 51 52 struct init_exec { 53 bool execute; 54 bool repeat; 55 }; 56 57 static bool nv_cksum(const uint8_t *data, unsigned int length) 58 { 59 /* 60 * There's a few checksums in the BIOS, so here's a generic checking 61 * function. 62 */ 63 int i; 64 uint8_t sum = 0; 65 66 for (i = 0; i < length; i++) 67 sum += data[i]; 68 69 if (sum) 70 return true; 71 72 return false; 73 } 74 75 static uint16_t clkcmptable(struct nvbios *bios, uint16_t clktable, int pxclk) 76 { 77 int compare_record_len, i = 0; 78 uint16_t compareclk, scriptptr = 0; 79 80 if (bios->major_version < 5) /* pre BIT */ 81 compare_record_len = 3; 82 else 83 compare_record_len = 4; 84 85 do { 86 compareclk = ROM16(bios->data[clktable + compare_record_len * i]); 87 if (pxclk >= compareclk * 10) { 88 if (bios->major_version < 5) { 89 uint8_t tmdssub = bios->data[clktable + 2 + compare_record_len * i]; 90 scriptptr = ROM16(bios->data[bios->init_script_tbls_ptr + tmdssub * 2]); 91 } else 92 scriptptr = ROM16(bios->data[clktable + 2 + compare_record_len * i]); 93 break; 94 } 95 i++; 96 } while (compareclk); 97 98 return scriptptr; 99 } 100 101 static void 102 run_digital_op_script(struct drm_device *dev, uint16_t scriptptr, 103 struct dcb_output *dcbent, int head, bool dl) 104 { 105 struct nouveau_drm *drm = nouveau_drm(dev); 106 107 NV_INFO(drm, "0x%04X: Parsing digital output script table\n", 108 scriptptr); 109 NVWriteVgaCrtc(dev, 0, NV_CIO_CRE_44, head ? NV_CIO_CRE_44_HEADB : 110 NV_CIO_CRE_44_HEADA); 111 nouveau_bios_run_init_table(dev, scriptptr, dcbent, head); 112 113 nv04_dfp_bind_head(dev, dcbent, head, dl); 114 } 115 116 static int call_lvds_manufacturer_script(struct drm_device *dev, struct dcb_output *dcbent, int head, enum LVDS_script script) 117 { 118 struct nouveau_drm *drm = nouveau_drm(dev); 119 struct nvbios *bios = &drm->vbios; 120 uint8_t sub = bios->data[bios->fp.xlated_entry + script] + (bios->fp.link_c_increment && dcbent->or & DCB_OUTPUT_C ? 1 : 0); 121 uint16_t scriptofs = ROM16(bios->data[bios->init_script_tbls_ptr + sub * 2]); 122 123 if (!bios->fp.xlated_entry || !sub || !scriptofs) 124 return -EINVAL; 125 126 run_digital_op_script(dev, scriptofs, dcbent, head, bios->fp.dual_link); 127 128 if (script == LVDS_PANEL_OFF) { 129 /* off-on delay in ms */ 130 mdelay(ROM16(bios->data[bios->fp.xlated_entry + 7])); 131 } 132 #ifdef __powerpc__ 133 /* Powerbook specific quirks */ 134 if (script == LVDS_RESET && 135 (dev->pdev->device == 0x0179 || dev->pdev->device == 0x0189 || 136 dev->pdev->device == 0x0329)) 137 nv_write_tmds(dev, dcbent->or, 0, 0x02, 0x72); 138 #endif 139 140 return 0; 141 } 142 143 static int run_lvds_table(struct drm_device *dev, struct dcb_output *dcbent, int head, enum LVDS_script script, int pxclk) 144 { 145 /* 146 * The BIT LVDS table's header has the information to setup the 147 * necessary registers. Following the standard 4 byte header are: 148 * A bitmask byte and a dual-link transition pxclk value for use in 149 * selecting the init script when not using straps; 4 script pointers 150 * for panel power, selected by output and on/off; and 8 table pointers 151 * for panel init, the needed one determined by output, and bits in the 152 * conf byte. These tables are similar to the TMDS tables, consisting 153 * of a list of pxclks and script pointers. 154 */ 155 struct nouveau_drm *drm = nouveau_drm(dev); 156 struct nvbios *bios = &drm->vbios; 157 unsigned int outputset = (dcbent->or == 4) ? 1 : 0; 158 uint16_t scriptptr = 0, clktable; 159 160 /* 161 * For now we assume version 3.0 table - g80 support will need some 162 * changes 163 */ 164 165 switch (script) { 166 case LVDS_INIT: 167 return -ENOSYS; 168 case LVDS_BACKLIGHT_ON: 169 case LVDS_PANEL_ON: 170 scriptptr = ROM16(bios->data[bios->fp.lvdsmanufacturerpointer + 7 + outputset * 2]); 171 break; 172 case LVDS_BACKLIGHT_OFF: 173 case LVDS_PANEL_OFF: 174 scriptptr = ROM16(bios->data[bios->fp.lvdsmanufacturerpointer + 11 + outputset * 2]); 175 break; 176 case LVDS_RESET: 177 clktable = bios->fp.lvdsmanufacturerpointer + 15; 178 if (dcbent->or == 4) 179 clktable += 8; 180 181 if (dcbent->lvdsconf.use_straps_for_mode) { 182 if (bios->fp.dual_link) 183 clktable += 4; 184 if (bios->fp.if_is_24bit) 185 clktable += 2; 186 } else { 187 /* using EDID */ 188 int cmpval_24bit = (dcbent->or == 4) ? 4 : 1; 189 190 if (bios->fp.dual_link) { 191 clktable += 4; 192 cmpval_24bit <<= 1; 193 } 194 195 if (bios->fp.strapless_is_24bit & cmpval_24bit) 196 clktable += 2; 197 } 198 199 clktable = ROM16(bios->data[clktable]); 200 if (!clktable) { 201 NV_ERROR(drm, "Pixel clock comparison table not found\n"); 202 return -ENOENT; 203 } 204 scriptptr = clkcmptable(bios, clktable, pxclk); 205 } 206 207 if (!scriptptr) { 208 NV_ERROR(drm, "LVDS output init script not found\n"); 209 return -ENOENT; 210 } 211 run_digital_op_script(dev, scriptptr, dcbent, head, bios->fp.dual_link); 212 213 return 0; 214 } 215 216 int call_lvds_script(struct drm_device *dev, struct dcb_output *dcbent, int head, enum LVDS_script script, int pxclk) 217 { 218 /* 219 * LVDS operations are multiplexed in an effort to present a single API 220 * which works with two vastly differing underlying structures. 221 * This acts as the demux 222 */ 223 224 struct nouveau_drm *drm = nouveau_drm(dev); 225 struct nouveau_device *device = nv_device(drm->device); 226 struct nvbios *bios = &drm->vbios; 227 uint8_t lvds_ver = bios->data[bios->fp.lvdsmanufacturerpointer]; 228 uint32_t sel_clk_binding, sel_clk; 229 int ret; 230 231 if (bios->fp.last_script_invoc == (script << 1 | head) || !lvds_ver || 232 (lvds_ver >= 0x30 && script == LVDS_INIT)) 233 return 0; 234 235 if (!bios->fp.lvds_init_run) { 236 bios->fp.lvds_init_run = true; 237 call_lvds_script(dev, dcbent, head, LVDS_INIT, pxclk); 238 } 239 240 if (script == LVDS_PANEL_ON && bios->fp.reset_after_pclk_change) 241 call_lvds_script(dev, dcbent, head, LVDS_RESET, pxclk); 242 if (script == LVDS_RESET && bios->fp.power_off_for_reset) 243 call_lvds_script(dev, dcbent, head, LVDS_PANEL_OFF, pxclk); 244 245 NV_INFO(drm, "Calling LVDS script %d:\n", script); 246 247 /* don't let script change pll->head binding */ 248 sel_clk_binding = nv_rd32(device, NV_PRAMDAC_SEL_CLK) & 0x50000; 249 250 if (lvds_ver < 0x30) 251 ret = call_lvds_manufacturer_script(dev, dcbent, head, script); 252 else 253 ret = run_lvds_table(dev, dcbent, head, script, pxclk); 254 255 bios->fp.last_script_invoc = (script << 1 | head); 256 257 sel_clk = NVReadRAMDAC(dev, 0, NV_PRAMDAC_SEL_CLK) & ~0x50000; 258 NVWriteRAMDAC(dev, 0, NV_PRAMDAC_SEL_CLK, sel_clk | sel_clk_binding); 259 /* some scripts set a value in NV_PBUS_POWERCTRL_2 and break video overlay */ 260 nv_wr32(device, NV_PBUS_POWERCTRL_2, 0); 261 262 return ret; 263 } 264 265 struct lvdstableheader { 266 uint8_t lvds_ver, headerlen, recordlen; 267 }; 268 269 static int parse_lvds_manufacturer_table_header(struct drm_device *dev, struct nvbios *bios, struct lvdstableheader *lth) 270 { 271 /* 272 * BMP version (0xa) LVDS table has a simple header of version and 273 * record length. The BIT LVDS table has the typical BIT table header: 274 * version byte, header length byte, record length byte, and a byte for 275 * the maximum number of records that can be held in the table. 276 */ 277 278 struct nouveau_drm *drm = nouveau_drm(dev); 279 uint8_t lvds_ver, headerlen, recordlen; 280 281 memset(lth, 0, sizeof(struct lvdstableheader)); 282 283 if (bios->fp.lvdsmanufacturerpointer == 0x0) { 284 NV_ERROR(drm, "Pointer to LVDS manufacturer table invalid\n"); 285 return -EINVAL; 286 } 287 288 lvds_ver = bios->data[bios->fp.lvdsmanufacturerpointer]; 289 290 switch (lvds_ver) { 291 case 0x0a: /* pre NV40 */ 292 headerlen = 2; 293 recordlen = bios->data[bios->fp.lvdsmanufacturerpointer + 1]; 294 break; 295 case 0x30: /* NV4x */ 296 headerlen = bios->data[bios->fp.lvdsmanufacturerpointer + 1]; 297 if (headerlen < 0x1f) { 298 NV_ERROR(drm, "LVDS table header not understood\n"); 299 return -EINVAL; 300 } 301 recordlen = bios->data[bios->fp.lvdsmanufacturerpointer + 2]; 302 break; 303 case 0x40: /* G80/G90 */ 304 headerlen = bios->data[bios->fp.lvdsmanufacturerpointer + 1]; 305 if (headerlen < 0x7) { 306 NV_ERROR(drm, "LVDS table header not understood\n"); 307 return -EINVAL; 308 } 309 recordlen = bios->data[bios->fp.lvdsmanufacturerpointer + 2]; 310 break; 311 default: 312 NV_ERROR(drm, 313 "LVDS table revision %d.%d not currently supported\n", 314 lvds_ver >> 4, lvds_ver & 0xf); 315 return -ENOSYS; 316 } 317 318 lth->lvds_ver = lvds_ver; 319 lth->headerlen = headerlen; 320 lth->recordlen = recordlen; 321 322 return 0; 323 } 324 325 static int 326 get_fp_strap(struct drm_device *dev, struct nvbios *bios) 327 { 328 struct nouveau_device *device = nouveau_dev(dev); 329 330 /* 331 * The fp strap is normally dictated by the "User Strap" in 332 * PEXTDEV_BOOT_0[20:16], but on BMP cards when bit 2 of the 333 * Internal_Flags struct at 0x48 is set, the user strap gets overriden 334 * by the PCI subsystem ID during POST, but not before the previous user 335 * strap has been committed to CR58 for CR57=0xf on head A, which may be 336 * read and used instead 337 */ 338 339 if (bios->major_version < 5 && bios->data[0x48] & 0x4) 340 return NVReadVgaCrtc5758(dev, 0, 0xf) & 0xf; 341 342 if (device->card_type >= NV_50) 343 return (nv_rd32(device, NV_PEXTDEV_BOOT_0) >> 24) & 0xf; 344 else 345 return (nv_rd32(device, NV_PEXTDEV_BOOT_0) >> 16) & 0xf; 346 } 347 348 static int parse_fp_mode_table(struct drm_device *dev, struct nvbios *bios) 349 { 350 struct nouveau_drm *drm = nouveau_drm(dev); 351 uint8_t *fptable; 352 uint8_t fptable_ver, headerlen = 0, recordlen, fpentries = 0xf, fpindex; 353 int ret, ofs, fpstrapping; 354 struct lvdstableheader lth; 355 356 if (bios->fp.fptablepointer == 0x0) { 357 /* Apple cards don't have the fp table; the laptops use DDC */ 358 /* The table is also missing on some x86 IGPs */ 359 #ifndef __powerpc__ 360 NV_ERROR(drm, "Pointer to flat panel table invalid\n"); 361 #endif 362 bios->digital_min_front_porch = 0x4b; 363 return 0; 364 } 365 366 fptable = &bios->data[bios->fp.fptablepointer]; 367 fptable_ver = fptable[0]; 368 369 switch (fptable_ver) { 370 /* 371 * BMP version 0x5.0x11 BIOSen have version 1 like tables, but no 372 * version field, and miss one of the spread spectrum/PWM bytes. 373 * This could affect early GF2Go parts (not seen any appropriate ROMs 374 * though). Here we assume that a version of 0x05 matches this case 375 * (combining with a BMP version check would be better), as the 376 * common case for the panel type field is 0x0005, and that is in 377 * fact what we are reading the first byte of. 378 */ 379 case 0x05: /* some NV10, 11, 15, 16 */ 380 recordlen = 42; 381 ofs = -1; 382 break; 383 case 0x10: /* some NV15/16, and NV11+ */ 384 recordlen = 44; 385 ofs = 0; 386 break; 387 case 0x20: /* NV40+ */ 388 headerlen = fptable[1]; 389 recordlen = fptable[2]; 390 fpentries = fptable[3]; 391 /* 392 * fptable[4] is the minimum 393 * RAMDAC_FP_HCRTC -> RAMDAC_FP_HSYNC_START gap 394 */ 395 bios->digital_min_front_porch = fptable[4]; 396 ofs = -7; 397 break; 398 default: 399 NV_ERROR(drm, 400 "FP table revision %d.%d not currently supported\n", 401 fptable_ver >> 4, fptable_ver & 0xf); 402 return -ENOSYS; 403 } 404 405 if (!bios->is_mobile) /* !mobile only needs digital_min_front_porch */ 406 return 0; 407 408 ret = parse_lvds_manufacturer_table_header(dev, bios, <h); 409 if (ret) 410 return ret; 411 412 if (lth.lvds_ver == 0x30 || lth.lvds_ver == 0x40) { 413 bios->fp.fpxlatetableptr = bios->fp.lvdsmanufacturerpointer + 414 lth.headerlen + 1; 415 bios->fp.xlatwidth = lth.recordlen; 416 } 417 if (bios->fp.fpxlatetableptr == 0x0) { 418 NV_ERROR(drm, "Pointer to flat panel xlat table invalid\n"); 419 return -EINVAL; 420 } 421 422 fpstrapping = get_fp_strap(dev, bios); 423 424 fpindex = bios->data[bios->fp.fpxlatetableptr + 425 fpstrapping * bios->fp.xlatwidth]; 426 427 if (fpindex > fpentries) { 428 NV_ERROR(drm, "Bad flat panel table index\n"); 429 return -ENOENT; 430 } 431 432 /* nv4x cards need both a strap value and fpindex of 0xf to use DDC */ 433 if (lth.lvds_ver > 0x10) 434 bios->fp_no_ddc = fpstrapping != 0xf || fpindex != 0xf; 435 436 /* 437 * If either the strap or xlated fpindex value are 0xf there is no 438 * panel using a strap-derived bios mode present. this condition 439 * includes, but is different from, the DDC panel indicator above 440 */ 441 if (fpstrapping == 0xf || fpindex == 0xf) 442 return 0; 443 444 bios->fp.mode_ptr = bios->fp.fptablepointer + headerlen + 445 recordlen * fpindex + ofs; 446 447 NV_INFO(drm, "BIOS FP mode: %dx%d (%dkHz pixel clock)\n", 448 ROM16(bios->data[bios->fp.mode_ptr + 11]) + 1, 449 ROM16(bios->data[bios->fp.mode_ptr + 25]) + 1, 450 ROM16(bios->data[bios->fp.mode_ptr + 7]) * 10); 451 452 return 0; 453 } 454 455 bool nouveau_bios_fp_mode(struct drm_device *dev, struct drm_display_mode *mode) 456 { 457 struct nouveau_drm *drm = nouveau_drm(dev); 458 struct nvbios *bios = &drm->vbios; 459 uint8_t *mode_entry = &bios->data[bios->fp.mode_ptr]; 460 461 if (!mode) /* just checking whether we can produce a mode */ 462 return bios->fp.mode_ptr; 463 464 memset(mode, 0, sizeof(struct drm_display_mode)); 465 /* 466 * For version 1.0 (version in byte 0): 467 * bytes 1-2 are "panel type", including bits on whether Colour/mono, 468 * single/dual link, and type (TFT etc.) 469 * bytes 3-6 are bits per colour in RGBX 470 */ 471 mode->clock = ROM16(mode_entry[7]) * 10; 472 /* bytes 9-10 is HActive */ 473 mode->hdisplay = ROM16(mode_entry[11]) + 1; 474 /* 475 * bytes 13-14 is HValid Start 476 * bytes 15-16 is HValid End 477 */ 478 mode->hsync_start = ROM16(mode_entry[17]) + 1; 479 mode->hsync_end = ROM16(mode_entry[19]) + 1; 480 mode->htotal = ROM16(mode_entry[21]) + 1; 481 /* bytes 23-24, 27-30 similarly, but vertical */ 482 mode->vdisplay = ROM16(mode_entry[25]) + 1; 483 mode->vsync_start = ROM16(mode_entry[31]) + 1; 484 mode->vsync_end = ROM16(mode_entry[33]) + 1; 485 mode->vtotal = ROM16(mode_entry[35]) + 1; 486 mode->flags |= (mode_entry[37] & 0x10) ? 487 DRM_MODE_FLAG_PHSYNC : DRM_MODE_FLAG_NHSYNC; 488 mode->flags |= (mode_entry[37] & 0x1) ? 489 DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC; 490 /* 491 * bytes 38-39 relate to spread spectrum settings 492 * bytes 40-43 are something to do with PWM 493 */ 494 495 mode->status = MODE_OK; 496 mode->type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED; 497 drm_mode_set_name(mode); 498 return bios->fp.mode_ptr; 499 } 500 501 int nouveau_bios_parse_lvds_table(struct drm_device *dev, int pxclk, bool *dl, bool *if_is_24bit) 502 { 503 /* 504 * The LVDS table header is (mostly) described in 505 * parse_lvds_manufacturer_table_header(): the BIT header additionally 506 * contains the dual-link transition pxclk (in 10s kHz), at byte 5 - if 507 * straps are not being used for the panel, this specifies the frequency 508 * at which modes should be set up in the dual link style. 509 * 510 * Following the header, the BMP (ver 0xa) table has several records, 511 * indexed by a separate xlat table, indexed in turn by the fp strap in 512 * EXTDEV_BOOT. Each record had a config byte, followed by 6 script 513 * numbers for use by INIT_SUB which controlled panel init and power, 514 * and finally a dword of ms to sleep between power off and on 515 * operations. 516 * 517 * In the BIT versions, the table following the header serves as an 518 * integrated config and xlat table: the records in the table are 519 * indexed by the FP strap nibble in EXTDEV_BOOT, and each record has 520 * two bytes - the first as a config byte, the second for indexing the 521 * fp mode table pointed to by the BIT 'D' table 522 * 523 * DDC is not used until after card init, so selecting the correct table 524 * entry and setting the dual link flag for EDID equipped panels, 525 * requiring tests against the native-mode pixel clock, cannot be done 526 * until later, when this function should be called with non-zero pxclk 527 */ 528 struct nouveau_drm *drm = nouveau_drm(dev); 529 struct nvbios *bios = &drm->vbios; 530 int fpstrapping = get_fp_strap(dev, bios), lvdsmanufacturerindex = 0; 531 struct lvdstableheader lth; 532 uint16_t lvdsofs; 533 int ret, chip_version = bios->chip_version; 534 535 ret = parse_lvds_manufacturer_table_header(dev, bios, <h); 536 if (ret) 537 return ret; 538 539 switch (lth.lvds_ver) { 540 case 0x0a: /* pre NV40 */ 541 lvdsmanufacturerindex = bios->data[ 542 bios->fp.fpxlatemanufacturertableptr + 543 fpstrapping]; 544 545 /* we're done if this isn't the EDID panel case */ 546 if (!pxclk) 547 break; 548 549 if (chip_version < 0x25) { 550 /* nv17 behaviour 551 * 552 * It seems the old style lvds script pointer is reused 553 * to select 18/24 bit colour depth for EDID panels. 554 */ 555 lvdsmanufacturerindex = 556 (bios->legacy.lvds_single_a_script_ptr & 1) ? 557 2 : 0; 558 if (pxclk >= bios->fp.duallink_transition_clk) 559 lvdsmanufacturerindex++; 560 } else if (chip_version < 0x30) { 561 /* nv28 behaviour (off-chip encoder) 562 * 563 * nv28 does a complex dance of first using byte 121 of 564 * the EDID to choose the lvdsmanufacturerindex, then 565 * later attempting to match the EDID manufacturer and 566 * product IDs in a table (signature 'pidt' (panel id 567 * table?)), setting an lvdsmanufacturerindex of 0 and 568 * an fp strap of the match index (or 0xf if none) 569 */ 570 lvdsmanufacturerindex = 0; 571 } else { 572 /* nv31, nv34 behaviour */ 573 lvdsmanufacturerindex = 0; 574 if (pxclk >= bios->fp.duallink_transition_clk) 575 lvdsmanufacturerindex = 2; 576 if (pxclk >= 140000) 577 lvdsmanufacturerindex = 3; 578 } 579 580 /* 581 * nvidia set the high nibble of (cr57=f, cr58) to 582 * lvdsmanufacturerindex in this case; we don't 583 */ 584 break; 585 case 0x30: /* NV4x */ 586 case 0x40: /* G80/G90 */ 587 lvdsmanufacturerindex = fpstrapping; 588 break; 589 default: 590 NV_ERROR(drm, "LVDS table revision not currently supported\n"); 591 return -ENOSYS; 592 } 593 594 lvdsofs = bios->fp.xlated_entry = bios->fp.lvdsmanufacturerpointer + lth.headerlen + lth.recordlen * lvdsmanufacturerindex; 595 switch (lth.lvds_ver) { 596 case 0x0a: 597 bios->fp.power_off_for_reset = bios->data[lvdsofs] & 1; 598 bios->fp.reset_after_pclk_change = bios->data[lvdsofs] & 2; 599 bios->fp.dual_link = bios->data[lvdsofs] & 4; 600 bios->fp.link_c_increment = bios->data[lvdsofs] & 8; 601 *if_is_24bit = bios->data[lvdsofs] & 16; 602 break; 603 case 0x30: 604 case 0x40: 605 /* 606 * No sign of the "power off for reset" or "reset for panel 607 * on" bits, but it's safer to assume we should 608 */ 609 bios->fp.power_off_for_reset = true; 610 bios->fp.reset_after_pclk_change = true; 611 612 /* 613 * It's ok lvdsofs is wrong for nv4x edid case; dual_link is 614 * over-written, and if_is_24bit isn't used 615 */ 616 bios->fp.dual_link = bios->data[lvdsofs] & 1; 617 bios->fp.if_is_24bit = bios->data[lvdsofs] & 2; 618 bios->fp.strapless_is_24bit = bios->data[bios->fp.lvdsmanufacturerpointer + 4]; 619 bios->fp.duallink_transition_clk = ROM16(bios->data[bios->fp.lvdsmanufacturerpointer + 5]) * 10; 620 break; 621 } 622 623 /* set dual_link flag for EDID case */ 624 if (pxclk && (chip_version < 0x25 || chip_version > 0x28)) 625 bios->fp.dual_link = (pxclk >= bios->fp.duallink_transition_clk); 626 627 *dl = bios->fp.dual_link; 628 629 return 0; 630 } 631 632 int run_tmds_table(struct drm_device *dev, struct dcb_output *dcbent, int head, int pxclk) 633 { 634 /* 635 * the pxclk parameter is in kHz 636 * 637 * This runs the TMDS regs setting code found on BIT bios cards 638 * 639 * For ffs(or) == 1 use the first table, for ffs(or) == 2 and 640 * ffs(or) == 3, use the second. 641 */ 642 643 struct nouveau_drm *drm = nouveau_drm(dev); 644 struct nouveau_device *device = nv_device(drm->device); 645 struct nvbios *bios = &drm->vbios; 646 int cv = bios->chip_version; 647 uint16_t clktable = 0, scriptptr; 648 uint32_t sel_clk_binding, sel_clk; 649 650 /* pre-nv17 off-chip tmds uses scripts, post nv17 doesn't */ 651 if (cv >= 0x17 && cv != 0x1a && cv != 0x20 && 652 dcbent->location != DCB_LOC_ON_CHIP) 653 return 0; 654 655 switch (ffs(dcbent->or)) { 656 case 1: 657 clktable = bios->tmds.output0_script_ptr; 658 break; 659 case 2: 660 case 3: 661 clktable = bios->tmds.output1_script_ptr; 662 break; 663 } 664 665 if (!clktable) { 666 NV_ERROR(drm, "Pixel clock comparison table not found\n"); 667 return -EINVAL; 668 } 669 670 scriptptr = clkcmptable(bios, clktable, pxclk); 671 672 if (!scriptptr) { 673 NV_ERROR(drm, "TMDS output init script not found\n"); 674 return -ENOENT; 675 } 676 677 /* don't let script change pll->head binding */ 678 sel_clk_binding = nv_rd32(device, NV_PRAMDAC_SEL_CLK) & 0x50000; 679 run_digital_op_script(dev, scriptptr, dcbent, head, pxclk >= 165000); 680 sel_clk = NVReadRAMDAC(dev, 0, NV_PRAMDAC_SEL_CLK) & ~0x50000; 681 NVWriteRAMDAC(dev, 0, NV_PRAMDAC_SEL_CLK, sel_clk | sel_clk_binding); 682 683 return 0; 684 } 685 686 static void parse_script_table_pointers(struct nvbios *bios, uint16_t offset) 687 { 688 /* 689 * Parses the init table segment for pointers used in script execution. 690 * 691 * offset + 0 (16 bits): init script tables pointer 692 * offset + 2 (16 bits): macro index table pointer 693 * offset + 4 (16 bits): macro table pointer 694 * offset + 6 (16 bits): condition table pointer 695 * offset + 8 (16 bits): io condition table pointer 696 * offset + 10 (16 bits): io flag condition table pointer 697 * offset + 12 (16 bits): init function table pointer 698 */ 699 700 bios->init_script_tbls_ptr = ROM16(bios->data[offset]); 701 } 702 703 static int parse_bit_A_tbl_entry(struct drm_device *dev, struct nvbios *bios, struct bit_entry *bitentry) 704 { 705 /* 706 * Parses the load detect values for g80 cards. 707 * 708 * offset + 0 (16 bits): loadval table pointer 709 */ 710 711 struct nouveau_drm *drm = nouveau_drm(dev); 712 uint16_t load_table_ptr; 713 uint8_t version, headerlen, entrylen, num_entries; 714 715 if (bitentry->length != 3) { 716 NV_ERROR(drm, "Do not understand BIT A table\n"); 717 return -EINVAL; 718 } 719 720 load_table_ptr = ROM16(bios->data[bitentry->offset]); 721 722 if (load_table_ptr == 0x0) { 723 NV_DEBUG(drm, "Pointer to BIT loadval table invalid\n"); 724 return -EINVAL; 725 } 726 727 version = bios->data[load_table_ptr]; 728 729 if (version != 0x10) { 730 NV_ERROR(drm, "BIT loadval table version %d.%d not supported\n", 731 version >> 4, version & 0xF); 732 return -ENOSYS; 733 } 734 735 headerlen = bios->data[load_table_ptr + 1]; 736 entrylen = bios->data[load_table_ptr + 2]; 737 num_entries = bios->data[load_table_ptr + 3]; 738 739 if (headerlen != 4 || entrylen != 4 || num_entries != 2) { 740 NV_ERROR(drm, "Do not understand BIT loadval table\n"); 741 return -EINVAL; 742 } 743 744 /* First entry is normal dac, 2nd tv-out perhaps? */ 745 bios->dactestval = ROM32(bios->data[load_table_ptr + headerlen]) & 0x3ff; 746 747 return 0; 748 } 749 750 static int parse_bit_display_tbl_entry(struct drm_device *dev, struct nvbios *bios, struct bit_entry *bitentry) 751 { 752 /* 753 * Parses the flat panel table segment that the bit entry points to. 754 * Starting at bitentry->offset: 755 * 756 * offset + 0 (16 bits): ??? table pointer - seems to have 18 byte 757 * records beginning with a freq. 758 * offset + 2 (16 bits): mode table pointer 759 */ 760 struct nouveau_drm *drm = nouveau_drm(dev); 761 762 if (bitentry->length != 4) { 763 NV_ERROR(drm, "Do not understand BIT display table\n"); 764 return -EINVAL; 765 } 766 767 bios->fp.fptablepointer = ROM16(bios->data[bitentry->offset + 2]); 768 769 return 0; 770 } 771 772 static int parse_bit_init_tbl_entry(struct drm_device *dev, struct nvbios *bios, struct bit_entry *bitentry) 773 { 774 /* 775 * Parses the init table segment that the bit entry points to. 776 * 777 * See parse_script_table_pointers for layout 778 */ 779 struct nouveau_drm *drm = nouveau_drm(dev); 780 781 if (bitentry->length < 14) { 782 NV_ERROR(drm, "Do not understand init table\n"); 783 return -EINVAL; 784 } 785 786 parse_script_table_pointers(bios, bitentry->offset); 787 return 0; 788 } 789 790 static int parse_bit_i_tbl_entry(struct drm_device *dev, struct nvbios *bios, struct bit_entry *bitentry) 791 { 792 /* 793 * BIT 'i' (info?) table 794 * 795 * offset + 0 (32 bits): BIOS version dword (as in B table) 796 * offset + 5 (8 bits): BIOS feature byte (same as for BMP?) 797 * offset + 13 (16 bits): pointer to table containing DAC load 798 * detection comparison values 799 * 800 * There's other things in the table, purpose unknown 801 */ 802 803 struct nouveau_drm *drm = nouveau_drm(dev); 804 uint16_t daccmpoffset; 805 uint8_t dacver, dacheaderlen; 806 807 if (bitentry->length < 6) { 808 NV_ERROR(drm, "BIT i table too short for needed information\n"); 809 return -EINVAL; 810 } 811 812 /* 813 * bit 4 seems to indicate a mobile bios (doesn't suffer from BMP's 814 * Quadro identity crisis), other bits possibly as for BMP feature byte 815 */ 816 bios->feature_byte = bios->data[bitentry->offset + 5]; 817 bios->is_mobile = bios->feature_byte & FEATURE_MOBILE; 818 819 if (bitentry->length < 15) { 820 NV_WARN(drm, "BIT i table not long enough for DAC load " 821 "detection comparison table\n"); 822 return -EINVAL; 823 } 824 825 daccmpoffset = ROM16(bios->data[bitentry->offset + 13]); 826 827 /* doesn't exist on g80 */ 828 if (!daccmpoffset) 829 return 0; 830 831 /* 832 * The first value in the table, following the header, is the 833 * comparison value, the second entry is a comparison value for 834 * TV load detection. 835 */ 836 837 dacver = bios->data[daccmpoffset]; 838 dacheaderlen = bios->data[daccmpoffset + 1]; 839 840 if (dacver != 0x00 && dacver != 0x10) { 841 NV_WARN(drm, "DAC load detection comparison table version " 842 "%d.%d not known\n", dacver >> 4, dacver & 0xf); 843 return -ENOSYS; 844 } 845 846 bios->dactestval = ROM32(bios->data[daccmpoffset + dacheaderlen]); 847 bios->tvdactestval = ROM32(bios->data[daccmpoffset + dacheaderlen + 4]); 848 849 return 0; 850 } 851 852 static int parse_bit_lvds_tbl_entry(struct drm_device *dev, struct nvbios *bios, struct bit_entry *bitentry) 853 { 854 /* 855 * Parses the LVDS table segment that the bit entry points to. 856 * Starting at bitentry->offset: 857 * 858 * offset + 0 (16 bits): LVDS strap xlate table pointer 859 */ 860 861 struct nouveau_drm *drm = nouveau_drm(dev); 862 863 if (bitentry->length != 2) { 864 NV_ERROR(drm, "Do not understand BIT LVDS table\n"); 865 return -EINVAL; 866 } 867 868 /* 869 * No idea if it's still called the LVDS manufacturer table, but 870 * the concept's close enough. 871 */ 872 bios->fp.lvdsmanufacturerpointer = ROM16(bios->data[bitentry->offset]); 873 874 return 0; 875 } 876 877 static int 878 parse_bit_M_tbl_entry(struct drm_device *dev, struct nvbios *bios, 879 struct bit_entry *bitentry) 880 { 881 /* 882 * offset + 2 (8 bits): number of options in an 883 * INIT_RAM_RESTRICT_ZM_REG_GROUP opcode option set 884 * offset + 3 (16 bits): pointer to strap xlate table for RAM 885 * restrict option selection 886 * 887 * There's a bunch of bits in this table other than the RAM restrict 888 * stuff that we don't use - their use currently unknown 889 */ 890 891 /* 892 * Older bios versions don't have a sufficiently long table for 893 * what we want 894 */ 895 if (bitentry->length < 0x5) 896 return 0; 897 898 if (bitentry->version < 2) { 899 bios->ram_restrict_group_count = bios->data[bitentry->offset + 2]; 900 bios->ram_restrict_tbl_ptr = ROM16(bios->data[bitentry->offset + 3]); 901 } else { 902 bios->ram_restrict_group_count = bios->data[bitentry->offset + 0]; 903 bios->ram_restrict_tbl_ptr = ROM16(bios->data[bitentry->offset + 1]); 904 } 905 906 return 0; 907 } 908 909 static int parse_bit_tmds_tbl_entry(struct drm_device *dev, struct nvbios *bios, struct bit_entry *bitentry) 910 { 911 /* 912 * Parses the pointer to the TMDS table 913 * 914 * Starting at bitentry->offset: 915 * 916 * offset + 0 (16 bits): TMDS table pointer 917 * 918 * The TMDS table is typically found just before the DCB table, with a 919 * characteristic signature of 0x11,0x13 (1.1 being version, 0x13 being 920 * length?) 921 * 922 * At offset +7 is a pointer to a script, which I don't know how to 923 * run yet. 924 * At offset +9 is a pointer to another script, likewise 925 * Offset +11 has a pointer to a table where the first word is a pxclk 926 * frequency and the second word a pointer to a script, which should be 927 * run if the comparison pxclk frequency is less than the pxclk desired. 928 * This repeats for decreasing comparison frequencies 929 * Offset +13 has a pointer to a similar table 930 * The selection of table (and possibly +7/+9 script) is dictated by 931 * "or" from the DCB. 932 */ 933 934 struct nouveau_drm *drm = nouveau_drm(dev); 935 uint16_t tmdstableptr, script1, script2; 936 937 if (bitentry->length != 2) { 938 NV_ERROR(drm, "Do not understand BIT TMDS table\n"); 939 return -EINVAL; 940 } 941 942 tmdstableptr = ROM16(bios->data[bitentry->offset]); 943 if (!tmdstableptr) { 944 NV_ERROR(drm, "Pointer to TMDS table invalid\n"); 945 return -EINVAL; 946 } 947 948 NV_INFO(drm, "TMDS table version %d.%d\n", 949 bios->data[tmdstableptr] >> 4, bios->data[tmdstableptr] & 0xf); 950 951 /* nv50+ has v2.0, but we don't parse it atm */ 952 if (bios->data[tmdstableptr] != 0x11) 953 return -ENOSYS; 954 955 /* 956 * These two scripts are odd: they don't seem to get run even when 957 * they are not stubbed. 958 */ 959 script1 = ROM16(bios->data[tmdstableptr + 7]); 960 script2 = ROM16(bios->data[tmdstableptr + 9]); 961 if (bios->data[script1] != 'q' || bios->data[script2] != 'q') 962 NV_WARN(drm, "TMDS table script pointers not stubbed\n"); 963 964 bios->tmds.output0_script_ptr = ROM16(bios->data[tmdstableptr + 11]); 965 bios->tmds.output1_script_ptr = ROM16(bios->data[tmdstableptr + 13]); 966 967 return 0; 968 } 969 970 struct bit_table { 971 const char id; 972 int (* const parse_fn)(struct drm_device *, struct nvbios *, struct bit_entry *); 973 }; 974 975 #define BIT_TABLE(id, funcid) ((struct bit_table){ id, parse_bit_##funcid##_tbl_entry }) 976 977 int 978 bit_table(struct drm_device *dev, u8 id, struct bit_entry *bit) 979 { 980 struct nouveau_drm *drm = nouveau_drm(dev); 981 struct nvbios *bios = &drm->vbios; 982 u8 entries, *entry; 983 984 if (bios->type != NVBIOS_BIT) 985 return -ENODEV; 986 987 entries = bios->data[bios->offset + 10]; 988 entry = &bios->data[bios->offset + 12]; 989 while (entries--) { 990 if (entry[0] == id) { 991 bit->id = entry[0]; 992 bit->version = entry[1]; 993 bit->length = ROM16(entry[2]); 994 bit->offset = ROM16(entry[4]); 995 bit->data = ROMPTR(dev, entry[4]); 996 return 0; 997 } 998 999 entry += bios->data[bios->offset + 9]; 1000 } 1001 1002 return -ENOENT; 1003 } 1004 1005 static int 1006 parse_bit_table(struct nvbios *bios, const uint16_t bitoffset, 1007 struct bit_table *table) 1008 { 1009 struct drm_device *dev = bios->dev; 1010 struct nouveau_drm *drm = nouveau_drm(dev); 1011 struct bit_entry bitentry; 1012 1013 if (bit_table(dev, table->id, &bitentry) == 0) 1014 return table->parse_fn(dev, bios, &bitentry); 1015 1016 NV_INFO(drm, "BIT table '%c' not found\n", table->id); 1017 return -ENOSYS; 1018 } 1019 1020 static int 1021 parse_bit_structure(struct nvbios *bios, const uint16_t bitoffset) 1022 { 1023 int ret; 1024 1025 /* 1026 * The only restriction on parsing order currently is having 'i' first 1027 * for use of bios->*_version or bios->feature_byte while parsing; 1028 * functions shouldn't be actually *doing* anything apart from pulling 1029 * data from the image into the bios struct, thus no interdependencies 1030 */ 1031 ret = parse_bit_table(bios, bitoffset, &BIT_TABLE('i', i)); 1032 if (ret) /* info? */ 1033 return ret; 1034 if (bios->major_version >= 0x60) /* g80+ */ 1035 parse_bit_table(bios, bitoffset, &BIT_TABLE('A', A)); 1036 parse_bit_table(bios, bitoffset, &BIT_TABLE('D', display)); 1037 ret = parse_bit_table(bios, bitoffset, &BIT_TABLE('I', init)); 1038 if (ret) 1039 return ret; 1040 parse_bit_table(bios, bitoffset, &BIT_TABLE('M', M)); /* memory? */ 1041 parse_bit_table(bios, bitoffset, &BIT_TABLE('L', lvds)); 1042 parse_bit_table(bios, bitoffset, &BIT_TABLE('T', tmds)); 1043 1044 return 0; 1045 } 1046 1047 static int parse_bmp_structure(struct drm_device *dev, struct nvbios *bios, unsigned int offset) 1048 { 1049 /* 1050 * Parses the BMP structure for useful things, but does not act on them 1051 * 1052 * offset + 5: BMP major version 1053 * offset + 6: BMP minor version 1054 * offset + 9: BMP feature byte 1055 * offset + 10: BCD encoded BIOS version 1056 * 1057 * offset + 18: init script table pointer (for bios versions < 5.10h) 1058 * offset + 20: extra init script table pointer (for bios 1059 * versions < 5.10h) 1060 * 1061 * offset + 24: memory init table pointer (used on early bios versions) 1062 * offset + 26: SDR memory sequencing setup data table 1063 * offset + 28: DDR memory sequencing setup data table 1064 * 1065 * offset + 54: index of I2C CRTC pair to use for CRT output 1066 * offset + 55: index of I2C CRTC pair to use for TV output 1067 * offset + 56: index of I2C CRTC pair to use for flat panel output 1068 * offset + 58: write CRTC index for I2C pair 0 1069 * offset + 59: read CRTC index for I2C pair 0 1070 * offset + 60: write CRTC index for I2C pair 1 1071 * offset + 61: read CRTC index for I2C pair 1 1072 * 1073 * offset + 67: maximum internal PLL frequency (single stage PLL) 1074 * offset + 71: minimum internal PLL frequency (single stage PLL) 1075 * 1076 * offset + 75: script table pointers, as described in 1077 * parse_script_table_pointers 1078 * 1079 * offset + 89: TMDS single link output A table pointer 1080 * offset + 91: TMDS single link output B table pointer 1081 * offset + 95: LVDS single link output A table pointer 1082 * offset + 105: flat panel timings table pointer 1083 * offset + 107: flat panel strapping translation table pointer 1084 * offset + 117: LVDS manufacturer panel config table pointer 1085 * offset + 119: LVDS manufacturer strapping translation table pointer 1086 * 1087 * offset + 142: PLL limits table pointer 1088 * 1089 * offset + 156: minimum pixel clock for LVDS dual link 1090 */ 1091 1092 struct nouveau_drm *drm = nouveau_drm(dev); 1093 uint8_t *bmp = &bios->data[offset], bmp_version_major, bmp_version_minor; 1094 uint16_t bmplength; 1095 uint16_t legacy_scripts_offset, legacy_i2c_offset; 1096 1097 /* load needed defaults in case we can't parse this info */ 1098 bios->digital_min_front_porch = 0x4b; 1099 bios->fmaxvco = 256000; 1100 bios->fminvco = 128000; 1101 bios->fp.duallink_transition_clk = 90000; 1102 1103 bmp_version_major = bmp[5]; 1104 bmp_version_minor = bmp[6]; 1105 1106 NV_INFO(drm, "BMP version %d.%d\n", 1107 bmp_version_major, bmp_version_minor); 1108 1109 /* 1110 * Make sure that 0x36 is blank and can't be mistaken for a DCB 1111 * pointer on early versions 1112 */ 1113 if (bmp_version_major < 5) 1114 *(uint16_t *)&bios->data[0x36] = 0; 1115 1116 /* 1117 * Seems that the minor version was 1 for all major versions prior 1118 * to 5. Version 6 could theoretically exist, but I suspect BIT 1119 * happened instead. 1120 */ 1121 if ((bmp_version_major < 5 && bmp_version_minor != 1) || bmp_version_major > 5) { 1122 NV_ERROR(drm, "You have an unsupported BMP version. " 1123 "Please send in your bios\n"); 1124 return -ENOSYS; 1125 } 1126 1127 if (bmp_version_major == 0) 1128 /* nothing that's currently useful in this version */ 1129 return 0; 1130 else if (bmp_version_major == 1) 1131 bmplength = 44; /* exact for 1.01 */ 1132 else if (bmp_version_major == 2) 1133 bmplength = 48; /* exact for 2.01 */ 1134 else if (bmp_version_major == 3) 1135 bmplength = 54; 1136 /* guessed - mem init tables added in this version */ 1137 else if (bmp_version_major == 4 || bmp_version_minor < 0x1) 1138 /* don't know if 5.0 exists... */ 1139 bmplength = 62; 1140 /* guessed - BMP I2C indices added in version 4*/ 1141 else if (bmp_version_minor < 0x6) 1142 bmplength = 67; /* exact for 5.01 */ 1143 else if (bmp_version_minor < 0x10) 1144 bmplength = 75; /* exact for 5.06 */ 1145 else if (bmp_version_minor == 0x10) 1146 bmplength = 89; /* exact for 5.10h */ 1147 else if (bmp_version_minor < 0x14) 1148 bmplength = 118; /* exact for 5.11h */ 1149 else if (bmp_version_minor < 0x24) 1150 /* 1151 * Not sure of version where pll limits came in; 1152 * certainly exist by 0x24 though. 1153 */ 1154 /* length not exact: this is long enough to get lvds members */ 1155 bmplength = 123; 1156 else if (bmp_version_minor < 0x27) 1157 /* 1158 * Length not exact: this is long enough to get pll limit 1159 * member 1160 */ 1161 bmplength = 144; 1162 else 1163 /* 1164 * Length not exact: this is long enough to get dual link 1165 * transition clock. 1166 */ 1167 bmplength = 158; 1168 1169 /* checksum */ 1170 if (nv_cksum(bmp, 8)) { 1171 NV_ERROR(drm, "Bad BMP checksum\n"); 1172 return -EINVAL; 1173 } 1174 1175 /* 1176 * Bit 4 seems to indicate either a mobile bios or a quadro card -- 1177 * mobile behaviour consistent (nv11+), quadro only seen nv18gl-nv36gl 1178 * (not nv10gl), bit 5 that the flat panel tables are present, and 1179 * bit 6 a tv bios. 1180 */ 1181 bios->feature_byte = bmp[9]; 1182 1183 if (bmp_version_major < 5 || bmp_version_minor < 0x10) 1184 bios->old_style_init = true; 1185 legacy_scripts_offset = 18; 1186 if (bmp_version_major < 2) 1187 legacy_scripts_offset -= 4; 1188 bios->init_script_tbls_ptr = ROM16(bmp[legacy_scripts_offset]); 1189 bios->extra_init_script_tbl_ptr = ROM16(bmp[legacy_scripts_offset + 2]); 1190 1191 if (bmp_version_major > 2) { /* appears in BMP 3 */ 1192 bios->legacy.mem_init_tbl_ptr = ROM16(bmp[24]); 1193 bios->legacy.sdr_seq_tbl_ptr = ROM16(bmp[26]); 1194 bios->legacy.ddr_seq_tbl_ptr = ROM16(bmp[28]); 1195 } 1196 1197 legacy_i2c_offset = 0x48; /* BMP version 2 & 3 */ 1198 if (bmplength > 61) 1199 legacy_i2c_offset = offset + 54; 1200 bios->legacy.i2c_indices.crt = bios->data[legacy_i2c_offset]; 1201 bios->legacy.i2c_indices.tv = bios->data[legacy_i2c_offset + 1]; 1202 bios->legacy.i2c_indices.panel = bios->data[legacy_i2c_offset + 2]; 1203 1204 if (bmplength > 74) { 1205 bios->fmaxvco = ROM32(bmp[67]); 1206 bios->fminvco = ROM32(bmp[71]); 1207 } 1208 if (bmplength > 88) 1209 parse_script_table_pointers(bios, offset + 75); 1210 if (bmplength > 94) { 1211 bios->tmds.output0_script_ptr = ROM16(bmp[89]); 1212 bios->tmds.output1_script_ptr = ROM16(bmp[91]); 1213 /* 1214 * Never observed in use with lvds scripts, but is reused for 1215 * 18/24 bit panel interface default for EDID equipped panels 1216 * (if_is_24bit not set directly to avoid any oscillation). 1217 */ 1218 bios->legacy.lvds_single_a_script_ptr = ROM16(bmp[95]); 1219 } 1220 if (bmplength > 108) { 1221 bios->fp.fptablepointer = ROM16(bmp[105]); 1222 bios->fp.fpxlatetableptr = ROM16(bmp[107]); 1223 bios->fp.xlatwidth = 1; 1224 } 1225 if (bmplength > 120) { 1226 bios->fp.lvdsmanufacturerpointer = ROM16(bmp[117]); 1227 bios->fp.fpxlatemanufacturertableptr = ROM16(bmp[119]); 1228 } 1229 #if 0 1230 if (bmplength > 143) 1231 bios->pll_limit_tbl_ptr = ROM16(bmp[142]); 1232 #endif 1233 1234 if (bmplength > 157) 1235 bios->fp.duallink_transition_clk = ROM16(bmp[156]) * 10; 1236 1237 return 0; 1238 } 1239 1240 static uint16_t findstr(uint8_t *data, int n, const uint8_t *str, int len) 1241 { 1242 int i, j; 1243 1244 for (i = 0; i <= (n - len); i++) { 1245 for (j = 0; j < len; j++) 1246 if (data[i + j] != str[j]) 1247 break; 1248 if (j == len) 1249 return i; 1250 } 1251 1252 return 0; 1253 } 1254 1255 void * 1256 olddcb_table(struct drm_device *dev) 1257 { 1258 struct nouveau_drm *drm = nouveau_drm(dev); 1259 u8 *dcb = NULL; 1260 1261 if (nv_device(drm->device)->card_type > NV_04) 1262 dcb = ROMPTR(dev, drm->vbios.data[0x36]); 1263 if (!dcb) { 1264 NV_WARN(drm, "No DCB data found in VBIOS\n"); 1265 return NULL; 1266 } 1267 1268 if (dcb[0] >= 0x41) { 1269 NV_WARN(drm, "DCB version 0x%02x unknown\n", dcb[0]); 1270 return NULL; 1271 } else 1272 if (dcb[0] >= 0x30) { 1273 if (ROM32(dcb[6]) == 0x4edcbdcb) 1274 return dcb; 1275 } else 1276 if (dcb[0] >= 0x20) { 1277 if (ROM32(dcb[4]) == 0x4edcbdcb) 1278 return dcb; 1279 } else 1280 if (dcb[0] >= 0x15) { 1281 if (!memcmp(&dcb[-7], "DEV_REC", 7)) 1282 return dcb; 1283 } else { 1284 /* 1285 * v1.4 (some NV15/16, NV11+) seems the same as v1.5, but 1286 * always has the same single (crt) entry, even when tv-out 1287 * present, so the conclusion is this version cannot really 1288 * be used. 1289 * 1290 * v1.2 tables (some NV6/10, and NV15+) normally have the 1291 * same 5 entries, which are not specific to the card and so 1292 * no use. 1293 * 1294 * v1.2 does have an I2C table that read_dcb_i2c_table can 1295 * handle, but cards exist (nv11 in #14821) with a bad i2c 1296 * table pointer, so use the indices parsed in 1297 * parse_bmp_structure. 1298 * 1299 * v1.1 (NV5+, maybe some NV4) is entirely unhelpful 1300 */ 1301 NV_WARN(drm, "No useful DCB data in VBIOS\n"); 1302 return NULL; 1303 } 1304 1305 NV_WARN(drm, "DCB header validation failed\n"); 1306 return NULL; 1307 } 1308 1309 void * 1310 olddcb_outp(struct drm_device *dev, u8 idx) 1311 { 1312 u8 *dcb = olddcb_table(dev); 1313 if (dcb && dcb[0] >= 0x30) { 1314 if (idx < dcb[2]) 1315 return dcb + dcb[1] + (idx * dcb[3]); 1316 } else 1317 if (dcb && dcb[0] >= 0x20) { 1318 u8 *i2c = ROMPTR(dev, dcb[2]); 1319 u8 *ent = dcb + 8 + (idx * 8); 1320 if (i2c && ent < i2c) 1321 return ent; 1322 } else 1323 if (dcb && dcb[0] >= 0x15) { 1324 u8 *i2c = ROMPTR(dev, dcb[2]); 1325 u8 *ent = dcb + 4 + (idx * 10); 1326 if (i2c && ent < i2c) 1327 return ent; 1328 } 1329 1330 return NULL; 1331 } 1332 1333 int 1334 olddcb_outp_foreach(struct drm_device *dev, void *data, 1335 int (*exec)(struct drm_device *, void *, int idx, u8 *outp)) 1336 { 1337 int ret, idx = -1; 1338 u8 *outp = NULL; 1339 while ((outp = olddcb_outp(dev, ++idx))) { 1340 if (ROM32(outp[0]) == 0x00000000) 1341 break; /* seen on an NV11 with DCB v1.5 */ 1342 if (ROM32(outp[0]) == 0xffffffff) 1343 break; /* seen on an NV17 with DCB v2.0 */ 1344 1345 if ((outp[0] & 0x0f) == DCB_OUTPUT_UNUSED) 1346 continue; 1347 if ((outp[0] & 0x0f) == DCB_OUTPUT_EOL) 1348 break; 1349 1350 ret = exec(dev, data, idx, outp); 1351 if (ret) 1352 return ret; 1353 } 1354 1355 return 0; 1356 } 1357 1358 u8 * 1359 olddcb_conntab(struct drm_device *dev) 1360 { 1361 u8 *dcb = olddcb_table(dev); 1362 if (dcb && dcb[0] >= 0x30 && dcb[1] >= 0x16) { 1363 u8 *conntab = ROMPTR(dev, dcb[0x14]); 1364 if (conntab && conntab[0] >= 0x30 && conntab[0] <= 0x40) 1365 return conntab; 1366 } 1367 return NULL; 1368 } 1369 1370 u8 * 1371 olddcb_conn(struct drm_device *dev, u8 idx) 1372 { 1373 u8 *conntab = olddcb_conntab(dev); 1374 if (conntab && idx < conntab[2]) 1375 return conntab + conntab[1] + (idx * conntab[3]); 1376 return NULL; 1377 } 1378 1379 static struct dcb_output *new_dcb_entry(struct dcb_table *dcb) 1380 { 1381 struct dcb_output *entry = &dcb->entry[dcb->entries]; 1382 1383 memset(entry, 0, sizeof(struct dcb_output)); 1384 entry->index = dcb->entries++; 1385 1386 return entry; 1387 } 1388 1389 static void fabricate_dcb_output(struct dcb_table *dcb, int type, int i2c, 1390 int heads, int or) 1391 { 1392 struct dcb_output *entry = new_dcb_entry(dcb); 1393 1394 entry->type = type; 1395 entry->i2c_index = i2c; 1396 entry->heads = heads; 1397 if (type != DCB_OUTPUT_ANALOG) 1398 entry->location = !DCB_LOC_ON_CHIP; /* ie OFF CHIP */ 1399 entry->or = or; 1400 } 1401 1402 static bool 1403 parse_dcb20_entry(struct drm_device *dev, struct dcb_table *dcb, 1404 uint32_t conn, uint32_t conf, struct dcb_output *entry) 1405 { 1406 struct nouveau_drm *drm = nouveau_drm(dev); 1407 1408 entry->type = conn & 0xf; 1409 entry->i2c_index = (conn >> 4) & 0xf; 1410 entry->heads = (conn >> 8) & 0xf; 1411 entry->connector = (conn >> 12) & 0xf; 1412 entry->bus = (conn >> 16) & 0xf; 1413 entry->location = (conn >> 20) & 0x3; 1414 entry->or = (conn >> 24) & 0xf; 1415 1416 switch (entry->type) { 1417 case DCB_OUTPUT_ANALOG: 1418 /* 1419 * Although the rest of a CRT conf dword is usually 1420 * zeros, mac biosen have stuff there so we must mask 1421 */ 1422 entry->crtconf.maxfreq = (dcb->version < 0x30) ? 1423 (conf & 0xffff) * 10 : 1424 (conf & 0xff) * 10000; 1425 break; 1426 case DCB_OUTPUT_LVDS: 1427 { 1428 uint32_t mask; 1429 if (conf & 0x1) 1430 entry->lvdsconf.use_straps_for_mode = true; 1431 if (dcb->version < 0x22) { 1432 mask = ~0xd; 1433 /* 1434 * The laptop in bug 14567 lies and claims to not use 1435 * straps when it does, so assume all DCB 2.0 laptops 1436 * use straps, until a broken EDID using one is produced 1437 */ 1438 entry->lvdsconf.use_straps_for_mode = true; 1439 /* 1440 * Both 0x4 and 0x8 show up in v2.0 tables; assume they 1441 * mean the same thing (probably wrong, but might work) 1442 */ 1443 if (conf & 0x4 || conf & 0x8) 1444 entry->lvdsconf.use_power_scripts = true; 1445 } else { 1446 mask = ~0x7; 1447 if (conf & 0x2) 1448 entry->lvdsconf.use_acpi_for_edid = true; 1449 if (conf & 0x4) 1450 entry->lvdsconf.use_power_scripts = true; 1451 entry->lvdsconf.sor.link = (conf & 0x00000030) >> 4; 1452 } 1453 if (conf & mask) { 1454 /* 1455 * Until we even try to use these on G8x, it's 1456 * useless reporting unknown bits. They all are. 1457 */ 1458 if (dcb->version >= 0x40) 1459 break; 1460 1461 NV_ERROR(drm, "Unknown LVDS configuration bits, " 1462 "please report\n"); 1463 } 1464 break; 1465 } 1466 case DCB_OUTPUT_TV: 1467 { 1468 if (dcb->version >= 0x30) 1469 entry->tvconf.has_component_output = conf & (0x8 << 4); 1470 else 1471 entry->tvconf.has_component_output = false; 1472 1473 break; 1474 } 1475 case DCB_OUTPUT_DP: 1476 entry->dpconf.sor.link = (conf & 0x00000030) >> 4; 1477 entry->extdev = (conf & 0x0000ff00) >> 8; 1478 switch ((conf & 0x00e00000) >> 21) { 1479 case 0: 1480 entry->dpconf.link_bw = 162000; 1481 break; 1482 case 1: 1483 entry->dpconf.link_bw = 270000; 1484 break; 1485 default: 1486 entry->dpconf.link_bw = 540000; 1487 break; 1488 } 1489 switch ((conf & 0x0f000000) >> 24) { 1490 case 0xf: 1491 entry->dpconf.link_nr = 4; 1492 break; 1493 case 0x3: 1494 entry->dpconf.link_nr = 2; 1495 break; 1496 default: 1497 entry->dpconf.link_nr = 1; 1498 break; 1499 } 1500 break; 1501 case DCB_OUTPUT_TMDS: 1502 if (dcb->version >= 0x40) { 1503 entry->tmdsconf.sor.link = (conf & 0x00000030) >> 4; 1504 entry->extdev = (conf & 0x0000ff00) >> 8; 1505 } 1506 else if (dcb->version >= 0x30) 1507 entry->tmdsconf.slave_addr = (conf & 0x00000700) >> 8; 1508 else if (dcb->version >= 0x22) 1509 entry->tmdsconf.slave_addr = (conf & 0x00000070) >> 4; 1510 1511 break; 1512 case DCB_OUTPUT_EOL: 1513 /* weird g80 mobile type that "nv" treats as a terminator */ 1514 dcb->entries--; 1515 return false; 1516 default: 1517 break; 1518 } 1519 1520 if (dcb->version < 0x40) { 1521 /* Normal entries consist of a single bit, but dual link has 1522 * the next most significant bit set too 1523 */ 1524 entry->duallink_possible = 1525 ((1 << (ffs(entry->or) - 1)) * 3 == entry->or); 1526 } else { 1527 entry->duallink_possible = (entry->sorconf.link == 3); 1528 } 1529 1530 /* unsure what DCB version introduces this, 3.0? */ 1531 if (conf & 0x100000) 1532 entry->i2c_upper_default = true; 1533 1534 return true; 1535 } 1536 1537 static bool 1538 parse_dcb15_entry(struct drm_device *dev, struct dcb_table *dcb, 1539 uint32_t conn, uint32_t conf, struct dcb_output *entry) 1540 { 1541 struct nouveau_drm *drm = nouveau_drm(dev); 1542 1543 switch (conn & 0x0000000f) { 1544 case 0: 1545 entry->type = DCB_OUTPUT_ANALOG; 1546 break; 1547 case 1: 1548 entry->type = DCB_OUTPUT_TV; 1549 break; 1550 case 2: 1551 case 4: 1552 if (conn & 0x10) 1553 entry->type = DCB_OUTPUT_LVDS; 1554 else 1555 entry->type = DCB_OUTPUT_TMDS; 1556 break; 1557 case 3: 1558 entry->type = DCB_OUTPUT_LVDS; 1559 break; 1560 default: 1561 NV_ERROR(drm, "Unknown DCB type %d\n", conn & 0x0000000f); 1562 return false; 1563 } 1564 1565 entry->i2c_index = (conn & 0x0003c000) >> 14; 1566 entry->heads = ((conn & 0x001c0000) >> 18) + 1; 1567 entry->or = entry->heads; /* same as heads, hopefully safe enough */ 1568 entry->location = (conn & 0x01e00000) >> 21; 1569 entry->bus = (conn & 0x0e000000) >> 25; 1570 entry->duallink_possible = false; 1571 1572 switch (entry->type) { 1573 case DCB_OUTPUT_ANALOG: 1574 entry->crtconf.maxfreq = (conf & 0xffff) * 10; 1575 break; 1576 case DCB_OUTPUT_TV: 1577 entry->tvconf.has_component_output = false; 1578 break; 1579 case DCB_OUTPUT_LVDS: 1580 if ((conn & 0x00003f00) >> 8 != 0x10) 1581 entry->lvdsconf.use_straps_for_mode = true; 1582 entry->lvdsconf.use_power_scripts = true; 1583 break; 1584 default: 1585 break; 1586 } 1587 1588 return true; 1589 } 1590 1591 static 1592 void merge_like_dcb_entries(struct drm_device *dev, struct dcb_table *dcb) 1593 { 1594 /* 1595 * DCB v2.0 lists each output combination separately. 1596 * Here we merge compatible entries to have fewer outputs, with 1597 * more options 1598 */ 1599 1600 struct nouveau_drm *drm = nouveau_drm(dev); 1601 int i, newentries = 0; 1602 1603 for (i = 0; i < dcb->entries; i++) { 1604 struct dcb_output *ient = &dcb->entry[i]; 1605 int j; 1606 1607 for (j = i + 1; j < dcb->entries; j++) { 1608 struct dcb_output *jent = &dcb->entry[j]; 1609 1610 if (jent->type == DCB_OUTPUT_MERGED) 1611 continue; 1612 1613 /* merge heads field when all other fields the same */ 1614 if (jent->i2c_index == ient->i2c_index && 1615 jent->type == ient->type && 1616 jent->location == ient->location && 1617 jent->or == ient->or) { 1618 NV_INFO(drm, "Merging DCB entries %d and %d\n", 1619 i, j); 1620 ient->heads |= jent->heads; 1621 jent->type = DCB_OUTPUT_MERGED; 1622 } 1623 } 1624 } 1625 1626 /* Compact entries merged into others out of dcb */ 1627 for (i = 0; i < dcb->entries; i++) { 1628 if (dcb->entry[i].type == DCB_OUTPUT_MERGED) 1629 continue; 1630 1631 if (newentries != i) { 1632 dcb->entry[newentries] = dcb->entry[i]; 1633 dcb->entry[newentries].index = newentries; 1634 } 1635 newentries++; 1636 } 1637 1638 dcb->entries = newentries; 1639 } 1640 1641 static bool 1642 apply_dcb_encoder_quirks(struct drm_device *dev, int idx, u32 *conn, u32 *conf) 1643 { 1644 struct nouveau_drm *drm = nouveau_drm(dev); 1645 struct dcb_table *dcb = &drm->vbios.dcb; 1646 1647 /* Dell Precision M6300 1648 * DCB entry 2: 02025312 00000010 1649 * DCB entry 3: 02026312 00000020 1650 * 1651 * Identical, except apparently a different connector on a 1652 * different SOR link. Not a clue how we're supposed to know 1653 * which one is in use if it even shares an i2c line... 1654 * 1655 * Ignore the connector on the second SOR link to prevent 1656 * nasty problems until this is sorted (assuming it's not a 1657 * VBIOS bug). 1658 */ 1659 if (nv_match_device(dev, 0x040d, 0x1028, 0x019b)) { 1660 if (*conn == 0x02026312 && *conf == 0x00000020) 1661 return false; 1662 } 1663 1664 /* GeForce3 Ti 200 1665 * 1666 * DCB reports an LVDS output that should be TMDS: 1667 * DCB entry 1: f2005014 ffffffff 1668 */ 1669 if (nv_match_device(dev, 0x0201, 0x1462, 0x8851)) { 1670 if (*conn == 0xf2005014 && *conf == 0xffffffff) { 1671 fabricate_dcb_output(dcb, DCB_OUTPUT_TMDS, 1, 1, 1); 1672 return false; 1673 } 1674 } 1675 1676 /* XFX GT-240X-YA 1677 * 1678 * So many things wrong here, replace the entire encoder table.. 1679 */ 1680 if (nv_match_device(dev, 0x0ca3, 0x1682, 0x3003)) { 1681 if (idx == 0) { 1682 *conn = 0x02001300; /* VGA, connector 1 */ 1683 *conf = 0x00000028; 1684 } else 1685 if (idx == 1) { 1686 *conn = 0x01010312; /* DVI, connector 0 */ 1687 *conf = 0x00020030; 1688 } else 1689 if (idx == 2) { 1690 *conn = 0x01010310; /* VGA, connector 0 */ 1691 *conf = 0x00000028; 1692 } else 1693 if (idx == 3) { 1694 *conn = 0x02022362; /* HDMI, connector 2 */ 1695 *conf = 0x00020010; 1696 } else { 1697 *conn = 0x0000000e; /* EOL */ 1698 *conf = 0x00000000; 1699 } 1700 } 1701 1702 /* Some other twisted XFX board (rhbz#694914) 1703 * 1704 * The DVI/VGA encoder combo that's supposed to represent the 1705 * DVI-I connector actually point at two different ones, and 1706 * the HDMI connector ends up paired with the VGA instead. 1707 * 1708 * Connector table is missing anything for VGA at all, pointing it 1709 * an invalid conntab entry 2 so we figure it out ourself. 1710 */ 1711 if (nv_match_device(dev, 0x0615, 0x1682, 0x2605)) { 1712 if (idx == 0) { 1713 *conn = 0x02002300; /* VGA, connector 2 */ 1714 *conf = 0x00000028; 1715 } else 1716 if (idx == 1) { 1717 *conn = 0x01010312; /* DVI, connector 0 */ 1718 *conf = 0x00020030; 1719 } else 1720 if (idx == 2) { 1721 *conn = 0x04020310; /* VGA, connector 0 */ 1722 *conf = 0x00000028; 1723 } else 1724 if (idx == 3) { 1725 *conn = 0x02021322; /* HDMI, connector 1 */ 1726 *conf = 0x00020010; 1727 } else { 1728 *conn = 0x0000000e; /* EOL */ 1729 *conf = 0x00000000; 1730 } 1731 } 1732 1733 /* fdo#50830: connector indices for VGA and DVI-I are backwards */ 1734 if (nv_match_device(dev, 0x0421, 0x3842, 0xc793)) { 1735 if (idx == 0 && *conn == 0x02000300) 1736 *conn = 0x02011300; 1737 else 1738 if (idx == 1 && *conn == 0x04011310) 1739 *conn = 0x04000310; 1740 else 1741 if (idx == 2 && *conn == 0x02011312) 1742 *conn = 0x02000312; 1743 } 1744 1745 return true; 1746 } 1747 1748 static void 1749 fabricate_dcb_encoder_table(struct drm_device *dev, struct nvbios *bios) 1750 { 1751 struct dcb_table *dcb = &bios->dcb; 1752 int all_heads = (nv_two_heads(dev) ? 3 : 1); 1753 1754 #ifdef __powerpc__ 1755 /* Apple iMac G4 NV17 */ 1756 if (of_machine_is_compatible("PowerMac4,5")) { 1757 fabricate_dcb_output(dcb, DCB_OUTPUT_TMDS, 0, all_heads, 1); 1758 fabricate_dcb_output(dcb, DCB_OUTPUT_ANALOG, 1, all_heads, 2); 1759 return; 1760 } 1761 #endif 1762 1763 /* Make up some sane defaults */ 1764 fabricate_dcb_output(dcb, DCB_OUTPUT_ANALOG, 1765 bios->legacy.i2c_indices.crt, 1, 1); 1766 1767 if (nv04_tv_identify(dev, bios->legacy.i2c_indices.tv) >= 0) 1768 fabricate_dcb_output(dcb, DCB_OUTPUT_TV, 1769 bios->legacy.i2c_indices.tv, 1770 all_heads, 0); 1771 1772 else if (bios->tmds.output0_script_ptr || 1773 bios->tmds.output1_script_ptr) 1774 fabricate_dcb_output(dcb, DCB_OUTPUT_TMDS, 1775 bios->legacy.i2c_indices.panel, 1776 all_heads, 1); 1777 } 1778 1779 static int 1780 parse_dcb_entry(struct drm_device *dev, void *data, int idx, u8 *outp) 1781 { 1782 struct nouveau_drm *drm = nouveau_drm(dev); 1783 struct dcb_table *dcb = &drm->vbios.dcb; 1784 u32 conf = (dcb->version >= 0x20) ? ROM32(outp[4]) : ROM32(outp[6]); 1785 u32 conn = ROM32(outp[0]); 1786 bool ret; 1787 1788 if (apply_dcb_encoder_quirks(dev, idx, &conn, &conf)) { 1789 struct dcb_output *entry = new_dcb_entry(dcb); 1790 1791 NV_INFO(drm, "DCB outp %02d: %08x %08x\n", idx, conn, conf); 1792 1793 if (dcb->version >= 0x20) 1794 ret = parse_dcb20_entry(dev, dcb, conn, conf, entry); 1795 else 1796 ret = parse_dcb15_entry(dev, dcb, conn, conf, entry); 1797 if (!ret) 1798 return 1; /* stop parsing */ 1799 1800 /* Ignore the I2C index for on-chip TV-out, as there 1801 * are cards with bogus values (nv31m in bug 23212), 1802 * and it's otherwise useless. 1803 */ 1804 if (entry->type == DCB_OUTPUT_TV && 1805 entry->location == DCB_LOC_ON_CHIP) 1806 entry->i2c_index = 0x0f; 1807 } 1808 1809 return 0; 1810 } 1811 1812 static void 1813 dcb_fake_connectors(struct nvbios *bios) 1814 { 1815 struct dcb_table *dcbt = &bios->dcb; 1816 u8 map[16] = { }; 1817 int i, idx = 0; 1818 1819 /* heuristic: if we ever get a non-zero connector field, assume 1820 * that all the indices are valid and we don't need fake them. 1821 * 1822 * and, as usual, a blacklist of boards with bad bios data.. 1823 */ 1824 if (!nv_match_device(bios->dev, 0x0392, 0x107d, 0x20a2)) { 1825 for (i = 0; i < dcbt->entries; i++) { 1826 if (dcbt->entry[i].connector) 1827 return; 1828 } 1829 } 1830 1831 /* no useful connector info available, we need to make it up 1832 * ourselves. the rule here is: anything on the same i2c bus 1833 * is considered to be on the same connector. any output 1834 * without an associated i2c bus is assigned its own unique 1835 * connector index. 1836 */ 1837 for (i = 0; i < dcbt->entries; i++) { 1838 u8 i2c = dcbt->entry[i].i2c_index; 1839 if (i2c == 0x0f) { 1840 dcbt->entry[i].connector = idx++; 1841 } else { 1842 if (!map[i2c]) 1843 map[i2c] = ++idx; 1844 dcbt->entry[i].connector = map[i2c] - 1; 1845 } 1846 } 1847 1848 /* if we created more than one connector, destroy the connector 1849 * table - just in case it has random, rather than stub, entries. 1850 */ 1851 if (i > 1) { 1852 u8 *conntab = olddcb_conntab(bios->dev); 1853 if (conntab) 1854 conntab[0] = 0x00; 1855 } 1856 } 1857 1858 static int 1859 parse_dcb_table(struct drm_device *dev, struct nvbios *bios) 1860 { 1861 struct nouveau_drm *drm = nouveau_drm(dev); 1862 struct dcb_table *dcb = &bios->dcb; 1863 u8 *dcbt, *conn; 1864 int idx; 1865 1866 dcbt = olddcb_table(dev); 1867 if (!dcbt) { 1868 /* handle pre-DCB boards */ 1869 if (bios->type == NVBIOS_BMP) { 1870 fabricate_dcb_encoder_table(dev, bios); 1871 return 0; 1872 } 1873 1874 return -EINVAL; 1875 } 1876 1877 NV_INFO(drm, "DCB version %d.%d\n", dcbt[0] >> 4, dcbt[0] & 0xf); 1878 1879 dcb->version = dcbt[0]; 1880 olddcb_outp_foreach(dev, NULL, parse_dcb_entry); 1881 1882 /* 1883 * apart for v2.1+ not being known for requiring merging, this 1884 * guarantees dcbent->index is the index of the entry in the rom image 1885 */ 1886 if (dcb->version < 0x21) 1887 merge_like_dcb_entries(dev, dcb); 1888 1889 /* dump connector table entries to log, if any exist */ 1890 idx = -1; 1891 while ((conn = olddcb_conn(dev, ++idx))) { 1892 if (conn[0] != 0xff) { 1893 NV_INFO(drm, "DCB conn %02d: ", idx); 1894 if (olddcb_conntab(dev)[3] < 4) 1895 pr_cont("%04x\n", ROM16(conn[0])); 1896 else 1897 pr_cont("%08x\n", ROM32(conn[0])); 1898 } 1899 } 1900 dcb_fake_connectors(bios); 1901 return 0; 1902 } 1903 1904 static int load_nv17_hwsq_ucode_entry(struct drm_device *dev, struct nvbios *bios, uint16_t hwsq_offset, int entry) 1905 { 1906 /* 1907 * The header following the "HWSQ" signature has the number of entries, 1908 * and the entry size 1909 * 1910 * An entry consists of a dword to write to the sequencer control reg 1911 * (0x00001304), followed by the ucode bytes, written sequentially, 1912 * starting at reg 0x00001400 1913 */ 1914 1915 struct nouveau_drm *drm = nouveau_drm(dev); 1916 struct nouveau_device *device = nv_device(drm->device); 1917 uint8_t bytes_to_write; 1918 uint16_t hwsq_entry_offset; 1919 int i; 1920 1921 if (bios->data[hwsq_offset] <= entry) { 1922 NV_ERROR(drm, "Too few entries in HW sequencer table for " 1923 "requested entry\n"); 1924 return -ENOENT; 1925 } 1926 1927 bytes_to_write = bios->data[hwsq_offset + 1]; 1928 1929 if (bytes_to_write != 36) { 1930 NV_ERROR(drm, "Unknown HW sequencer entry size\n"); 1931 return -EINVAL; 1932 } 1933 1934 NV_INFO(drm, "Loading NV17 power sequencing microcode\n"); 1935 1936 hwsq_entry_offset = hwsq_offset + 2 + entry * bytes_to_write; 1937 1938 /* set sequencer control */ 1939 nv_wr32(device, 0x00001304, ROM32(bios->data[hwsq_entry_offset])); 1940 bytes_to_write -= 4; 1941 1942 /* write ucode */ 1943 for (i = 0; i < bytes_to_write; i += 4) 1944 nv_wr32(device, 0x00001400 + i, ROM32(bios->data[hwsq_entry_offset + i + 4])); 1945 1946 /* twiddle NV_PBUS_DEBUG_4 */ 1947 nv_wr32(device, NV_PBUS_DEBUG_4, nv_rd32(device, NV_PBUS_DEBUG_4) | 0x18); 1948 1949 return 0; 1950 } 1951 1952 static int load_nv17_hw_sequencer_ucode(struct drm_device *dev, 1953 struct nvbios *bios) 1954 { 1955 /* 1956 * BMP based cards, from NV17, need a microcode loading to correctly 1957 * control the GPIO etc for LVDS panels 1958 * 1959 * BIT based cards seem to do this directly in the init scripts 1960 * 1961 * The microcode entries are found by the "HWSQ" signature. 1962 */ 1963 1964 const uint8_t hwsq_signature[] = { 'H', 'W', 'S', 'Q' }; 1965 const int sz = sizeof(hwsq_signature); 1966 int hwsq_offset; 1967 1968 hwsq_offset = findstr(bios->data, bios->length, hwsq_signature, sz); 1969 if (!hwsq_offset) 1970 return 0; 1971 1972 /* always use entry 0? */ 1973 return load_nv17_hwsq_ucode_entry(dev, bios, hwsq_offset + sz, 0); 1974 } 1975 1976 uint8_t *nouveau_bios_embedded_edid(struct drm_device *dev) 1977 { 1978 struct nouveau_drm *drm = nouveau_drm(dev); 1979 struct nvbios *bios = &drm->vbios; 1980 const uint8_t edid_sig[] = { 1981 0x00, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00 }; 1982 uint16_t offset = 0; 1983 uint16_t newoffset; 1984 int searchlen = NV_PROM_SIZE; 1985 1986 if (bios->fp.edid) 1987 return bios->fp.edid; 1988 1989 while (searchlen) { 1990 newoffset = findstr(&bios->data[offset], searchlen, 1991 edid_sig, 8); 1992 if (!newoffset) 1993 return NULL; 1994 offset += newoffset; 1995 if (!nv_cksum(&bios->data[offset], EDID1_LEN)) 1996 break; 1997 1998 searchlen -= offset; 1999 offset++; 2000 } 2001 2002 NV_INFO(drm, "Found EDID in BIOS\n"); 2003 2004 return bios->fp.edid = &bios->data[offset]; 2005 } 2006 2007 static bool NVInitVBIOS(struct drm_device *dev) 2008 { 2009 struct nouveau_drm *drm = nouveau_drm(dev); 2010 struct nouveau_bios *bios = nouveau_bios(drm->device); 2011 struct nvbios *legacy = &drm->vbios; 2012 2013 memset(legacy, 0, sizeof(struct nvbios)); 2014 spin_lock_init(&legacy->lock); 2015 legacy->dev = dev; 2016 2017 legacy->data = bios->data; 2018 legacy->length = bios->size; 2019 legacy->major_version = bios->version.major; 2020 legacy->chip_version = bios->version.chip; 2021 if (bios->bit_offset) { 2022 legacy->type = NVBIOS_BIT; 2023 legacy->offset = bios->bit_offset; 2024 return !parse_bit_structure(legacy, legacy->offset + 6); 2025 } else 2026 if (bios->bmp_offset) { 2027 legacy->type = NVBIOS_BMP; 2028 legacy->offset = bios->bmp_offset; 2029 return !parse_bmp_structure(dev, legacy, legacy->offset); 2030 } 2031 2032 return false; 2033 } 2034 2035 int 2036 nouveau_run_vbios_init(struct drm_device *dev) 2037 { 2038 struct nouveau_drm *drm = nouveau_drm(dev); 2039 struct nvbios *bios = &drm->vbios; 2040 int ret = 0; 2041 2042 /* Reset the BIOS head to 0. */ 2043 bios->state.crtchead = 0; 2044 2045 if (bios->major_version < 5) /* BMP only */ 2046 load_nv17_hw_sequencer_ucode(dev, bios); 2047 2048 if (bios->execute) { 2049 bios->fp.last_script_invoc = 0; 2050 bios->fp.lvds_init_run = false; 2051 } 2052 2053 return ret; 2054 } 2055 2056 static bool 2057 nouveau_bios_posted(struct drm_device *dev) 2058 { 2059 struct nouveau_drm *drm = nouveau_drm(dev); 2060 unsigned htotal; 2061 2062 if (nv_device(drm->device)->card_type >= NV_50) 2063 return true; 2064 2065 htotal = NVReadVgaCrtc(dev, 0, 0x06); 2066 htotal |= (NVReadVgaCrtc(dev, 0, 0x07) & 0x01) << 8; 2067 htotal |= (NVReadVgaCrtc(dev, 0, 0x07) & 0x20) << 4; 2068 htotal |= (NVReadVgaCrtc(dev, 0, 0x25) & 0x01) << 10; 2069 htotal |= (NVReadVgaCrtc(dev, 0, 0x41) & 0x01) << 11; 2070 return (htotal != 0); 2071 } 2072 2073 int 2074 nouveau_bios_init(struct drm_device *dev) 2075 { 2076 struct nouveau_drm *drm = nouveau_drm(dev); 2077 struct nvbios *bios = &drm->vbios; 2078 int ret; 2079 2080 /* only relevant for PCI devices */ 2081 if (!dev->pdev) 2082 return 0; 2083 2084 if (!NVInitVBIOS(dev)) 2085 return -ENODEV; 2086 2087 ret = parse_dcb_table(dev, bios); 2088 if (ret) 2089 return ret; 2090 2091 if (!bios->major_version) /* we don't run version 0 bios */ 2092 return 0; 2093 2094 /* init script execution disabled */ 2095 bios->execute = false; 2096 2097 /* ... unless card isn't POSTed already */ 2098 if (!nouveau_bios_posted(dev)) { 2099 NV_INFO(drm, "Adaptor not initialised, " 2100 "running VBIOS init tables.\n"); 2101 bios->execute = true; 2102 } 2103 2104 ret = nouveau_run_vbios_init(dev); 2105 if (ret) 2106 return ret; 2107 2108 /* feature_byte on BMP is poor, but init always sets CR4B */ 2109 if (bios->major_version < 5) 2110 bios->is_mobile = NVReadVgaCrtc(dev, 0, NV_CIO_CRE_4B) & 0x40; 2111 2112 /* all BIT systems need p_f_m_t for digital_min_front_porch */ 2113 if (bios->is_mobile || bios->major_version >= 5) 2114 ret = parse_fp_mode_table(dev, bios); 2115 2116 /* allow subsequent scripts to execute */ 2117 bios->execute = true; 2118 2119 return 0; 2120 } 2121 2122 void 2123 nouveau_bios_takedown(struct drm_device *dev) 2124 { 2125 } 2126
Indexes created Mon Oct 27 04:09:48 GMT 2025