nouveau_mem.c revision 1.1.1.1
1 /* $NetBSD: nouveau_mem.c,v 1.1.1.1 2021/12/18 20:15:36 riastradh Exp $ */ 2 3 /* 4 * Copyright 2017 Red Hat Inc. 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a 7 * copy of this software and associated documentation files (the "Software"), 8 * to deal in the Software without restriction, including without limitation 9 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 10 * and/or sell copies of the Software, and to permit persons to whom the 11 * Software is furnished to do so, subject to the following conditions: 12 * 13 * The above copyright notice and this permission notice shall be included in 14 * all copies or substantial portions of the Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 19 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 20 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 22 * OTHER DEALINGS IN THE SOFTWARE. 23 */ 24 #include <sys/cdefs.h> 25 __KERNEL_RCSID(0, "$NetBSD: nouveau_mem.c,v 1.1.1.1 2021/12/18 20:15:36 riastradh Exp $"); 26 27 #include "nouveau_mem.h" 28 #include "nouveau_drv.h" 29 #include "nouveau_bo.h" 30 31 #include <drm/ttm/ttm_bo_driver.h> 32 33 #include <nvif/class.h> 34 #include <nvif/if000a.h> 35 #include <nvif/if500b.h> 36 #include <nvif/if500d.h> 37 #include <nvif/if900b.h> 38 #include <nvif/if900d.h> 39 40 int 41 nouveau_mem_map(struct nouveau_mem *mem, 42 struct nvif_vmm *vmm, struct nvif_vma *vma) 43 { 44 union { 45 struct nv50_vmm_map_v0 nv50; 46 struct gf100_vmm_map_v0 gf100; 47 } args; 48 u32 argc = 0; 49 bool super; 50 int ret; 51 52 switch (vmm->object.oclass) { 53 case NVIF_CLASS_VMM_NV04: 54 break; 55 case NVIF_CLASS_VMM_NV50: 56 args.nv50.version = 0; 57 args.nv50.ro = 0; 58 args.nv50.priv = 0; 59 args.nv50.kind = mem->kind; 60 args.nv50.comp = mem->comp; 61 argc = sizeof(args.nv50); 62 break; 63 case NVIF_CLASS_VMM_GF100: 64 case NVIF_CLASS_VMM_GM200: 65 case NVIF_CLASS_VMM_GP100: 66 args.gf100.version = 0; 67 if (mem->mem.type & NVIF_MEM_VRAM) 68 args.gf100.vol = 0; 69 else 70 args.gf100.vol = 1; 71 args.gf100.ro = 0; 72 args.gf100.priv = 0; 73 args.gf100.kind = mem->kind; 74 argc = sizeof(args.gf100); 75 break; 76 default: 77 WARN_ON(1); 78 return -ENOSYS; 79 } 80 81 super = vmm->object.client->super; 82 vmm->object.client->super = true; 83 ret = nvif_vmm_map(vmm, vma->addr, mem->mem.size, &args, argc, 84 &mem->mem, 0); 85 vmm->object.client->super = super; 86 return ret; 87 } 88 89 void 90 nouveau_mem_fini(struct nouveau_mem *mem) 91 { 92 nvif_vmm_put(&mem->cli->drm->client.vmm.vmm, &mem->vma[1]); 93 nvif_vmm_put(&mem->cli->drm->client.vmm.vmm, &mem->vma[0]); 94 mutex_lock(&mem->cli->drm->master.lock); 95 nvif_mem_fini(&mem->mem); 96 mutex_unlock(&mem->cli->drm->master.lock); 97 } 98 99 int 100 nouveau_mem_host(struct ttm_mem_reg *reg, struct ttm_dma_tt *tt) 101 { 102 struct nouveau_mem *mem = nouveau_mem(reg); 103 struct nouveau_cli *cli = mem->cli; 104 struct nouveau_drm *drm = cli->drm; 105 struct nvif_mmu *mmu = &cli->mmu; 106 struct nvif_mem_ram_v0 args = {}; 107 bool super = cli->base.super; 108 u8 type; 109 int ret; 110 111 if (!nouveau_drm_use_coherent_gpu_mapping(drm)) 112 type = drm->ttm.type_ncoh[!!mem->kind]; 113 else 114 type = drm->ttm.type_host[0]; 115 116 if (mem->kind && !(mmu->type[type].type & NVIF_MEM_KIND)) 117 mem->comp = mem->kind = 0; 118 if (mem->comp && !(mmu->type[type].type & NVIF_MEM_COMP)) { 119 if (mmu->object.oclass >= NVIF_CLASS_MMU_GF100) 120 mem->kind = mmu->kind[mem->kind]; 121 mem->comp = 0; 122 } 123 124 if (tt->ttm.sg) args.sgl = tt->ttm.sg->sgl; 125 else args.dma = tt->dma_address; 126 127 mutex_lock(&drm->master.lock); 128 cli->base.super = true; 129 ret = nvif_mem_init_type(mmu, cli->mem->oclass, type, PAGE_SHIFT, 130 reg->num_pages << PAGE_SHIFT, 131 &args, sizeof(args), &mem->mem); 132 cli->base.super = super; 133 mutex_unlock(&drm->master.lock); 134 return ret; 135 } 136 137 int 138 nouveau_mem_vram(struct ttm_mem_reg *reg, bool contig, u8 page) 139 { 140 struct nouveau_mem *mem = nouveau_mem(reg); 141 struct nouveau_cli *cli = mem->cli; 142 struct nouveau_drm *drm = cli->drm; 143 struct nvif_mmu *mmu = &cli->mmu; 144 bool super = cli->base.super; 145 u64 size = ALIGN(reg->num_pages << PAGE_SHIFT, 1 << page); 146 int ret; 147 148 mutex_lock(&drm->master.lock); 149 cli->base.super = true; 150 switch (cli->mem->oclass) { 151 case NVIF_CLASS_MEM_GF100: 152 ret = nvif_mem_init_type(mmu, cli->mem->oclass, 153 drm->ttm.type_vram, page, size, 154 &(struct gf100_mem_v0) { 155 .contig = contig, 156 }, sizeof(struct gf100_mem_v0), 157 &mem->mem); 158 break; 159 case NVIF_CLASS_MEM_NV50: 160 ret = nvif_mem_init_type(mmu, cli->mem->oclass, 161 drm->ttm.type_vram, page, size, 162 &(struct nv50_mem_v0) { 163 .bankswz = mmu->kind[mem->kind] == 2, 164 .contig = contig, 165 }, sizeof(struct nv50_mem_v0), 166 &mem->mem); 167 break; 168 default: 169 ret = -ENOSYS; 170 WARN_ON(1); 171 break; 172 } 173 cli->base.super = super; 174 mutex_unlock(&drm->master.lock); 175 176 reg->start = mem->mem.addr >> PAGE_SHIFT; 177 return ret; 178 } 179 180 void 181 nouveau_mem_del(struct ttm_mem_reg *reg) 182 { 183 struct nouveau_mem *mem = nouveau_mem(reg); 184 nouveau_mem_fini(mem); 185 kfree(reg->mm_node); 186 reg->mm_node = NULL; 187 } 188 189 int 190 nouveau_mem_new(struct nouveau_cli *cli, u8 kind, u8 comp, 191 struct ttm_mem_reg *reg) 192 { 193 struct nouveau_mem *mem; 194 195 if (!(mem = kzalloc(sizeof(*mem), GFP_KERNEL))) 196 return -ENOMEM; 197 mem->cli = cli; 198 mem->kind = kind; 199 mem->comp = comp; 200 201 reg->mm_node = mem; 202 return 0; 203 } 204
Indexes created Wed Oct 22 06:10:02 GMT 2025