nouveau_nv04_fbcon.c revision 1.1.1.1.2.2
1 /* $NetBSD: nouveau_nv04_fbcon.c,v 1.1.1.1.2.2 2014/08/10 06:55:30 tls Exp $ */ 2 3 /* 4 * Copyright 2009 Ben Skeggs 5 * Copyright 2008 Stuart Bennett 6 * 7 * Permission is hereby granted, free of charge, to any person obtaining a 8 * copy of this software and associated documentation files (the "Software"), 9 * to deal in the Software without restriction, including without limitation 10 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 11 * and/or sell copies of the Software, and to permit persons to whom the 12 * Software is furnished to do so, subject to the following conditions: 13 * 14 * The above copyright notice and this permission notice (including the next 15 * paragraph) shall be included in all copies or substantial portions of the 16 * Software. 17 * 18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 20 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 21 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 22 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 23 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER 24 * DEALINGS IN THE SOFTWARE. 25 */ 26 27 #include <sys/cdefs.h> 28 __KERNEL_RCSID(0, "$NetBSD: nouveau_nv04_fbcon.c,v 1.1.1.1.2.2 2014/08/10 06:55:30 tls Exp $"); 29 30 #include <core/object.h> 31 32 #include "nouveau_drm.h" 33 #include "nouveau_dma.h" 34 #include "nouveau_fbcon.h" 35 36 int 37 nv04_fbcon_copyarea(struct fb_info *info, const struct fb_copyarea *region) 38 { 39 struct nouveau_fbdev *nfbdev = info->par; 40 struct nouveau_drm *drm = nouveau_drm(nfbdev->dev); 41 struct nouveau_channel *chan = drm->channel; 42 int ret; 43 44 ret = RING_SPACE(chan, 4); 45 if (ret) 46 return ret; 47 48 BEGIN_NV04(chan, NvSubImageBlit, 0x0300, 3); 49 OUT_RING(chan, (region->sy << 16) | region->sx); 50 OUT_RING(chan, (region->dy << 16) | region->dx); 51 OUT_RING(chan, (region->height << 16) | region->width); 52 FIRE_RING(chan); 53 return 0; 54 } 55 56 int 57 nv04_fbcon_fillrect(struct fb_info *info, const struct fb_fillrect *rect) 58 { 59 struct nouveau_fbdev *nfbdev = info->par; 60 struct nouveau_drm *drm = nouveau_drm(nfbdev->dev); 61 struct nouveau_channel *chan = drm->channel; 62 int ret; 63 64 ret = RING_SPACE(chan, 7); 65 if (ret) 66 return ret; 67 68 BEGIN_NV04(chan, NvSubGdiRect, 0x02fc, 1); 69 OUT_RING(chan, (rect->rop != ROP_COPY) ? 1 : 3); 70 BEGIN_NV04(chan, NvSubGdiRect, 0x03fc, 1); 71 if (info->fix.visual == FB_VISUAL_TRUECOLOR || 72 info->fix.visual == FB_VISUAL_DIRECTCOLOR) 73 OUT_RING(chan, ((uint32_t *)info->pseudo_palette)[rect->color]); 74 else 75 OUT_RING(chan, rect->color); 76 BEGIN_NV04(chan, NvSubGdiRect, 0x0400, 2); 77 OUT_RING(chan, (rect->dx << 16) | rect->dy); 78 OUT_RING(chan, (rect->width << 16) | rect->height); 79 FIRE_RING(chan); 80 return 0; 81 } 82 83 int 84 nv04_fbcon_imageblit(struct fb_info *info, const struct fb_image *image) 85 { 86 struct nouveau_fbdev *nfbdev = info->par; 87 struct nouveau_drm *drm = nouveau_drm(nfbdev->dev); 88 struct nouveau_channel *chan = drm->channel; 89 uint32_t fg; 90 uint32_t bg; 91 uint32_t dsize; 92 uint32_t width; 93 uint32_t *data = (uint32_t *)image->data; 94 int ret; 95 96 if (image->depth != 1) 97 return -ENODEV; 98 99 ret = RING_SPACE(chan, 8); 100 if (ret) 101 return ret; 102 103 width = ALIGN(image->width, 8); 104 dsize = ALIGN(width * image->height, 32) >> 5; 105 106 if (info->fix.visual == FB_VISUAL_TRUECOLOR || 107 info->fix.visual == FB_VISUAL_DIRECTCOLOR) { 108 fg = ((uint32_t *) info->pseudo_palette)[image->fg_color]; 109 bg = ((uint32_t *) info->pseudo_palette)[image->bg_color]; 110 } else { 111 fg = image->fg_color; 112 bg = image->bg_color; 113 } 114 115 BEGIN_NV04(chan, NvSubGdiRect, 0x0be4, 7); 116 OUT_RING(chan, (image->dy << 16) | (image->dx & 0xffff)); 117 OUT_RING(chan, ((image->dy + image->height) << 16) | 118 ((image->dx + image->width) & 0xffff)); 119 OUT_RING(chan, bg); 120 OUT_RING(chan, fg); 121 OUT_RING(chan, (image->height << 16) | width); 122 OUT_RING(chan, (image->height << 16) | image->width); 123 OUT_RING(chan, (image->dy << 16) | (image->dx & 0xffff)); 124 125 while (dsize) { 126 int iter_len = dsize > 128 ? 128 : dsize; 127 128 ret = RING_SPACE(chan, iter_len + 1); 129 if (ret) 130 return ret; 131 132 BEGIN_NV04(chan, NvSubGdiRect, 0x0c00, iter_len); 133 OUT_RINGp(chan, data, iter_len); 134 data += iter_len; 135 dsize -= iter_len; 136 } 137 138 FIRE_RING(chan); 139 return 0; 140 } 141 142 int 143 nv04_fbcon_accel_init(struct fb_info *info) 144 { 145 struct nouveau_fbdev *nfbdev = info->par; 146 struct drm_device *dev = nfbdev->dev; 147 struct nouveau_drm *drm = nouveau_drm(dev); 148 struct nouveau_channel *chan = drm->channel; 149 struct nouveau_device *device = nv_device(drm->device); 150 struct nouveau_object *object; 151 int surface_fmt, pattern_fmt, rect_fmt; 152 int ret; 153 154 switch (info->var.bits_per_pixel) { 155 case 8: 156 surface_fmt = 1; 157 pattern_fmt = 3; 158 rect_fmt = 3; 159 break; 160 case 16: 161 surface_fmt = 4; 162 pattern_fmt = 1; 163 rect_fmt = 1; 164 break; 165 case 32: 166 switch (info->var.transp.length) { 167 case 0: /* depth 24 */ 168 case 8: /* depth 32 */ 169 break; 170 default: 171 return -EINVAL; 172 } 173 174 surface_fmt = 6; 175 pattern_fmt = 3; 176 rect_fmt = 3; 177 break; 178 default: 179 return -EINVAL; 180 } 181 182 ret = nouveau_object_new(nv_object(chan->cli), NVDRM_CHAN, NvCtxSurf2D, 183 device->card_type >= NV_10 ? 0x0062 : 0x0042, 184 NULL, 0, &object); 185 if (ret) 186 return ret; 187 188 ret = nouveau_object_new(nv_object(chan->cli), NVDRM_CHAN, NvClipRect, 189 0x0019, NULL, 0, &object); 190 if (ret) 191 return ret; 192 193 ret = nouveau_object_new(nv_object(chan->cli), NVDRM_CHAN, NvRop, 194 0x0043, NULL, 0, &object); 195 if (ret) 196 return ret; 197 198 ret = nouveau_object_new(nv_object(chan->cli), NVDRM_CHAN, NvImagePatt, 199 0x0044, NULL, 0, &object); 200 if (ret) 201 return ret; 202 203 ret = nouveau_object_new(nv_object(chan->cli), NVDRM_CHAN, NvGdiRect, 204 0x004a, NULL, 0, &object); 205 if (ret) 206 return ret; 207 208 ret = nouveau_object_new(nv_object(chan->cli), NVDRM_CHAN, NvImageBlit, 209 device->chipset >= 0x11 ? 0x009f : 0x005f, 210 NULL, 0, &object); 211 if (ret) 212 return ret; 213 214 if (RING_SPACE(chan, 49)) { 215 nouveau_fbcon_gpu_lockup(info); 216 return 0; 217 } 218 219 BEGIN_NV04(chan, NvSubCtxSurf2D, 0x0000, 1); 220 OUT_RING(chan, NvCtxSurf2D); 221 BEGIN_NV04(chan, NvSubCtxSurf2D, 0x0184, 2); 222 OUT_RING(chan, NvDmaFB); 223 OUT_RING(chan, NvDmaFB); 224 BEGIN_NV04(chan, NvSubCtxSurf2D, 0x0300, 4); 225 OUT_RING(chan, surface_fmt); 226 OUT_RING(chan, info->fix.line_length | (info->fix.line_length << 16)); 227 OUT_RING(chan, info->fix.smem_start - dev->mode_config.fb_base); 228 OUT_RING(chan, info->fix.smem_start - dev->mode_config.fb_base); 229 230 BEGIN_NV04(chan, NvSubCtxSurf2D, 0x0000, 1); 231 OUT_RING(chan, NvRop); 232 BEGIN_NV04(chan, NvSubCtxSurf2D, 0x0300, 1); 233 OUT_RING(chan, 0x55); 234 235 BEGIN_NV04(chan, NvSubCtxSurf2D, 0x0000, 1); 236 OUT_RING(chan, NvImagePatt); 237 BEGIN_NV04(chan, NvSubCtxSurf2D, 0x0300, 8); 238 OUT_RING(chan, pattern_fmt); 239 #ifdef __BIG_ENDIAN 240 OUT_RING(chan, 2); 241 #else 242 OUT_RING(chan, 1); 243 #endif 244 OUT_RING(chan, 0); 245 OUT_RING(chan, 1); 246 OUT_RING(chan, ~0); 247 OUT_RING(chan, ~0); 248 OUT_RING(chan, ~0); 249 OUT_RING(chan, ~0); 250 251 BEGIN_NV04(chan, NvSubCtxSurf2D, 0x0000, 1); 252 OUT_RING(chan, NvClipRect); 253 BEGIN_NV04(chan, NvSubCtxSurf2D, 0x0300, 2); 254 OUT_RING(chan, 0); 255 OUT_RING(chan, (info->var.yres_virtual << 16) | info->var.xres_virtual); 256 257 BEGIN_NV04(chan, NvSubImageBlit, 0x0000, 1); 258 OUT_RING(chan, NvImageBlit); 259 BEGIN_NV04(chan, NvSubImageBlit, 0x019c, 1); 260 OUT_RING(chan, NvCtxSurf2D); 261 BEGIN_NV04(chan, NvSubImageBlit, 0x02fc, 1); 262 OUT_RING(chan, 3); 263 if (device->chipset >= 0x11 /*XXX: oclass == 0x009f*/) { 264 BEGIN_NV04(chan, NvSubImageBlit, 0x0120, 3); 265 OUT_RING(chan, 0); 266 OUT_RING(chan, 1); 267 OUT_RING(chan, 2); 268 } 269 270 BEGIN_NV04(chan, NvSubGdiRect, 0x0000, 1); 271 OUT_RING(chan, NvGdiRect); 272 BEGIN_NV04(chan, NvSubGdiRect, 0x0198, 1); 273 OUT_RING(chan, NvCtxSurf2D); 274 BEGIN_NV04(chan, NvSubGdiRect, 0x0188, 2); 275 OUT_RING(chan, NvImagePatt); 276 OUT_RING(chan, NvRop); 277 BEGIN_NV04(chan, NvSubGdiRect, 0x0304, 1); 278 OUT_RING(chan, 1); 279 BEGIN_NV04(chan, NvSubGdiRect, 0x0300, 1); 280 OUT_RING(chan, rect_fmt); 281 BEGIN_NV04(chan, NvSubGdiRect, 0x02fc, 1); 282 OUT_RING(chan, 3); 283 284 FIRE_RING(chan); 285 286 return 0; 287 } 288 289
Indexes created Mon Oct 20 11:09:49 GMT 2025