radeon_drv.c revision 1.4
1 /** 2 * \file radeon_drv.c 3 * ATI Radeon driver 4 * 5 * \author Gareth Hughes <gareth (at) valinux.com> 6 */ 7 8 /* 9 * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California. 10 * All Rights Reserved. 11 * 12 * Permission is hereby granted, free of charge, to any person obtaining a 13 * copy of this software and associated documentation files (the "Software"), 14 * to deal in the Software without restriction, including without limitation 15 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 16 * and/or sell copies of the Software, and to permit persons to whom the 17 * Software is furnished to do so, subject to the following conditions: 18 * 19 * The above copyright notice and this permission notice (including the next 20 * paragraph) shall be included in all copies or substantial portions of the 21 * Software. 22 * 23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 24 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 25 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 26 * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR 27 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 28 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 29 * OTHER DEALINGS IN THE SOFTWARE. 30 */ 31 32 #include <drm/drmP.h> 33 #include <drm/radeon_drm.h> 34 #include "radeon_drv.h" 35 36 #include <drm/drm_pciids.h> 37 #include <linux/console.h> 38 #include <linux/module.h> 39 #include <linux/moduleparam.h> 40 #include <linux/pm_runtime.h> 41 #include <linux/vga_switcheroo.h> 42 #include "drm_crtc_helper.h" 43 /* 44 * KMS wrapper. 45 * - 2.0.0 - initial interface 46 * - 2.1.0 - add square tiling interface 47 * - 2.2.0 - add r6xx/r7xx const buffer support 48 * - 2.3.0 - add MSPOS + 3D texture + r500 VAP regs 49 * - 2.4.0 - add crtc id query 50 * - 2.5.0 - add get accel 2 to work around ddx breakage for evergreen 51 * - 2.6.0 - add tiling config query (r6xx+), add initial HiZ support (r300->r500) 52 * 2.7.0 - fixups for r600 2D tiling support. (no external ABI change), add eg dyn gpr regs 53 * 2.8.0 - pageflip support, r500 US_FORMAT regs. r500 ARGB2101010 colorbuf, r300->r500 CMASK, clock crystal query 54 * 2.9.0 - r600 tiling (s3tc,rgtc) working, SET_PREDICATION packet 3 on r600 + eg, backend query 55 * 2.10.0 - fusion 2D tiling 56 * 2.11.0 - backend map, initial compute support for the CS checker 57 * 2.12.0 - RADEON_CS_KEEP_TILING_FLAGS 58 * 2.13.0 - virtual memory support, streamout 59 * 2.14.0 - add evergreen tiling informations 60 * 2.15.0 - add max_pipes query 61 * 2.16.0 - fix evergreen 2D tiled surface calculation 62 * 2.17.0 - add STRMOUT_BASE_UPDATE for r7xx 63 * 2.18.0 - r600-eg: allow "invalid" DB formats 64 * 2.19.0 - r600-eg: MSAA textures 65 * 2.20.0 - r600-si: RADEON_INFO_TIMESTAMP query 66 * 2.21.0 - r600-r700: FMASK and CMASK 67 * 2.22.0 - r600 only: RESOLVE_BOX allowed 68 * 2.23.0 - allow STRMOUT_BASE_UPDATE on RS780 and RS880 69 * 2.24.0 - eg only: allow MIP_ADDRESS=0 for MSAA textures 70 * 2.25.0 - eg+: new info request for num SE and num SH 71 * 2.26.0 - r600-eg: fix htile size computation 72 * 2.27.0 - r600-SI: Add CS ioctl support for async DMA 73 * 2.28.0 - r600-eg: Add MEM_WRITE packet support 74 * 2.29.0 - R500 FP16 color clear registers 75 * 2.30.0 - fix for FMASK texturing 76 * 2.31.0 - Add fastfb support for rs690 77 * 2.32.0 - new info request for rings working 78 * 2.33.0 - Add SI tiling mode array query 79 * 2.34.0 - Add CIK tiling mode array query 80 * 2.35.0 - Add CIK macrotile mode array query 81 * 2.36.0 - Fix CIK DCE tiling setup 82 * 2.37.0 - allow GS ring setup on r6xx/r7xx 83 * 2.38.0 - RADEON_GEM_OP (GET_INITIAL_DOMAIN, SET_INITIAL_DOMAIN), 84 * CIK: 1D and linear tiling modes contain valid PIPE_CONFIG 85 */ 86 #define KMS_DRIVER_MAJOR 2 87 #define KMS_DRIVER_MINOR 38 88 #define KMS_DRIVER_PATCHLEVEL 0 89 int radeon_driver_load_kms(struct drm_device *dev, unsigned long flags); 90 int radeon_driver_unload_kms(struct drm_device *dev); 91 void radeon_driver_lastclose_kms(struct drm_device *dev); 92 int radeon_driver_open_kms(struct drm_device *dev, struct drm_file *file_priv); 93 void radeon_driver_postclose_kms(struct drm_device *dev, 94 struct drm_file *file_priv); 95 void radeon_driver_preclose_kms(struct drm_device *dev, 96 struct drm_file *file_priv); 97 int radeon_suspend_kms(struct drm_device *dev, bool suspend, bool fbcon); 98 int radeon_resume_kms(struct drm_device *dev, bool resume, bool fbcon); 99 u32 radeon_get_vblank_counter_kms(struct drm_device *dev, int crtc); 100 int radeon_enable_vblank_kms(struct drm_device *dev, int crtc); 101 void radeon_disable_vblank_kms(struct drm_device *dev, int crtc); 102 int radeon_get_vblank_timestamp_kms(struct drm_device *dev, int crtc, 103 int *max_error, 104 struct timeval *vblank_time, 105 unsigned flags); 106 void radeon_driver_irq_preinstall_kms(struct drm_device *dev); 107 int radeon_driver_irq_postinstall_kms(struct drm_device *dev); 108 void radeon_driver_irq_uninstall_kms(struct drm_device *dev); 109 irqreturn_t radeon_driver_irq_handler_kms(DRM_IRQ_ARGS); 110 void radeon_gem_object_free(struct drm_gem_object *obj); 111 int radeon_gem_object_open(struct drm_gem_object *obj, 112 struct drm_file *file_priv); 113 void radeon_gem_object_close(struct drm_gem_object *obj, 114 struct drm_file *file_priv); 115 extern int radeon_get_crtc_scanoutpos(struct drm_device *dev, int crtc, 116 unsigned int flags, 117 int *vpos, int *hpos, ktime_t *stime, 118 ktime_t *etime); 119 extern bool radeon_is_px(struct drm_device *dev); 120 extern const struct drm_ioctl_desc radeon_ioctls_kms[]; 121 extern int radeon_max_kms_ioctl; 122 #ifdef __NetBSD__ 123 int radeon_mmap_object(struct drm_device *, off_t, size_t, vm_prot_t, 124 struct uvm_object **, voff_t *, struct file *); 125 #else 126 int radeon_mmap(struct file *filp, struct vm_area_struct *vma); 127 #endif 128 int radeon_mode_dumb_mmap(struct drm_file *filp, 129 struct drm_device *dev, 130 uint32_t handle, uint64_t *offset_p); 131 int radeon_mode_dumb_create(struct drm_file *file_priv, 132 struct drm_device *dev, 133 struct drm_mode_create_dumb *args); 134 struct sg_table *radeon_gem_prime_get_sg_table(struct drm_gem_object *obj); 135 struct drm_gem_object *radeon_gem_prime_import_sg_table(struct drm_device *dev, 136 size_t size, 137 struct sg_table *sg); 138 int radeon_gem_prime_pin(struct drm_gem_object *obj); 139 void radeon_gem_prime_unpin(struct drm_gem_object *obj); 140 void *radeon_gem_prime_vmap(struct drm_gem_object *obj); 141 void radeon_gem_prime_vunmap(struct drm_gem_object *obj, void *vaddr); 142 extern long radeon_kms_compat_ioctl(struct file *filp, unsigned int cmd, 143 unsigned long arg); 144 145 #if defined(CONFIG_DEBUG_FS) 146 int radeon_debugfs_init(struct drm_minor *minor); 147 void radeon_debugfs_cleanup(struct drm_minor *minor); 148 #endif 149 150 /* atpx handler */ 151 #if defined(CONFIG_VGA_SWITCHEROO) 152 void radeon_register_atpx_handler(void); 153 void radeon_unregister_atpx_handler(void); 154 #else 155 static inline void radeon_register_atpx_handler(void) {} 156 static inline void radeon_unregister_atpx_handler(void) {} 157 #endif 158 159 int radeon_no_wb; 160 int radeon_modeset = -1; 161 int radeon_dynclks = -1; 162 int radeon_r4xx_atom = 0; 163 int radeon_agpmode = 0; 164 int radeon_vram_limit = 0; 165 int radeon_gart_size = -1; /* auto */ 166 int radeon_benchmarking = 0; 167 int radeon_testing = 0; 168 int radeon_connector_table = 0; 169 int radeon_tv = 1; 170 int radeon_audio = -1; 171 int radeon_disp_priority = 0; 172 int radeon_hw_i2c = 0; 173 int radeon_pcie_gen2 = -1; 174 int radeon_msi = -1; 175 int radeon_lockup_timeout = 10000; 176 int radeon_fastfb = 0; 177 int radeon_dpm = -1; 178 int radeon_aspm = -1; 179 int radeon_runtime_pm = -1; 180 int radeon_hard_reset = 0; 181 182 MODULE_PARM_DESC(no_wb, "Disable AGP writeback for scratch registers"); 183 module_param_named(no_wb, radeon_no_wb, int, 0444); 184 185 MODULE_PARM_DESC(modeset, "Disable/Enable modesetting"); 186 module_param_named(modeset, radeon_modeset, int, 0400); 187 188 MODULE_PARM_DESC(dynclks, "Disable/Enable dynamic clocks"); 189 module_param_named(dynclks, radeon_dynclks, int, 0444); 190 191 MODULE_PARM_DESC(r4xx_atom, "Enable ATOMBIOS modesetting for R4xx"); 192 module_param_named(r4xx_atom, radeon_r4xx_atom, int, 0444); 193 194 MODULE_PARM_DESC(vramlimit, "Restrict VRAM for testing, in megabytes"); 195 module_param_named(vramlimit, radeon_vram_limit, int, 0600); 196 197 MODULE_PARM_DESC(agpmode, "AGP Mode (-1 == PCI)"); 198 module_param_named(agpmode, radeon_agpmode, int, 0444); 199 200 MODULE_PARM_DESC(gartsize, "Size of PCIE/IGP gart to setup in megabytes (32, 64, etc., -1 = auto)"); 201 module_param_named(gartsize, radeon_gart_size, int, 0600); 202 203 MODULE_PARM_DESC(benchmark, "Run benchmark"); 204 module_param_named(benchmark, radeon_benchmarking, int, 0444); 205 206 MODULE_PARM_DESC(test, "Run tests"); 207 module_param_named(test, radeon_testing, int, 0444); 208 209 MODULE_PARM_DESC(connector_table, "Force connector table"); 210 module_param_named(connector_table, radeon_connector_table, int, 0444); 211 212 MODULE_PARM_DESC(tv, "TV enable (0 = disable)"); 213 module_param_named(tv, radeon_tv, int, 0444); 214 215 MODULE_PARM_DESC(audio, "Audio enable (-1 = auto, 0 = disable, 1 = enable)"); 216 module_param_named(audio, radeon_audio, int, 0444); 217 218 MODULE_PARM_DESC(disp_priority, "Display Priority (0 = auto, 1 = normal, 2 = high)"); 219 module_param_named(disp_priority, radeon_disp_priority, int, 0444); 220 221 MODULE_PARM_DESC(hw_i2c, "hw i2c engine enable (0 = disable)"); 222 module_param_named(hw_i2c, radeon_hw_i2c, int, 0444); 223 224 MODULE_PARM_DESC(pcie_gen2, "PCIE Gen2 mode (-1 = auto, 0 = disable, 1 = enable)"); 225 module_param_named(pcie_gen2, radeon_pcie_gen2, int, 0444); 226 227 MODULE_PARM_DESC(msi, "MSI support (1 = enable, 0 = disable, -1 = auto)"); 228 module_param_named(msi, radeon_msi, int, 0444); 229 230 MODULE_PARM_DESC(lockup_timeout, "GPU lockup timeout in ms (defaul 10000 = 10 seconds, 0 = disable)"); 231 module_param_named(lockup_timeout, radeon_lockup_timeout, int, 0444); 232 233 MODULE_PARM_DESC(fastfb, "Direct FB access for IGP chips (0 = disable, 1 = enable)"); 234 module_param_named(fastfb, radeon_fastfb, int, 0444); 235 236 MODULE_PARM_DESC(dpm, "DPM support (1 = enable, 0 = disable, -1 = auto)"); 237 module_param_named(dpm, radeon_dpm, int, 0444); 238 239 MODULE_PARM_DESC(aspm, "ASPM support (1 = enable, 0 = disable, -1 = auto)"); 240 module_param_named(aspm, radeon_aspm, int, 0444); 241 242 MODULE_PARM_DESC(runpm, "PX runtime pm (1 = force enable, 0 = disable, -1 = PX only default)"); 243 module_param_named(runpm, radeon_runtime_pm, int, 0444); 244 245 MODULE_PARM_DESC(hard_reset, "PCI config reset (1 = force enable, 0 = disable (default))"); 246 module_param_named(hard_reset, radeon_hard_reset, int, 0444); 247 248 static struct pci_device_id pciidlist[] = { 249 radeon_PCI_IDS 250 }; 251 252 MODULE_DEVICE_TABLE(pci, pciidlist); 253 254 #ifdef CONFIG_DRM_RADEON_UMS 255 256 static int radeon_suspend(struct drm_device *dev, pm_message_t state) 257 { 258 drm_radeon_private_t *dev_priv = dev->dev_private; 259 260 if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600) 261 return 0; 262 263 /* Disable *all* interrupts */ 264 if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS600) 265 RADEON_WRITE(R500_DxMODE_INT_MASK, 0); 266 RADEON_WRITE(RADEON_GEN_INT_CNTL, 0); 267 return 0; 268 } 269 270 static int radeon_resume(struct drm_device *dev) 271 { 272 drm_radeon_private_t *dev_priv = dev->dev_private; 273 274 if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600) 275 return 0; 276 277 /* Restore interrupt registers */ 278 if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS600) 279 RADEON_WRITE(R500_DxMODE_INT_MASK, dev_priv->r500_disp_irq_reg); 280 RADEON_WRITE(RADEON_GEN_INT_CNTL, dev_priv->irq_enable_reg); 281 return 0; 282 } 283 284 285 static const struct file_operations radeon_driver_old_fops = { 286 .owner = THIS_MODULE, 287 .open = drm_open, 288 .release = drm_release, 289 .unlocked_ioctl = drm_ioctl, 290 .mmap = drm_mmap, 291 .poll = drm_poll, 292 .read = drm_read, 293 #ifdef CONFIG_COMPAT 294 .compat_ioctl = radeon_compat_ioctl, 295 #endif 296 .llseek = noop_llseek, 297 }; 298 299 static struct drm_driver driver_old = { 300 .driver_features = 301 DRIVER_USE_AGP | DRIVER_PCI_DMA | DRIVER_SG | 302 DRIVER_HAVE_IRQ | DRIVER_HAVE_DMA | DRIVER_IRQ_SHARED, 303 .dev_priv_size = sizeof(drm_radeon_buf_priv_t), 304 .load = radeon_driver_load, 305 .firstopen = radeon_driver_firstopen, 306 .open = radeon_driver_open, 307 .preclose = radeon_driver_preclose, 308 .postclose = radeon_driver_postclose, 309 .lastclose = radeon_driver_lastclose, 310 .unload = radeon_driver_unload, 311 .suspend = radeon_suspend, 312 .resume = radeon_resume, 313 .get_vblank_counter = radeon_get_vblank_counter, 314 .enable_vblank = radeon_enable_vblank, 315 .disable_vblank = radeon_disable_vblank, 316 .master_create = radeon_master_create, 317 .master_destroy = radeon_master_destroy, 318 .irq_preinstall = radeon_driver_irq_preinstall, 319 .irq_postinstall = radeon_driver_irq_postinstall, 320 .irq_uninstall = radeon_driver_irq_uninstall, 321 .irq_handler = radeon_driver_irq_handler, 322 .ioctls = radeon_ioctls, 323 .dma_ioctl = radeon_cp_buffers, 324 .fops = &radeon_driver_old_fops, 325 .name = DRIVER_NAME, 326 .desc = DRIVER_DESC, 327 .date = DRIVER_DATE, 328 .major = DRIVER_MAJOR, 329 .minor = DRIVER_MINOR, 330 .patchlevel = DRIVER_PATCHLEVEL, 331 }; 332 333 #endif 334 335 static struct drm_driver kms_driver; 336 337 #ifdef __NetBSD__ 338 339 struct drm_driver *const radeon_drm_driver = &kms_driver; 340 const struct pci_device_id *const radeon_device_ids = pciidlist; 341 const size_t radeon_n_device_ids = __arraycount(pciidlist); 342 343 /* XXX Kludge for the non-GEM GEM that radeon uses. */ 344 static const struct uvm_pagerops radeon_gem_uvm_ops; 345 346 #else 347 348 static int radeon_kick_out_firmware_fb(struct pci_dev *pdev) 349 { 350 struct apertures_struct *ap; 351 bool primary = false; 352 353 ap = alloc_apertures(1); 354 if (!ap) 355 return -ENOMEM; 356 357 ap->ranges[0].base = pci_resource_start(pdev, 0); 358 ap->ranges[0].size = pci_resource_len(pdev, 0); 359 360 #ifdef CONFIG_X86 361 primary = pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW; 362 #endif 363 remove_conflicting_framebuffers(ap, "radeondrmfb", primary); 364 kfree(ap); 365 366 return 0; 367 } 368 369 static int radeon_pci_probe(struct pci_dev *pdev, 370 const struct pci_device_id *ent) 371 { 372 int ret; 373 374 /* Get rid of things like offb */ 375 ret = radeon_kick_out_firmware_fb(pdev); 376 if (ret) 377 return ret; 378 379 return drm_get_pci_dev(pdev, ent, &kms_driver); 380 } 381 382 static void 383 radeon_pci_remove(struct pci_dev *pdev) 384 { 385 struct drm_device *dev = pci_get_drvdata(pdev); 386 387 drm_put_dev(dev); 388 } 389 390 static int radeon_pmops_suspend(struct device *dev) 391 { 392 struct pci_dev *pdev = to_pci_dev(dev); 393 struct drm_device *drm_dev = pci_get_drvdata(pdev); 394 return radeon_suspend_kms(drm_dev, true, true); 395 } 396 397 static int radeon_pmops_resume(struct device *dev) 398 { 399 struct pci_dev *pdev = to_pci_dev(dev); 400 struct drm_device *drm_dev = pci_get_drvdata(pdev); 401 return radeon_resume_kms(drm_dev, true, true); 402 } 403 404 static int radeon_pmops_freeze(struct device *dev) 405 { 406 struct pci_dev *pdev = to_pci_dev(dev); 407 struct drm_device *drm_dev = pci_get_drvdata(pdev); 408 return radeon_suspend_kms(drm_dev, false, true); 409 } 410 411 static int radeon_pmops_thaw(struct device *dev) 412 { 413 struct pci_dev *pdev = to_pci_dev(dev); 414 struct drm_device *drm_dev = pci_get_drvdata(pdev); 415 return radeon_resume_kms(drm_dev, false, true); 416 } 417 418 static int radeon_pmops_runtime_suspend(struct device *dev) 419 { 420 struct pci_dev *pdev = to_pci_dev(dev); 421 struct drm_device *drm_dev = pci_get_drvdata(pdev); 422 int ret; 423 424 if (!radeon_is_px(drm_dev)) { 425 pm_runtime_forbid(dev); 426 return -EBUSY; 427 } 428 429 drm_dev->switch_power_state = DRM_SWITCH_POWER_CHANGING; 430 drm_kms_helper_poll_disable(drm_dev); 431 vga_switcheroo_set_dynamic_switch(pdev, VGA_SWITCHEROO_OFF); 432 433 ret = radeon_suspend_kms(drm_dev, false, false); 434 pci_save_state(pdev); 435 pci_disable_device(pdev); 436 pci_set_power_state(pdev, PCI_D3cold); 437 drm_dev->switch_power_state = DRM_SWITCH_POWER_DYNAMIC_OFF; 438 439 return 0; 440 } 441 442 static int radeon_pmops_runtime_resume(struct device *dev) 443 { 444 struct pci_dev *pdev = to_pci_dev(dev); 445 struct drm_device *drm_dev = pci_get_drvdata(pdev); 446 int ret; 447 448 if (!radeon_is_px(drm_dev)) 449 return -EINVAL; 450 451 drm_dev->switch_power_state = DRM_SWITCH_POWER_CHANGING; 452 453 pci_set_power_state(pdev, PCI_D0); 454 pci_restore_state(pdev); 455 ret = pci_enable_device(pdev); 456 if (ret) 457 return ret; 458 pci_set_master(pdev); 459 460 ret = radeon_resume_kms(drm_dev, false, false); 461 drm_kms_helper_poll_enable(drm_dev); 462 vga_switcheroo_set_dynamic_switch(pdev, VGA_SWITCHEROO_ON); 463 drm_dev->switch_power_state = DRM_SWITCH_POWER_ON; 464 return 0; 465 } 466 467 static int radeon_pmops_runtime_idle(struct device *dev) 468 { 469 struct pci_dev *pdev = to_pci_dev(dev); 470 struct drm_device *drm_dev = pci_get_drvdata(pdev); 471 struct drm_crtc *crtc; 472 473 if (!radeon_is_px(drm_dev)) { 474 pm_runtime_forbid(dev); 475 return -EBUSY; 476 } 477 478 list_for_each_entry(crtc, &drm_dev->mode_config.crtc_list, head) { 479 if (crtc->enabled) { 480 DRM_DEBUG_DRIVER("failing to power off - crtc active\n"); 481 return -EBUSY; 482 } 483 } 484 485 pm_runtime_mark_last_busy(dev); 486 pm_runtime_autosuspend(dev); 487 /* we don't want the main rpm_idle to call suspend - we want to autosuspend */ 488 return 1; 489 } 490 491 long radeon_drm_ioctl(struct file *filp, 492 unsigned int cmd, unsigned long arg) 493 { 494 struct drm_file *file_priv = filp->private_data; 495 struct drm_device *dev; 496 long ret; 497 dev = file_priv->minor->dev; 498 ret = pm_runtime_get_sync(dev->dev); 499 if (ret < 0) 500 return ret; 501 502 ret = drm_ioctl(filp, cmd, arg); 503 504 pm_runtime_mark_last_busy(dev->dev); 505 pm_runtime_put_autosuspend(dev->dev); 506 return ret; 507 } 508 509 static const struct dev_pm_ops radeon_pm_ops = { 510 .suspend = radeon_pmops_suspend, 511 .resume = radeon_pmops_resume, 512 .freeze = radeon_pmops_freeze, 513 .thaw = radeon_pmops_thaw, 514 .poweroff = radeon_pmops_freeze, 515 .restore = radeon_pmops_resume, 516 .runtime_suspend = radeon_pmops_runtime_suspend, 517 .runtime_resume = radeon_pmops_runtime_resume, 518 .runtime_idle = radeon_pmops_runtime_idle, 519 }; 520 521 static const struct file_operations radeon_driver_kms_fops = { 522 .owner = THIS_MODULE, 523 .open = drm_open, 524 .release = drm_release, 525 .unlocked_ioctl = radeon_drm_ioctl, 526 .mmap = radeon_mmap, 527 .poll = drm_poll, 528 .read = drm_read, 529 #ifdef CONFIG_COMPAT 530 .compat_ioctl = radeon_kms_compat_ioctl, 531 #endif 532 }; 533 #endif /* __NetBSD__ */ 534 535 static struct drm_driver kms_driver = { 536 .driver_features = 537 DRIVER_USE_AGP | 538 DRIVER_HAVE_IRQ | DRIVER_IRQ_SHARED | DRIVER_GEM | 539 DRIVER_PRIME | DRIVER_RENDER, 540 .dev_priv_size = 0, 541 .load = radeon_driver_load_kms, 542 .open = radeon_driver_open_kms, 543 .preclose = radeon_driver_preclose_kms, 544 .postclose = radeon_driver_postclose_kms, 545 .lastclose = radeon_driver_lastclose_kms, 546 .unload = radeon_driver_unload_kms, 547 .get_vblank_counter = radeon_get_vblank_counter_kms, 548 .enable_vblank = radeon_enable_vblank_kms, 549 .disable_vblank = radeon_disable_vblank_kms, 550 .get_vblank_timestamp = radeon_get_vblank_timestamp_kms, 551 .get_scanout_position = radeon_get_crtc_scanoutpos, 552 #if defined(CONFIG_DEBUG_FS) 553 .debugfs_init = radeon_debugfs_init, 554 .debugfs_cleanup = radeon_debugfs_cleanup, 555 #endif 556 .irq_preinstall = radeon_driver_irq_preinstall_kms, 557 .irq_postinstall = radeon_driver_irq_postinstall_kms, 558 .irq_uninstall = radeon_driver_irq_uninstall_kms, 559 .irq_handler = radeon_driver_irq_handler_kms, 560 .ioctls = radeon_ioctls_kms, 561 .gem_free_object = radeon_gem_object_free, 562 .gem_open_object = radeon_gem_object_open, 563 .gem_close_object = radeon_gem_object_close, 564 .dumb_create = radeon_mode_dumb_create, 565 .dumb_map_offset = radeon_mode_dumb_mmap, 566 .dumb_destroy = drm_gem_dumb_destroy, 567 #ifdef __NetBSD__ 568 .fops = NULL, 569 .mmap_object = &radeon_mmap_object, 570 .gem_uvm_ops = &radeon_gem_uvm_ops, 571 #else 572 .fops = &radeon_driver_kms_fops, 573 #endif 574 575 #ifndef __NetBSD__ /* XXX drm prime */ 576 .prime_handle_to_fd = drm_gem_prime_handle_to_fd, 577 .prime_fd_to_handle = drm_gem_prime_fd_to_handle, 578 .gem_prime_export = drm_gem_prime_export, 579 .gem_prime_import = drm_gem_prime_import, 580 .gem_prime_pin = radeon_gem_prime_pin, 581 .gem_prime_unpin = radeon_gem_prime_unpin, 582 .gem_prime_get_sg_table = radeon_gem_prime_get_sg_table, 583 .gem_prime_import_sg_table = radeon_gem_prime_import_sg_table, 584 .gem_prime_vmap = radeon_gem_prime_vmap, 585 .gem_prime_vunmap = radeon_gem_prime_vunmap, 586 #endif 587 588 .name = DRIVER_NAME, 589 .desc = DRIVER_DESC, 590 .date = DRIVER_DATE, 591 .major = KMS_DRIVER_MAJOR, 592 .minor = KMS_DRIVER_MINOR, 593 .patchlevel = KMS_DRIVER_PATCHLEVEL, 594 }; 595 596 #ifndef __NetBSD__ 597 598 static struct drm_driver *driver; 599 static struct pci_driver *pdriver; 600 601 #ifdef CONFIG_DRM_RADEON_UMS 602 static struct pci_driver radeon_pci_driver = { 603 .name = DRIVER_NAME, 604 .id_table = pciidlist, 605 }; 606 #endif 607 608 static struct pci_driver radeon_kms_pci_driver = { 609 .name = DRIVER_NAME, 610 .id_table = pciidlist, 611 .probe = radeon_pci_probe, 612 .remove = radeon_pci_remove, 613 .driver.pm = &radeon_pm_ops, 614 }; 615 616 static int __init radeon_init(void) 617 { 618 #ifdef CONFIG_VGA_CONSOLE 619 if (vgacon_text_force() && radeon_modeset == -1) { 620 DRM_INFO("VGACON disable radeon kernel modesetting.\n"); 621 radeon_modeset = 0; 622 } 623 #endif 624 /* set to modesetting by default if not nomodeset */ 625 if (radeon_modeset == -1) 626 radeon_modeset = 1; 627 628 if (radeon_modeset == 1) { 629 DRM_INFO("radeon kernel modesetting enabled.\n"); 630 driver = &kms_driver; 631 pdriver = &radeon_kms_pci_driver; 632 driver->driver_features |= DRIVER_MODESET; 633 driver->num_ioctls = radeon_max_kms_ioctl; 634 radeon_register_atpx_handler(); 635 636 } else { 637 #ifdef CONFIG_DRM_RADEON_UMS 638 DRM_INFO("radeon userspace modesetting enabled.\n"); 639 driver = &driver_old; 640 pdriver = &radeon_pci_driver; 641 driver->driver_features &= ~DRIVER_MODESET; 642 driver->num_ioctls = radeon_max_ioctl; 643 #else 644 DRM_ERROR("No UMS support in radeon module!\n"); 645 return -EINVAL; 646 #endif 647 } 648 649 /* let modprobe override vga console setting */ 650 return drm_pci_init(driver, pdriver); 651 } 652 653 static void __exit radeon_exit(void) 654 { 655 drm_pci_exit(driver, pdriver); 656 radeon_unregister_atpx_handler(); 657 } 658 659 #endif 660 661 module_init(radeon_init); 662 module_exit(radeon_exit); 663 664 MODULE_AUTHOR(DRIVER_AUTHOR); 665 MODULE_DESCRIPTION(DRIVER_DESC); 666 MODULE_LICENSE("GPL and additional rights"); 667
Indexes created Mon Oct 20 20:10:13 GMT 2025