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radeon_gem.c revision 1.1.1.3
      1 /*	$NetBSD: radeon_gem.c,v 1.1.1.3 2021/12/18 20:15:48 riastradh Exp $	*/
      2 
      3 /*
      4  * Copyright 2008 Advanced Micro Devices, Inc.
      5  * Copyright 2008 Red Hat Inc.
      6  * Copyright 2009 Jerome Glisse.
      7  *
      8  * Permission is hereby granted, free of charge, to any person obtaining a
      9  * copy of this software and associated documentation files (the "Software"),
     10  * to deal in the Software without restriction, including without limitation
     11  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
     12  * and/or sell copies of the Software, and to permit persons to whom the
     13  * Software is furnished to do so, subject to the following conditions:
     14  *
     15  * The above copyright notice and this permission notice shall be included in
     16  * all copies or substantial portions of the Software.
     17  *
     18  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
     19  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
     20  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
     21  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
     22  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
     23  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
     24  * OTHER DEALINGS IN THE SOFTWARE.
     25  *
     26  * Authors: Dave Airlie
     27  *          Alex Deucher
     28  *          Jerome Glisse
     29  */
     30 
     31 #include <sys/cdefs.h>
     32 __KERNEL_RCSID(0, "$NetBSD: radeon_gem.c,v 1.1.1.3 2021/12/18 20:15:48 riastradh Exp $");
     33 
     34 #include <linux/pci.h>
     35 
     36 #include <drm/drm_debugfs.h>
     37 #include <drm/drm_device.h>
     38 #include <drm/drm_file.h>
     39 #include <drm/radeon_drm.h>
     40 
     41 #include "radeon.h"
     42 
     43 void radeon_gem_object_free(struct drm_gem_object *gobj)
     44 {
     45 	struct radeon_bo *robj = gem_to_radeon_bo(gobj);
     46 
     47 	if (robj) {
     48 		radeon_mn_unregister(robj);
     49 		radeon_bo_unref(&robj);
     50 	}
     51 }
     52 
     53 int radeon_gem_object_create(struct radeon_device *rdev, unsigned long size,
     54 				int alignment, int initial_domain,
     55 				u32 flags, bool kernel,
     56 				struct drm_gem_object **obj)
     57 {
     58 	struct radeon_bo *robj;
     59 	unsigned long max_size;
     60 	int r;
     61 
     62 	*obj = NULL;
     63 	/* At least align on page size */
     64 	if (alignment < PAGE_SIZE) {
     65 		alignment = PAGE_SIZE;
     66 	}
     67 
     68 	/* Maximum bo size is the unpinned gtt size since we use the gtt to
     69 	 * handle vram to system pool migrations.
     70 	 */
     71 	max_size = rdev->mc.gtt_size - rdev->gart_pin_size;
     72 	if (size > max_size) {
     73 		DRM_DEBUG("Allocation size %ldMb bigger than %ldMb limit\n",
     74 			  size >> 20, max_size >> 20);
     75 		return -ENOMEM;
     76 	}
     77 
     78 retry:
     79 	r = radeon_bo_create(rdev, size, alignment, kernel, initial_domain,
     80 			     flags, NULL, NULL, &robj);
     81 	if (r) {
     82 		if (r != -ERESTARTSYS) {
     83 			if (initial_domain == RADEON_GEM_DOMAIN_VRAM) {
     84 				initial_domain |= RADEON_GEM_DOMAIN_GTT;
     85 				goto retry;
     86 			}
     87 			DRM_ERROR("Failed to allocate GEM object (%ld, %d, %u, %d)\n",
     88 				  size, initial_domain, alignment, r);
     89 		}
     90 		return r;
     91 	}
     92 	*obj = &robj->tbo.base;
     93 	robj->pid = task_pid_nr(current);
     94 
     95 	mutex_lock(&rdev->gem.mutex);
     96 	list_add_tail(&robj->list, &rdev->gem.objects);
     97 	mutex_unlock(&rdev->gem.mutex);
     98 
     99 	return 0;
    100 }
    101 
    102 static int radeon_gem_set_domain(struct drm_gem_object *gobj,
    103 			  uint32_t rdomain, uint32_t wdomain)
    104 {
    105 	struct radeon_bo *robj;
    106 	uint32_t domain;
    107 	long r;
    108 
    109 	/* FIXME: reeimplement */
    110 	robj = gem_to_radeon_bo(gobj);
    111 	/* work out where to validate the buffer to */
    112 	domain = wdomain;
    113 	if (!domain) {
    114 		domain = rdomain;
    115 	}
    116 	if (!domain) {
    117 		/* Do nothings */
    118 		pr_warn("Set domain without domain !\n");
    119 		return 0;
    120 	}
    121 	if (domain == RADEON_GEM_DOMAIN_CPU) {
    122 		/* Asking for cpu access wait for object idle */
    123 		r = dma_resv_wait_timeout_rcu(robj->tbo.base.resv, true, true, 30 * HZ);
    124 		if (!r)
    125 			r = -EBUSY;
    126 
    127 		if (r < 0 && r != -EINTR) {
    128 			pr_err("Failed to wait for object: %li\n", r);
    129 			return r;
    130 		}
    131 	}
    132 	if (domain == RADEON_GEM_DOMAIN_VRAM && robj->prime_shared_count) {
    133 		/* A BO that is associated with a dma-buf cannot be sensibly migrated to VRAM */
    134 		return -EINVAL;
    135 	}
    136 	return 0;
    137 }
    138 
    139 int radeon_gem_init(struct radeon_device *rdev)
    140 {
    141 	INIT_LIST_HEAD(&rdev->gem.objects);
    142 	return 0;
    143 }
    144 
    145 void radeon_gem_fini(struct radeon_device *rdev)
    146 {
    147 	radeon_bo_force_delete(rdev);
    148 }
    149 
    150 /*
    151  * Call from drm_gem_handle_create which appear in both new and open ioctl
    152  * case.
    153  */
    154 int radeon_gem_object_open(struct drm_gem_object *obj, struct drm_file *file_priv)
    155 {
    156 	struct radeon_bo *rbo = gem_to_radeon_bo(obj);
    157 	struct radeon_device *rdev = rbo->rdev;
    158 	struct radeon_fpriv *fpriv = file_priv->driver_priv;
    159 	struct radeon_vm *vm = &fpriv->vm;
    160 	struct radeon_bo_va *bo_va;
    161 	int r;
    162 
    163 	if ((rdev->family < CHIP_CAYMAN) ||
    164 	    (!rdev->accel_working)) {
    165 		return 0;
    166 	}
    167 
    168 	r = radeon_bo_reserve(rbo, false);
    169 	if (r) {
    170 		return r;
    171 	}
    172 
    173 	bo_va = radeon_vm_bo_find(vm, rbo);
    174 	if (!bo_va) {
    175 		bo_va = radeon_vm_bo_add(rdev, vm, rbo);
    176 	} else {
    177 		++bo_va->ref_count;
    178 	}
    179 	radeon_bo_unreserve(rbo);
    180 
    181 	return 0;
    182 }
    183 
    184 void radeon_gem_object_close(struct drm_gem_object *obj,
    185 			     struct drm_file *file_priv)
    186 {
    187 	struct radeon_bo *rbo = gem_to_radeon_bo(obj);
    188 	struct radeon_device *rdev = rbo->rdev;
    189 	struct radeon_fpriv *fpriv = file_priv->driver_priv;
    190 	struct radeon_vm *vm = &fpriv->vm;
    191 	struct radeon_bo_va *bo_va;
    192 	int r;
    193 
    194 	if ((rdev->family < CHIP_CAYMAN) ||
    195 	    (!rdev->accel_working)) {
    196 		return;
    197 	}
    198 
    199 	r = radeon_bo_reserve(rbo, true);
    200 	if (r) {
    201 		dev_err(rdev->dev, "leaking bo va because "
    202 			"we fail to reserve bo (%d)\n", r);
    203 		return;
    204 	}
    205 	bo_va = radeon_vm_bo_find(vm, rbo);
    206 	if (bo_va) {
    207 		if (--bo_va->ref_count == 0) {
    208 			radeon_vm_bo_rmv(rdev, bo_va);
    209 		}
    210 	}
    211 	radeon_bo_unreserve(rbo);
    212 }
    213 
    214 static int radeon_gem_handle_lockup(struct radeon_device *rdev, int r)
    215 {
    216 	if (r == -EDEADLK) {
    217 		r = radeon_gpu_reset(rdev);
    218 		if (!r)
    219 			r = -EAGAIN;
    220 	}
    221 	return r;
    222 }
    223 
    224 /*
    225  * GEM ioctls.
    226  */
    227 int radeon_gem_info_ioctl(struct drm_device *dev, void *data,
    228 			  struct drm_file *filp)
    229 {
    230 	struct radeon_device *rdev = dev->dev_private;
    231 	struct drm_radeon_gem_info *args = data;
    232 	struct ttm_mem_type_manager *man;
    233 
    234 	man = &rdev->mman.bdev.man[TTM_PL_VRAM];
    235 
    236 	args->vram_size = (u64)man->size << PAGE_SHIFT;
    237 	args->vram_visible = rdev->mc.visible_vram_size;
    238 	args->vram_visible -= rdev->vram_pin_size;
    239 	args->gart_size = rdev->mc.gtt_size;
    240 	args->gart_size -= rdev->gart_pin_size;
    241 
    242 	return 0;
    243 }
    244 
    245 int radeon_gem_pread_ioctl(struct drm_device *dev, void *data,
    246 			   struct drm_file *filp)
    247 {
    248 	/* TODO: implement */
    249 	DRM_ERROR("unimplemented %s\n", __func__);
    250 	return -ENOSYS;
    251 }
    252 
    253 int radeon_gem_pwrite_ioctl(struct drm_device *dev, void *data,
    254 			    struct drm_file *filp)
    255 {
    256 	/* TODO: implement */
    257 	DRM_ERROR("unimplemented %s\n", __func__);
    258 	return -ENOSYS;
    259 }
    260 
    261 int radeon_gem_create_ioctl(struct drm_device *dev, void *data,
    262 			    struct drm_file *filp)
    263 {
    264 	struct radeon_device *rdev = dev->dev_private;
    265 	struct drm_radeon_gem_create *args = data;
    266 	struct drm_gem_object *gobj;
    267 	uint32_t handle;
    268 	int r;
    269 
    270 	down_read(&rdev->exclusive_lock);
    271 	/* create a gem object to contain this object in */
    272 	args->size = roundup(args->size, PAGE_SIZE);
    273 	r = radeon_gem_object_create(rdev, args->size, args->alignment,
    274 				     args->initial_domain, args->flags,
    275 				     false, &gobj);
    276 	if (r) {
    277 		up_read(&rdev->exclusive_lock);
    278 		r = radeon_gem_handle_lockup(rdev, r);
    279 		return r;
    280 	}
    281 	r = drm_gem_handle_create(filp, gobj, &handle);
    282 	/* drop reference from allocate - handle holds it now */
    283 	drm_gem_object_put_unlocked(gobj);
    284 	if (r) {
    285 		up_read(&rdev->exclusive_lock);
    286 		r = radeon_gem_handle_lockup(rdev, r);
    287 		return r;
    288 	}
    289 	args->handle = handle;
    290 	up_read(&rdev->exclusive_lock);
    291 	return 0;
    292 }
    293 
    294 int radeon_gem_userptr_ioctl(struct drm_device *dev, void *data,
    295 			     struct drm_file *filp)
    296 {
    297 	struct ttm_operation_ctx ctx = { true, false };
    298 	struct radeon_device *rdev = dev->dev_private;
    299 	struct drm_radeon_gem_userptr *args = data;
    300 	struct drm_gem_object *gobj;
    301 	struct radeon_bo *bo;
    302 	uint32_t handle;
    303 	int r;
    304 
    305 	args->addr = untagged_addr(args->addr);
    306 
    307 	if (offset_in_page(args->addr | args->size))
    308 		return -EINVAL;
    309 
    310 	/* reject unknown flag values */
    311 	if (args->flags & ~(RADEON_GEM_USERPTR_READONLY |
    312 	    RADEON_GEM_USERPTR_ANONONLY | RADEON_GEM_USERPTR_VALIDATE |
    313 	    RADEON_GEM_USERPTR_REGISTER))
    314 		return -EINVAL;
    315 
    316 	if (args->flags & RADEON_GEM_USERPTR_READONLY) {
    317 		/* readonly pages not tested on older hardware */
    318 		if (rdev->family < CHIP_R600)
    319 			return -EINVAL;
    320 
    321 	} else if (!(args->flags & RADEON_GEM_USERPTR_ANONONLY) ||
    322 		   !(args->flags & RADEON_GEM_USERPTR_REGISTER)) {
    323 
    324 		/* if we want to write to it we must require anonymous
    325 		   memory and install a MMU notifier */
    326 		return -EACCES;
    327 	}
    328 
    329 	down_read(&rdev->exclusive_lock);
    330 
    331 	/* create a gem object to contain this object in */
    332 	r = radeon_gem_object_create(rdev, args->size, 0,
    333 				     RADEON_GEM_DOMAIN_CPU, 0,
    334 				     false, &gobj);
    335 	if (r)
    336 		goto handle_lockup;
    337 
    338 	bo = gem_to_radeon_bo(gobj);
    339 	r = radeon_ttm_tt_set_userptr(bo->tbo.ttm, args->addr, args->flags);
    340 	if (r)
    341 		goto release_object;
    342 
    343 	if (args->flags & RADEON_GEM_USERPTR_REGISTER) {
    344 		r = radeon_mn_register(bo, args->addr);
    345 		if (r)
    346 			goto release_object;
    347 	}
    348 
    349 	if (args->flags & RADEON_GEM_USERPTR_VALIDATE) {
    350 		down_read(&current->mm->mmap_sem);
    351 		r = radeon_bo_reserve(bo, true);
    352 		if (r) {
    353 			up_read(&current->mm->mmap_sem);
    354 			goto release_object;
    355 		}
    356 
    357 		radeon_ttm_placement_from_domain(bo, RADEON_GEM_DOMAIN_GTT);
    358 		r = ttm_bo_validate(&bo->tbo, &bo->placement, &ctx);
    359 		radeon_bo_unreserve(bo);
    360 		up_read(&current->mm->mmap_sem);
    361 		if (r)
    362 			goto release_object;
    363 	}
    364 
    365 	r = drm_gem_handle_create(filp, gobj, &handle);
    366 	/* drop reference from allocate - handle holds it now */
    367 	drm_gem_object_put_unlocked(gobj);
    368 	if (r)
    369 		goto handle_lockup;
    370 
    371 	args->handle = handle;
    372 	up_read(&rdev->exclusive_lock);
    373 	return 0;
    374 
    375 release_object:
    376 	drm_gem_object_put_unlocked(gobj);
    377 
    378 handle_lockup:
    379 	up_read(&rdev->exclusive_lock);
    380 	r = radeon_gem_handle_lockup(rdev, r);
    381 
    382 	return r;
    383 }
    384 
    385 int radeon_gem_set_domain_ioctl(struct drm_device *dev, void *data,
    386 				struct drm_file *filp)
    387 {
    388 	/* transition the BO to a domain -
    389 	 * just validate the BO into a certain domain */
    390 	struct radeon_device *rdev = dev->dev_private;
    391 	struct drm_radeon_gem_set_domain *args = data;
    392 	struct drm_gem_object *gobj;
    393 	struct radeon_bo *robj;
    394 	int r;
    395 
    396 	/* for now if someone requests domain CPU -
    397 	 * just make sure the buffer is finished with */
    398 	down_read(&rdev->exclusive_lock);
    399 
    400 	/* just do a BO wait for now */
    401 	gobj = drm_gem_object_lookup(filp, args->handle);
    402 	if (gobj == NULL) {
    403 		up_read(&rdev->exclusive_lock);
    404 		return -ENOENT;
    405 	}
    406 	robj = gem_to_radeon_bo(gobj);
    407 
    408 	r = radeon_gem_set_domain(gobj, args->read_domains, args->write_domain);
    409 
    410 	drm_gem_object_put_unlocked(gobj);
    411 	up_read(&rdev->exclusive_lock);
    412 	r = radeon_gem_handle_lockup(robj->rdev, r);
    413 	return r;
    414 }
    415 
    416 int radeon_mode_dumb_mmap(struct drm_file *filp,
    417 			  struct drm_device *dev,
    418 			  uint32_t handle, uint64_t *offset_p)
    419 {
    420 	struct drm_gem_object *gobj;
    421 	struct radeon_bo *robj;
    422 
    423 	gobj = drm_gem_object_lookup(filp, handle);
    424 	if (gobj == NULL) {
    425 		return -ENOENT;
    426 	}
    427 	robj = gem_to_radeon_bo(gobj);
    428 	if (radeon_ttm_tt_has_userptr(robj->tbo.ttm)) {
    429 		drm_gem_object_put_unlocked(gobj);
    430 		return -EPERM;
    431 	}
    432 	*offset_p = radeon_bo_mmap_offset(robj);
    433 	drm_gem_object_put_unlocked(gobj);
    434 	return 0;
    435 }
    436 
    437 int radeon_gem_mmap_ioctl(struct drm_device *dev, void *data,
    438 			  struct drm_file *filp)
    439 {
    440 	struct drm_radeon_gem_mmap *args = data;
    441 
    442 	return radeon_mode_dumb_mmap(filp, dev, args->handle, &args->addr_ptr);
    443 }
    444 
    445 int radeon_gem_busy_ioctl(struct drm_device *dev, void *data,
    446 			  struct drm_file *filp)
    447 {
    448 	struct drm_radeon_gem_busy *args = data;
    449 	struct drm_gem_object *gobj;
    450 	struct radeon_bo *robj;
    451 	int r;
    452 	uint32_t cur_placement = 0;
    453 
    454 	gobj = drm_gem_object_lookup(filp, args->handle);
    455 	if (gobj == NULL) {
    456 		return -ENOENT;
    457 	}
    458 	robj = gem_to_radeon_bo(gobj);
    459 
    460 	r = dma_resv_test_signaled_rcu(robj->tbo.base.resv, true);
    461 	if (r == 0)
    462 		r = -EBUSY;
    463 	else
    464 		r = 0;
    465 
    466 	cur_placement = READ_ONCE(robj->tbo.mem.mem_type);
    467 	args->domain = radeon_mem_type_to_domain(cur_placement);
    468 	drm_gem_object_put_unlocked(gobj);
    469 	return r;
    470 }
    471 
    472 int radeon_gem_wait_idle_ioctl(struct drm_device *dev, void *data,
    473 			      struct drm_file *filp)
    474 {
    475 	struct radeon_device *rdev = dev->dev_private;
    476 	struct drm_radeon_gem_wait_idle *args = data;
    477 	struct drm_gem_object *gobj;
    478 	struct radeon_bo *robj;
    479 	int r = 0;
    480 	uint32_t cur_placement = 0;
    481 	long ret;
    482 
    483 	gobj = drm_gem_object_lookup(filp, args->handle);
    484 	if (gobj == NULL) {
    485 		return -ENOENT;
    486 	}
    487 	robj = gem_to_radeon_bo(gobj);
    488 
    489 	ret = dma_resv_wait_timeout_rcu(robj->tbo.base.resv, true, true, 30 * HZ);
    490 	if (ret == 0)
    491 		r = -EBUSY;
    492 	else if (ret < 0)
    493 		r = ret;
    494 
    495 	/* Flush HDP cache via MMIO if necessary */
    496 	cur_placement = READ_ONCE(robj->tbo.mem.mem_type);
    497 	if (rdev->asic->mmio_hdp_flush &&
    498 	    radeon_mem_type_to_domain(cur_placement) == RADEON_GEM_DOMAIN_VRAM)
    499 		robj->rdev->asic->mmio_hdp_flush(rdev);
    500 	drm_gem_object_put_unlocked(gobj);
    501 	r = radeon_gem_handle_lockup(rdev, r);
    502 	return r;
    503 }
    504 
    505 int radeon_gem_set_tiling_ioctl(struct drm_device *dev, void *data,
    506 				struct drm_file *filp)
    507 {
    508 	struct drm_radeon_gem_set_tiling *args = data;
    509 	struct drm_gem_object *gobj;
    510 	struct radeon_bo *robj;
    511 	int r = 0;
    512 
    513 	DRM_DEBUG("%d \n", args->handle);
    514 	gobj = drm_gem_object_lookup(filp, args->handle);
    515 	if (gobj == NULL)
    516 		return -ENOENT;
    517 	robj = gem_to_radeon_bo(gobj);
    518 	r = radeon_bo_set_tiling_flags(robj, args->tiling_flags, args->pitch);
    519 	drm_gem_object_put_unlocked(gobj);
    520 	return r;
    521 }
    522 
    523 int radeon_gem_get_tiling_ioctl(struct drm_device *dev, void *data,
    524 				struct drm_file *filp)
    525 {
    526 	struct drm_radeon_gem_get_tiling *args = data;
    527 	struct drm_gem_object *gobj;
    528 	struct radeon_bo *rbo;
    529 	int r = 0;
    530 
    531 	DRM_DEBUG("\n");
    532 	gobj = drm_gem_object_lookup(filp, args->handle);
    533 	if (gobj == NULL)
    534 		return -ENOENT;
    535 	rbo = gem_to_radeon_bo(gobj);
    536 	r = radeon_bo_reserve(rbo, false);
    537 	if (unlikely(r != 0))
    538 		goto out;
    539 	radeon_bo_get_tiling_flags(rbo, &args->tiling_flags, &args->pitch);
    540 	radeon_bo_unreserve(rbo);
    541 out:
    542 	drm_gem_object_put_unlocked(gobj);
    543 	return r;
    544 }
    545 
    546 /**
    547  * radeon_gem_va_update_vm -update the bo_va in its VM
    548  *
    549  * @rdev: radeon_device pointer
    550  * @bo_va: bo_va to update
    551  *
    552  * Update the bo_va directly after setting it's address. Errors are not
    553  * vital here, so they are not reported back to userspace.
    554  */
    555 static void radeon_gem_va_update_vm(struct radeon_device *rdev,
    556 				    struct radeon_bo_va *bo_va)
    557 {
    558 	struct ttm_validate_buffer tv, *entry;
    559 	struct radeon_bo_list *vm_bos;
    560 	struct ww_acquire_ctx ticket;
    561 	struct list_head list;
    562 	unsigned domain;
    563 	int r;
    564 
    565 	INIT_LIST_HEAD(&list);
    566 
    567 	tv.bo = &bo_va->bo->tbo;
    568 	tv.num_shared = 1;
    569 	list_add(&tv.head, &list);
    570 
    571 	vm_bos = radeon_vm_get_bos(rdev, bo_va->vm, &list);
    572 	if (!vm_bos)
    573 		return;
    574 
    575 	r = ttm_eu_reserve_buffers(&ticket, &list, true, NULL);
    576 	if (r)
    577 		goto error_free;
    578 
    579 	list_for_each_entry(entry, &list, head) {
    580 		domain = radeon_mem_type_to_domain(entry->bo->mem.mem_type);
    581 		/* if anything is swapped out don't swap it in here,
    582 		   just abort and wait for the next CS */
    583 		if (domain == RADEON_GEM_DOMAIN_CPU)
    584 			goto error_unreserve;
    585 	}
    586 
    587 	mutex_lock(&bo_va->vm->mutex);
    588 	r = radeon_vm_clear_freed(rdev, bo_va->vm);
    589 	if (r)
    590 		goto error_unlock;
    591 
    592 	if (bo_va->it.start)
    593 		r = radeon_vm_bo_update(rdev, bo_va, &bo_va->bo->tbo.mem);
    594 
    595 error_unlock:
    596 	mutex_unlock(&bo_va->vm->mutex);
    597 
    598 error_unreserve:
    599 	ttm_eu_backoff_reservation(&ticket, &list);
    600 
    601 error_free:
    602 	kvfree(vm_bos);
    603 
    604 	if (r && r != -ERESTARTSYS)
    605 		DRM_ERROR("Couldn't update BO_VA (%d)\n", r);
    606 }
    607 
    608 int radeon_gem_va_ioctl(struct drm_device *dev, void *data,
    609 			  struct drm_file *filp)
    610 {
    611 	struct drm_radeon_gem_va *args = data;
    612 	struct drm_gem_object *gobj;
    613 	struct radeon_device *rdev = dev->dev_private;
    614 	struct radeon_fpriv *fpriv = filp->driver_priv;
    615 	struct radeon_bo *rbo;
    616 	struct radeon_bo_va *bo_va;
    617 	u32 invalid_flags;
    618 	int r = 0;
    619 
    620 	if (!rdev->vm_manager.enabled) {
    621 		args->operation = RADEON_VA_RESULT_ERROR;
    622 		return -ENOTTY;
    623 	}
    624 
    625 	/* !! DONT REMOVE !!
    626 	 * We don't support vm_id yet, to be sure we don't have have broken
    627 	 * userspace, reject anyone trying to use non 0 value thus moving
    628 	 * forward we can use those fields without breaking existant userspace
    629 	 */
    630 	if (args->vm_id) {
    631 		args->operation = RADEON_VA_RESULT_ERROR;
    632 		return -EINVAL;
    633 	}
    634 
    635 	if (args->offset < RADEON_VA_RESERVED_SIZE) {
    636 		dev_err(&dev->pdev->dev,
    637 			"offset 0x%lX is in reserved area 0x%X\n",
    638 			(unsigned long)args->offset,
    639 			RADEON_VA_RESERVED_SIZE);
    640 		args->operation = RADEON_VA_RESULT_ERROR;
    641 		return -EINVAL;
    642 	}
    643 
    644 	/* don't remove, we need to enforce userspace to set the snooped flag
    645 	 * otherwise we will endup with broken userspace and we won't be able
    646 	 * to enable this feature without adding new interface
    647 	 */
    648 	invalid_flags = RADEON_VM_PAGE_VALID | RADEON_VM_PAGE_SYSTEM;
    649 	if ((args->flags & invalid_flags)) {
    650 		dev_err(&dev->pdev->dev, "invalid flags 0x%08X vs 0x%08X\n",
    651 			args->flags, invalid_flags);
    652 		args->operation = RADEON_VA_RESULT_ERROR;
    653 		return -EINVAL;
    654 	}
    655 
    656 	switch (args->operation) {
    657 	case RADEON_VA_MAP:
    658 	case RADEON_VA_UNMAP:
    659 		break;
    660 	default:
    661 		dev_err(&dev->pdev->dev, "unsupported operation %d\n",
    662 			args->operation);
    663 		args->operation = RADEON_VA_RESULT_ERROR;
    664 		return -EINVAL;
    665 	}
    666 
    667 	gobj = drm_gem_object_lookup(filp, args->handle);
    668 	if (gobj == NULL) {
    669 		args->operation = RADEON_VA_RESULT_ERROR;
    670 		return -ENOENT;
    671 	}
    672 	rbo = gem_to_radeon_bo(gobj);
    673 	r = radeon_bo_reserve(rbo, false);
    674 	if (r) {
    675 		args->operation = RADEON_VA_RESULT_ERROR;
    676 		drm_gem_object_put_unlocked(gobj);
    677 		return r;
    678 	}
    679 	bo_va = radeon_vm_bo_find(&fpriv->vm, rbo);
    680 	if (!bo_va) {
    681 		args->operation = RADEON_VA_RESULT_ERROR;
    682 		radeon_bo_unreserve(rbo);
    683 		drm_gem_object_put_unlocked(gobj);
    684 		return -ENOENT;
    685 	}
    686 
    687 	switch (args->operation) {
    688 	case RADEON_VA_MAP:
    689 		if (bo_va->it.start) {
    690 			args->operation = RADEON_VA_RESULT_VA_EXIST;
    691 			args->offset = bo_va->it.start * RADEON_GPU_PAGE_SIZE;
    692 			radeon_bo_unreserve(rbo);
    693 			goto out;
    694 		}
    695 		r = radeon_vm_bo_set_addr(rdev, bo_va, args->offset, args->flags);
    696 		break;
    697 	case RADEON_VA_UNMAP:
    698 		r = radeon_vm_bo_set_addr(rdev, bo_va, 0, 0);
    699 		break;
    700 	default:
    701 		break;
    702 	}
    703 	if (!r)
    704 		radeon_gem_va_update_vm(rdev, bo_va);
    705 	args->operation = RADEON_VA_RESULT_OK;
    706 	if (r) {
    707 		args->operation = RADEON_VA_RESULT_ERROR;
    708 	}
    709 out:
    710 	drm_gem_object_put_unlocked(gobj);
    711 	return r;
    712 }
    713 
    714 int radeon_gem_op_ioctl(struct drm_device *dev, void *data,
    715 			struct drm_file *filp)
    716 {
    717 	struct drm_radeon_gem_op *args = data;
    718 	struct drm_gem_object *gobj;
    719 	struct radeon_bo *robj;
    720 	int r;
    721 
    722 	gobj = drm_gem_object_lookup(filp, args->handle);
    723 	if (gobj == NULL) {
    724 		return -ENOENT;
    725 	}
    726 	robj = gem_to_radeon_bo(gobj);
    727 
    728 	r = -EPERM;
    729 	if (radeon_ttm_tt_has_userptr(robj->tbo.ttm))
    730 		goto out;
    731 
    732 	r = radeon_bo_reserve(robj, false);
    733 	if (unlikely(r))
    734 		goto out;
    735 
    736 	switch (args->op) {
    737 	case RADEON_GEM_OP_GET_INITIAL_DOMAIN:
    738 		args->value = robj->initial_domain;
    739 		break;
    740 	case RADEON_GEM_OP_SET_INITIAL_DOMAIN:
    741 		robj->initial_domain = args->value & (RADEON_GEM_DOMAIN_VRAM |
    742 						      RADEON_GEM_DOMAIN_GTT |
    743 						      RADEON_GEM_DOMAIN_CPU);
    744 		break;
    745 	default:
    746 		r = -EINVAL;
    747 	}
    748 
    749 	radeon_bo_unreserve(robj);
    750 out:
    751 	drm_gem_object_put_unlocked(gobj);
    752 	return r;
    753 }
    754 
    755 int radeon_mode_dumb_create(struct drm_file *file_priv,
    756 			    struct drm_device *dev,
    757 			    struct drm_mode_create_dumb *args)
    758 {
    759 	struct radeon_device *rdev = dev->dev_private;
    760 	struct drm_gem_object *gobj;
    761 	uint32_t handle;
    762 	int r;
    763 
    764 	args->pitch = radeon_align_pitch(rdev, args->width,
    765 					 DIV_ROUND_UP(args->bpp, 8), 0);
    766 	args->size = args->pitch * args->height;
    767 	args->size = ALIGN(args->size, PAGE_SIZE);
    768 
    769 	r = radeon_gem_object_create(rdev, args->size, 0,
    770 				     RADEON_GEM_DOMAIN_VRAM, 0,
    771 				     false, &gobj);
    772 	if (r)
    773 		return -ENOMEM;
    774 
    775 	r = drm_gem_handle_create(file_priv, gobj, &handle);
    776 	/* drop reference from allocate - handle holds it now */
    777 	drm_gem_object_put_unlocked(gobj);
    778 	if (r) {
    779 		return r;
    780 	}
    781 	args->handle = handle;
    782 	return 0;
    783 }
    784 
    785 #if defined(CONFIG_DEBUG_FS)
    786 static int radeon_debugfs_gem_info(struct seq_file *m, void *data)
    787 {
    788 	struct drm_info_node *node = (struct drm_info_node *)m->private;
    789 	struct drm_device *dev = node->minor->dev;
    790 	struct radeon_device *rdev = dev->dev_private;
    791 	struct radeon_bo *rbo;
    792 	unsigned i = 0;
    793 
    794 	mutex_lock(&rdev->gem.mutex);
    795 	list_for_each_entry(rbo, &rdev->gem.objects, list) {
    796 		unsigned domain;
    797 		const char *placement;
    798 
    799 		domain = radeon_mem_type_to_domain(rbo->tbo.mem.mem_type);
    800 		switch (domain) {
    801 		case RADEON_GEM_DOMAIN_VRAM:
    802 			placement = "VRAM";
    803 			break;
    804 		case RADEON_GEM_DOMAIN_GTT:
    805 			placement = " GTT";
    806 			break;
    807 		case RADEON_GEM_DOMAIN_CPU:
    808 		default:
    809 			placement = " CPU";
    810 			break;
    811 		}
    812 		seq_printf(m, "bo[0x%08x] %8ldkB %8ldMB %s pid %8ld\n",
    813 			   i, radeon_bo_size(rbo) >> 10, radeon_bo_size(rbo) >> 20,
    814 			   placement, (unsigned long)rbo->pid);
    815 		i++;
    816 	}
    817 	mutex_unlock(&rdev->gem.mutex);
    818 	return 0;
    819 }
    820 
    821 static struct drm_info_list radeon_debugfs_gem_list[] = {
    822 	{"radeon_gem_info", &radeon_debugfs_gem_info, 0, NULL},
    823 };
    824 #endif
    825 
    826 int radeon_gem_debugfs_init(struct radeon_device *rdev)
    827 {
    828 #if defined(CONFIG_DEBUG_FS)
    829 	return radeon_debugfs_add_files(rdev, radeon_debugfs_gem_list, 1);
    830 #endif
    831 	return 0;
    832 }
    833