radeon_gem.c revision 1.3.16.1 1 /* $NetBSD: radeon_gem.c,v 1.3.16.1 2018/09/06 06:56:32 pgoyette Exp $ */
2
3 /*
4 * Copyright 2008 Advanced Micro Devices, Inc.
5 * Copyright 2008 Red Hat Inc.
6 * Copyright 2009 Jerome Glisse.
7 *
8 * Permission is hereby granted, free of charge, to any person obtaining a
9 * copy of this software and associated documentation files (the "Software"),
10 * to deal in the Software without restriction, including without limitation
11 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
12 * and/or sell copies of the Software, and to permit persons to whom the
13 * Software is furnished to do so, subject to the following conditions:
14 *
15 * The above copyright notice and this permission notice shall be included in
16 * all copies or substantial portions of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
21 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
22 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
23 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
24 * OTHER DEALINGS IN THE SOFTWARE.
25 *
26 * Authors: Dave Airlie
27 * Alex Deucher
28 * Jerome Glisse
29 */
30 #include <sys/cdefs.h>
31 __KERNEL_RCSID(0, "$NetBSD: radeon_gem.c,v 1.3.16.1 2018/09/06 06:56:32 pgoyette Exp $");
32
33 #include <drm/drmP.h>
34 #include <drm/radeon_drm.h>
35 #include "radeon.h"
36
37 void radeon_gem_object_free(struct drm_gem_object *gobj)
38 {
39 struct radeon_bo *robj = gem_to_radeon_bo(gobj);
40
41 if (robj) {
42 if (robj->gem_base.import_attach)
43 drm_prime_gem_destroy(&robj->gem_base, robj->tbo.sg);
44 radeon_mn_unregister(robj);
45 radeon_bo_unref(&robj);
46 }
47 }
48
49 int radeon_gem_object_create(struct radeon_device *rdev, unsigned long size,
50 int alignment, int initial_domain,
51 u32 flags, bool kernel,
52 struct drm_gem_object **obj)
53 {
54 struct radeon_bo *robj;
55 unsigned long max_size;
56 int r;
57
58 *obj = NULL;
59 /* At least align on page size */
60 if (alignment < PAGE_SIZE) {
61 alignment = PAGE_SIZE;
62 }
63
64 /* Maximum bo size is the unpinned gtt size since we use the gtt to
65 * handle vram to system pool migrations.
66 */
67 max_size = rdev->mc.gtt_size - rdev->gart_pin_size;
68 if (size > max_size) {
69 DRM_DEBUG("Allocation size %ldMb bigger than %ldMb limit\n",
70 size >> 20, max_size >> 20);
71 return -ENOMEM;
72 }
73
74 retry:
75 r = radeon_bo_create(rdev, size, alignment, kernel, initial_domain,
76 flags, NULL, NULL, &robj);
77 if (r) {
78 if (r != -ERESTARTSYS) {
79 if (initial_domain == RADEON_GEM_DOMAIN_VRAM) {
80 initial_domain |= RADEON_GEM_DOMAIN_GTT;
81 goto retry;
82 }
83 DRM_ERROR("Failed to allocate GEM object (%ld, %d, %u, %d)\n",
84 size, initial_domain, alignment, r);
85 }
86 return r;
87 }
88 *obj = &robj->gem_base;
89 #ifndef __NetBSD__
90 robj->pid = task_pid_nr(current);
91 #endif
92
93 mutex_lock(&rdev->gem.mutex);
94 list_add_tail(&robj->list, &rdev->gem.objects);
95 mutex_unlock(&rdev->gem.mutex);
96
97 return 0;
98 }
99
100 static int radeon_gem_set_domain(struct drm_gem_object *gobj,
101 uint32_t rdomain, uint32_t wdomain)
102 {
103 struct radeon_bo *robj;
104 uint32_t domain;
105 long r;
106
107 /* FIXME: reeimplement */
108 robj = gem_to_radeon_bo(gobj);
109 /* work out where to validate the buffer to */
110 domain = wdomain;
111 if (!domain) {
112 domain = rdomain;
113 }
114 if (!domain) {
115 /* Do nothings */
116 printk(KERN_WARNING "Set domain without domain !\n");
117 return 0;
118 }
119 if (domain == RADEON_GEM_DOMAIN_CPU) {
120 /* Asking for cpu access wait for object idle */
121 r = reservation_object_wait_timeout_rcu(robj->tbo.resv, true, true, 30 * HZ);
122 if (!r)
123 r = -EBUSY;
124
125 if (r < 0 && r != -EINTR) {
126 printk(KERN_ERR "Failed to wait for object: %li\n", r);
127 return r;
128 }
129 }
130 return 0;
131 }
132
133 int radeon_gem_init(struct radeon_device *rdev)
134 {
135 INIT_LIST_HEAD(&rdev->gem.objects);
136 return 0;
137 }
138
139 void radeon_gem_fini(struct radeon_device *rdev)
140 {
141 radeon_bo_force_delete(rdev);
142 }
143
144 /*
145 * Call from drm_gem_handle_create which appear in both new and open ioctl
146 * case.
147 */
148 int radeon_gem_object_open(struct drm_gem_object *obj, struct drm_file *file_priv)
149 {
150 struct radeon_bo *rbo = gem_to_radeon_bo(obj);
151 struct radeon_device *rdev = rbo->rdev;
152 struct radeon_fpriv *fpriv = file_priv->driver_priv;
153 struct radeon_vm *vm = &fpriv->vm;
154 struct radeon_bo_va *bo_va;
155 int r;
156
157 if ((rdev->family < CHIP_CAYMAN) ||
158 (!rdev->accel_working)) {
159 return 0;
160 }
161
162 r = radeon_bo_reserve(rbo, false);
163 if (r) {
164 return r;
165 }
166
167 bo_va = radeon_vm_bo_find(vm, rbo);
168 if (!bo_va) {
169 bo_va = radeon_vm_bo_add(rdev, vm, rbo);
170 } else {
171 ++bo_va->ref_count;
172 }
173 radeon_bo_unreserve(rbo);
174
175 return 0;
176 }
177
178 void radeon_gem_object_close(struct drm_gem_object *obj,
179 struct drm_file *file_priv)
180 {
181 struct radeon_bo *rbo = gem_to_radeon_bo(obj);
182 struct radeon_device *rdev = rbo->rdev;
183 struct radeon_fpriv *fpriv = file_priv->driver_priv;
184 struct radeon_vm *vm = &fpriv->vm;
185 struct radeon_bo_va *bo_va;
186 int r;
187
188 if ((rdev->family < CHIP_CAYMAN) ||
189 (!rdev->accel_working)) {
190 return;
191 }
192
193 r = radeon_bo_reserve(rbo, true);
194 if (r) {
195 dev_err(rdev->dev, "leaking bo va because "
196 "we fail to reserve bo (%d)\n", r);
197 return;
198 }
199 bo_va = radeon_vm_bo_find(vm, rbo);
200 if (bo_va) {
201 if (--bo_va->ref_count == 0) {
202 radeon_vm_bo_rmv(rdev, bo_va);
203 }
204 }
205 radeon_bo_unreserve(rbo);
206 }
207
208 static int radeon_gem_handle_lockup(struct radeon_device *rdev, int r)
209 {
210 if (r == -EDEADLK) {
211 r = radeon_gpu_reset(rdev);
212 if (!r)
213 r = -EAGAIN;
214 }
215 return r;
216 }
217
218 /*
219 * GEM ioctls.
220 */
221 int radeon_gem_info_ioctl(struct drm_device *dev, void *data,
222 struct drm_file *filp)
223 {
224 struct radeon_device *rdev = dev->dev_private;
225 struct drm_radeon_gem_info *args = data;
226 struct ttm_mem_type_manager *man;
227
228 man = &rdev->mman.bdev.man[TTM_PL_VRAM];
229
230 args->vram_size = rdev->mc.real_vram_size;
231 args->vram_visible = (u64)man->size << PAGE_SHIFT;
232 args->vram_visible -= rdev->vram_pin_size;
233 args->gart_size = rdev->mc.gtt_size;
234 args->gart_size -= rdev->gart_pin_size;
235
236 return 0;
237 }
238
239 int radeon_gem_pread_ioctl(struct drm_device *dev, void *data,
240 struct drm_file *filp)
241 {
242 /* TODO: implement */
243 DRM_ERROR("unimplemented %s\n", __func__);
244 return -ENOSYS;
245 }
246
247 int radeon_gem_pwrite_ioctl(struct drm_device *dev, void *data,
248 struct drm_file *filp)
249 {
250 /* TODO: implement */
251 DRM_ERROR("unimplemented %s\n", __func__);
252 return -ENOSYS;
253 }
254
255 int radeon_gem_create_ioctl(struct drm_device *dev, void *data,
256 struct drm_file *filp)
257 {
258 struct radeon_device *rdev = dev->dev_private;
259 struct drm_radeon_gem_create *args = data;
260 struct drm_gem_object *gobj;
261 uint32_t handle;
262 int r;
263
264 down_read(&rdev->exclusive_lock);
265 /* create a gem object to contain this object in */
266 args->size = roundup(args->size, PAGE_SIZE);
267 r = radeon_gem_object_create(rdev, args->size, args->alignment,
268 args->initial_domain, args->flags,
269 false, &gobj);
270 if (r) {
271 up_read(&rdev->exclusive_lock);
272 r = radeon_gem_handle_lockup(rdev, r);
273 return r;
274 }
275 r = drm_gem_handle_create(filp, gobj, &handle);
276 /* drop reference from allocate - handle holds it now */
277 drm_gem_object_unreference_unlocked(gobj);
278 if (r) {
279 up_read(&rdev->exclusive_lock);
280 r = radeon_gem_handle_lockup(rdev, r);
281 return r;
282 }
283 args->handle = handle;
284 up_read(&rdev->exclusive_lock);
285 return 0;
286 }
287
288 int radeon_gem_userptr_ioctl(struct drm_device *dev, void *data,
289 struct drm_file *filp)
290 {
291 #ifdef __NetBSD__
292 /*
293 * XXX Too painful to contemplate for now. If you add this,
294 * make sure to update radeon_cs.c radeon_cs_parser_relocs
295 * (need_mmap_lock), and anything else using
296 * radeon_ttm_tt_has_userptr.
297 */
298 return -ENODEV;
299 #else
300 struct radeon_device *rdev = dev->dev_private;
301 struct drm_radeon_gem_userptr *args = data;
302 struct drm_gem_object *gobj;
303 struct radeon_bo *bo;
304 uint32_t handle;
305 int r;
306
307 if (offset_in_page(args->addr | args->size))
308 return -EINVAL;
309
310 /* reject unknown flag values */
311 if (args->flags & ~(RADEON_GEM_USERPTR_READONLY |
312 RADEON_GEM_USERPTR_ANONONLY | RADEON_GEM_USERPTR_VALIDATE |
313 RADEON_GEM_USERPTR_REGISTER))
314 return -EINVAL;
315
316 if (args->flags & RADEON_GEM_USERPTR_READONLY) {
317 /* readonly pages not tested on older hardware */
318 if (rdev->family < CHIP_R600)
319 return -EINVAL;
320
321 } else if (!(args->flags & RADEON_GEM_USERPTR_ANONONLY) ||
322 !(args->flags & RADEON_GEM_USERPTR_REGISTER)) {
323
324 /* if we want to write to it we must require anonymous
325 memory and install a MMU notifier */
326 return -EACCES;
327 }
328
329 down_read(&rdev->exclusive_lock);
330
331 /* create a gem object to contain this object in */
332 r = radeon_gem_object_create(rdev, args->size, 0,
333 RADEON_GEM_DOMAIN_CPU, 0,
334 false, &gobj);
335 if (r)
336 goto handle_lockup;
337
338 bo = gem_to_radeon_bo(gobj);
339 r = radeon_ttm_tt_set_userptr(bo->tbo.ttm, args->addr, args->flags);
340 if (r)
341 goto release_object;
342
343 if (args->flags & RADEON_GEM_USERPTR_REGISTER) {
344 r = radeon_mn_register(bo, args->addr);
345 if (r)
346 goto release_object;
347 }
348
349 if (args->flags & RADEON_GEM_USERPTR_VALIDATE) {
350 down_read(¤t->mm->mmap_sem);
351 r = radeon_bo_reserve(bo, true);
352 if (r) {
353 up_read(¤t->mm->mmap_sem);
354 goto release_object;
355 }
356
357 radeon_ttm_placement_from_domain(bo, RADEON_GEM_DOMAIN_GTT);
358 r = ttm_bo_validate(&bo->tbo, &bo->placement, true, false);
359 radeon_bo_unreserve(bo);
360 up_read(¤t->mm->mmap_sem);
361 if (r)
362 goto release_object;
363 }
364
365 r = drm_gem_handle_create(filp, gobj, &handle);
366 /* drop reference from allocate - handle holds it now */
367 drm_gem_object_unreference_unlocked(gobj);
368 if (r)
369 goto handle_lockup;
370
371 args->handle = handle;
372 up_read(&rdev->exclusive_lock);
373 return 0;
374
375 release_object:
376 drm_gem_object_unreference_unlocked(gobj);
377
378 handle_lockup:
379 up_read(&rdev->exclusive_lock);
380 r = radeon_gem_handle_lockup(rdev, r);
381
382 return r;
383 #endif
384 }
385
386 int radeon_gem_set_domain_ioctl(struct drm_device *dev, void *data,
387 struct drm_file *filp)
388 {
389 /* transition the BO to a domain -
390 * just validate the BO into a certain domain */
391 struct radeon_device *rdev = dev->dev_private;
392 struct drm_radeon_gem_set_domain *args = data;
393 struct drm_gem_object *gobj;
394 struct radeon_bo *robj;
395 int r;
396
397 /* for now if someone requests domain CPU -
398 * just make sure the buffer is finished with */
399 down_read(&rdev->exclusive_lock);
400
401 /* just do a BO wait for now */
402 gobj = drm_gem_object_lookup(dev, filp, args->handle);
403 if (gobj == NULL) {
404 up_read(&rdev->exclusive_lock);
405 return -ENOENT;
406 }
407 robj = gem_to_radeon_bo(gobj);
408
409 r = radeon_gem_set_domain(gobj, args->read_domains, args->write_domain);
410
411 drm_gem_object_unreference_unlocked(gobj);
412 up_read(&rdev->exclusive_lock);
413 r = radeon_gem_handle_lockup(robj->rdev, r);
414 return r;
415 }
416
417 int radeon_mode_dumb_mmap(struct drm_file *filp,
418 struct drm_device *dev,
419 uint32_t handle, uint64_t *offset_p)
420 {
421 struct drm_gem_object *gobj;
422 struct radeon_bo *robj;
423
424 gobj = drm_gem_object_lookup(dev, filp, handle);
425 if (gobj == NULL) {
426 return -ENOENT;
427 }
428 robj = gem_to_radeon_bo(gobj);
429 if (radeon_ttm_tt_has_userptr(robj->tbo.ttm)) {
430 drm_gem_object_unreference_unlocked(gobj);
431 return -EPERM;
432 }
433 *offset_p = radeon_bo_mmap_offset(robj);
434 drm_gem_object_unreference_unlocked(gobj);
435 return 0;
436 }
437
438 int radeon_gem_mmap_ioctl(struct drm_device *dev, void *data,
439 struct drm_file *filp)
440 {
441 struct drm_radeon_gem_mmap *args = data;
442
443 return radeon_mode_dumb_mmap(filp, dev, args->handle, &args->addr_ptr);
444 }
445
446 int radeon_gem_busy_ioctl(struct drm_device *dev, void *data,
447 struct drm_file *filp)
448 {
449 struct drm_radeon_gem_busy *args = data;
450 struct drm_gem_object *gobj;
451 struct radeon_bo *robj;
452 int r;
453 uint32_t cur_placement = 0;
454
455 gobj = drm_gem_object_lookup(dev, filp, args->handle);
456 if (gobj == NULL) {
457 return -ENOENT;
458 }
459 robj = gem_to_radeon_bo(gobj);
460
461 r = reservation_object_test_signaled_rcu(robj->tbo.resv, true);
462 if (r == 0)
463 r = -EBUSY;
464 else
465 r = 0;
466
467 cur_placement = ACCESS_ONCE(robj->tbo.mem.mem_type);
468 args->domain = radeon_mem_type_to_domain(cur_placement);
469 drm_gem_object_unreference_unlocked(gobj);
470 return r;
471 }
472
473 int radeon_gem_wait_idle_ioctl(struct drm_device *dev, void *data,
474 struct drm_file *filp)
475 {
476 struct radeon_device *rdev = dev->dev_private;
477 struct drm_radeon_gem_wait_idle *args = data;
478 struct drm_gem_object *gobj;
479 struct radeon_bo *robj;
480 int r = 0;
481 uint32_t cur_placement = 0;
482 long ret;
483
484 gobj = drm_gem_object_lookup(dev, filp, args->handle);
485 if (gobj == NULL) {
486 return -ENOENT;
487 }
488 robj = gem_to_radeon_bo(gobj);
489
490 ret = reservation_object_wait_timeout_rcu(robj->tbo.resv, true, true, 30 * HZ);
491 if (ret == 0)
492 r = -EBUSY;
493 else if (ret < 0)
494 r = ret;
495
496 /* Flush HDP cache via MMIO if necessary */
497 cur_placement = ACCESS_ONCE(robj->tbo.mem.mem_type);
498 if (rdev->asic->mmio_hdp_flush &&
499 radeon_mem_type_to_domain(cur_placement) == RADEON_GEM_DOMAIN_VRAM)
500 robj->rdev->asic->mmio_hdp_flush(rdev);
501 drm_gem_object_unreference_unlocked(gobj);
502 r = radeon_gem_handle_lockup(rdev, r);
503 return r;
504 }
505
506 int radeon_gem_set_tiling_ioctl(struct drm_device *dev, void *data,
507 struct drm_file *filp)
508 {
509 struct drm_radeon_gem_set_tiling *args = data;
510 struct drm_gem_object *gobj;
511 struct radeon_bo *robj;
512 int r = 0;
513
514 DRM_DEBUG("%d \n", args->handle);
515 gobj = drm_gem_object_lookup(dev, filp, args->handle);
516 if (gobj == NULL)
517 return -ENOENT;
518 robj = gem_to_radeon_bo(gobj);
519 r = radeon_bo_set_tiling_flags(robj, args->tiling_flags, args->pitch);
520 drm_gem_object_unreference_unlocked(gobj);
521 return r;
522 }
523
524 int radeon_gem_get_tiling_ioctl(struct drm_device *dev, void *data,
525 struct drm_file *filp)
526 {
527 struct drm_radeon_gem_get_tiling *args = data;
528 struct drm_gem_object *gobj;
529 struct radeon_bo *rbo;
530 int r = 0;
531
532 DRM_DEBUG("\n");
533 gobj = drm_gem_object_lookup(dev, filp, args->handle);
534 if (gobj == NULL)
535 return -ENOENT;
536 rbo = gem_to_radeon_bo(gobj);
537 r = radeon_bo_reserve(rbo, false);
538 if (unlikely(r != 0))
539 goto out;
540 radeon_bo_get_tiling_flags(rbo, &args->tiling_flags, &args->pitch);
541 radeon_bo_unreserve(rbo);
542 out:
543 drm_gem_object_unreference_unlocked(gobj);
544 return r;
545 }
546
547 /**
548 * radeon_gem_va_update_vm -update the bo_va in its VM
549 *
550 * @rdev: radeon_device pointer
551 * @bo_va: bo_va to update
552 *
553 * Update the bo_va directly after setting it's address. Errors are not
554 * vital here, so they are not reported back to userspace.
555 */
556 static void radeon_gem_va_update_vm(struct radeon_device *rdev,
557 struct radeon_bo_va *bo_va)
558 {
559 struct ttm_validate_buffer tv, *entry;
560 struct radeon_bo_list *vm_bos;
561 struct ww_acquire_ctx ticket;
562 struct list_head list;
563 unsigned domain;
564 int r;
565
566 INIT_LIST_HEAD(&list);
567
568 tv.bo = &bo_va->bo->tbo;
569 tv.shared = true;
570 list_add(&tv.head, &list);
571
572 vm_bos = radeon_vm_get_bos(rdev, bo_va->vm, &list);
573 if (!vm_bos)
574 return;
575
576 r = ttm_eu_reserve_buffers(&ticket, &list, true, NULL);
577 if (r)
578 goto error_free;
579
580 list_for_each_entry(entry, &list, head) {
581 domain = radeon_mem_type_to_domain(entry->bo->mem.mem_type);
582 /* if anything is swapped out don't swap it in here,
583 just abort and wait for the next CS */
584 if (domain == RADEON_GEM_DOMAIN_CPU)
585 goto error_unreserve;
586 }
587
588 mutex_lock(&bo_va->vm->mutex);
589 r = radeon_vm_clear_freed(rdev, bo_va->vm);
590 if (r)
591 goto error_unlock;
592
593 if (bo_va->it.start)
594 r = radeon_vm_bo_update(rdev, bo_va, &bo_va->bo->tbo.mem);
595
596 error_unlock:
597 mutex_unlock(&bo_va->vm->mutex);
598
599 error_unreserve:
600 ttm_eu_backoff_reservation(&ticket, &list);
601
602 error_free:
603 drm_free_large(vm_bos);
604
605 if (r && r != -ERESTARTSYS)
606 DRM_ERROR("Couldn't update BO_VA (%d)\n", r);
607 }
608
609 int radeon_gem_va_ioctl(struct drm_device *dev, void *data,
610 struct drm_file *filp)
611 {
612 struct drm_radeon_gem_va *args = data;
613 struct drm_gem_object *gobj;
614 struct radeon_device *rdev = dev->dev_private;
615 struct radeon_fpriv *fpriv = filp->driver_priv;
616 struct radeon_bo *rbo;
617 struct radeon_bo_va *bo_va;
618 u32 invalid_flags;
619 int r = 0;
620
621 if (!rdev->vm_manager.enabled) {
622 args->operation = RADEON_VA_RESULT_ERROR;
623 return -ENOTTY;
624 }
625
626 /* !! DONT REMOVE !!
627 * We don't support vm_id yet, to be sure we don't have have broken
628 * userspace, reject anyone trying to use non 0 value thus moving
629 * forward we can use those fields without breaking existant userspace
630 */
631 if (args->vm_id) {
632 args->operation = RADEON_VA_RESULT_ERROR;
633 return -EINVAL;
634 }
635
636 if (args->offset < RADEON_VA_RESERVED_SIZE) {
637 dev_err(dev->dev,
638 "offset 0x%lX is in reserved area 0x%X\n",
639 (unsigned long)args->offset,
640 RADEON_VA_RESERVED_SIZE);
641 args->operation = RADEON_VA_RESULT_ERROR;
642 return -EINVAL;
643 }
644
645 /* don't remove, we need to enforce userspace to set the snooped flag
646 * otherwise we will endup with broken userspace and we won't be able
647 * to enable this feature without adding new interface
648 */
649 invalid_flags = RADEON_VM_PAGE_VALID | RADEON_VM_PAGE_SYSTEM;
650 if ((args->flags & invalid_flags)) {
651 dev_err(dev->dev, "invalid flags 0x%08X vs 0x%08X\n",
652 args->flags, invalid_flags);
653 args->operation = RADEON_VA_RESULT_ERROR;
654 return -EINVAL;
655 }
656
657 switch (args->operation) {
658 case RADEON_VA_MAP:
659 case RADEON_VA_UNMAP:
660 break;
661 default:
662 dev_err(dev->dev, "unsupported operation %d\n",
663 args->operation);
664 args->operation = RADEON_VA_RESULT_ERROR;
665 return -EINVAL;
666 }
667
668 gobj = drm_gem_object_lookup(dev, filp, args->handle);
669 if (gobj == NULL) {
670 args->operation = RADEON_VA_RESULT_ERROR;
671 return -ENOENT;
672 }
673 rbo = gem_to_radeon_bo(gobj);
674 r = radeon_bo_reserve(rbo, false);
675 if (r) {
676 args->operation = RADEON_VA_RESULT_ERROR;
677 drm_gem_object_unreference_unlocked(gobj);
678 return r;
679 }
680 bo_va = radeon_vm_bo_find(&fpriv->vm, rbo);
681 if (!bo_va) {
682 args->operation = RADEON_VA_RESULT_ERROR;
683 drm_gem_object_unreference_unlocked(gobj);
684 return -ENOENT;
685 }
686
687 switch (args->operation) {
688 case RADEON_VA_MAP:
689 if (bo_va->it.start) {
690 args->operation = RADEON_VA_RESULT_VA_EXIST;
691 args->offset = bo_va->it.start * RADEON_GPU_PAGE_SIZE;
692 radeon_bo_unreserve(rbo);
693 goto out;
694 }
695 r = radeon_vm_bo_set_addr(rdev, bo_va, args->offset, args->flags);
696 break;
697 case RADEON_VA_UNMAP:
698 r = radeon_vm_bo_set_addr(rdev, bo_va, 0, 0);
699 break;
700 default:
701 break;
702 }
703 if (!r)
704 radeon_gem_va_update_vm(rdev, bo_va);
705 args->operation = RADEON_VA_RESULT_OK;
706 if (r) {
707 args->operation = RADEON_VA_RESULT_ERROR;
708 }
709 out:
710 drm_gem_object_unreference_unlocked(gobj);
711 return r;
712 }
713
714 int radeon_gem_op_ioctl(struct drm_device *dev, void *data,
715 struct drm_file *filp)
716 {
717 struct drm_radeon_gem_op *args = data;
718 struct drm_gem_object *gobj;
719 struct radeon_bo *robj;
720 int r;
721
722 gobj = drm_gem_object_lookup(dev, filp, args->handle);
723 if (gobj == NULL) {
724 return -ENOENT;
725 }
726 robj = gem_to_radeon_bo(gobj);
727
728 r = -EPERM;
729 if (radeon_ttm_tt_has_userptr(robj->tbo.ttm))
730 goto out;
731
732 r = radeon_bo_reserve(robj, false);
733 if (unlikely(r))
734 goto out;
735
736 switch (args->op) {
737 case RADEON_GEM_OP_GET_INITIAL_DOMAIN:
738 args->value = robj->initial_domain;
739 break;
740 case RADEON_GEM_OP_SET_INITIAL_DOMAIN:
741 robj->initial_domain = args->value & (RADEON_GEM_DOMAIN_VRAM |
742 RADEON_GEM_DOMAIN_GTT |
743 RADEON_GEM_DOMAIN_CPU);
744 break;
745 default:
746 r = -EINVAL;
747 }
748
749 radeon_bo_unreserve(robj);
750 out:
751 drm_gem_object_unreference_unlocked(gobj);
752 return r;
753 }
754
755 int radeon_mode_dumb_create(struct drm_file *file_priv,
756 struct drm_device *dev,
757 struct drm_mode_create_dumb *args)
758 {
759 struct radeon_device *rdev = dev->dev_private;
760 struct drm_gem_object *gobj;
761 uint32_t handle;
762 int r;
763
764 args->pitch = radeon_align_pitch(rdev, args->width, args->bpp, 0) * ((args->bpp + 1) / 8);
765 args->size = args->pitch * args->height;
766 #ifdef __NetBSD__ /* XXX ALIGN means something else. */
767 args->size = round_up(args->size, PAGE_SIZE);
768 #else
769 args->size = ALIGN(args->size, PAGE_SIZE);
770 #endif
771
772 r = radeon_gem_object_create(rdev, args->size, 0,
773 RADEON_GEM_DOMAIN_VRAM, 0,
774 false, &gobj);
775 if (r)
776 return -ENOMEM;
777
778 r = drm_gem_handle_create(file_priv, gobj, &handle);
779 /* drop reference from allocate - handle holds it now */
780 drm_gem_object_unreference_unlocked(gobj);
781 if (r) {
782 return r;
783 }
784 args->handle = handle;
785 return 0;
786 }
787
788 #if defined(CONFIG_DEBUG_FS)
789 static int radeon_debugfs_gem_info(struct seq_file *m, void *data)
790 {
791 struct drm_info_node *node = (struct drm_info_node *)m->private;
792 struct drm_device *dev = node->minor->dev;
793 struct radeon_device *rdev = dev->dev_private;
794 struct radeon_bo *rbo;
795 unsigned i = 0;
796
797 mutex_lock(&rdev->gem.mutex);
798 list_for_each_entry(rbo, &rdev->gem.objects, list) {
799 unsigned domain;
800 const char *placement;
801
802 domain = radeon_mem_type_to_domain(rbo->tbo.mem.mem_type);
803 switch (domain) {
804 case RADEON_GEM_DOMAIN_VRAM:
805 placement = "VRAM";
806 break;
807 case RADEON_GEM_DOMAIN_GTT:
808 placement = " GTT";
809 break;
810 case RADEON_GEM_DOMAIN_CPU:
811 default:
812 placement = " CPU";
813 break;
814 }
815 seq_printf(m, "bo[0x%08x] %8ldkB %8ldMB %s pid %8ld\n",
816 i, radeon_bo_size(rbo) >> 10, radeon_bo_size(rbo) >> 20,
817 placement, (unsigned long)rbo->pid);
818 i++;
819 }
820 mutex_unlock(&rdev->gem.mutex);
821 return 0;
822 }
823
824 static struct drm_info_list radeon_debugfs_gem_list[] = {
825 {"radeon_gem_info", &radeon_debugfs_gem_info, 0, NULL},
826 };
827 #endif
828
829 int radeon_gem_debugfs_init(struct radeon_device *rdev)
830 {
831 #if defined(CONFIG_DEBUG_FS)
832 return radeon_debugfs_add_files(rdev, radeon_debugfs_gem_list, 1);
833 #endif
834 return 0;
835 }
836