radeon_gem.c revision 1.7 1 /* $NetBSD: radeon_gem.c,v 1.7 2020/02/14 04:35:20 riastradh Exp $ */
2
3 /*
4 * Copyright 2008 Advanced Micro Devices, Inc.
5 * Copyright 2008 Red Hat Inc.
6 * Copyright 2009 Jerome Glisse.
7 *
8 * Permission is hereby granted, free of charge, to any person obtaining a
9 * copy of this software and associated documentation files (the "Software"),
10 * to deal in the Software without restriction, including without limitation
11 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
12 * and/or sell copies of the Software, and to permit persons to whom the
13 * Software is furnished to do so, subject to the following conditions:
14 *
15 * The above copyright notice and this permission notice shall be included in
16 * all copies or substantial portions of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
21 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
22 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
23 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
24 * OTHER DEALINGS IN THE SOFTWARE.
25 *
26 * Authors: Dave Airlie
27 * Alex Deucher
28 * Jerome Glisse
29 */
30 #include <sys/cdefs.h>
31 __KERNEL_RCSID(0, "$NetBSD: radeon_gem.c,v 1.7 2020/02/14 04:35:20 riastradh Exp $");
32
33 #include <drm/drmP.h>
34 #include <drm/radeon_drm.h>
35 #include "radeon.h"
36
37 #include <linux/nbsd-namespace.h>
38
39 void radeon_gem_object_free(struct drm_gem_object *gobj)
40 {
41 struct radeon_bo *robj = gem_to_radeon_bo(gobj);
42
43 if (robj) {
44 if (robj->gem_base.import_attach)
45 drm_prime_gem_destroy(&robj->gem_base, robj->tbo.sg);
46 radeon_mn_unregister(robj);
47 radeon_bo_unref(&robj);
48 }
49 }
50
51 int radeon_gem_object_create(struct radeon_device *rdev, unsigned long size,
52 int alignment, int initial_domain,
53 u32 flags, bool kernel,
54 struct drm_gem_object **obj)
55 {
56 struct radeon_bo *robj;
57 unsigned long max_size;
58 int r;
59
60 *obj = NULL;
61 /* At least align on page size */
62 if (alignment < PAGE_SIZE) {
63 alignment = PAGE_SIZE;
64 }
65
66 /* Maximum bo size is the unpinned gtt size since we use the gtt to
67 * handle vram to system pool migrations.
68 */
69 max_size = rdev->mc.gtt_size - rdev->gart_pin_size;
70 if (size > max_size) {
71 DRM_DEBUG("Allocation size %ldMb bigger than %ldMb limit\n",
72 size >> 20, max_size >> 20);
73 return -ENOMEM;
74 }
75
76 retry:
77 r = radeon_bo_create(rdev, size, alignment, kernel, initial_domain,
78 flags, NULL, NULL, &robj);
79 if (r) {
80 if (r != -ERESTARTSYS) {
81 if (initial_domain == RADEON_GEM_DOMAIN_VRAM) {
82 initial_domain |= RADEON_GEM_DOMAIN_GTT;
83 goto retry;
84 }
85 DRM_ERROR("Failed to allocate GEM object (%ld, %d, %u, %d)\n",
86 size, initial_domain, alignment, r);
87 }
88 return r;
89 }
90 *obj = &robj->gem_base;
91 #ifndef __NetBSD__
92 robj->pid = task_pid_nr(current);
93 #endif
94
95 mutex_lock(&rdev->gem.mutex);
96 list_add_tail(&robj->list, &rdev->gem.objects);
97 mutex_unlock(&rdev->gem.mutex);
98
99 return 0;
100 }
101
102 static int radeon_gem_set_domain(struct drm_gem_object *gobj,
103 uint32_t rdomain, uint32_t wdomain)
104 {
105 struct radeon_bo *robj;
106 uint32_t domain;
107 long r;
108
109 /* FIXME: reeimplement */
110 robj = gem_to_radeon_bo(gobj);
111 /* work out where to validate the buffer to */
112 domain = wdomain;
113 if (!domain) {
114 domain = rdomain;
115 }
116 if (!domain) {
117 /* Do nothings */
118 printk(KERN_WARNING "Set domain without domain !\n");
119 return 0;
120 }
121 if (domain == RADEON_GEM_DOMAIN_CPU) {
122 /* Asking for cpu access wait for object idle */
123 r = reservation_object_wait_timeout_rcu(robj->tbo.resv, true, true, 30 * HZ);
124 if (!r)
125 r = -EBUSY;
126
127 if (r < 0 && r != -EINTR) {
128 printk(KERN_ERR "Failed to wait for object: %li\n", r);
129 return r;
130 }
131 }
132 return 0;
133 }
134
135 int radeon_gem_init(struct radeon_device *rdev)
136 {
137 INIT_LIST_HEAD(&rdev->gem.objects);
138 return 0;
139 }
140
141 void radeon_gem_fini(struct radeon_device *rdev)
142 {
143 radeon_bo_force_delete(rdev);
144 }
145
146 /*
147 * Call from drm_gem_handle_create which appear in both new and open ioctl
148 * case.
149 */
150 int radeon_gem_object_open(struct drm_gem_object *obj, struct drm_file *file_priv)
151 {
152 struct radeon_bo *rbo = gem_to_radeon_bo(obj);
153 struct radeon_device *rdev = rbo->rdev;
154 struct radeon_fpriv *fpriv = file_priv->driver_priv;
155 struct radeon_vm *vm = &fpriv->vm;
156 struct radeon_bo_va *bo_va;
157 int r;
158
159 if ((rdev->family < CHIP_CAYMAN) ||
160 (!rdev->accel_working)) {
161 return 0;
162 }
163
164 r = radeon_bo_reserve(rbo, false);
165 if (r) {
166 return r;
167 }
168
169 bo_va = radeon_vm_bo_find(vm, rbo);
170 if (!bo_va) {
171 bo_va = radeon_vm_bo_add(rdev, vm, rbo);
172 } else {
173 ++bo_va->ref_count;
174 }
175 radeon_bo_unreserve(rbo);
176
177 return 0;
178 }
179
180 void radeon_gem_object_close(struct drm_gem_object *obj,
181 struct drm_file *file_priv)
182 {
183 struct radeon_bo *rbo = gem_to_radeon_bo(obj);
184 struct radeon_device *rdev = rbo->rdev;
185 struct radeon_fpriv *fpriv = file_priv->driver_priv;
186 struct radeon_vm *vm = &fpriv->vm;
187 struct radeon_bo_va *bo_va;
188 int r;
189
190 if ((rdev->family < CHIP_CAYMAN) ||
191 (!rdev->accel_working)) {
192 return;
193 }
194
195 r = radeon_bo_reserve(rbo, true);
196 if (r) {
197 dev_err(rdev->dev, "leaking bo va because "
198 "we fail to reserve bo (%d)\n", r);
199 return;
200 }
201 bo_va = radeon_vm_bo_find(vm, rbo);
202 if (bo_va) {
203 if (--bo_va->ref_count == 0) {
204 radeon_vm_bo_rmv(rdev, bo_va);
205 }
206 }
207 radeon_bo_unreserve(rbo);
208 }
209
210 static int radeon_gem_handle_lockup(struct radeon_device *rdev, int r)
211 {
212 if (r == -EDEADLK) {
213 r = radeon_gpu_reset(rdev);
214 if (!r)
215 r = -EAGAIN;
216 }
217 return r;
218 }
219
220 /*
221 * GEM ioctls.
222 */
223 int radeon_gem_info_ioctl(struct drm_device *dev, void *data,
224 struct drm_file *filp)
225 {
226 struct radeon_device *rdev = dev->dev_private;
227 struct drm_radeon_gem_info *args = data;
228 struct ttm_mem_type_manager *man;
229
230 man = &rdev->mman.bdev.man[TTM_PL_VRAM];
231
232 args->vram_size = rdev->mc.real_vram_size;
233 args->vram_visible = (u64)man->size << PAGE_SHIFT;
234 args->vram_visible -= rdev->vram_pin_size;
235 args->gart_size = rdev->mc.gtt_size;
236 args->gart_size -= rdev->gart_pin_size;
237
238 return 0;
239 }
240
241 int radeon_gem_pread_ioctl(struct drm_device *dev, void *data,
242 struct drm_file *filp)
243 {
244 /* TODO: implement */
245 DRM_ERROR("unimplemented %s\n", __func__);
246 return -ENOSYS;
247 }
248
249 int radeon_gem_pwrite_ioctl(struct drm_device *dev, void *data,
250 struct drm_file *filp)
251 {
252 /* TODO: implement */
253 DRM_ERROR("unimplemented %s\n", __func__);
254 return -ENOSYS;
255 }
256
257 int radeon_gem_create_ioctl(struct drm_device *dev, void *data,
258 struct drm_file *filp)
259 {
260 struct radeon_device *rdev = dev->dev_private;
261 struct drm_radeon_gem_create *args = data;
262 struct drm_gem_object *gobj;
263 uint32_t handle;
264 int r;
265
266 down_read(&rdev->exclusive_lock);
267 /* create a gem object to contain this object in */
268 args->size = roundup(args->size, PAGE_SIZE);
269 r = radeon_gem_object_create(rdev, args->size, args->alignment,
270 args->initial_domain, args->flags,
271 false, &gobj);
272 if (r) {
273 up_read(&rdev->exclusive_lock);
274 r = radeon_gem_handle_lockup(rdev, r);
275 return r;
276 }
277 r = drm_gem_handle_create(filp, gobj, &handle);
278 /* drop reference from allocate - handle holds it now */
279 drm_gem_object_unreference_unlocked(gobj);
280 if (r) {
281 up_read(&rdev->exclusive_lock);
282 r = radeon_gem_handle_lockup(rdev, r);
283 return r;
284 }
285 args->handle = handle;
286 up_read(&rdev->exclusive_lock);
287 return 0;
288 }
289
290 int radeon_gem_userptr_ioctl(struct drm_device *dev, void *data,
291 struct drm_file *filp)
292 {
293 #ifdef __NetBSD__
294 /*
295 * XXX Too painful to contemplate for now. If you add this,
296 * make sure to update radeon_cs.c radeon_cs_parser_relocs
297 * (need_mmap_lock), and anything else using
298 * radeon_ttm_tt_has_userptr.
299 */
300 return -ENODEV;
301 #else
302 struct radeon_device *rdev = dev->dev_private;
303 struct drm_radeon_gem_userptr *args = data;
304 struct drm_gem_object *gobj;
305 struct radeon_bo *bo;
306 uint32_t handle;
307 int r;
308
309 if (offset_in_page(args->addr | args->size))
310 return -EINVAL;
311
312 /* reject unknown flag values */
313 if (args->flags & ~(RADEON_GEM_USERPTR_READONLY |
314 RADEON_GEM_USERPTR_ANONONLY | RADEON_GEM_USERPTR_VALIDATE |
315 RADEON_GEM_USERPTR_REGISTER))
316 return -EINVAL;
317
318 if (args->flags & RADEON_GEM_USERPTR_READONLY) {
319 /* readonly pages not tested on older hardware */
320 if (rdev->family < CHIP_R600)
321 return -EINVAL;
322
323 } else if (!(args->flags & RADEON_GEM_USERPTR_ANONONLY) ||
324 !(args->flags & RADEON_GEM_USERPTR_REGISTER)) {
325
326 /* if we want to write to it we must require anonymous
327 memory and install a MMU notifier */
328 return -EACCES;
329 }
330
331 down_read(&rdev->exclusive_lock);
332
333 /* create a gem object to contain this object in */
334 r = radeon_gem_object_create(rdev, args->size, 0,
335 RADEON_GEM_DOMAIN_CPU, 0,
336 false, &gobj);
337 if (r)
338 goto handle_lockup;
339
340 bo = gem_to_radeon_bo(gobj);
341 r = radeon_ttm_tt_set_userptr(bo->tbo.ttm, args->addr, args->flags);
342 if (r)
343 goto release_object;
344
345 if (args->flags & RADEON_GEM_USERPTR_REGISTER) {
346 r = radeon_mn_register(bo, args->addr);
347 if (r)
348 goto release_object;
349 }
350
351 if (args->flags & RADEON_GEM_USERPTR_VALIDATE) {
352 down_read(¤t->mm->mmap_sem);
353 r = radeon_bo_reserve(bo, true);
354 if (r) {
355 up_read(¤t->mm->mmap_sem);
356 goto release_object;
357 }
358
359 radeon_ttm_placement_from_domain(bo, RADEON_GEM_DOMAIN_GTT);
360 r = ttm_bo_validate(&bo->tbo, &bo->placement, true, false);
361 radeon_bo_unreserve(bo);
362 up_read(¤t->mm->mmap_sem);
363 if (r)
364 goto release_object;
365 }
366
367 r = drm_gem_handle_create(filp, gobj, &handle);
368 /* drop reference from allocate - handle holds it now */
369 drm_gem_object_unreference_unlocked(gobj);
370 if (r)
371 goto handle_lockup;
372
373 args->handle = handle;
374 up_read(&rdev->exclusive_lock);
375 return 0;
376
377 release_object:
378 drm_gem_object_unreference_unlocked(gobj);
379
380 handle_lockup:
381 up_read(&rdev->exclusive_lock);
382 r = radeon_gem_handle_lockup(rdev, r);
383
384 return r;
385 #endif
386 }
387
388 int radeon_gem_set_domain_ioctl(struct drm_device *dev, void *data,
389 struct drm_file *filp)
390 {
391 /* transition the BO to a domain -
392 * just validate the BO into a certain domain */
393 struct radeon_device *rdev = dev->dev_private;
394 struct drm_radeon_gem_set_domain *args = data;
395 struct drm_gem_object *gobj;
396 struct radeon_bo *robj;
397 int r;
398
399 /* for now if someone requests domain CPU -
400 * just make sure the buffer is finished with */
401 down_read(&rdev->exclusive_lock);
402
403 /* just do a BO wait for now */
404 gobj = drm_gem_object_lookup(dev, filp, args->handle);
405 if (gobj == NULL) {
406 up_read(&rdev->exclusive_lock);
407 return -ENOENT;
408 }
409 robj = gem_to_radeon_bo(gobj);
410
411 r = radeon_gem_set_domain(gobj, args->read_domains, args->write_domain);
412
413 drm_gem_object_unreference_unlocked(gobj);
414 up_read(&rdev->exclusive_lock);
415 r = radeon_gem_handle_lockup(robj->rdev, r);
416 return r;
417 }
418
419 int radeon_mode_dumb_mmap(struct drm_file *filp,
420 struct drm_device *dev,
421 uint32_t handle, uint64_t *offset_p)
422 {
423 struct drm_gem_object *gobj;
424 struct radeon_bo *robj;
425
426 gobj = drm_gem_object_lookup(dev, filp, handle);
427 if (gobj == NULL) {
428 return -ENOENT;
429 }
430 robj = gem_to_radeon_bo(gobj);
431 if (radeon_ttm_tt_has_userptr(robj->tbo.ttm)) {
432 drm_gem_object_unreference_unlocked(gobj);
433 return -EPERM;
434 }
435 *offset_p = radeon_bo_mmap_offset(robj);
436 drm_gem_object_unreference_unlocked(gobj);
437 return 0;
438 }
439
440 int radeon_gem_mmap_ioctl(struct drm_device *dev, void *data,
441 struct drm_file *filp)
442 {
443 struct drm_radeon_gem_mmap *args = data;
444
445 return radeon_mode_dumb_mmap(filp, dev, args->handle, &args->addr_ptr);
446 }
447
448 int radeon_gem_busy_ioctl(struct drm_device *dev, void *data,
449 struct drm_file *filp)
450 {
451 struct drm_radeon_gem_busy *args = data;
452 struct drm_gem_object *gobj;
453 struct radeon_bo *robj;
454 int r;
455 uint32_t cur_placement = 0;
456
457 gobj = drm_gem_object_lookup(dev, filp, args->handle);
458 if (gobj == NULL) {
459 return -ENOENT;
460 }
461 robj = gem_to_radeon_bo(gobj);
462
463 r = reservation_object_test_signaled_rcu(robj->tbo.resv, true);
464 if (r == 0)
465 r = -EBUSY;
466 else
467 r = 0;
468
469 cur_placement = ACCESS_ONCE(robj->tbo.mem.mem_type);
470 args->domain = radeon_mem_type_to_domain(cur_placement);
471 drm_gem_object_unreference_unlocked(gobj);
472 return r;
473 }
474
475 int radeon_gem_wait_idle_ioctl(struct drm_device *dev, void *data,
476 struct drm_file *filp)
477 {
478 struct radeon_device *rdev = dev->dev_private;
479 struct drm_radeon_gem_wait_idle *args = data;
480 struct drm_gem_object *gobj;
481 struct radeon_bo *robj;
482 int r = 0;
483 uint32_t cur_placement = 0;
484 long ret;
485
486 gobj = drm_gem_object_lookup(dev, filp, args->handle);
487 if (gobj == NULL) {
488 return -ENOENT;
489 }
490 robj = gem_to_radeon_bo(gobj);
491
492 ret = reservation_object_wait_timeout_rcu(robj->tbo.resv, true, true, 30 * HZ);
493 if (ret == 0)
494 r = -EBUSY;
495 else if (ret < 0)
496 r = ret;
497
498 /* Flush HDP cache via MMIO if necessary */
499 cur_placement = ACCESS_ONCE(robj->tbo.mem.mem_type);
500 if (rdev->asic->mmio_hdp_flush &&
501 radeon_mem_type_to_domain(cur_placement) == RADEON_GEM_DOMAIN_VRAM)
502 robj->rdev->asic->mmio_hdp_flush(rdev);
503 drm_gem_object_unreference_unlocked(gobj);
504 r = radeon_gem_handle_lockup(rdev, r);
505 return r;
506 }
507
508 int radeon_gem_set_tiling_ioctl(struct drm_device *dev, void *data,
509 struct drm_file *filp)
510 {
511 struct drm_radeon_gem_set_tiling *args = data;
512 struct drm_gem_object *gobj;
513 struct radeon_bo *robj;
514 int r = 0;
515
516 DRM_DEBUG("%d \n", args->handle);
517 gobj = drm_gem_object_lookup(dev, filp, args->handle);
518 if (gobj == NULL)
519 return -ENOENT;
520 robj = gem_to_radeon_bo(gobj);
521 r = radeon_bo_set_tiling_flags(robj, args->tiling_flags, args->pitch);
522 drm_gem_object_unreference_unlocked(gobj);
523 return r;
524 }
525
526 int radeon_gem_get_tiling_ioctl(struct drm_device *dev, void *data,
527 struct drm_file *filp)
528 {
529 struct drm_radeon_gem_get_tiling *args = data;
530 struct drm_gem_object *gobj;
531 struct radeon_bo *rbo;
532 int r = 0;
533
534 DRM_DEBUG("\n");
535 gobj = drm_gem_object_lookup(dev, filp, args->handle);
536 if (gobj == NULL)
537 return -ENOENT;
538 rbo = gem_to_radeon_bo(gobj);
539 r = radeon_bo_reserve(rbo, false);
540 if (unlikely(r != 0))
541 goto out;
542 radeon_bo_get_tiling_flags(rbo, &args->tiling_flags, &args->pitch);
543 radeon_bo_unreserve(rbo);
544 out:
545 drm_gem_object_unreference_unlocked(gobj);
546 return r;
547 }
548
549 /**
550 * radeon_gem_va_update_vm -update the bo_va in its VM
551 *
552 * @rdev: radeon_device pointer
553 * @bo_va: bo_va to update
554 *
555 * Update the bo_va directly after setting it's address. Errors are not
556 * vital here, so they are not reported back to userspace.
557 */
558 static void radeon_gem_va_update_vm(struct radeon_device *rdev,
559 struct radeon_bo_va *bo_va)
560 {
561 struct ttm_validate_buffer tv, *entry;
562 struct radeon_bo_list *vm_bos;
563 struct ww_acquire_ctx ticket;
564 struct list_head list;
565 unsigned domain;
566 int r;
567
568 INIT_LIST_HEAD(&list);
569
570 tv.bo = &bo_va->bo->tbo;
571 tv.shared = true;
572 list_add(&tv.head, &list);
573
574 vm_bos = radeon_vm_get_bos(rdev, bo_va->vm, &list);
575 if (!vm_bos)
576 return;
577
578 r = ttm_eu_reserve_buffers(&ticket, &list, true, NULL);
579 if (r)
580 goto error_free;
581
582 list_for_each_entry(entry, &list, head) {
583 domain = radeon_mem_type_to_domain(entry->bo->mem.mem_type);
584 /* if anything is swapped out don't swap it in here,
585 just abort and wait for the next CS */
586 if (domain == RADEON_GEM_DOMAIN_CPU)
587 goto error_unreserve;
588 }
589
590 mutex_lock(&bo_va->vm->mutex);
591 r = radeon_vm_clear_freed(rdev, bo_va->vm);
592 if (r)
593 goto error_unlock;
594
595 if (bo_va->it.start)
596 r = radeon_vm_bo_update(rdev, bo_va, &bo_va->bo->tbo.mem);
597
598 error_unlock:
599 mutex_unlock(&bo_va->vm->mutex);
600
601 error_unreserve:
602 ttm_eu_backoff_reservation(&ticket, &list);
603
604 error_free:
605 drm_free_large(vm_bos);
606
607 if (r && r != -ERESTARTSYS)
608 DRM_ERROR("Couldn't update BO_VA (%d)\n", r);
609 }
610
611 int radeon_gem_va_ioctl(struct drm_device *dev, void *data,
612 struct drm_file *filp)
613 {
614 struct drm_radeon_gem_va *args = data;
615 struct drm_gem_object *gobj;
616 struct radeon_device *rdev = dev->dev_private;
617 struct radeon_fpriv *fpriv = filp->driver_priv;
618 struct radeon_bo *rbo;
619 struct radeon_bo_va *bo_va;
620 u32 invalid_flags;
621 int r = 0;
622
623 if (!rdev->vm_manager.enabled) {
624 args->operation = RADEON_VA_RESULT_ERROR;
625 return -ENOTTY;
626 }
627
628 /* !! DONT REMOVE !!
629 * We don't support vm_id yet, to be sure we don't have have broken
630 * userspace, reject anyone trying to use non 0 value thus moving
631 * forward we can use those fields without breaking existant userspace
632 */
633 if (args->vm_id) {
634 args->operation = RADEON_VA_RESULT_ERROR;
635 return -EINVAL;
636 }
637
638 if (args->offset < RADEON_VA_RESERVED_SIZE) {
639 dev_err(dev->dev,
640 "offset 0x%lX is in reserved area 0x%X\n",
641 (unsigned long)args->offset,
642 RADEON_VA_RESERVED_SIZE);
643 args->operation = RADEON_VA_RESULT_ERROR;
644 return -EINVAL;
645 }
646
647 /* don't remove, we need to enforce userspace to set the snooped flag
648 * otherwise we will endup with broken userspace and we won't be able
649 * to enable this feature without adding new interface
650 */
651 invalid_flags = RADEON_VM_PAGE_VALID | RADEON_VM_PAGE_SYSTEM;
652 if ((args->flags & invalid_flags)) {
653 dev_err(dev->dev, "invalid flags 0x%08X vs 0x%08X\n",
654 args->flags, invalid_flags);
655 args->operation = RADEON_VA_RESULT_ERROR;
656 return -EINVAL;
657 }
658
659 switch (args->operation) {
660 case RADEON_VA_MAP:
661 case RADEON_VA_UNMAP:
662 break;
663 default:
664 dev_err(dev->dev, "unsupported operation %d\n",
665 args->operation);
666 args->operation = RADEON_VA_RESULT_ERROR;
667 return -EINVAL;
668 }
669
670 gobj = drm_gem_object_lookup(dev, filp, args->handle);
671 if (gobj == NULL) {
672 args->operation = RADEON_VA_RESULT_ERROR;
673 return -ENOENT;
674 }
675 rbo = gem_to_radeon_bo(gobj);
676 r = radeon_bo_reserve(rbo, false);
677 if (r) {
678 args->operation = RADEON_VA_RESULT_ERROR;
679 drm_gem_object_unreference_unlocked(gobj);
680 return r;
681 }
682 bo_va = radeon_vm_bo_find(&fpriv->vm, rbo);
683 if (!bo_va) {
684 args->operation = RADEON_VA_RESULT_ERROR;
685 drm_gem_object_unreference_unlocked(gobj);
686 return -ENOENT;
687 }
688
689 switch (args->operation) {
690 case RADEON_VA_MAP:
691 if (bo_va->it.start) {
692 args->operation = RADEON_VA_RESULT_VA_EXIST;
693 args->offset = bo_va->it.start * RADEON_GPU_PAGE_SIZE;
694 radeon_bo_unreserve(rbo);
695 goto out;
696 }
697 r = radeon_vm_bo_set_addr(rdev, bo_va, args->offset, args->flags);
698 break;
699 case RADEON_VA_UNMAP:
700 r = radeon_vm_bo_set_addr(rdev, bo_va, 0, 0);
701 break;
702 default:
703 break;
704 }
705 if (!r)
706 radeon_gem_va_update_vm(rdev, bo_va);
707 args->operation = RADEON_VA_RESULT_OK;
708 if (r) {
709 args->operation = RADEON_VA_RESULT_ERROR;
710 }
711 out:
712 drm_gem_object_unreference_unlocked(gobj);
713 return r;
714 }
715
716 int radeon_gem_op_ioctl(struct drm_device *dev, void *data,
717 struct drm_file *filp)
718 {
719 struct drm_radeon_gem_op *args = data;
720 struct drm_gem_object *gobj;
721 struct radeon_bo *robj;
722 int r;
723
724 gobj = drm_gem_object_lookup(dev, filp, args->handle);
725 if (gobj == NULL) {
726 return -ENOENT;
727 }
728 robj = gem_to_radeon_bo(gobj);
729
730 r = -EPERM;
731 if (radeon_ttm_tt_has_userptr(robj->tbo.ttm))
732 goto out;
733
734 r = radeon_bo_reserve(robj, false);
735 if (unlikely(r))
736 goto out;
737
738 switch (args->op) {
739 case RADEON_GEM_OP_GET_INITIAL_DOMAIN:
740 args->value = robj->initial_domain;
741 break;
742 case RADEON_GEM_OP_SET_INITIAL_DOMAIN:
743 robj->initial_domain = args->value & (RADEON_GEM_DOMAIN_VRAM |
744 RADEON_GEM_DOMAIN_GTT |
745 RADEON_GEM_DOMAIN_CPU);
746 break;
747 default:
748 r = -EINVAL;
749 }
750
751 radeon_bo_unreserve(robj);
752 out:
753 drm_gem_object_unreference_unlocked(gobj);
754 return r;
755 }
756
757 int radeon_mode_dumb_create(struct drm_file *file_priv,
758 struct drm_device *dev,
759 struct drm_mode_create_dumb *args)
760 {
761 struct radeon_device *rdev = dev->dev_private;
762 struct drm_gem_object *gobj;
763 uint32_t handle;
764 int r;
765
766 args->pitch = radeon_align_pitch(rdev, args->width, args->bpp, 0) * ((args->bpp + 1) / 8);
767 args->size = args->pitch * args->height;
768 args->size = ALIGN(args->size, PAGE_SIZE);
769
770 r = radeon_gem_object_create(rdev, args->size, 0,
771 RADEON_GEM_DOMAIN_VRAM, 0,
772 false, &gobj);
773 if (r)
774 return -ENOMEM;
775
776 r = drm_gem_handle_create(file_priv, gobj, &handle);
777 /* drop reference from allocate - handle holds it now */
778 drm_gem_object_unreference_unlocked(gobj);
779 if (r) {
780 return r;
781 }
782 args->handle = handle;
783 return 0;
784 }
785
786 #if defined(CONFIG_DEBUG_FS)
787 static int radeon_debugfs_gem_info(struct seq_file *m, void *data)
788 {
789 struct drm_info_node *node = (struct drm_info_node *)m->private;
790 struct drm_device *dev = node->minor->dev;
791 struct radeon_device *rdev = dev->dev_private;
792 struct radeon_bo *rbo;
793 unsigned i = 0;
794
795 mutex_lock(&rdev->gem.mutex);
796 list_for_each_entry(rbo, &rdev->gem.objects, list) {
797 unsigned domain;
798 const char *placement;
799
800 domain = radeon_mem_type_to_domain(rbo->tbo.mem.mem_type);
801 switch (domain) {
802 case RADEON_GEM_DOMAIN_VRAM:
803 placement = "VRAM";
804 break;
805 case RADEON_GEM_DOMAIN_GTT:
806 placement = " GTT";
807 break;
808 case RADEON_GEM_DOMAIN_CPU:
809 default:
810 placement = " CPU";
811 break;
812 }
813 seq_printf(m, "bo[0x%08x] %8ldkB %8ldMB %s pid %8ld\n",
814 i, radeon_bo_size(rbo) >> 10, radeon_bo_size(rbo) >> 20,
815 placement, (unsigned long)rbo->pid);
816 i++;
817 }
818 mutex_unlock(&rdev->gem.mutex);
819 return 0;
820 }
821
822 static struct drm_info_list radeon_debugfs_gem_list[] = {
823 {"radeon_gem_info", &radeon_debugfs_gem_info, 0, NULL},
824 };
825 #endif
826
827 int radeon_gem_debugfs_init(struct radeon_device *rdev)
828 {
829 #if defined(CONFIG_DEBUG_FS)
830 return radeon_debugfs_add_files(rdev, radeon_debugfs_gem_list, 1);
831 #endif
832 return 0;
833 }
834