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radeon_ring.c revision 1.4
      1 /*	$NetBSD: radeon_ring.c,v 1.4 2020/02/14 14:34:59 maya Exp $	*/
      2 
      3 /*
      4  * Copyright 2008 Advanced Micro Devices, Inc.
      5  * Copyright 2008 Red Hat Inc.
      6  * Copyright 2009 Jerome Glisse.
      7  *
      8  * Permission is hereby granted, free of charge, to any person obtaining a
      9  * copy of this software and associated documentation files (the "Software"),
     10  * to deal in the Software without restriction, including without limitation
     11  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
     12  * and/or sell copies of the Software, and to permit persons to whom the
     13  * Software is furnished to do so, subject to the following conditions:
     14  *
     15  * The above copyright notice and this permission notice shall be included in
     16  * all copies or substantial portions of the Software.
     17  *
     18  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
     19  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
     20  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
     21  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
     22  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
     23  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
     24  * OTHER DEALINGS IN THE SOFTWARE.
     25  *
     26  * Authors: Dave Airlie
     27  *          Alex Deucher
     28  *          Jerome Glisse
     29  *          Christian Knig
     30  */
     31 #include <sys/cdefs.h>
     32 __KERNEL_RCSID(0, "$NetBSD: radeon_ring.c,v 1.4 2020/02/14 14:34:59 maya Exp $");
     33 
     34 #include <drm/drmP.h>
     35 #include "radeon.h"
     36 
     37 /*
     38  * Rings
     39  * Most engines on the GPU are fed via ring buffers.  Ring
     40  * buffers are areas of GPU accessible memory that the host
     41  * writes commands into and the GPU reads commands out of.
     42  * There is a rptr (read pointer) that determines where the
     43  * GPU is currently reading, and a wptr (write pointer)
     44  * which determines where the host has written.  When the
     45  * pointers are equal, the ring is idle.  When the host
     46  * writes commands to the ring buffer, it increments the
     47  * wptr.  The GPU then starts fetching commands and executes
     48  * them until the pointers are equal again.
     49  */
     50 static int radeon_debugfs_ring_init(struct radeon_device *rdev, struct radeon_ring *ring);
     51 
     52 /**
     53  * radeon_ring_supports_scratch_reg - check if the ring supports
     54  * writing to scratch registers
     55  *
     56  * @rdev: radeon_device pointer
     57  * @ring: radeon_ring structure holding ring information
     58  *
     59  * Check if a specific ring supports writing to scratch registers (all asics).
     60  * Returns true if the ring supports writing to scratch regs, false if not.
     61  */
     62 bool radeon_ring_supports_scratch_reg(struct radeon_device *rdev,
     63 				      struct radeon_ring *ring)
     64 {
     65 	switch (ring->idx) {
     66 	case RADEON_RING_TYPE_GFX_INDEX:
     67 	case CAYMAN_RING_TYPE_CP1_INDEX:
     68 	case CAYMAN_RING_TYPE_CP2_INDEX:
     69 		return true;
     70 	default:
     71 		return false;
     72 	}
     73 }
     74 
     75 /**
     76  * radeon_ring_free_size - update the free size
     77  *
     78  * @rdev: radeon_device pointer
     79  * @ring: radeon_ring structure holding ring information
     80  *
     81  * Update the free dw slots in the ring buffer (all asics).
     82  */
     83 void radeon_ring_free_size(struct radeon_device *rdev, struct radeon_ring *ring)
     84 {
     85 	uint32_t rptr = radeon_ring_get_rptr(rdev, ring);
     86 
     87 	/* This works because ring_size is a power of 2 */
     88 	ring->ring_free_dw = rptr + (ring->ring_size / 4);
     89 	ring->ring_free_dw -= ring->wptr;
     90 	ring->ring_free_dw &= ring->ptr_mask;
     91 	if (!ring->ring_free_dw) {
     92 		/* this is an empty ring */
     93 		ring->ring_free_dw = ring->ring_size / 4;
     94 		/*  update lockup info to avoid false positive */
     95 		radeon_ring_lockup_update(rdev, ring);
     96 	}
     97 }
     98 
     99 /**
    100  * radeon_ring_alloc - allocate space on the ring buffer
    101  *
    102  * @rdev: radeon_device pointer
    103  * @ring: radeon_ring structure holding ring information
    104  * @ndw: number of dwords to allocate in the ring buffer
    105  *
    106  * Allocate @ndw dwords in the ring buffer (all asics).
    107  * Returns 0 on success, error on failure.
    108  */
    109 int radeon_ring_alloc(struct radeon_device *rdev, struct radeon_ring *ring, unsigned ndw)
    110 {
    111 	int r;
    112 
    113 	/* make sure we aren't trying to allocate more space than there is on the ring */
    114 	if (ndw > (ring->ring_size / 4))
    115 		return -ENOMEM;
    116 	/* Align requested size with padding so unlock_commit can
    117 	 * pad safely */
    118 	radeon_ring_free_size(rdev, ring);
    119 	ndw = (ndw + ring->align_mask) & ~ring->align_mask;
    120 	while (ndw > (ring->ring_free_dw - 1)) {
    121 		radeon_ring_free_size(rdev, ring);
    122 		if (ndw < ring->ring_free_dw) {
    123 			break;
    124 		}
    125 		r = radeon_fence_wait_next(rdev, ring->idx);
    126 		if (r)
    127 			return r;
    128 	}
    129 	ring->count_dw = ndw;
    130 	ring->wptr_old = ring->wptr;
    131 	return 0;
    132 }
    133 
    134 /**
    135  * radeon_ring_lock - lock the ring and allocate space on it
    136  *
    137  * @rdev: radeon_device pointer
    138  * @ring: radeon_ring structure holding ring information
    139  * @ndw: number of dwords to allocate in the ring buffer
    140  *
    141  * Lock the ring and allocate @ndw dwords in the ring buffer
    142  * (all asics).
    143  * Returns 0 on success, error on failure.
    144  */
    145 int radeon_ring_lock(struct radeon_device *rdev, struct radeon_ring *ring, unsigned ndw)
    146 {
    147 	int r;
    148 
    149 	mutex_lock(&rdev->ring_lock);
    150 	r = radeon_ring_alloc(rdev, ring, ndw);
    151 	if (r) {
    152 		mutex_unlock(&rdev->ring_lock);
    153 		return r;
    154 	}
    155 	return 0;
    156 }
    157 
    158 /**
    159  * radeon_ring_commit - tell the GPU to execute the new
    160  * commands on the ring buffer
    161  *
    162  * @rdev: radeon_device pointer
    163  * @ring: radeon_ring structure holding ring information
    164  * @hdp_flush: Whether or not to perform an HDP cache flush
    165  *
    166  * Update the wptr (write pointer) to tell the GPU to
    167  * execute new commands on the ring buffer (all asics).
    168  */
    169 void radeon_ring_commit(struct radeon_device *rdev, struct radeon_ring *ring,
    170 			bool hdp_flush)
    171 {
    172 	/* If we are emitting the HDP flush via the ring buffer, we need to
    173 	 * do it before padding.
    174 	 */
    175 	if (hdp_flush && rdev->asic->ring[ring->idx]->hdp_flush)
    176 		rdev->asic->ring[ring->idx]->hdp_flush(rdev, ring);
    177 	/* We pad to match fetch size */
    178 	while (ring->wptr & ring->align_mask) {
    179 		radeon_ring_write(ring, ring->nop);
    180 	}
    181 	mb();
    182 	/* If we are emitting the HDP flush via MMIO, we need to do it after
    183 	 * all CPU writes to VRAM finished.
    184 	 */
    185 	if (hdp_flush && rdev->asic->mmio_hdp_flush)
    186 		rdev->asic->mmio_hdp_flush(rdev);
    187 	radeon_ring_set_wptr(rdev, ring);
    188 }
    189 
    190 /**
    191  * radeon_ring_unlock_commit - tell the GPU to execute the new
    192  * commands on the ring buffer and unlock it
    193  *
    194  * @rdev: radeon_device pointer
    195  * @ring: radeon_ring structure holding ring information
    196  * @hdp_flush: Whether or not to perform an HDP cache flush
    197  *
    198  * Call radeon_ring_commit() then unlock the ring (all asics).
    199  */
    200 void radeon_ring_unlock_commit(struct radeon_device *rdev, struct radeon_ring *ring,
    201 			       bool hdp_flush)
    202 {
    203 	radeon_ring_commit(rdev, ring, hdp_flush);
    204 	mutex_unlock(&rdev->ring_lock);
    205 }
    206 
    207 /**
    208  * radeon_ring_undo - reset the wptr
    209  *
    210  * @ring: radeon_ring structure holding ring information
    211  *
    212  * Reset the driver's copy of the wptr (all asics).
    213  */
    214 void radeon_ring_undo(struct radeon_ring *ring)
    215 {
    216 	ring->wptr = ring->wptr_old;
    217 }
    218 
    219 /**
    220  * radeon_ring_unlock_undo - reset the wptr and unlock the ring
    221  *
    222  * @ring: radeon_ring structure holding ring information
    223  *
    224  * Call radeon_ring_undo() then unlock the ring (all asics).
    225  */
    226 void radeon_ring_unlock_undo(struct radeon_device *rdev, struct radeon_ring *ring)
    227 {
    228 	radeon_ring_undo(ring);
    229 	mutex_unlock(&rdev->ring_lock);
    230 }
    231 
    232 /**
    233  * radeon_ring_lockup_update - update lockup variables
    234  *
    235  * @ring: radeon_ring structure holding ring information
    236  *
    237  * Update the last rptr value and timestamp (all asics).
    238  */
    239 void radeon_ring_lockup_update(struct radeon_device *rdev,
    240 			       struct radeon_ring *ring)
    241 {
    242 	atomic_set(&ring->last_rptr, radeon_ring_get_rptr(rdev, ring));
    243 	atomic64_set(&ring->last_activity, jiffies_64);
    244 }
    245 
    246 /**
    247  * radeon_ring_test_lockup() - check if ring is lockedup by recording information
    248  * @rdev:       radeon device structure
    249  * @ring:       radeon_ring structure holding ring information
    250  *
    251  */
    252 bool radeon_ring_test_lockup(struct radeon_device *rdev, struct radeon_ring *ring)
    253 {
    254 	uint32_t rptr = radeon_ring_get_rptr(rdev, ring);
    255 	uint64_t last = atomic64_read(&ring->last_activity);
    256 	uint64_t elapsed;
    257 
    258 	if (rptr != atomic_read(&ring->last_rptr)) {
    259 		/* ring is still working, no lockup */
    260 		radeon_ring_lockup_update(rdev, ring);
    261 		return false;
    262 	}
    263 
    264 	elapsed = jiffies_to_msecs(jiffies_64 - last);
    265 	if (radeon_lockup_timeout && elapsed >= radeon_lockup_timeout) {
    266 		dev_err(rdev->dev, "ring %d stalled for more than %"PRIu64"msec\n",
    267 			ring->idx, elapsed);
    268 		return true;
    269 	}
    270 	/* give a chance to the GPU ... */
    271 	return false;
    272 }
    273 
    274 /**
    275  * radeon_ring_backup - Back up the content of a ring
    276  *
    277  * @rdev: radeon_device pointer
    278  * @ring: the ring we want to back up
    279  *
    280  * Saves all unprocessed commits from a ring, returns the number of dwords saved.
    281  */
    282 unsigned radeon_ring_backup(struct radeon_device *rdev, struct radeon_ring *ring,
    283 			    uint32_t **data)
    284 {
    285 	unsigned size, ptr, i;
    286 
    287 	/* just in case lock the ring */
    288 	mutex_lock(&rdev->ring_lock);
    289 	*data = NULL;
    290 
    291 	if (ring->ring_obj == NULL) {
    292 		mutex_unlock(&rdev->ring_lock);
    293 		return 0;
    294 	}
    295 
    296 	/* it doesn't make sense to save anything if all fences are signaled */
    297 	if (!radeon_fence_count_emitted(rdev, ring->idx)) {
    298 		mutex_unlock(&rdev->ring_lock);
    299 		return 0;
    300 	}
    301 
    302 	/* calculate the number of dw on the ring */
    303 	if (ring->rptr_save_reg)
    304 		ptr = RREG32(ring->rptr_save_reg);
    305 	else if (rdev->wb.enabled)
    306 		ptr = le32_to_cpu(*ring->next_rptr_cpu_addr);
    307 	else {
    308 		/* no way to read back the next rptr */
    309 		mutex_unlock(&rdev->ring_lock);
    310 		return 0;
    311 	}
    312 
    313 	size = ring->wptr + (ring->ring_size / 4);
    314 	size -= ptr;
    315 	size &= ring->ptr_mask;
    316 	if (size == 0) {
    317 		mutex_unlock(&rdev->ring_lock);
    318 		return 0;
    319 	}
    320 
    321 	/* and then save the content of the ring */
    322 	*data = drm_malloc_ab(size, sizeof(uint32_t));
    323 	if (!*data) {
    324 		mutex_unlock(&rdev->ring_lock);
    325 		return 0;
    326 	}
    327 	for (i = 0; i < size; ++i) {
    328 		(*data)[i] = ring->ring[ptr++];
    329 		ptr &= ring->ptr_mask;
    330 	}
    331 
    332 	mutex_unlock(&rdev->ring_lock);
    333 	return size;
    334 }
    335 
    336 /**
    337  * radeon_ring_restore - append saved commands to the ring again
    338  *
    339  * @rdev: radeon_device pointer
    340  * @ring: ring to append commands to
    341  * @size: number of dwords we want to write
    342  * @data: saved commands
    343  *
    344  * Allocates space on the ring and restore the previously saved commands.
    345  */
    346 int radeon_ring_restore(struct radeon_device *rdev, struct radeon_ring *ring,
    347 			unsigned size, uint32_t *data)
    348 {
    349 	int i, r;
    350 
    351 	if (!size || !data)
    352 		return 0;
    353 
    354 	/* restore the saved ring content */
    355 	r = radeon_ring_lock(rdev, ring, size);
    356 	if (r)
    357 		return r;
    358 
    359 	for (i = 0; i < size; ++i) {
    360 		radeon_ring_write(ring, data[i]);
    361 	}
    362 
    363 	radeon_ring_unlock_commit(rdev, ring, false);
    364 	drm_free_large(data);
    365 	return 0;
    366 }
    367 
    368 /**
    369  * radeon_ring_init - init driver ring struct.
    370  *
    371  * @rdev: radeon_device pointer
    372  * @ring: radeon_ring structure holding ring information
    373  * @ring_size: size of the ring
    374  * @rptr_offs: offset of the rptr writeback location in the WB buffer
    375  * @nop: nop packet for this ring
    376  *
    377  * Initialize the driver information for the selected ring (all asics).
    378  * Returns 0 on success, error on failure.
    379  */
    380 int radeon_ring_init(struct radeon_device *rdev, struct radeon_ring *ring, unsigned ring_size,
    381 		     unsigned rptr_offs, u32 nop)
    382 {
    383 	int r;
    384 
    385 	ring->ring_size = ring_size;
    386 	ring->rptr_offs = rptr_offs;
    387 	ring->nop = nop;
    388 	/* Allocate ring buffer */
    389 	if (ring->ring_obj == NULL) {
    390 		r = radeon_bo_create(rdev, ring->ring_size, PAGE_SIZE, true,
    391 				     RADEON_GEM_DOMAIN_GTT, 0, NULL,
    392 				     NULL, &ring->ring_obj);
    393 		if (r) {
    394 			dev_err(rdev->dev, "(%d) ring create failed\n", r);
    395 			return r;
    396 		}
    397 		r = radeon_bo_reserve(ring->ring_obj, false);
    398 		if (unlikely(r != 0))
    399 			return r;
    400 		r = radeon_bo_pin(ring->ring_obj, RADEON_GEM_DOMAIN_GTT,
    401 					&ring->gpu_addr);
    402 		if (r) {
    403 			radeon_bo_unreserve(ring->ring_obj);
    404 			dev_err(rdev->dev, "(%d) ring pin failed\n", r);
    405 			return r;
    406 		}
    407 		r = radeon_bo_kmap(ring->ring_obj,
    408 				       (void **)__UNVOLATILE(&ring->ring));
    409 		radeon_bo_unreserve(ring->ring_obj);
    410 		if (r) {
    411 			dev_err(rdev->dev, "(%d) ring map failed\n", r);
    412 			return r;
    413 		}
    414 	}
    415 	ring->ptr_mask = (ring->ring_size / 4) - 1;
    416 	ring->ring_free_dw = ring->ring_size / 4;
    417 	if (rdev->wb.enabled) {
    418 		u32 index = RADEON_WB_RING0_NEXT_RPTR + (ring->idx * 4);
    419 		ring->next_rptr_gpu_addr = rdev->wb.gpu_addr + index;
    420 		ring->next_rptr_cpu_addr = &rdev->wb.wb[index/4];
    421 	}
    422 	if (radeon_debugfs_ring_init(rdev, ring)) {
    423 		DRM_ERROR("Failed to register debugfs file for rings !\n");
    424 	}
    425 	radeon_ring_lockup_update(rdev, ring);
    426 	return 0;
    427 }
    428 
    429 /**
    430  * radeon_ring_fini - tear down the driver ring struct.
    431  *
    432  * @rdev: radeon_device pointer
    433  * @ring: radeon_ring structure holding ring information
    434  *
    435  * Tear down the driver information for the selected ring (all asics).
    436  */
    437 void radeon_ring_fini(struct radeon_device *rdev, struct radeon_ring *ring)
    438 {
    439 	int r;
    440 	struct radeon_bo *ring_obj;
    441 
    442 	mutex_lock(&rdev->ring_lock);
    443 	ring_obj = ring->ring_obj;
    444 	ring->ready = false;
    445 	ring->ring = NULL;
    446 	ring->ring_obj = NULL;
    447 	mutex_unlock(&rdev->ring_lock);
    448 
    449 	if (ring_obj) {
    450 		r = radeon_bo_reserve(ring_obj, false);
    451 		if (likely(r == 0)) {
    452 			radeon_bo_kunmap(ring_obj);
    453 			radeon_bo_unpin(ring_obj);
    454 			radeon_bo_unreserve(ring_obj);
    455 		}
    456 		radeon_bo_unref(&ring_obj);
    457 	}
    458 }
    459 
    460 /*
    461  * Debugfs info
    462  */
    463 #if defined(CONFIG_DEBUG_FS)
    464 
    465 static int radeon_debugfs_ring_info(struct seq_file *m, void *data)
    466 {
    467 	struct drm_info_node *node = (struct drm_info_node *) m->private;
    468 	struct drm_device *dev = node->minor->dev;
    469 	struct radeon_device *rdev = dev->dev_private;
    470 	int ridx = *(int*)node->info_ent->data;
    471 	struct radeon_ring *ring = &rdev->ring[ridx];
    472 
    473 	uint32_t rptr, wptr, rptr_next;
    474 	unsigned count, i, j;
    475 
    476 	radeon_ring_free_size(rdev, ring);
    477 	count = (ring->ring_size / 4) - ring->ring_free_dw;
    478 
    479 	wptr = radeon_ring_get_wptr(rdev, ring);
    480 	seq_printf(m, "wptr: 0x%08x [%5d]\n",
    481 		   wptr, wptr);
    482 
    483 	rptr = radeon_ring_get_rptr(rdev, ring);
    484 	seq_printf(m, "rptr: 0x%08x [%5d]\n",
    485 		   rptr, rptr);
    486 
    487 	if (ring->rptr_save_reg) {
    488 		rptr_next = RREG32(ring->rptr_save_reg);
    489 		seq_printf(m, "rptr next(0x%04x): 0x%08x [%5d]\n",
    490 			   ring->rptr_save_reg, rptr_next, rptr_next);
    491 	} else
    492 		rptr_next = ~0;
    493 
    494 	seq_printf(m, "driver's copy of the wptr: 0x%08x [%5d]\n",
    495 		   ring->wptr, ring->wptr);
    496 	seq_printf(m, "last semaphore signal addr : 0x%016llx\n",
    497 		   ring->last_semaphore_signal_addr);
    498 	seq_printf(m, "last semaphore wait addr   : 0x%016llx\n",
    499 		   ring->last_semaphore_wait_addr);
    500 	seq_printf(m, "%u free dwords in ring\n", ring->ring_free_dw);
    501 	seq_printf(m, "%u dwords in ring\n", count);
    502 
    503 	if (!ring->ring)
    504 		return 0;
    505 
    506 	/* print 8 dw before current rptr as often it's the last executed
    507 	 * packet that is the root issue
    508 	 */
    509 	i = (rptr + ring->ptr_mask + 1 - 32) & ring->ptr_mask;
    510 	for (j = 0; j <= (count + 32); j++) {
    511 		seq_printf(m, "r[%5d]=0x%08x", i, ring->ring[i]);
    512 		if (rptr == i)
    513 			seq_puts(m, " *");
    514 		if (rptr_next == i)
    515 			seq_puts(m, " #");
    516 		seq_puts(m, "\n");
    517 		i = (i + 1) & ring->ptr_mask;
    518 	}
    519 	return 0;
    520 }
    521 
    522 static int radeon_gfx_index = RADEON_RING_TYPE_GFX_INDEX;
    523 static int cayman_cp1_index = CAYMAN_RING_TYPE_CP1_INDEX;
    524 static int cayman_cp2_index = CAYMAN_RING_TYPE_CP2_INDEX;
    525 static int radeon_dma1_index = R600_RING_TYPE_DMA_INDEX;
    526 static int radeon_dma2_index = CAYMAN_RING_TYPE_DMA1_INDEX;
    527 static int r600_uvd_index = R600_RING_TYPE_UVD_INDEX;
    528 static int si_vce1_index = TN_RING_TYPE_VCE1_INDEX;
    529 static int si_vce2_index = TN_RING_TYPE_VCE2_INDEX;
    530 
    531 static struct drm_info_list radeon_debugfs_ring_info_list[] = {
    532 	{"radeon_ring_gfx", radeon_debugfs_ring_info, 0, &radeon_gfx_index},
    533 	{"radeon_ring_cp1", radeon_debugfs_ring_info, 0, &cayman_cp1_index},
    534 	{"radeon_ring_cp2", radeon_debugfs_ring_info, 0, &cayman_cp2_index},
    535 	{"radeon_ring_dma1", radeon_debugfs_ring_info, 0, &radeon_dma1_index},
    536 	{"radeon_ring_dma2", radeon_debugfs_ring_info, 0, &radeon_dma2_index},
    537 	{"radeon_ring_uvd", radeon_debugfs_ring_info, 0, &r600_uvd_index},
    538 	{"radeon_ring_vce1", radeon_debugfs_ring_info, 0, &si_vce1_index},
    539 	{"radeon_ring_vce2", radeon_debugfs_ring_info, 0, &si_vce2_index},
    540 };
    541 
    542 #endif
    543 
    544 static int radeon_debugfs_ring_init(struct radeon_device *rdev, struct radeon_ring *ring)
    545 {
    546 #if defined(CONFIG_DEBUG_FS)
    547 	unsigned i;
    548 	for (i = 0; i < ARRAY_SIZE(radeon_debugfs_ring_info_list); ++i) {
    549 		struct drm_info_list *info = &radeon_debugfs_ring_info_list[i];
    550 		int ridx = *(int*)radeon_debugfs_ring_info_list[i].data;
    551 		unsigned r;
    552 
    553 		if (&rdev->ring[ridx] != ring)
    554 			continue;
    555 
    556 		r = radeon_debugfs_add_files(rdev, info, 1);
    557 		if (r)
    558 			return r;
    559 	}
    560 #endif
    561 	return 0;
    562 }
    563