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      1  1.2  riastrad /*	$NetBSD: trinity_dpm.h,v 1.3 2021/12/18 23:45:43 riastradh Exp $	*/
      2  1.2  riastrad 
      3  1.1  riastrad /*
      4  1.1  riastrad  * Copyright 2012 Advanced Micro Devices, Inc.
      5  1.1  riastrad  *
      6  1.1  riastrad  * Permission is hereby granted, free of charge, to any person obtaining a
      7  1.1  riastrad  * copy of this software and associated documentation files (the "Software"),
      8  1.1  riastrad  * to deal in the Software without restriction, including without limitation
      9  1.1  riastrad  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
     10  1.1  riastrad  * and/or sell copies of the Software, and to permit persons to whom the
     11  1.1  riastrad  * Software is furnished to do so, subject to the following conditions:
     12  1.1  riastrad  *
     13  1.1  riastrad  * The above copyright notice and this permission notice shall be included in
     14  1.1  riastrad  * all copies or substantial portions of the Software.
     15  1.1  riastrad  *
     16  1.1  riastrad  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
     17  1.1  riastrad  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
     18  1.1  riastrad  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
     19  1.1  riastrad  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
     20  1.1  riastrad  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
     21  1.1  riastrad  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
     22  1.1  riastrad  * OTHER DEALINGS IN THE SOFTWARE.
     23  1.1  riastrad  *
     24  1.1  riastrad  */
     25  1.1  riastrad #ifndef __TRINITY_DPM_H__
     26  1.1  riastrad #define __TRINITY_DPM_H__
     27  1.1  riastrad 
     28  1.1  riastrad #include "sumo_dpm.h"
     29  1.1  riastrad 
     30  1.1  riastrad #define TRINITY_SIZEOF_DPM_STATE_TABLE (SMU_SCLK_DPM_STATE_1_CNTL_0 - SMU_SCLK_DPM_STATE_0_CNTL_0)
     31  1.1  riastrad 
     32  1.1  riastrad struct trinity_pl {
     33  1.1  riastrad 	u32 sclk;
     34  1.1  riastrad 	u8 vddc_index;
     35  1.1  riastrad 	u8 ds_divider_index;
     36  1.1  riastrad 	u8 ss_divider_index;
     37  1.1  riastrad 	u8 allow_gnb_slow;
     38  1.1  riastrad 	u8 force_nbp_state;
     39  1.1  riastrad 	u8 display_wm;
     40  1.1  riastrad 	u8 vce_wm;
     41  1.1  riastrad };
     42  1.1  riastrad 
     43  1.1  riastrad #define TRINITY_POWERSTATE_FLAGS_NBPS_FORCEHIGH  (1 << 0)
     44  1.1  riastrad #define TRINITY_POWERSTATE_FLAGS_NBPS_LOCKTOHIGH (1 << 1)
     45  1.1  riastrad #define TRINITY_POWERSTATE_FLAGS_NBPS_LOCKTOLOW  (1 << 2)
     46  1.1  riastrad 
     47  1.1  riastrad #define TRINITY_POWERSTATE_FLAGS_BAPM_DISABLE    (1 << 0)
     48  1.1  riastrad 
     49  1.1  riastrad struct trinity_ps {
     50  1.1  riastrad 	u32 num_levels;
     51  1.1  riastrad 	struct trinity_pl levels[SUMO_MAX_HARDWARE_POWERLEVELS];
     52  1.1  riastrad 
     53  1.1  riastrad 	u32 nbps_flags;
     54  1.1  riastrad 	u32 bapm_flags;
     55  1.1  riastrad 
     56  1.1  riastrad 	u8 Dpm0PgNbPsLo;
     57  1.1  riastrad 	u8 Dpm0PgNbPsHi;
     58  1.1  riastrad 	u8 DpmXNbPsLo;
     59  1.1  riastrad 	u8 DpmXNbPsHi;
     60  1.1  riastrad 
     61  1.1  riastrad 	u32 vclk_low_divider;
     62  1.1  riastrad 	u32 vclk_high_divider;
     63  1.1  riastrad 	u32 dclk_low_divider;
     64  1.1  riastrad 	u32 dclk_high_divider;
     65  1.1  riastrad };
     66  1.1  riastrad 
     67  1.1  riastrad #define TRINITY_NUM_NBPSTATES   4
     68  1.1  riastrad 
     69  1.1  riastrad struct trinity_uvd_clock_table_entry
     70  1.1  riastrad {
     71  1.1  riastrad 	u32 vclk;
     72  1.1  riastrad 	u32 dclk;
     73  1.1  riastrad 	u8 vclk_did;
     74  1.1  riastrad 	u8 dclk_did;
     75  1.1  riastrad 	u8 rsv[2];
     76  1.1  riastrad };
     77  1.1  riastrad 
     78  1.1  riastrad struct trinity_sys_info {
     79  1.1  riastrad 	u32 bootup_uma_clk;
     80  1.1  riastrad 	u32 bootup_sclk;
     81  1.1  riastrad 	u32 min_sclk;
     82  1.1  riastrad 	u32 dentist_vco_freq;
     83  1.1  riastrad 	u32 nb_dpm_enable;
     84  1.1  riastrad 	u32 nbp_mclk[TRINITY_NUM_NBPSTATES];
     85  1.1  riastrad 	u32 nbp_nclk[TRINITY_NUM_NBPSTATES];
     86  1.1  riastrad 	u16 nbp_voltage_index[TRINITY_NUM_NBPSTATES];
     87  1.1  riastrad 	u16 bootup_nb_voltage_index;
     88  1.1  riastrad 	u8 htc_tmp_lmt;
     89  1.1  riastrad 	u8 htc_hyst_lmt;
     90  1.1  riastrad 	struct sumo_sclk_voltage_mapping_table sclk_voltage_mapping_table;
     91  1.1  riastrad 	struct sumo_vid_mapping_table vid_mapping_table;
     92  1.1  riastrad 	u32 uma_channel_number;
     93  1.1  riastrad 	struct trinity_uvd_clock_table_entry uvd_clock_table_entries[4];
     94  1.1  riastrad };
     95  1.1  riastrad 
     96  1.1  riastrad struct trinity_power_info {
     97  1.1  riastrad 	u32 at[SUMO_MAX_HARDWARE_POWERLEVELS];
     98  1.1  riastrad 	u32 dpm_interval;
     99  1.1  riastrad 	u32 thermal_auto_throttling;
    100  1.1  riastrad 	struct trinity_sys_info sys_info;
    101  1.1  riastrad 	struct trinity_pl boot_pl;
    102  1.1  riastrad 	u32 min_sclk_did;
    103  1.1  riastrad 	bool enable_nbps_policy;
    104  1.1  riastrad 	bool voltage_drop_in_dce;
    105  1.1  riastrad 	bool override_dynamic_mgpg;
    106  1.1  riastrad 	bool enable_gfx_clock_gating;
    107  1.1  riastrad 	bool enable_gfx_power_gating;
    108  1.1  riastrad 	bool enable_mg_clock_gating;
    109  1.1  riastrad 	bool enable_gfx_dynamic_mgpg;
    110  1.1  riastrad 	bool enable_auto_thermal_throttling;
    111  1.1  riastrad 	bool enable_dpm;
    112  1.1  riastrad 	bool enable_sclk_ds;
    113  1.1  riastrad 	bool enable_bapm;
    114  1.1  riastrad 	bool uvd_dpm;
    115  1.1  riastrad 	struct radeon_ps current_rps;
    116  1.1  riastrad 	struct trinity_ps current_ps;
    117  1.1  riastrad 	struct radeon_ps requested_rps;
    118  1.1  riastrad 	struct trinity_ps requested_ps;
    119  1.1  riastrad };
    120  1.1  riastrad 
    121  1.1  riastrad #define TRINITY_AT_DFLT            30
    122  1.1  riastrad 
    123  1.1  riastrad /* trinity_smc.c */
    124  1.1  riastrad int trinity_dpm_bapm_enable(struct radeon_device *rdev, bool enable);
    125  1.1  riastrad int trinity_dpm_config(struct radeon_device *rdev, bool enable);
    126  1.1  riastrad int trinity_uvd_dpm_config(struct radeon_device *rdev);
    127  1.1  riastrad int trinity_dpm_force_state(struct radeon_device *rdev, u32 n);
    128  1.1  riastrad int trinity_dpm_n_levels_disabled(struct radeon_device *rdev, u32 n);
    129  1.1  riastrad int trinity_dpm_no_forced_level(struct radeon_device *rdev);
    130  1.1  riastrad int trinity_dce_enable_voltage_adjustment(struct radeon_device *rdev,
    131  1.1  riastrad 					  bool enable);
    132  1.1  riastrad int trinity_gfx_dynamic_mgpg_config(struct radeon_device *rdev);
    133  1.1  riastrad void trinity_acquire_mutex(struct radeon_device *rdev);
    134  1.1  riastrad void trinity_release_mutex(struct radeon_device *rdev);
    135  1.1  riastrad 
    136  1.1  riastrad #endif
    137