via_dmablit.c revision 1.9 1 /* $NetBSD: via_dmablit.c,v 1.9 2021/12/18 23:45:44 riastradh Exp $ */
2
3 /* via_dmablit.c -- PCI DMA BitBlt support for the VIA Unichrome/Pro
4 *
5 * Copyright (C) 2005 Thomas Hellstrom, All Rights Reserved.
6 *
7 * Permission is hereby granted, free of charge, to any person obtaining a
8 * copy of this software and associated documentation files (the "Software"),
9 * to deal in the Software without restriction, including without limitation
10 * the rights to use, copy, modify, merge, publish, distribute, sub license,
11 * and/or sell copies of the Software, and to permit persons to whom the
12 * Software is furnished to do so, subject to the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
16 * of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
21 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
22 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
23 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
24 * USE OR OTHER DEALINGS IN THE SOFTWARE.
25 *
26 * Authors:
27 * Thomas Hellstrom.
28 * Partially based on code obtained from Digeo Inc.
29 */
30
31
32 /*
33 * Unmaps the DMA mappings.
34 * FIXME: Is this a NoOp on x86? Also
35 * FIXME: What happens if this one is called and a pending blit has previously done
36 * the same DMA mappings?
37 */
38
39 #include <sys/cdefs.h>
40 __KERNEL_RCSID(0, "$NetBSD: via_dmablit.c,v 1.9 2021/12/18 23:45:44 riastradh Exp $");
41
42 #include <linux/pagemap.h>
43 #include <linux/pci.h>
44 #include <linux/slab.h>
45 #include <linux/vmalloc.h>
46
47 #include <drm/drm_device.h>
48 #include <drm/via_drm.h>
49
50 #include "via_dmablit.h"
51 #include "via_drv.h"
52
53 #define VIA_PGDN(x) (((unsigned long)(x)) & PAGE_MASK)
54 #define VIA_PGOFF(x) (((unsigned long)(x)) & ~PAGE_MASK)
55 #define VIA_PFN(x) ((unsigned long)(x) >> PAGE_SHIFT)
56
57 typedef struct _drm_via_descriptor {
58 uint32_t mem_addr;
59 uint32_t dev_addr;
60 uint32_t size;
61 uint32_t next;
62 } drm_via_descriptor_t;
63
64
65 /*
66 * Unmap a DMA mapping.
67 */
68
69
70
71 static void
72 via_unmap_blit_from_device(struct drm_device *dev, struct pci_dev *pdev,
73 drm_via_sg_info_t *vsg)
74 {
75 #ifdef __NetBSD__
76 bus_dmamap_unload(dev->dmat, vsg->dmamap);
77 #else
78 int num_desc = vsg->num_desc;
79 unsigned cur_descriptor_page = num_desc / vsg->descriptors_per_page;
80 unsigned descriptor_this_page = num_desc % vsg->descriptors_per_page;
81 drm_via_descriptor_t *desc_ptr = vsg->desc_pages[cur_descriptor_page] +
82 descriptor_this_page;
83 dma_addr_t next = vsg->chain_start;
84
85 while (num_desc--) {
86 if (descriptor_this_page-- == 0) {
87 cur_descriptor_page--;
88 descriptor_this_page = vsg->descriptors_per_page - 1;
89 desc_ptr = vsg->desc_pages[cur_descriptor_page] +
90 descriptor_this_page;
91 }
92 dma_unmap_single(&pdev->dev, next, sizeof(*desc_ptr), DMA_TO_DEVICE);
93 dma_unmap_page(&pdev->dev, desc_ptr->mem_addr, desc_ptr->size, vsg->direction);
94 next = (dma_addr_t) desc_ptr->next;
95 desc_ptr--;
96 }
97 #endif
98 }
99
100 /*
101 * If mode = 0, count how many descriptors are needed.
102 * If mode = 1, Map the DMA pages for the device, put together and map also the descriptors.
103 * Descriptors are run in reverse order by the hardware because we are not allowed to update the
104 * 'next' field without syncing calls when the descriptor is already mapped.
105 */
106
107 static void
108 via_map_blit_for_device(struct pci_dev *pdev,
109 const drm_via_dmablit_t *xfer,
110 drm_via_sg_info_t *vsg,
111 int mode)
112 {
113 unsigned cur_descriptor_page = 0;
114 unsigned num_descriptors_this_page = 0;
115 unsigned char *mem_addr = xfer->mem_addr;
116 unsigned char *cur_mem;
117 #ifndef __NetBSD__
118 unsigned char *first_addr = (unsigned char *)VIA_PGDN(mem_addr);
119 #endif
120 uint32_t fb_addr = xfer->fb_addr;
121 uint32_t cur_fb;
122 unsigned long line_len;
123 unsigned remaining_len;
124 int num_desc = 0;
125 int cur_line;
126 dma_addr_t next = 0 | VIA_DMA_DPR_EC;
127 drm_via_descriptor_t *desc_ptr = NULL;
128
129 if (mode == 1)
130 desc_ptr = vsg->desc_pages[cur_descriptor_page];
131
132 for (cur_line = 0; cur_line < xfer->num_lines; ++cur_line) {
133
134 line_len = xfer->line_length;
135 cur_fb = fb_addr;
136 cur_mem = mem_addr;
137
138 while (line_len > 0) {
139
140 remaining_len = min(PAGE_SIZE-VIA_PGOFF(cur_mem), line_len);
141 line_len -= remaining_len;
142
143 if (mode == 1) {
144 #ifdef __NetBSD__
145 const vaddr_t cur_va = (vaddr_t)cur_mem;
146 const bus_dma_segment_t *const seg =
147 &vsg->dmamap->dm_segs[atop(cur_va)];
148 desc_ptr->mem_addr =
149 seg->ds_addr + trunc_page(cur_va);
150 #else
151 desc_ptr->mem_addr =
152 dma_map_page(&pdev->dev,
153 vsg->pages[VIA_PFN(cur_mem) -
154 VIA_PFN(first_addr)],
155 VIA_PGOFF(cur_mem), remaining_len,
156 vsg->direction);
157 #endif
158 desc_ptr->dev_addr = cur_fb;
159
160 desc_ptr->size = remaining_len;
161 desc_ptr->next = (uint32_t) next;
162 #ifdef __NetBSD__
163 next = vsg->desc_dmamap
164 ->dm_segs[cur_descriptor_page].ds_addr
165 + num_descriptors_this_page;
166 #else
167 next = dma_map_single(&pdev->dev, desc_ptr, sizeof(*desc_ptr),
168 DMA_TO_DEVICE);
169 #endif
170 desc_ptr++;
171 if (++num_descriptors_this_page >= vsg->descriptors_per_page) {
172 num_descriptors_this_page = 0;
173 desc_ptr = vsg->desc_pages[++cur_descriptor_page];
174 }
175 }
176
177 num_desc++;
178 cur_mem += remaining_len;
179 cur_fb += remaining_len;
180 }
181
182 mem_addr += xfer->mem_stride;
183 fb_addr += xfer->fb_stride;
184 }
185
186 if (mode == 1) {
187 vsg->chain_start = next;
188 vsg->state = dr_via_device_mapped;
189 }
190 vsg->num_desc = num_desc;
191 }
192
193 /*
194 * Function that frees up all resources for a blit. It is usable even if the
195 * blit info has only been partially built as long as the status enum is consistent
196 * with the actual status of the used resources.
197 */
198
199
200 static void
201 via_free_sg_info(struct drm_device *dev, struct pci_dev *pdev,
202 drm_via_sg_info_t *vsg)
203 {
204 int i;
205
206 switch (vsg->state) {
207 case dr_via_device_mapped:
208 via_unmap_blit_from_device(pdev, vsg);
209 /* fall through */
210 case dr_via_desc_pages_alloc:
211 #ifdef __NetBSD__
212 bus_dmamap_unload(dev->dmat, vsg->desc_dmamap);
213 bus_dmamap_destroy(dev->dmat, vsg->desc_dmamap);
214 bus_dmamem_unmap(dev->dmat, vsg->desc_kva,
215 vsg->num_desc_pages << PAGE_SHIFT);
216 bus_dmamem_free(dev->dmat, vsg->desc_segs, vsg->num_desc_segs);
217 kfree(vsg->desc_segs);
218 #else
219 for (i = 0; i < vsg->num_desc_pages; ++i) {
220 if (vsg->desc_pages[i] != NULL)
221 free_page((unsigned long)vsg->desc_pages[i]);
222 }
223 #endif
224 kfree(vsg->desc_pages);
225 /* fall through */
226 case dr_via_pages_locked:
227 unpin_user_pages_dirty_lock(vsg->pages, vsg->num_pages,
228 (vsg->direction == DMA_FROM_DEVICE));
229 /* fall through */
230 case dr_via_pages_alloc:
231 #ifdef __NetBSD__
232 bus_dmamap_destroy(dev->dmat, vsg->dmamap);
233 #else
234 vfree(vsg->pages);
235 #endif
236 /* fall through */
237 default:
238 vsg->state = dr_via_sg_init;
239 }
240 vsg->free_on_sequence = 0;
241 }
242
243 /*
244 * Fire a blit engine.
245 */
246
247 static void
248 via_fire_dmablit(struct drm_device *dev, drm_via_sg_info_t *vsg, int engine)
249 {
250 drm_via_private_t *dev_priv = (drm_via_private_t *)dev->dev_private;
251
252 via_write(dev_priv, VIA_PCI_DMA_MAR0 + engine*0x10, 0);
253 via_write(dev_priv, VIA_PCI_DMA_DAR0 + engine*0x10, 0);
254 via_write(dev_priv, VIA_PCI_DMA_CSR0 + engine*0x04, VIA_DMA_CSR_DD | VIA_DMA_CSR_TD |
255 VIA_DMA_CSR_DE);
256 via_write(dev_priv, VIA_PCI_DMA_MR0 + engine*0x04, VIA_DMA_MR_CM | VIA_DMA_MR_TDIE);
257 via_write(dev_priv, VIA_PCI_DMA_BCR0 + engine*0x10, 0);
258 via_write(dev_priv, VIA_PCI_DMA_DPR0 + engine*0x10, vsg->chain_start);
259 wmb();
260 via_write(dev_priv, VIA_PCI_DMA_CSR0 + engine*0x04, VIA_DMA_CSR_DE | VIA_DMA_CSR_TS);
261 via_read(dev_priv, VIA_PCI_DMA_CSR0 + engine*0x04);
262 }
263
264 /*
265 * Obtain a page pointer array and lock all pages into system memory. A segmentation violation will
266 * occur here if the calling user does not have access to the submitted address.
267 */
268
269 static int
270 via_lock_all_dma_pages(struct drm_device *dev, drm_via_sg_info_t *vsg,
271 drm_via_dmablit_t *xfer)
272 {
273 int ret;
274 #ifdef __NetBSD__
275 const bus_size_t nbytes = roundup2(xfer->num_lines * xfer->mem_stride,
276 PAGE_SIZE);
277 const bus_size_t npages = nbytes >> PAGE_SHIFT;
278 struct iovec iov = {
279 .iov_base = xfer->mem_addr,
280 .iov_len = nbytes,
281 };
282 struct uio uio = {
283 .uio_iov = &iov,
284 .uio_iovcnt = 1,
285 .uio_offset = 0,
286 .uio_resid = nbytes,
287 .uio_rw = xfer->to_fb ? UIO_WRITE : UIO_READ,
288 .uio_vmspace = curproc->p_vmspace,
289 };
290
291 /*
292 * XXX Lock out anyone else from doing this? Add a
293 * dr_via_pages_loading state? Just rely on the giant lock?
294 */
295 /* XXX errno NetBSD->Linux */
296 ret = -bus_dmamap_create(dev->dmat, nbytes, npages, nbytes, PAGE_SIZE,
297 BUS_DMA_WAITOK, &vsg->dmamap);
298 if (ret) {
299 DRM_ERROR("bus_dmamap_create failed: %d\n", ret);
300 return ret;
301 }
302 ret = -bus_dmamap_load_uio(dev->dmat, vsg->dmamap, &uio,
303 BUS_DMA_WAITOK | (xfer->to_fb? BUS_DMA_WRITE : BUS_DMA_READ));
304 if (ret) {
305 DRM_ERROR("bus_dmamap_load failed: %d\n", ret);
306 bus_dmamap_destroy(dev->dmat, vsg->dmamap);
307 return ret;
308 }
309 vsg->num_pages = npages;
310 #else
311 unsigned long first_pfn = VIA_PFN(xfer->mem_addr);
312 vsg->num_pages = VIA_PFN(xfer->mem_addr + (xfer->num_lines * xfer->mem_stride - 1)) -
313 first_pfn + 1;
314
315 vsg->pages = vzalloc(array_size(sizeof(struct page *), vsg->num_pages));
316 if (NULL == vsg->pages)
317 return -ENOMEM;
318 ret = pin_user_pages_fast((unsigned long)xfer->mem_addr,
319 vsg->num_pages,
320 vsg->direction == DMA_FROM_DEVICE ? FOLL_WRITE : 0,
321 vsg->pages);
322 if (ret != vsg->num_pages) {
323 if (ret < 0)
324 return ret;
325 vsg->state = dr_via_pages_locked;
326 return -EINVAL;
327 }
328 #endif
329 vsg->state = dr_via_pages_locked;
330 DRM_DEBUG("DMA pages locked\n");
331 return 0;
332 }
333
334 /*
335 * Allocate DMA capable memory for the blit descriptor chain, and an array that keeps track of the
336 * pages we allocate. We don't want to use kmalloc for the descriptor chain because it may be
337 * quite large for some blits, and pages don't need to be contiguous.
338 */
339
340 static int
341 via_alloc_desc_pages(struct drm_device *dev, drm_via_sg_info_t *vsg)
342 {
343 int i;
344 #ifdef __NetBSD__
345 int ret;
346 #endif
347
348 vsg->descriptors_per_page = PAGE_SIZE / sizeof(drm_via_descriptor_t);
349 vsg->num_desc_pages = (vsg->num_desc + vsg->descriptors_per_page - 1) /
350 vsg->descriptors_per_page;
351
352 if (NULL == (vsg->desc_pages = kcalloc(vsg->num_desc_pages, sizeof(void *), GFP_KERNEL)))
353 return -ENOMEM;
354
355 #ifdef __NetBSD__
356 vsg->desc_segs = kcalloc(vsg->num_desc_pages, sizeof(*vsg->desc_segs),
357 GFP_KERNEL);
358 if (vsg->desc_segs == NULL) {
359 kfree(vsg->desc_pages);
360 return -ENOMEM;
361 }
362 /* XXX errno NetBSD->Linux */
363 ret = -bus_dmamem_alloc(dev->dmat, vsg->num_desc_pages << PAGE_SHIFT,
364 PAGE_SIZE, 0, vsg->desc_segs, vsg->num_pages, &vsg->num_desc_segs,
365 BUS_DMA_WAITOK);
366 if (ret) {
367 kfree(vsg->desc_segs);
368 kfree(vsg->desc_pages);
369 return -ENOMEM;
370 }
371 /* XXX No nice way to scatter/gather map bus_dmamem. */
372 /* XXX errno NetBSD->Linux */
373 ret = -bus_dmamem_map(dev->dmat, vsg->desc_segs, vsg->num_desc_segs,
374 vsg->num_desc_pages << PAGE_SHIFT, &vsg->desc_kva, BUS_DMA_WAITOK);
375 if (ret) {
376 bus_dmamem_free(dev->dmat, vsg->desc_segs, vsg->num_desc_segs);
377 kfree(vsg->desc_segs);
378 kfree(vsg->desc_pages);
379 return -ENOMEM;
380 }
381 /* XXX errno NetBSD->Linux */
382 ret = -bus_dmamap_create(dev->dmat, vsg->num_desc_pages << PAGE_SHIFT,
383 vsg->num_desc_pages, PAGE_SIZE, 0, BUS_DMA_WAITOK,
384 &vsg->desc_dmamap);
385 if (ret) {
386 bus_dmamem_unmap(dev->dmat, vsg->desc_kva,
387 vsg->num_desc_pages << PAGE_SHIFT);
388 bus_dmamem_free(dev->dmat, vsg->desc_segs, vsg->num_desc_segs);
389 kfree(vsg->desc_segs);
390 kfree(vsg->desc_pages);
391 return -ENOMEM;
392 }
393 ret = -bus_dmamap_load(dev->dmat, vsg->desc_dmamap, vsg->desc_kva,
394 vsg->num_desc_pages << PAGE_SHIFT, NULL, BUS_DMA_WAITOK);
395 if (ret) {
396 bus_dmamap_destroy(dev->dmat, vsg->desc_dmamap);
397 bus_dmamem_unmap(dev->dmat, vsg->desc_kva,
398 vsg->num_desc_pages << PAGE_SHIFT);
399 bus_dmamem_free(dev->dmat, vsg->desc_segs, vsg->num_desc_segs);
400 kfree(vsg->desc_segs);
401 kfree(vsg->desc_pages);
402 return -ENOMEM;
403 }
404 for (i = 0; i < vsg->num_desc_pages; i++)
405 vsg->desc_pages[i] = (void *)
406 ((char *)vsg->desc_kva + (i * PAGE_SIZE));
407 vsg->state = dr_via_desc_pages_alloc;
408 #else
409 vsg->state = dr_via_desc_pages_alloc;
410 for (i = 0; i < vsg->num_desc_pages; ++i) {
411 if (NULL == (vsg->desc_pages[i] =
412 (drm_via_descriptor_t *) __get_free_page(GFP_KERNEL)))
413 return -ENOMEM;
414 }
415 #endif
416 DRM_DEBUG("Allocated %d pages for %d descriptors.\n", vsg->num_desc_pages,
417 vsg->num_desc);
418 return 0;
419 }
420
421 static void
422 via_abort_dmablit(struct drm_device *dev, int engine)
423 {
424 drm_via_private_t *dev_priv = (drm_via_private_t *)dev->dev_private;
425
426 via_write(dev_priv, VIA_PCI_DMA_CSR0 + engine*0x04, VIA_DMA_CSR_TA);
427 }
428
429 static void
430 via_dmablit_engine_off(struct drm_device *dev, int engine)
431 {
432 drm_via_private_t *dev_priv = (drm_via_private_t *)dev->dev_private;
433
434 via_write(dev_priv, VIA_PCI_DMA_CSR0 + engine*0x04, VIA_DMA_CSR_TD | VIA_DMA_CSR_DD);
435 }
436
437
438
439 /*
440 * The dmablit part of the IRQ handler. Trying to do only reasonably fast things here.
441 * The rest, like unmapping and freeing memory for done blits is done in a separate workqueue
442 * task. Basically the task of the interrupt handler is to submit a new blit to the engine, while
443 * the workqueue task takes care of processing associated with the old blit.
444 */
445
446 void
447 via_dmablit_handler(struct drm_device *dev, int engine, int from_irq)
448 {
449 drm_via_private_t *dev_priv = (drm_via_private_t *)dev->dev_private;
450 drm_via_blitq_t *blitq = dev_priv->blit_queues + engine;
451 int cur;
452 int done_transfer;
453 unsigned long irqsave = 0;
454 uint32_t status = 0;
455
456 DRM_DEBUG("DMA blit handler called. engine = %d, from_irq = %d, blitq = 0x%lx\n",
457 engine, from_irq, (unsigned long) blitq);
458
459 if (from_irq)
460 spin_lock(&blitq->blit_lock);
461 else
462 spin_lock_irqsave(&blitq->blit_lock, irqsave);
463
464 done_transfer = blitq->is_active &&
465 ((status = via_read(dev_priv, VIA_PCI_DMA_CSR0 + engine*0x04)) & VIA_DMA_CSR_TD);
466 done_transfer = done_transfer || (blitq->aborting && !(status & VIA_DMA_CSR_DE));
467
468 cur = blitq->cur;
469 if (done_transfer) {
470
471 blitq->blits[cur]->aborted = blitq->aborting;
472 blitq->done_blit_handle++;
473 #ifdef __NetBSD__
474 DRM_SPIN_WAKEUP_ALL(&blitq->blit_queue[cur],
475 &blitq->blit_lock);
476 #else
477 wake_up(blitq->blit_queue + cur);
478 #endif
479
480 cur++;
481 if (cur >= VIA_NUM_BLIT_SLOTS)
482 cur = 0;
483 blitq->cur = cur;
484
485 /*
486 * Clear transfer done flag.
487 */
488
489 via_write(dev_priv, VIA_PCI_DMA_CSR0 + engine*0x04, VIA_DMA_CSR_TD);
490
491 blitq->is_active = 0;
492 blitq->aborting = 0;
493 schedule_work(&blitq->wq);
494
495 } else if (blitq->is_active && time_after_eq(jiffies, blitq->end)) {
496
497 /*
498 * Abort transfer after one second.
499 */
500
501 via_abort_dmablit(dev, engine);
502 blitq->aborting = 1;
503 blitq->end = jiffies + HZ;
504 }
505
506 if (!blitq->is_active) {
507 if (blitq->num_outstanding) {
508 via_fire_dmablit(dev, blitq->blits[cur], engine);
509 blitq->is_active = 1;
510 blitq->cur = cur;
511 blitq->num_outstanding--;
512 blitq->end = jiffies + HZ;
513 if (!timer_pending(&blitq->poll_timer))
514 mod_timer(&blitq->poll_timer, jiffies + 1);
515 } else {
516 if (timer_pending(&blitq->poll_timer))
517 del_timer(&blitq->poll_timer);
518 via_dmablit_engine_off(dev, engine);
519 }
520 }
521
522 if (from_irq)
523 spin_unlock(&blitq->blit_lock);
524 else
525 spin_unlock_irqrestore(&blitq->blit_lock, irqsave);
526 }
527
528
529
530 /*
531 * Check whether this blit is still active, performing necessary locking.
532 */
533
534 static int
535 #ifdef __NetBSD__
536 via_dmablit_active(drm_via_blitq_t *blitq, int engine, uint32_t handle, drm_waitqueue_t **queue)
537 #else
538 via_dmablit_active(drm_via_blitq_t *blitq, int engine, uint32_t handle, wait_queue_head_t **queue)
539 #endif
540 {
541 #ifndef __NetBSD__
542 unsigned long irqsave;
543 #endif
544 uint32_t slot;
545 int active;
546
547 #ifndef __NetBSD__
548 spin_lock_irqsave(&blitq->blit_lock, irqsave);
549 #endif
550
551 /*
552 * Allow for handle wraparounds.
553 */
554
555 active = ((blitq->done_blit_handle - handle) > (1 << 23)) &&
556 ((blitq->cur_blit_handle - handle) <= (1 << 23));
557
558 if (queue && active) {
559 slot = handle - blitq->done_blit_handle + blitq->cur - 1;
560 if (slot >= VIA_NUM_BLIT_SLOTS)
561 slot -= VIA_NUM_BLIT_SLOTS;
562 *queue = blitq->blit_queue + slot;
563 }
564
565 #ifndef __NetBSD__
566 spin_unlock_irqrestore(&blitq->blit_lock, irqsave);
567 #endif
568
569 return active;
570 }
571
572 /*
573 * Sync. Wait for at least three seconds for the blit to be performed.
574 */
575
576 static int
577 via_dmablit_sync(struct drm_device *dev, uint32_t handle, int engine)
578 {
579
580 drm_via_private_t *dev_priv = (drm_via_private_t *)dev->dev_private;
581 drm_via_blitq_t *blitq = dev_priv->blit_queues + engine;
582 #ifdef __NetBSD__
583 drm_waitqueue_t *queue;
584 #else
585 wait_queue_head_t *queue;
586 #endif
587 int ret = 0;
588
589 #ifdef __NetBSD__
590 spin_lock(&blitq->blit_lock);
591 if (via_dmablit_active(blitq, engine, handle, &queue)) {
592 DRM_SPIN_WAIT_ON(ret, queue, &blitq->blit_lock, 3*HZ,
593 !via_dmablit_active(blitq, engine, handle, NULL));
594 }
595 spin_unlock(&blitq->blit_lock);
596 #else
597 if (via_dmablit_active(blitq, engine, handle, &queue)) {
598 VIA_WAIT_ON(ret, *queue, 3 * HZ,
599 !via_dmablit_active(blitq, engine, handle, NULL));
600 }
601 #endif
602 DRM_DEBUG("DMA blit sync handle 0x%x engine %d returned %d\n",
603 handle, engine, ret);
604
605 return ret;
606 }
607
608
609 /*
610 * A timer that regularly polls the blit engine in cases where we don't have interrupts:
611 * a) Broken hardware (typically those that don't have any video capture facility).
612 * b) Blit abort. The hardware doesn't send an interrupt when a blit is aborted.
613 * The timer and hardware IRQ's can and do work in parallel. If the hardware has
614 * irqs, it will shorten the latency somewhat.
615 */
616
617
618
619 static void
620 via_dmablit_timer(struct timer_list *t)
621 {
622 drm_via_blitq_t *blitq = from_timer(blitq, t, poll_timer);
623 struct drm_device *dev = blitq->dev;
624 int engine = (int)
625 (blitq - ((drm_via_private_t *)dev->dev_private)->blit_queues);
626
627 DRM_DEBUG("Polling timer called for engine %d, jiffies %lu\n", engine,
628 (unsigned long) jiffies);
629
630 via_dmablit_handler(dev, engine, 0);
631
632 if (!timer_pending(&blitq->poll_timer)) {
633 mod_timer(&blitq->poll_timer, jiffies + 1);
634
635 /*
636 * Rerun handler to delete timer if engines are off, and
637 * to shorten abort latency. This is a little nasty.
638 */
639
640 via_dmablit_handler(dev, engine, 0);
641
642 }
643 }
644
645
646
647
648 /*
649 * Workqueue task that frees data and mappings associated with a blit.
650 * Also wakes up waiting processes. Each of these tasks handles one
651 * blit engine only and may not be called on each interrupt.
652 */
653
654
655 static void
656 via_dmablit_workqueue(struct work_struct *work)
657 {
658 drm_via_blitq_t *blitq = container_of(work, drm_via_blitq_t, wq);
659 struct drm_device *dev = blitq->dev;
660 unsigned long irqsave;
661 drm_via_sg_info_t *cur_sg;
662 int cur_released;
663
664
665 DRM_DEBUG("Workqueue task called for blit engine %ld\n", (unsigned long)
666 (blitq - ((drm_via_private_t *)dev->dev_private)->blit_queues));
667
668 spin_lock_irqsave(&blitq->blit_lock, irqsave);
669
670 while (blitq->serviced != blitq->cur) {
671
672 cur_released = blitq->serviced++;
673
674 DRM_DEBUG("Releasing blit slot %d\n", cur_released);
675
676 if (blitq->serviced >= VIA_NUM_BLIT_SLOTS)
677 blitq->serviced = 0;
678
679 cur_sg = blitq->blits[cur_released];
680 blitq->num_free++;
681
682 #ifdef __NetBSD__
683 DRM_SPIN_WAKEUP_ONE(&blitq->busy_queue, &blitq->blit_lock);
684 #endif
685
686 spin_unlock_irqrestore(&blitq->blit_lock, irqsave);
687
688 #ifndef __NetBSD__
689 wake_up(&blitq->busy_queue);
690 #endif
691
692 #ifdef __NetBSD__
693 /* Transfer completed. Sync it. */
694 bus_dmamap_sync(dev->dmat, cur_sg->dmamap, 0,
695 cur_sg->num_pages << PAGE_SHIFT,
696 (cur_sg->direction == DMA_FROM_DEVICE
697 ? BUS_DMASYNC_POSTREAD
698 : BUS_DMASYNC_POSTWRITE));
699 #endif
700 via_free_sg_info(dev, dev->pdev, cur_sg);
701 kfree(cur_sg);
702
703 spin_lock_irqsave(&blitq->blit_lock, irqsave);
704 }
705
706 spin_unlock_irqrestore(&blitq->blit_lock, irqsave);
707 }
708
709
710 /*
711 * Init all blit engines. Currently we use two, but some hardware have 4.
712 */
713
714
715 void
716 via_init_dmablit(struct drm_device *dev)
717 {
718 int i, j;
719 drm_via_private_t *dev_priv = (drm_via_private_t *)dev->dev_private;
720 drm_via_blitq_t *blitq;
721
722 pci_set_master(dev->pdev);
723
724 for (i = 0; i < VIA_NUM_BLIT_ENGINES; ++i) {
725 blitq = dev_priv->blit_queues + i;
726 blitq->dev = dev;
727 blitq->cur_blit_handle = 0;
728 blitq->done_blit_handle = 0;
729 blitq->head = 0;
730 blitq->cur = 0;
731 blitq->serviced = 0;
732 blitq->num_free = VIA_NUM_BLIT_SLOTS - 1;
733 blitq->num_outstanding = 0;
734 blitq->is_active = 0;
735 blitq->aborting = 0;
736 spin_lock_init(&blitq->blit_lock);
737 #ifdef __NetBSD__
738 for (j = 0; j < VIA_NUM_BLIT_SLOTS; ++j)
739 DRM_INIT_WAITQUEUE(blitq->blit_queue + j, "viablt");
740 DRM_INIT_WAITQUEUE(&blitq->busy_queue, "viabusy");
741 #else
742 for (j = 0; j < VIA_NUM_BLIT_SLOTS; ++j)
743 init_waitqueue_head(blitq->blit_queue + j);
744 init_waitqueue_head(&blitq->busy_queue);
745 #endif
746 INIT_WORK(&blitq->wq, via_dmablit_workqueue);
747 timer_setup(&blitq->poll_timer, via_dmablit_timer, 0);
748 }
749 }
750
751 /*
752 * Build all info and do all mappings required for a blit.
753 */
754
755
756 static int
757 via_build_sg_info(struct drm_device *dev, drm_via_sg_info_t *vsg, drm_via_dmablit_t *xfer)
758 {
759 int draw = xfer->to_fb;
760 int ret = 0;
761
762 vsg->direction = (draw) ? DMA_TO_DEVICE : DMA_FROM_DEVICE;
763
764 vsg->state = dr_via_sg_init;
765
766 if (xfer->num_lines <= 0 || xfer->line_length <= 0) {
767 DRM_ERROR("Zero size bitblt.\n");
768 return -EINVAL;
769 }
770
771 /*
772 * Below check is a driver limitation, not a hardware one. We
773 * don't want to lock unused pages, and don't want to incoporate the
774 * extra logic of avoiding them. Make sure there are no.
775 * (Not a big limitation anyway.)
776 */
777
778 if ((xfer->mem_stride - xfer->line_length) > 2*PAGE_SIZE) {
779 DRM_ERROR("Too large system memory stride. Stride: %d, "
780 "Length: %d\n", xfer->mem_stride, xfer->line_length);
781 return -EINVAL;
782 }
783
784 if ((xfer->mem_stride == xfer->line_length) &&
785 (xfer->fb_stride == xfer->line_length)) {
786 xfer->mem_stride *= xfer->num_lines;
787 xfer->line_length = xfer->mem_stride;
788 xfer->fb_stride = xfer->mem_stride;
789 xfer->num_lines = 1;
790 }
791
792 /*
793 * Don't lock an arbitrary large number of pages, since that causes a
794 * DOS security hole.
795 */
796
797 if (xfer->num_lines > 2048 || (xfer->num_lines*xfer->mem_stride > (2048*2048*4))) {
798 DRM_ERROR("Too large PCI DMA bitblt.\n");
799 return -EINVAL;
800 }
801
802 /*
803 * we allow a negative fb stride to allow flipping of images in
804 * transfer.
805 */
806
807 if (xfer->mem_stride < xfer->line_length ||
808 abs(xfer->fb_stride) < xfer->line_length) {
809 DRM_ERROR("Invalid frame-buffer / memory stride.\n");
810 return -EINVAL;
811 }
812
813 /*
814 * A hardware bug seems to be worked around if system memory addresses start on
815 * 16 byte boundaries. This seems a bit restrictive however. VIA is contacted
816 * about this. Meanwhile, impose the following restrictions:
817 */
818
819 #ifdef VIA_BUGFREE
820 if ((((unsigned long)xfer->mem_addr & 3) != ((unsigned long)xfer->fb_addr & 3)) ||
821 ((xfer->num_lines > 1) && ((xfer->mem_stride & 3) != (xfer->fb_stride & 3)))) {
822 DRM_ERROR("Invalid DRM bitblt alignment.\n");
823 return -EINVAL;
824 }
825 #else
826 if ((((unsigned long)xfer->mem_addr & 15) ||
827 ((unsigned long)xfer->fb_addr & 3)) ||
828 ((xfer->num_lines > 1) &&
829 ((xfer->mem_stride & 15) || (xfer->fb_stride & 3)))) {
830 DRM_ERROR("Invalid DRM bitblt alignment.\n");
831 return -EINVAL;
832 }
833 #endif
834
835 if (0 != (ret = via_lock_all_dma_pages(dev, vsg, xfer))) {
836 DRM_ERROR("Could not lock DMA pages.\n");
837 via_free_sg_info(dev, dev->pdev, vsg);
838 return ret;
839 }
840
841 via_map_blit_for_device(dev->pdev, xfer, vsg, 0);
842 if (0 != (ret = via_alloc_desc_pages(dev, vsg))) {
843 DRM_ERROR("Could not allocate DMA descriptor pages.\n");
844 via_free_sg_info(dev, dev->pdev, vsg);
845 return ret;
846 }
847 via_map_blit_for_device(dev->pdev, xfer, vsg, 1);
848
849 return 0;
850 }
851
852
853 /*
854 * Reserve one free slot in the blit queue. Will wait for one second for one
855 * to become available. Otherwise -EBUSY is returned.
856 */
857
858 static int
859 via_dmablit_grab_slot(drm_via_blitq_t *blitq, int engine)
860 {
861 int ret = 0;
862 unsigned long irqsave;
863
864 DRM_DEBUG("Num free is %d\n", blitq->num_free);
865 spin_lock_irqsave(&blitq->blit_lock, irqsave);
866 while (blitq->num_free == 0) {
867 #ifdef __NetBSD__
868 DRM_SPIN_WAIT_ON(ret, &blitq->busy_queue, &blitq->blit_lock,
869 HZ,
870 blitq->num_free > 0);
871 /* Map -EINTR to -EAGAIN. */
872 if (ret == -EINTR)
873 ret = -EAGAIN;
874 /* Bail on failure. */
875 if (ret) {
876 spin_unlock_irqrestore(&blitq->blit_lock, irqsave);
877 return ret;
878 }
879 #else
880 spin_unlock_irqrestore(&blitq->blit_lock, irqsave);
881
882 VIA_WAIT_ON(ret, blitq->busy_queue, HZ, blitq->num_free > 0);
883 if (ret)
884 return (-EINTR == ret) ? -EAGAIN : ret;
885
886 spin_lock_irqsave(&blitq->blit_lock, irqsave);
887 #endif
888 }
889
890 blitq->num_free--;
891 spin_unlock_irqrestore(&blitq->blit_lock, irqsave);
892
893 return 0;
894 }
895
896 /*
897 * Hand back a free slot if we changed our mind.
898 */
899
900 static void
901 via_dmablit_release_slot(drm_via_blitq_t *blitq)
902 {
903 unsigned long irqsave;
904
905 spin_lock_irqsave(&blitq->blit_lock, irqsave);
906 blitq->num_free++;
907 #ifdef __NetBSD__
908 DRM_SPIN_WAKEUP_ONE(&blitq->busy_queue, &blitq->blit_lock);
909 #endif
910 spin_unlock_irqrestore(&blitq->blit_lock, irqsave);
911 #ifndef __NetBSD__
912 wake_up(&blitq->busy_queue);
913 #endif
914 }
915
916 /*
917 * Grab a free slot. Build blit info and queue a blit.
918 */
919
920
921 static int
922 via_dmablit(struct drm_device *dev, drm_via_dmablit_t *xfer)
923 {
924 drm_via_private_t *dev_priv = (drm_via_private_t *)dev->dev_private;
925 drm_via_sg_info_t *vsg;
926 drm_via_blitq_t *blitq;
927 int ret;
928 int engine;
929 unsigned long irqsave;
930
931 if (dev_priv == NULL) {
932 DRM_ERROR("Called without initialization.\n");
933 return -EINVAL;
934 }
935
936 engine = (xfer->to_fb) ? 0 : 1;
937 blitq = dev_priv->blit_queues + engine;
938 if (0 != (ret = via_dmablit_grab_slot(blitq, engine)))
939 return ret;
940 if (NULL == (vsg = kmalloc(sizeof(*vsg), GFP_KERNEL))) {
941 via_dmablit_release_slot(blitq);
942 return -ENOMEM;
943 }
944 if (0 != (ret = via_build_sg_info(dev, vsg, xfer))) {
945 via_dmablit_release_slot(blitq);
946 kfree(vsg);
947 return ret;
948 }
949 #ifdef __NetBSD__
950 /* Prepare to begin a DMA transfer. */
951 bus_dmamap_sync(dev->dmat, vsg->dmamap, 0,
952 vsg->num_pages << PAGE_SHIFT,
953 (vsg->direction == DMA_FROM_DEVICE
954 ? BUS_DMASYNC_PREREAD
955 : BUS_DMASYNC_PREWRITE));
956 #endif
957 spin_lock_irqsave(&blitq->blit_lock, irqsave);
958
959 blitq->blits[blitq->head++] = vsg;
960 if (blitq->head >= VIA_NUM_BLIT_SLOTS)
961 blitq->head = 0;
962 blitq->num_outstanding++;
963 xfer->sync.sync_handle = ++blitq->cur_blit_handle;
964
965 spin_unlock_irqrestore(&blitq->blit_lock, irqsave);
966 xfer->sync.engine = engine;
967
968 via_dmablit_handler(dev, engine, 0);
969
970 return 0;
971 }
972
973 /*
974 * Sync on a previously submitted blit. Note that the X server use signals extensively, and
975 * that there is a very big probability that this IOCTL will be interrupted by a signal. In that
976 * case it returns with -EAGAIN for the signal to be delivered.
977 * The caller should then reissue the IOCTL. This is similar to what is being done for drmGetLock().
978 */
979
980 int
981 via_dma_blit_sync(struct drm_device *dev, void *data, struct drm_file *file_priv)
982 {
983 drm_via_blitsync_t *sync = data;
984 int err;
985
986 if (sync->engine >= VIA_NUM_BLIT_ENGINES)
987 return -EINVAL;
988
989 err = via_dmablit_sync(dev, sync->sync_handle, sync->engine);
990
991 if (-EINTR == err)
992 err = -EAGAIN;
993
994 return err;
995 }
996
997
998 /*
999 * Queue a blit and hand back a handle to be used for sync. This IOCTL may be interrupted by a signal
1000 * while waiting for a free slot in the blit queue. In that case it returns with -EAGAIN and should
1001 * be reissued. See the above IOCTL code.
1002 */
1003
1004 int
1005 via_dma_blit(struct drm_device *dev, void *data, struct drm_file *file_priv)
1006 {
1007 drm_via_dmablit_t *xfer = data;
1008 int err;
1009
1010 err = via_dmablit(dev, xfer);
1011
1012 return err;
1013 }
1014